ARM: tegra: dvfs: Construct safe thermal DVFS table
[linux-3.10.git] / arch / arm / mach-tegra / dvfs.c
1 /*
2  *
3  * Copyright (C) 2010 Google, Inc.
4  *
5  * Author:
6  *      Colin Cross <ccross@google.com>
7  *
8  * Copyright (C) 2010-2013 NVIDIA CORPORATION. All rights reserved.
9  *
10  * This software is licensed under the terms of the GNU General Public
11  * License version 2, as published by the Free Software Foundation, and
12  * may be copied, distributed, and modified under those terms.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/clk.h>
23 #include <linux/clkdev.h>
24 #include <linux/debugfs.h>
25 #include <linux/init.h>
26 #include <linux/list.h>
27 #include <linux/list_sort.h>
28 #include <linux/module.h>
29 #include <linux/regulator/consumer.h>
30 #include <linux/seq_file.h>
31 #include <linux/slab.h>
32 #include <linux/suspend.h>
33 #include <linux/delay.h>
34 #include <linux/clk/tegra.h>
35 #include <linux/reboot.h>
36 #include <linux/clk/tegra.h>
37 #include <linux/tegra-soc.h>
38
39 #include "board.h"
40 #include "clock.h"
41 #include "dvfs.h"
42
43 #define DVFS_RAIL_STATS_BIN     12500
44
45 struct dvfs_rail *tegra_cpu_rail;
46 struct dvfs_rail *tegra_core_rail;
47 struct dvfs_rail *tegra_gpu_rail;
48
49 static LIST_HEAD(dvfs_rail_list);
50 static DEFINE_MUTEX(dvfs_lock);
51 static DEFINE_MUTEX(rail_disable_lock);
52
53 static int dvfs_rail_update(struct dvfs_rail *rail);
54
55 static inline int tegra_dvfs_rail_get_disable_level(struct dvfs_rail *rail)
56 {
57         return rail->disable_millivolts ? : rail->nominal_millivolts;
58 }
59
60 static inline int tegra_dvfs_rail_get_suspend_level(struct dvfs_rail *rail)
61 {
62         return rail->suspend_millivolts ? : rail->nominal_millivolts;
63 }
64
65 void tegra_dvfs_add_relationships(struct dvfs_relationship *rels, int n)
66 {
67         int i;
68         struct dvfs_relationship *rel;
69
70         mutex_lock(&dvfs_lock);
71
72         for (i = 0; i < n; i++) {
73                 rel = &rels[i];
74                 list_add_tail(&rel->from_node, &rel->to->relationships_from);
75                 list_add_tail(&rel->to_node, &rel->from->relationships_to);
76         }
77
78         mutex_unlock(&dvfs_lock);
79 }
80
81 /* Make sure there is a matching cooling device for thermal limit profile. */
82 static void dvfs_validate_cdevs(struct dvfs_rail *rail)
83 {
84         if (!rail->therm_mv_caps != !rail->therm_mv_caps_num) {
85                 rail->therm_mv_caps_num = 0;
86                 rail->therm_mv_caps = NULL;
87                 WARN(1, "%s: not matching thermal caps/num\n", rail->reg_id);
88         }
89
90         if (rail->therm_mv_caps && !rail->vmax_cdev)
91                 WARN(1, "%s: missing vmax cooling device\n", rail->reg_id);
92
93         if (!rail->therm_mv_floors != !rail->therm_mv_floors_num) {
94                 rail->therm_mv_floors_num = 0;
95                 rail->therm_mv_floors = NULL;
96                 WARN(1, "%s: not matching thermal floors/num\n", rail->reg_id);
97         }
98
99         if (rail->therm_mv_floors && !rail->vmin_cdev)
100                 WARN(1, "%s: missing vmin cooling device\n", rail->reg_id);
101
102         /* Limit override range to maximum floor */
103         if (rail->therm_mv_floors)
104                 rail->min_override_millivolts = rail->therm_mv_floors[0];
105
106         /* Only GPU thermal dvfs is supported */
107         if (rail->vts_cdev && (rail != tegra_gpu_rail)) {
108                 rail->vts_cdev = NULL;
109                 WARN(1, "%s: thermal dvfs is not supported\n", rail->reg_id);
110         }
111 }
112
113 int tegra_dvfs_init_rails(struct dvfs_rail *rails[], int n)
114 {
115         int i, mv;
116
117         mutex_lock(&dvfs_lock);
118
119         for (i = 0; i < n; i++) {
120                 INIT_LIST_HEAD(&rails[i]->dvfs);
121                 INIT_LIST_HEAD(&rails[i]->relationships_from);
122                 INIT_LIST_HEAD(&rails[i]->relationships_to);
123
124                 mv = rails[i]->nominal_millivolts;
125                 if (rails[i]->boot_millivolts > mv)
126                         WARN(1, "%s: boot voltage %d above nominal %d\n",
127                              rails[i]->reg_id, rails[i]->boot_millivolts, mv);
128                 if (rails[i]->disable_millivolts > mv)
129                         rails[i]->disable_millivolts = mv;
130                 if (rails[i]->suspend_millivolts > mv)
131                         rails[i]->suspend_millivolts = mv;
132
133                 mv = tegra_dvfs_rail_get_boot_level(rails[i]);
134                 rails[i]->millivolts = mv;
135                 rails[i]->new_millivolts = mv;
136                 if (!rails[i]->step)
137                         rails[i]->step = rails[i]->max_millivolts;
138                 if (!rails[i]->step_up)
139                         rails[i]->step_up = rails[i]->step;
140
141                 list_add_tail(&rails[i]->node, &dvfs_rail_list);
142
143                 if (!strcmp("vdd_cpu", rails[i]->reg_id))
144                         tegra_cpu_rail = rails[i];
145                 else if (!strcmp("vdd_gpu", rails[i]->reg_id))
146                         tegra_gpu_rail = rails[i];
147                 else if (!strcmp("vdd_core", rails[i]->reg_id))
148                         tegra_core_rail = rails[i];
149
150                 dvfs_validate_cdevs(rails[i]);
151         }
152
153         mutex_unlock(&dvfs_lock);
154
155         return 0;
156 };
157
158 static int dvfs_solve_relationship(struct dvfs_relationship *rel)
159 {
160         return rel->solve(rel->from, rel->to);
161 }
162
163 /* rail statistic - called during rail init, or under dfs_lock, or with
164    CPU0 only on-line, and interrupts disabled */
165 static void dvfs_rail_stats_init(struct dvfs_rail *rail, int millivolts)
166 {
167         int dvfs_rail_stats_range;
168
169         if (!rail->stats.bin_uV)
170                 rail->stats.bin_uV = DVFS_RAIL_STATS_BIN;
171
172         dvfs_rail_stats_range =
173                 (DVFS_RAIL_STATS_TOP_BIN - 1) * rail->stats.bin_uV / 1000;
174
175         rail->stats.last_update = ktime_get();
176         if (millivolts >= rail->min_millivolts) {
177                 int i = 1 + (2 * (millivolts - rail->min_millivolts) * 1000 +
178                              rail->stats.bin_uV) / (2 * rail->stats.bin_uV);
179                 rail->stats.last_index = min(i, DVFS_RAIL_STATS_TOP_BIN);
180         }
181
182         if (rail->max_millivolts >
183             rail->min_millivolts + dvfs_rail_stats_range)
184                 pr_warn("tegra_dvfs: %s: stats above %d mV will be squashed\n",
185                         rail->reg_id,
186                         rail->min_millivolts + dvfs_rail_stats_range);
187 }
188
189 static void dvfs_rail_stats_update(
190         struct dvfs_rail *rail, int millivolts, ktime_t now)
191 {
192         rail->stats.time_at_mv[rail->stats.last_index] = ktime_add(
193                 rail->stats.time_at_mv[rail->stats.last_index], ktime_sub(
194                         now, rail->stats.last_update));
195         rail->stats.last_update = now;
196
197         if (rail->stats.off)
198                 return;
199
200         if (millivolts >= rail->min_millivolts) {
201                 int i = 1 + (2 * (millivolts - rail->min_millivolts) * 1000 +
202                              rail->stats.bin_uV) / (2 * rail->stats.bin_uV);
203                 rail->stats.last_index = min(i, DVFS_RAIL_STATS_TOP_BIN);
204         } else if (millivolts == 0)
205                         rail->stats.last_index = 0;
206 }
207
208 static void dvfs_rail_stats_pause(struct dvfs_rail *rail,
209                                   ktime_t delta, bool on)
210 {
211         int i = on ? rail->stats.last_index : 0;
212         rail->stats.time_at_mv[i] = ktime_add(rail->stats.time_at_mv[i], delta);
213 }
214
215 void tegra_dvfs_rail_off(struct dvfs_rail *rail, ktime_t now)
216 {
217         if (rail) {
218                 dvfs_rail_stats_update(rail, 0, now);
219                 rail->stats.off = true;
220         }
221 }
222
223 void tegra_dvfs_rail_on(struct dvfs_rail *rail, ktime_t now)
224 {
225         if (rail) {
226                 rail->stats.off = false;
227                 dvfs_rail_stats_update(rail, rail->millivolts, now);
228         }
229 }
230
231 void tegra_dvfs_rail_pause(struct dvfs_rail *rail, ktime_t delta, bool on)
232 {
233         if (rail)
234                 dvfs_rail_stats_pause(rail, delta, on);
235 }
236
237 static int dvfs_rail_set_voltage_reg(struct dvfs_rail *rail, int millivolts)
238 {
239         int ret;
240
241         /*
242          * safely return success for low voltage requests on fixed regulator
243          * (higher requests will go through and fail, as they should)
244          */
245         if (rail->fixed_millivolts && (millivolts <= rail->fixed_millivolts))
246                 return 0;
247
248         rail->updating = true;
249         rail->reg_max_millivolts = rail->reg_max_millivolts ==
250                 rail->max_millivolts ?
251                 rail->max_millivolts + 1 : rail->max_millivolts;
252         ret = regulator_set_voltage(rail->reg,
253                 millivolts * 1000,
254                 rail->reg_max_millivolts * 1000);
255         rail->updating = false;
256
257         return ret;
258 }
259
260 /* Sets the voltage on a dvfs rail to a specific value, and updates any
261  * rails that depend on this rail. */
262 static int dvfs_rail_set_voltage(struct dvfs_rail *rail, int millivolts)
263 {
264         int ret = 0;
265         struct dvfs_relationship *rel;
266         int step, offset;
267         int i;
268         int steps;
269         bool jmp_to_zero;
270
271         if (!rail->reg) {
272                 if (millivolts == rail->millivolts)
273                         return 0;
274                 else
275                         return -EINVAL;
276         }
277
278         if (millivolts > rail->millivolts) {
279                 step = rail->step_up;
280                 offset = step;
281         } else {
282                 step = rail->step;
283                 offset = -step;
284         }
285
286         /*
287          * DFLL adjusts rail voltage automatically, but not exactly to the
288          * expected level - update stats, anyway.
289          */
290         if (rail->dfll_mode) {
291                 rail->millivolts = rail->new_millivolts = millivolts;
292                 dvfs_rail_stats_update(rail, millivolts, ktime_get());
293                 return 0;
294         }
295
296         if (rail->disabled)
297                 return 0;
298
299         rail->resolving_to = true;
300         jmp_to_zero = rail->jmp_to_zero &&
301                         ((millivolts == 0) || (rail->millivolts == 0));
302         steps = jmp_to_zero ? 1 :
303                 DIV_ROUND_UP(abs(millivolts - rail->millivolts), step);
304
305         for (i = 0; i < steps; i++) {
306                 if (!jmp_to_zero &&
307                     (abs(millivolts - rail->millivolts) > step))
308                         rail->new_millivolts = rail->millivolts + offset;
309                 else
310                         rail->new_millivolts = millivolts;
311
312                 /* Before changing the voltage, tell each rail that depends
313                  * on this rail that the voltage will change.
314                  * This rail will be the "from" rail in the relationship,
315                  * the rail that depends on this rail will be the "to" rail.
316                  * from->millivolts will be the old voltage
317                  * from->new_millivolts will be the new voltage */
318                 list_for_each_entry(rel, &rail->relationships_to, to_node) {
319                         ret = dvfs_rail_update(rel->to);
320                         if (ret)
321                                 goto out;
322                 }
323
324                 ret = dvfs_rail_set_voltage_reg(rail, rail->new_millivolts);
325                 if (ret) {
326                         pr_err("Failed to set dvfs regulator %s\n", rail->reg_id);
327                         goto out;
328                 }
329
330                 rail->millivolts = rail->new_millivolts;
331                 dvfs_rail_stats_update(rail, rail->millivolts, ktime_get());
332
333                 /* After changing the voltage, tell each rail that depends
334                  * on this rail that the voltage has changed.
335                  * from->millivolts and from->new_millivolts will be the
336                  * new voltage */
337                 list_for_each_entry(rel, &rail->relationships_to, to_node) {
338                         ret = dvfs_rail_update(rel->to);
339                         if (ret)
340                                 goto out;
341                 }
342         }
343
344         if (unlikely(rail->millivolts != millivolts)) {
345                 pr_err("%s: rail didn't reach target %d in %d steps (%d)\n",
346                         __func__, millivolts, steps, rail->millivolts);
347                 ret = -EINVAL;
348         }
349
350 out:
351         rail->resolving_to = false;
352         return ret;
353 }
354
355 /* Determine the minimum valid voltage for a rail, taking into account
356  * the dvfs clocks and any rails that this rail depends on.  Calls
357  * dvfs_rail_set_voltage with the new voltage, which will call
358  * dvfs_rail_update on any rails that depend on this rail. */
359 static inline int dvfs_rail_apply_limits(struct dvfs_rail *rail, int millivolts)
360 {
361         int min_mv = rail->min_millivolts;
362
363         if (rail->therm_mv_floors) {
364                 int i = rail->therm_floor_idx;
365                 if (i < rail->therm_mv_floors_num)
366                         min_mv = rail->therm_mv_floors[i];
367         }
368
369         if (rail->override_millivolts) {
370                 millivolts = rail->override_millivolts;
371         } else {
372                 /* apply offset and clip up to pll mode fixed mv */
373                 millivolts += rail->dbg_mv_offs;
374                 if (!rail->dfll_mode && rail->fixed_millivolts &&
375                     (millivolts < rail->fixed_millivolts))
376                         millivolts = rail->fixed_millivolts;
377         }
378
379         if (millivolts < min_mv)
380                 millivolts = min_mv;
381
382         return millivolts;
383 }
384
385 static int dvfs_rail_update(struct dvfs_rail *rail)
386 {
387         int millivolts = 0;
388         struct dvfs *d;
389         struct dvfs_relationship *rel;
390         int ret = 0;
391         int steps;
392
393         /* if dvfs is suspended, return and handle it during resume */
394         if (rail->suspended)
395                 return 0;
396
397         /* if regulators are not connected yet, return and handle it later */
398         if (!rail->reg)
399                 return 0;
400
401         /* if no clock has requested voltage since boot, defer update */
402         if (!rail->rate_set)
403                 return 0;
404
405         /* if rail update is entered while resolving circular dependencies,
406            abort recursion */
407         if (rail->resolving_to)
408                 return 0;
409
410         /* Find the maximum voltage requested by any clock */
411         list_for_each_entry(d, &rail->dvfs, reg_node)
412                 millivolts = max(d->cur_millivolts, millivolts);
413
414         /* Apply offset and min/max limits if any clock is requesting voltage */
415         if (millivolts)
416                 millivolts = dvfs_rail_apply_limits(rail, millivolts);
417         /* Keep current voltage if regulator is to be disabled via explicitly */
418         else if (rail->in_band_pm)
419                 return 0;
420         /* Keep current voltage if regulator must not be disabled at run time */
421         else if (!rail->jmp_to_zero) {
422                 WARN(1, "%s cannot be turned off by dvfs\n");
423                 return 0;
424         }
425         /* else: fall thru if regulator is turned off by side band signaling */
426
427         /* retry update if limited by from-relationship to account for
428            circular dependencies */
429         steps = DIV_ROUND_UP(abs(millivolts - rail->millivolts), rail->step);
430         for (; steps >= 0; steps--) {
431                 rail->new_millivolts = millivolts;
432
433                 /* Check any rails that this rail depends on */
434                 list_for_each_entry(rel, &rail->relationships_from, from_node)
435                         rail->new_millivolts = dvfs_solve_relationship(rel);
436
437                 if (rail->new_millivolts == rail->millivolts)
438                         break;
439
440                 ret = dvfs_rail_set_voltage(rail, rail->new_millivolts);
441         }
442
443         return ret;
444 }
445
446 static struct regulator *get_fixed_regulator(struct dvfs_rail *rail)
447 {
448         struct regulator *reg;
449         char reg_id[80];
450         struct dvfs *d;
451         int v, i;
452         unsigned long dfll_boost;
453
454         strcpy(reg_id, rail->reg_id);
455         strcat(reg_id, "_fixed");
456         reg = regulator_get(NULL, reg_id);
457         if (IS_ERR(reg))
458                 return reg;
459
460         v = regulator_get_voltage(reg) / 1000;
461         if ((v < rail->min_millivolts) || (v > rail->nominal_millivolts) ||
462             (rail->therm_mv_floors && v < rail->therm_mv_floors[0])) {
463                 pr_err("tegra_dvfs: ivalid fixed %s voltage %d\n",
464                        rail->reg_id, v);
465                 return ERR_PTR(-EINVAL);
466         }
467
468         /*
469          * Only fixed at nominal voltage vdd_core regulator is allowed, same
470          * is true for cpu rail if dfll mode is not supported at all. No thermal
471          * capping can be implemented in this case.
472          */
473         if (!IS_ENABLED(CONFIG_ARCH_TEGRA_HAS_CL_DVFS) ||
474             (rail != tegra_cpu_rail)) {
475                 if (v != rail->nominal_millivolts) {
476                         pr_err("tegra_dvfs: %s fixed below nominal at %d\n",
477                                rail->reg_id, v);
478                         return ERR_PTR(-EINVAL);
479                 }
480                 if (rail->therm_mv_caps) {
481                         pr_err("tegra_dvfs: cannot fix %s with thermal caps\n",
482                                rail->reg_id);
483                         return ERR_PTR(-ENOSYS);
484                 }
485                 return reg;
486         }
487
488         /*
489          * If dfll mode is supported, fixed vdd_cpu regulator may be below
490          * nominal in pll mode - maximum cpu rate in pll mode is limited
491          * respectively. Regulator is required to allow automatic scaling
492          * in dfll mode.
493          *
494          * FIXME: platform data to explicitly identify such "hybrid" regulator?
495          */
496         d = list_first_entry(&rail->dvfs, struct dvfs, reg_node);
497         for (i = 0; i < d->num_freqs; i++) {
498                 if (d->millivolts[i] > v)
499                         break;
500         }
501
502         if (!i) {
503                 pr_err("tegra_dvfs: %s fixed at %d: too low for min rate\n",
504                        rail->reg_id, v);
505                 return ERR_PTR(-EINVAL);
506         }
507
508         dfll_boost = (d->freqs[d->num_freqs - 1] - d->freqs[i - 1]);
509         if (d->dfll_data.max_rate_boost < dfll_boost)
510                 d->dfll_data.max_rate_boost = dfll_boost;
511
512         rail->fixed_millivolts = v;
513         return reg;
514 }
515
516 static int dvfs_rail_connect_to_regulator(struct dvfs_rail *rail)
517 {
518         struct regulator *reg;
519         int v;
520
521         if (!rail->reg) {
522                 reg = regulator_get(NULL, rail->reg_id);
523                 if (IS_ERR(reg)) {
524                         reg = get_fixed_regulator(rail);
525                         if (IS_ERR(reg)) {
526                                 pr_err("tegra_dvfs: failed to connect %s rail\n",
527                                        rail->reg_id);
528                                 return PTR_ERR(reg);
529                         }
530                 }
531                 rail->reg = reg;
532         }
533
534         v = regulator_enable(rail->reg);
535         if (v < 0) {
536                 pr_err("tegra_dvfs: failed on enabling regulator %s\n, err %d",
537                         rail->reg_id, v);
538                 return v;
539         }
540
541         v = regulator_get_voltage(rail->reg);
542         if (v < 0) {
543                 pr_err("tegra_dvfs: failed initial get %s voltage\n",
544                        rail->reg_id);
545                 return v;
546         }
547         rail->millivolts = v / 1000;
548         rail->new_millivolts = rail->millivolts;
549         dvfs_rail_stats_init(rail, rail->millivolts);
550
551         if (rail->boot_millivolts &&
552             (rail->boot_millivolts != rail->millivolts)) {
553                 WARN(1, "%s boot voltage %d does not match expected %d\n",
554                      rail->reg_id, rail->millivolts, rail->boot_millivolts);
555                 rail->boot_millivolts = rail->millivolts;
556         }
557         return 0;
558 }
559
560 static inline unsigned long *dvfs_get_freqs(struct dvfs *d)
561 {
562         return d->alt_freqs ? : &d->freqs[0];
563 }
564
565 static inline const int *dvfs_get_millivolts(struct dvfs *d, unsigned long rate)
566 {
567         if (tegra_dvfs_is_dfll_scale(d, rate))
568                 return d->dfll_millivolts;
569
570         return tegra_dvfs_get_millivolts_pll(d);
571 }
572
573 static int
574 __tegra_dvfs_set_rate(struct dvfs *d, unsigned long rate)
575 {
576         int i = 0;
577         int ret, mv, detach_mv;
578         unsigned long *freqs = dvfs_get_freqs(d);
579         const int *millivolts = dvfs_get_millivolts(d, rate);
580
581         if (freqs == NULL || millivolts == NULL)
582                 return -ENODEV;
583
584         /* On entry to dfll range limit 1st step to range bottom (full ramp of
585            voltage/rate is completed automatically in dfll mode) */
586         if (tegra_dvfs_is_dfll_range_entry(d, rate))
587                 rate = d->dfll_data.use_dfll_rate_min;
588
589         if (rate > freqs[d->num_freqs - 1]) {
590                 pr_warn("tegra_dvfs: rate %lu too high for dvfs on %s\n", rate,
591                         d->clk_name);
592                 return -EINVAL;
593         }
594
595         if (rate == 0) {
596                 d->cur_millivolts = 0;
597         } else {
598                 while (i < d->num_freqs && rate > freqs[i])
599                         i++;
600
601                 if ((d->max_millivolts) &&
602                     (millivolts[i] > d->max_millivolts)) {
603                         pr_warn("tegra_dvfs: voltage %d too high for dvfs on"
604                                 " %s\n", millivolts[i], d->clk_name);
605                         return -EINVAL;
606                 }
607
608                 mv = millivolts[i];
609                 detach_mv = tegra_dvfs_rail_get_boot_level(d->dvfs_rail);
610                 if (!d->dvfs_rail->reg && (mv > detach_mv)) {
611                         pr_warn("%s: %s: voltage %d above boot limit %d\n",
612                                 __func__, d->clk_name, mv, detach_mv);
613                         return -EINVAL;
614                 }
615
616                 detach_mv = tegra_dvfs_rail_get_disable_level(d->dvfs_rail);
617                 if (d->dvfs_rail->disabled && (mv > detach_mv)) {
618                         pr_warn("%s: %s: voltage %d above disable limit %d\n",
619                                 __func__, d->clk_name, mv, detach_mv);
620                         return -EINVAL;
621                 }
622
623                 detach_mv = tegra_dvfs_rail_get_suspend_level(d->dvfs_rail);
624                 if (d->dvfs_rail->suspended && (mv > detach_mv)) {
625                         pr_warn("%s: %s: voltage %d above disable limit %d\n",
626                                 __func__, d->clk_name, mv, detach_mv);
627                         return -EINVAL;
628                 }
629                 d->cur_millivolts = millivolts[i];
630         }
631
632         d->cur_rate = rate;
633
634         d->dvfs_rail->rate_set = true;
635         ret = dvfs_rail_update(d->dvfs_rail);
636         if (ret)
637                 pr_err("Failed to set regulator %s for clock %s to %d mV\n",
638                         d->dvfs_rail->reg_id, d->clk_name, d->cur_millivolts);
639
640         return ret;
641 }
642
643 int tegra_dvfs_alt_freqs_set(struct dvfs *d, unsigned long *alt_freqs)
644 {
645         int ret = 0;
646
647         mutex_lock(&dvfs_lock);
648
649         if (d->alt_freqs != alt_freqs) {
650                 d->alt_freqs = alt_freqs;
651                 ret = __tegra_dvfs_set_rate(d, d->cur_rate);
652         }
653
654         mutex_unlock(&dvfs_lock);
655         return ret;
656 }
657
658 static int predict_millivolts(struct clk *c, const int *millivolts,
659                               unsigned long rate)
660 {
661         int i;
662
663         if (!millivolts)
664                 return -ENODEV;
665         /*
666          * Predicted voltage can not be used across the switch to alternative
667          * frequency limits. For now, just fail the call for clock that has
668          * alternative limits initialized.
669          */
670         if (c->dvfs->alt_freqs)
671                 return -ENOSYS;
672
673         for (i = 0; i < c->dvfs->num_freqs; i++) {
674                 if (rate <= c->dvfs->freqs[i])
675                         break;
676         }
677
678         if (i == c->dvfs->num_freqs)
679                 return -EINVAL;
680
681         return millivolts[i];
682 }
683
684 int tegra_dvfs_predict_millivolts(struct clk *c, unsigned long rate)
685 {
686         const int *millivolts;
687
688         if (!rate || !c->dvfs)
689                 return 0;
690
691         millivolts = tegra_dvfs_is_dfll_range(c->dvfs, rate) ?
692                 c->dvfs->dfll_millivolts :
693                 tegra_dvfs_get_millivolts_pll(c->dvfs);
694         return predict_millivolts(c, millivolts, rate);
695 }
696
697 int tegra_dvfs_predict_millivolts_pll(struct clk *c, unsigned long rate)
698 {
699         const int *millivolts;
700
701         if (!rate || !c->dvfs)
702                 return 0;
703
704         millivolts = tegra_dvfs_get_millivolts_pll(c->dvfs);
705         return predict_millivolts(c, millivolts, rate);
706 }
707
708 int tegra_dvfs_predict_millivolts_dfll(struct clk *c, unsigned long rate)
709 {
710         const int *millivolts;
711
712         if (!rate || !c->dvfs)
713                 return 0;
714
715         millivolts = c->dvfs->dfll_millivolts;
716         return predict_millivolts(c, millivolts, rate);
717 }
718
719 const int *tegra_dvfs_get_millivolts_pll(struct dvfs *d)
720 {
721         if (d->therm_dvfs) {
722                 int therm_idx = d->dvfs_rail->therm_scale_idx;
723                 return d->millivolts + therm_idx * MAX_DVFS_FREQS;
724         }
725         return d->millivolts;
726 }
727
728 int tegra_dvfs_set_rate(struct clk *c, unsigned long rate)
729 {
730         int ret;
731
732         if (!c->dvfs)
733                 return -EINVAL;
734
735         mutex_lock(&dvfs_lock);
736         ret = __tegra_dvfs_set_rate(c->dvfs, rate);
737         mutex_unlock(&dvfs_lock);
738
739         return ret;
740 }
741 EXPORT_SYMBOL(tegra_dvfs_set_rate);
742
743 int tegra_dvfs_get_freqs(struct clk *c, unsigned long **freqs, int *num_freqs)
744 {
745         if (!c->dvfs)
746                 return -ENOSYS;
747
748         if (c->dvfs->alt_freqs)
749                 return -ENOSYS;
750
751         *num_freqs = c->dvfs->num_freqs;
752         *freqs = c->dvfs->freqs;
753
754         return 0;
755 }
756 EXPORT_SYMBOL(tegra_dvfs_get_freqs);
757
758 #ifdef CONFIG_TEGRA_VDD_CORE_OVERRIDE
759 static DEFINE_MUTEX(rail_override_lock);
760
761 static int dvfs_override_core_voltage(int override_mv)
762 {
763         int ret, floor, ceiling;
764         struct dvfs_rail *rail = tegra_core_rail;
765
766         if (!rail)
767                 return -ENOENT;
768
769         if (rail->fixed_millivolts)
770                 return -ENOSYS;
771
772         floor = rail->min_override_millivolts;
773         ceiling = rail->nominal_millivolts;
774         if (override_mv && ((override_mv < floor) || (override_mv > ceiling))) {
775                 pr_err("%s: override level %d outside the range [%d...%d]\n",
776                        __func__, override_mv, floor, ceiling);
777                 return -EINVAL;
778         }
779
780         mutex_lock(&rail_override_lock);
781
782         if (override_mv == rail->override_millivolts) {
783                 ret = 0;
784                 goto out;
785         }
786
787         if (override_mv) {
788                 ret = tegra_dvfs_core_cap_level_apply(override_mv);
789                 if (ret) {
790                         pr_err("%s: failed to set cap for override level %d\n",
791                                __func__, override_mv);
792                         goto out;
793                 }
794         }
795
796         mutex_lock(&dvfs_lock);
797         if (rail->disabled || rail->suspended) {
798                 pr_err("%s: cannot scale %s rail\n", __func__,
799                        rail->disabled ? "disabled" : "suspended");
800                 ret = -EPERM;
801                 if (!override_mv) {
802                         mutex_unlock(&dvfs_lock);
803                         goto out;
804                 }
805         } else {
806                 rail->override_millivolts = override_mv;
807                 ret = dvfs_rail_update(rail);
808                 if (ret) {
809                         pr_err("%s: failed to set override level %d\n",
810                                __func__, override_mv);
811                         rail->override_millivolts = 0;
812                         dvfs_rail_update(rail);
813                 }
814         }
815         mutex_unlock(&dvfs_lock);
816
817         if (!override_mv || ret)
818                 tegra_dvfs_core_cap_level_apply(0);
819 out:
820         mutex_unlock(&rail_override_lock);
821         return ret;
822 }
823 #else
824 static int dvfs_override_core_voltage(int override_mv)
825 {
826         pr_err("%s: vdd core override is not supported\n", __func__);
827         return -ENOSYS;
828 }
829 #endif
830
831 int tegra_dvfs_override_core_voltage(struct clk *c, int override_mv)
832 {
833         if (!c->dvfs || !c->dvfs->can_override) {
834                 pr_err("%s: %s cannot override vdd core\n", __func__, c->name);
835                 return -EPERM;
836         }
837         return dvfs_override_core_voltage(override_mv);
838 }
839 EXPORT_SYMBOL(tegra_dvfs_override_core_voltage);
840
841 /* May only be called during clock init, does not take any locks on clock c. */
842 int __init tegra_enable_dvfs_on_clk(struct clk *c, struct dvfs *d)
843 {
844         int i;
845
846         if (c->dvfs) {
847                 pr_err("Error when enabling dvfs on %s for clock %s:\n",
848                         d->dvfs_rail->reg_id, c->name);
849                 pr_err("DVFS already enabled for %s\n",
850                         c->dvfs->dvfs_rail->reg_id);
851                 return -EINVAL;
852         }
853
854         for (i = 0; i < MAX_DVFS_FREQS; i++) {
855                 if (d->millivolts[i] == 0)
856                         break;
857
858                 d->freqs[i] *= d->freqs_mult;
859
860                 /* If final frequencies are 0, pad with previous frequency */
861                 if (d->freqs[i] == 0 && i > 1)
862                         d->freqs[i] = d->freqs[i - 1];
863         }
864         d->num_freqs = i;
865
866         if (d->auto_dvfs) {
867                 c->auto_dvfs = true;
868                 clk_set_cansleep(c);
869         }
870
871         c->dvfs = d;
872
873         /*
874          * Minimum core override level is determined as maximum voltage required
875          * for clocks outside shared buses (shared bus rates can be capped to
876          * safe levels when override limit is set)
877          */
878         if (i && c->ops && !c->ops->shared_bus_update &&
879             !(c->flags & PERIPH_ON_CBUS) && !d->can_override) {
880                 int mv = tegra_dvfs_predict_millivolts(c, d->freqs[i-1]);
881                 if (d->dvfs_rail->min_override_millivolts < mv)
882                         d->dvfs_rail->min_override_millivolts = mv;
883         }
884
885         mutex_lock(&dvfs_lock);
886         list_add_tail(&d->reg_node, &d->dvfs_rail->dvfs);
887         mutex_unlock(&dvfs_lock);
888
889         return 0;
890 }
891
892 static bool tegra_dvfs_all_rails_suspended(void)
893 {
894         struct dvfs_rail *rail;
895         bool all_suspended = true;
896
897         list_for_each_entry(rail, &dvfs_rail_list, node)
898                 if (!rail->suspended && !rail->disabled)
899                         all_suspended = false;
900
901         return all_suspended;
902 }
903
904 static bool tegra_dvfs_from_rails_suspended_or_solved(struct dvfs_rail *to)
905 {
906         struct dvfs_relationship *rel;
907         bool all_suspended = true;
908
909         list_for_each_entry(rel, &to->relationships_from, from_node)
910                 if (!rel->from->suspended && !rel->from->disabled &&
911                         !rel->solved_at_nominal)
912                         all_suspended = false;
913
914         return all_suspended;
915 }
916
917 static int tegra_dvfs_suspend_one(void)
918 {
919         struct dvfs_rail *rail;
920         int ret, mv;
921
922         list_for_each_entry(rail, &dvfs_rail_list, node) {
923                 if (!rail->suspended && !rail->disabled &&
924                     tegra_dvfs_from_rails_suspended_or_solved(rail)) {
925                         /* Safe, as pll mode rate is capped to fixed level */
926                         if (!rail->dfll_mode && rail->fixed_millivolts) {
927                                 mv = rail->fixed_millivolts;
928                         } else {
929                                 mv = tegra_dvfs_rail_get_suspend_level(rail);
930                                 mv = dvfs_rail_apply_limits(rail, mv);
931                         }
932
933                         /* apply suspend limit only if it is above current mv */
934                         ret = -EPERM;
935                         if (mv >= rail->millivolts)
936                                 ret = dvfs_rail_set_voltage(rail, mv);
937                         if (ret) {
938                                 pr_err("tegra_dvfs: failed %s suspend at %d\n",
939                                        rail->reg_id, rail->millivolts);
940                                 return ret;
941                         }
942
943                         rail->suspended = true;
944                         return 0;
945                 }
946         }
947
948         return -EINVAL;
949 }
950
951 static void tegra_dvfs_resume(void)
952 {
953         struct dvfs_rail *rail;
954
955         mutex_lock(&dvfs_lock);
956
957         list_for_each_entry(rail, &dvfs_rail_list, node)
958                 rail->suspended = false;
959
960         list_for_each_entry(rail, &dvfs_rail_list, node)
961                 dvfs_rail_update(rail);
962
963         mutex_unlock(&dvfs_lock);
964 }
965
966 static int tegra_dvfs_suspend(void)
967 {
968         int ret = 0;
969
970         mutex_lock(&dvfs_lock);
971
972         while (!tegra_dvfs_all_rails_suspended()) {
973                 ret = tegra_dvfs_suspend_one();
974                 if (ret)
975                         break;
976         }
977
978         mutex_unlock(&dvfs_lock);
979
980         if (ret)
981                 tegra_dvfs_resume();
982
983         return ret;
984 }
985
986 static int tegra_dvfs_pm_suspend(struct notifier_block *nb,
987                                  unsigned long event, void *data)
988 {
989         if (event == PM_SUSPEND_PREPARE) {
990                 if (tegra_dvfs_suspend())
991                         return NOTIFY_STOP;
992                 pr_info("tegra_dvfs: suspended\n");
993         }
994         return NOTIFY_OK;
995 };
996
997 static int tegra_dvfs_pm_resume(struct notifier_block *nb,
998                                 unsigned long event, void *data)
999 {
1000         if (event == PM_POST_SUSPEND) {
1001                 tegra_dvfs_resume();
1002                 pr_info("tegra_dvfs: resumed\n");
1003         }
1004         return NOTIFY_OK;
1005 };
1006
1007 static struct notifier_block tegra_dvfs_suspend_nb = {
1008         .notifier_call = tegra_dvfs_pm_suspend,
1009         .priority = -1,
1010 };
1011
1012 static struct notifier_block tegra_dvfs_resume_nb = {
1013         .notifier_call = tegra_dvfs_pm_resume,
1014         .priority = 1,
1015 };
1016
1017 static int tegra_dvfs_reboot_notify(struct notifier_block *nb,
1018                                 unsigned long event, void *data)
1019 {
1020         switch (event) {
1021         case SYS_RESTART:
1022         case SYS_HALT:
1023         case SYS_POWER_OFF:
1024                 tegra_dvfs_suspend();
1025                 return NOTIFY_OK;
1026         }
1027         return NOTIFY_DONE;
1028 }
1029
1030 static struct notifier_block tegra_dvfs_reboot_nb = {
1031         .notifier_call = tegra_dvfs_reboot_notify,
1032 };
1033
1034 /* must be called with dvfs lock held */
1035 static void __tegra_dvfs_rail_disable(struct dvfs_rail *rail)
1036 {
1037         int ret = -EPERM;
1038         int mv;
1039
1040         /* don't set voltage in DFLL mode - won't work, but break stats */
1041         if (rail->dfll_mode) {
1042                 rail->disabled = true;
1043                 return;
1044         }
1045
1046         /* Safe, as pll mode rate is capped to fixed level */
1047         if (!rail->dfll_mode && rail->fixed_millivolts) {
1048                 mv = rail->fixed_millivolts;
1049         } else {
1050                 mv = tegra_dvfs_rail_get_disable_level(rail);
1051                 mv = dvfs_rail_apply_limits(rail, mv);
1052         }
1053
1054         /* apply detach mode limit provided it is above current volatge */
1055         if (mv >= rail->millivolts)
1056                 ret = dvfs_rail_set_voltage(rail, mv);
1057         if (ret) {
1058                 pr_err("tegra_dvfs: failed to disable %s at %d\n",
1059                        rail->reg_id, rail->millivolts);
1060                 return;
1061         }
1062         rail->disabled = true;
1063 }
1064
1065 /* must be called with dvfs lock held */
1066 static void __tegra_dvfs_rail_enable(struct dvfs_rail *rail)
1067 {
1068         rail->disabled = false;
1069         dvfs_rail_update(rail);
1070 }
1071
1072 void tegra_dvfs_rail_enable(struct dvfs_rail *rail)
1073 {
1074         if (!rail)
1075                 return;
1076
1077         mutex_lock(&rail_disable_lock);
1078
1079         if (rail->disabled) {
1080                 mutex_lock(&dvfs_lock);
1081                 __tegra_dvfs_rail_enable(rail);
1082                 mutex_unlock(&dvfs_lock);
1083
1084                 tegra_dvfs_rail_post_enable(rail);
1085         }
1086         mutex_unlock(&rail_disable_lock);
1087 }
1088
1089 void tegra_dvfs_rail_disable(struct dvfs_rail *rail)
1090 {
1091         if (!rail)
1092                 return;
1093
1094         mutex_lock(&rail_disable_lock);
1095         if (rail->disabled)
1096                 goto out;
1097
1098         /* rail disable will set it to nominal voltage underneath clock
1099            framework - need to re-configure clock rates that are not safe
1100            at nominal (yes, unsafe at nominal is ugly, but possible). Rate
1101            change must be done outside of dvfs lock. */
1102         if (tegra_dvfs_rail_disable_prepare(rail)) {
1103                 pr_info("dvfs: failed to prepare regulator %s to disable\n",
1104                         rail->reg_id);
1105                 goto out;
1106         }
1107
1108         mutex_lock(&dvfs_lock);
1109         __tegra_dvfs_rail_disable(rail);
1110         mutex_unlock(&dvfs_lock);
1111 out:
1112         mutex_unlock(&rail_disable_lock);
1113 }
1114
1115 int tegra_dvfs_rail_disable_by_name(const char *reg_id)
1116 {
1117         struct dvfs_rail *rail = tegra_dvfs_get_rail_by_name(reg_id);
1118         if (!rail)
1119                 return -EINVAL;
1120
1121         tegra_dvfs_rail_disable(rail);
1122         return 0;
1123 }
1124
1125 struct dvfs_rail *tegra_dvfs_get_rail_by_name(const char *reg_id)
1126 {
1127         struct dvfs_rail *rail;
1128
1129         mutex_lock(&dvfs_lock);
1130         list_for_each_entry(rail, &dvfs_rail_list, node) {
1131                 if (!strcmp(reg_id, rail->reg_id)) {
1132                         mutex_unlock(&dvfs_lock);
1133                         return rail;
1134                 }
1135         }
1136         mutex_unlock(&dvfs_lock);
1137         return NULL;
1138 }
1139
1140 int tegra_dvfs_rail_power_up(struct dvfs_rail *rail)
1141 {
1142         int ret = -ENOENT;
1143
1144         if (!rail || !rail->in_band_pm)
1145                 return -ENOSYS;
1146
1147         mutex_lock(&dvfs_lock);
1148         if (rail->reg) {
1149                 ret = regulator_enable(rail->reg);
1150                 if (!ret && !timekeeping_suspended)
1151                         tegra_dvfs_rail_on(rail, ktime_get());
1152         }
1153         mutex_unlock(&dvfs_lock);
1154         return ret;
1155 }
1156
1157 int tegra_dvfs_rail_power_down(struct dvfs_rail *rail)
1158 {
1159         int ret = -ENOENT;
1160
1161         if (!rail || !rail->in_band_pm)
1162                 return -ENOSYS;
1163
1164         mutex_lock(&dvfs_lock);
1165         if (rail->reg) {
1166                 ret = regulator_disable(rail->reg);
1167                 if (!ret && !timekeeping_suspended)
1168                         tegra_dvfs_rail_off(rail, ktime_get());
1169         }
1170         mutex_unlock(&dvfs_lock);
1171         return ret;
1172 }
1173
1174 bool tegra_dvfs_is_rail_up(struct dvfs_rail *rail)
1175 {
1176         bool ret = false;
1177
1178         if (!rail)
1179                 return false;
1180
1181         if (!rail->in_band_pm)
1182                 return true;
1183
1184         mutex_lock(&dvfs_lock);
1185         if (rail->reg)
1186                 ret = regulator_is_enabled(rail->reg) > 0;
1187         mutex_unlock(&dvfs_lock);
1188         return ret;
1189 }
1190
1191 bool tegra_dvfs_rail_updating(struct clk *clk)
1192 {
1193         return (!clk ? false :
1194                 (!clk->dvfs ? false :
1195                  (!clk->dvfs->dvfs_rail ? false :
1196                   (clk->dvfs->dvfs_rail->updating ||
1197                    clk->dvfs->dvfs_rail->dfll_mode_updating))));
1198 }
1199
1200 #ifdef CONFIG_OF
1201 int __init of_tegra_dvfs_init(const struct of_device_id *matches)
1202 {
1203         int ret;
1204         struct device_node *np;
1205
1206         for_each_matching_node(np, matches) {
1207                 const struct of_device_id *match = of_match_node(matches, np);
1208                 of_tegra_dvfs_init_cb_t dvfs_init_cb = match->data;
1209                 ret = dvfs_init_cb(np);
1210                 if (ret) {
1211                         pr_err("dt: Failed to read %s tables from DT\n",
1212                                                         match->compatible);
1213                         return ret;
1214                 }
1215         }
1216         return 0;
1217 }
1218 #endif
1219 int tegra_dvfs_dfll_mode_set(struct dvfs *d, unsigned long rate)
1220 {
1221         mutex_lock(&dvfs_lock);
1222         if (!d->dvfs_rail->dfll_mode) {
1223                 d->dvfs_rail->dfll_mode = true;
1224                 __tegra_dvfs_set_rate(d, rate);
1225         }
1226         mutex_unlock(&dvfs_lock);
1227         return 0;
1228 }
1229
1230 int tegra_dvfs_dfll_mode_clear(struct dvfs *d, unsigned long rate)
1231 {
1232         int ret = 0;
1233
1234         mutex_lock(&dvfs_lock);
1235         if (d->dvfs_rail->dfll_mode) {
1236                 d->dvfs_rail->dfll_mode = false;
1237                 /* avoid false detection of matching target (voltage in dfll
1238                    mode is fluctuating, and recorded level is just estimate) */
1239                 d->dvfs_rail->millivolts--;
1240                 if (d->dvfs_rail->disabled) {
1241                         d->dvfs_rail->disabled = false;
1242                         __tegra_dvfs_rail_disable(d->dvfs_rail);
1243                 }
1244                 ret = __tegra_dvfs_set_rate(d, rate);
1245         }
1246         mutex_unlock(&dvfs_lock);
1247         return ret;
1248 }
1249
1250 struct tegra_cooling_device *tegra_dvfs_get_cpu_vmax_cdev(void)
1251 {
1252         if (tegra_cpu_rail)
1253                 return tegra_cpu_rail->vmax_cdev;
1254         return NULL;
1255 }
1256
1257 struct tegra_cooling_device *tegra_dvfs_get_cpu_vmin_cdev(void)
1258 {
1259         if (tegra_cpu_rail)
1260                 return tegra_cpu_rail->vmin_cdev;
1261         return NULL;
1262 }
1263
1264 struct tegra_cooling_device *tegra_dvfs_get_core_vmin_cdev(void)
1265 {
1266         if (tegra_core_rail)
1267                 return tegra_core_rail->vmin_cdev;
1268         return NULL;
1269 }
1270
1271 struct tegra_cooling_device *tegra_dvfs_get_gpu_vmin_cdev(void)
1272 {
1273         if (tegra_gpu_rail)
1274                 return tegra_gpu_rail->vmin_cdev;
1275         return NULL;
1276 }
1277
1278 static void make_safe_thermal_dvfs_one(struct dvfs *d,
1279                                   struct tegra_cooling_device *cdev)
1280 {
1281         int i, j, mv;
1282
1283         /* Make 1st row (therm_idx = 0) voltages max across thermal ranges */
1284         for (i = 0; i < d->num_freqs; i++) {
1285                 for (j = 1; j <= cdev->trip_temperatures_num; j++) {
1286                         mv = *(d->millivolts + j * MAX_DVFS_FREQS + i);
1287                         if (d->millivolts[i] < mv)
1288                                 ((int *)d->millivolts)[i] = mv;
1289                 }
1290         }
1291 }
1292
1293 static void make_safe_thermal_dvfs(struct dvfs_rail *rail)
1294 {
1295         struct dvfs *d;
1296
1297         mutex_lock(&dvfs_lock);
1298         list_for_each_entry(d, &rail->dvfs, reg_node) {
1299                 if (d->therm_dvfs)
1300                         make_safe_thermal_dvfs_one(d, rail->vts_cdev);
1301         }
1302         mutex_unlock(&dvfs_lock);
1303 }
1304
1305 #ifdef CONFIG_THERMAL
1306 /* Cooling device limits minimum rail voltage at cold temperature in pll mode */
1307 static int tegra_dvfs_rail_get_vmin_cdev_max_state(
1308         struct thermal_cooling_device *cdev, unsigned long *max_state)
1309 {
1310         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1311         *max_state = rail->vmin_cdev->trip_temperatures_num;
1312         return 0;
1313 }
1314
1315 static int tegra_dvfs_rail_get_vmin_cdev_cur_state(
1316         struct thermal_cooling_device *cdev, unsigned long *cur_state)
1317 {
1318         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1319         *cur_state = rail->therm_floor_idx;
1320         return 0;
1321 }
1322
1323 static int tegra_dvfs_rail_set_vmin_cdev_state(
1324         struct thermal_cooling_device *cdev, unsigned long cur_state)
1325 {
1326         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1327
1328         mutex_lock(&dvfs_lock);
1329         if (rail->therm_floor_idx != cur_state) {
1330                 rail->therm_floor_idx = cur_state;
1331                 dvfs_rail_update(rail);
1332         }
1333         mutex_unlock(&dvfs_lock);
1334         return 0;
1335 }
1336
1337 static struct thermal_cooling_device_ops tegra_dvfs_vmin_cooling_ops = {
1338         .get_max_state = tegra_dvfs_rail_get_vmin_cdev_max_state,
1339         .get_cur_state = tegra_dvfs_rail_get_vmin_cdev_cur_state,
1340         .set_cur_state = tegra_dvfs_rail_set_vmin_cdev_state,
1341 };
1342
1343 static void tegra_dvfs_rail_register_vmin_cdev(struct dvfs_rail *rail)
1344 {
1345         if (!rail->vmin_cdev)
1346                 return;
1347
1348         /* just report error - initialized for cold temperature, anyway */
1349         if (IS_ERR_OR_NULL(thermal_cooling_device_register(
1350                 rail->vmin_cdev->cdev_type, (void *)rail,
1351                 &tegra_dvfs_vmin_cooling_ops)))
1352                 pr_err("tegra cooling device %s failed to register\n",
1353                        rail->vmin_cdev->cdev_type);
1354 }
1355
1356 /* Cooling device to scale voltage with temperature in pll mode */
1357 static int tegra_dvfs_rail_get_vts_cdev_max_state(
1358         struct thermal_cooling_device *cdev, unsigned long *max_state)
1359 {
1360         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1361         *max_state = rail->vts_cdev->trip_temperatures_num;
1362         return 0;
1363 }
1364
1365 static int tegra_dvfs_rail_get_vts_cdev_cur_state(
1366         struct thermal_cooling_device *cdev, unsigned long *cur_state)
1367 {
1368         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1369         *cur_state = rail->therm_scale_idx;
1370         return 0;
1371 }
1372
1373 static int tegra_dvfs_rail_set_vts_cdev_state(
1374         struct thermal_cooling_device *cdev, unsigned long cur_state)
1375 {
1376         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1377         struct dvfs *d;
1378
1379         mutex_lock(&dvfs_lock);
1380         if (rail->therm_scale_idx != cur_state) {
1381                 rail->therm_scale_idx = cur_state;
1382                 list_for_each_entry(d, &rail->dvfs, reg_node) {
1383                         if (d->therm_dvfs)
1384                                 __tegra_dvfs_set_rate(d, d->cur_rate);
1385                 }
1386         }
1387         mutex_unlock(&dvfs_lock);
1388         return 0;
1389 }
1390
1391 static struct thermal_cooling_device_ops tegra_dvfs_vts_cooling_ops = {
1392         .get_max_state = tegra_dvfs_rail_get_vts_cdev_max_state,
1393         .get_cur_state = tegra_dvfs_rail_get_vts_cdev_cur_state,
1394         .set_cur_state = tegra_dvfs_rail_set_vts_cdev_state,
1395 };
1396
1397 static void tegra_dvfs_rail_register_vts_cdev(struct dvfs_rail *rail)
1398 {
1399         struct thermal_cooling_device *dev;
1400
1401         if (!rail->vts_cdev)
1402                 return;
1403
1404         dev = thermal_cooling_device_register(rail->vts_cdev->cdev_type,
1405                 (void *)rail, &tegra_dvfs_vts_cooling_ops);
1406         /* report error & set max limits across thermal ranges as safe dvfs */
1407         if (IS_ERR_OR_NULL(dev) || list_empty(&dev->thermal_instances)) {
1408                 pr_err("tegra cooling device %s failed to register\n",
1409                        rail->vts_cdev->cdev_type);
1410                 make_safe_thermal_dvfs(rail);
1411         }
1412 }
1413
1414 #else
1415 #define tegra_dvfs_rail_register_vmin_cdev(rail)
1416 static inline void tegra_dvfs_rail_register_vts_cdev(struct dvfs_rail *rail)
1417 {
1418         make_safe_thermal_dvfs(rail);
1419 }
1420 #endif
1421
1422 /*
1423  * Validate rail thermal profile, and get its size. Valid profile:
1424  * - voltage limits are descending with temperature increasing
1425  * - the lowest limit is above rail minimum voltage in pll and
1426  *   in dfll mode (if applicable)
1427  * - the highest limit is below rail nominal voltage
1428  */
1429 static int __init get_thermal_profile_size(
1430         int *trips_table, int *limits_table,
1431         struct dvfs_rail *rail, struct dvfs_dfll_data *d)
1432 {
1433         int i, min_mv;
1434
1435         for (i = 0; i < MAX_THERMAL_LIMITS - 1; i++) {
1436                 if (!limits_table[i+1])
1437                         break;
1438
1439                 if ((trips_table[i] >= trips_table[i+1]) ||
1440                     (limits_table[i] < limits_table[i+1])) {
1441                         pr_warn("%s: not ordered profile\n", rail->reg_id);
1442                         return -EINVAL;
1443                 }
1444         }
1445
1446         min_mv = max(rail->min_millivolts, d ? d->min_millivolts : 0);
1447         if (limits_table[i] < min_mv) {
1448                 pr_warn("%s: thermal profile below Vmin\n", rail->reg_id);
1449                 return -EINVAL;
1450         }
1451
1452         if (limits_table[0] > rail->nominal_millivolts) {
1453                 pr_warn("%s: thermal profile above Vmax\n", rail->reg_id);
1454                 return -EINVAL;
1455         }
1456         return i + 1;
1457 }
1458
1459 void __init tegra_dvfs_rail_init_vmax_thermal_profile(
1460         int *therm_trips_table, int *therm_caps_table,
1461         struct dvfs_rail *rail, struct dvfs_dfll_data *d)
1462 {
1463         int i = get_thermal_profile_size(therm_trips_table,
1464                                          therm_caps_table, rail, d);
1465         if (i <= 0) {
1466                 rail->vmax_cdev = NULL;
1467                 WARN(1, "%s: invalid Vmax thermal profile\n", rail->reg_id);
1468                 return;
1469         }
1470
1471         /* Install validated thermal caps */
1472         rail->therm_mv_caps = therm_caps_table;
1473         rail->therm_mv_caps_num = i;
1474
1475         /* Setup trip-points if applicable */
1476         if (rail->vmax_cdev) {
1477                 rail->vmax_cdev->trip_temperatures_num = i;
1478                 rail->vmax_cdev->trip_temperatures = therm_trips_table;
1479         }
1480 }
1481
1482 void __init tegra_dvfs_rail_init_vmin_thermal_profile(
1483         int *therm_trips_table, int *therm_floors_table,
1484         struct dvfs_rail *rail, struct dvfs_dfll_data *d)
1485 {
1486         int i = get_thermal_profile_size(therm_trips_table,
1487                                          therm_floors_table, rail, d);
1488         if (i <= 0) {
1489                 rail->vmin_cdev = NULL;
1490                 WARN(1, "%s: invalid Vmin thermal profile\n", rail->reg_id);
1491                 return;
1492         }
1493
1494         /* Install validated thermal floors */
1495         rail->therm_mv_floors = therm_floors_table;
1496         rail->therm_mv_floors_num = i;
1497
1498         /* Setup trip-points if applicable */
1499         if (rail->vmin_cdev) {
1500                 rail->vmin_cdev->trip_temperatures_num = i;
1501                 rail->vmin_cdev->trip_temperatures = therm_trips_table;
1502         }
1503 }
1504
1505 /*
1506  * Validate thermal dvfs settings:
1507  * - trip-points are montonically increasing
1508  * - voltages in any temperature range are montonically increasing with
1509  *   frequency (can go up/down across ranges at iso frequency)
1510  * - voltage for any frequency/thermal range combination must be within
1511  *   rail minimum/maximum limits
1512  */
1513 int __init tegra_dvfs_rail_init_thermal_dvfs_trips(
1514         int *therm_trips_table, struct dvfs_rail *rail)
1515 {
1516         int i;
1517
1518         if (!rail->vts_cdev) {
1519                 WARN(1, "%s: missing thermal dvfs cooling device\n",
1520                      rail->reg_id);
1521                 return -ENOENT;
1522         }
1523
1524         for (i = 0; i < MAX_THERMAL_LIMITS - 1; i++) {
1525                 if (therm_trips_table[i] >= therm_trips_table[i+1])
1526                         break;
1527         }
1528
1529         rail->vts_cdev->trip_temperatures_num = i + 1;
1530         rail->vts_cdev->trip_temperatures = therm_trips_table;
1531         return 0;
1532 }
1533
1534 int __init tegra_dvfs_init_thermal_dvfs_voltages(
1535         int *therm_voltages, int freqs_num, int ranges_num, struct dvfs *d)
1536 {
1537         int *millivolts;
1538         int freq_idx, therm_idx;
1539
1540         for (therm_idx = 0; therm_idx < ranges_num; therm_idx++) {
1541                 millivolts = therm_voltages + therm_idx * MAX_DVFS_FREQS;
1542                 for (freq_idx = 0; freq_idx < freqs_num; freq_idx++) {
1543                         int mv = millivolts[freq_idx];
1544                         if ((mv > d->dvfs_rail->max_millivolts) ||
1545                             (mv < d->dvfs_rail->min_millivolts) ||
1546                             (freq_idx && (mv < millivolts[freq_idx - 1]))) {
1547                                 WARN(1, "%s: invalid thermal dvfs entry %d(%d, %d)\n",
1548                                      d->clk_name, mv, freq_idx, therm_idx);
1549                                 return -EINVAL;
1550                         }
1551                 }
1552         }
1553
1554         d->millivolts = therm_voltages;
1555         d->therm_dvfs = true;
1556         return 0;
1557 }
1558
1559 /* Directly set cold temperature limit in dfll mode */
1560 int tegra_dvfs_rail_dfll_mode_set_cold(struct dvfs_rail *rail)
1561 {
1562         int ret = 0;
1563
1564         /* No thermal floors - nothing to do */
1565         if (!rail || !rail->therm_mv_floors)
1566                 return ret;
1567
1568         /*
1569          * Since cooling thresholds are the same in pll and dfll modes, pll mode
1570          * thermal index can be used to decide if cold limit should be set in
1571          * dfll mode.
1572          */
1573         mutex_lock(&dvfs_lock);
1574         if (rail->dfll_mode &&
1575             (rail->therm_floor_idx < rail->therm_mv_floors_num)) {
1576                         int mv = rail->therm_mv_floors[rail->therm_floor_idx];
1577                         ret = dvfs_rail_set_voltage_reg(rail, mv);
1578         }
1579         mutex_unlock(&dvfs_lock);
1580
1581         return ret;
1582 }
1583
1584 /*
1585  * Iterate through all the dvfs regulators, finding the regulator exported
1586  * by the regulator api for each one.  Must be called in late init, after
1587  * all the regulator api's regulators are initialized.
1588  */
1589 int __init tegra_dvfs_late_init(void)
1590 {
1591         bool connected = true;
1592         struct dvfs_rail *rail;
1593
1594         mutex_lock(&dvfs_lock);
1595
1596         list_for_each_entry(rail, &dvfs_rail_list, node)
1597                 if (dvfs_rail_connect_to_regulator(rail))
1598                         connected = false;
1599
1600         list_for_each_entry(rail, &dvfs_rail_list, node)
1601                 if (connected)
1602                         dvfs_rail_update(rail);
1603                 else
1604                         __tegra_dvfs_rail_disable(rail);
1605
1606         mutex_unlock(&dvfs_lock);
1607
1608         if (!connected && tegra_platform_is_silicon()) {
1609                 pr_warn("tegra_dvfs: DVFS regulators connection failed\n"
1610                         "            !!!! voltage scaling is disabled !!!!\n");
1611                 return -ENODEV;
1612         }
1613
1614         register_pm_notifier(&tegra_dvfs_suspend_nb);
1615         register_pm_notifier(&tegra_dvfs_resume_nb);
1616         register_reboot_notifier(&tegra_dvfs_reboot_nb);
1617
1618         list_for_each_entry(rail, &dvfs_rail_list, node) {
1619                         tegra_dvfs_rail_register_vmin_cdev(rail);
1620                         tegra_dvfs_rail_register_vts_cdev(rail);
1621         }
1622
1623         return 0;
1624 }
1625
1626 static int rail_stats_save_to_buf(char *buf, int len)
1627 {
1628         int i;
1629         struct dvfs_rail *rail;
1630         char *str = buf;
1631         char *end = buf + len;
1632
1633         str += scnprintf(str, end - str, "%-12s %-10s\n", "millivolts", "time");
1634
1635         mutex_lock(&dvfs_lock);
1636
1637         list_for_each_entry(rail, &dvfs_rail_list, node) {
1638                 str += scnprintf(str, end - str, "%s (bin: %d.%dmV)\n",
1639                            rail->reg_id,
1640                            rail->stats.bin_uV / 1000,
1641                            (rail->stats.bin_uV / 10) % 100);
1642
1643                 dvfs_rail_stats_update(rail, -1, ktime_get());
1644
1645                 str += scnprintf(str, end - str, "%-12d %-10llu\n", 0,
1646                         cputime64_to_clock_t(msecs_to_jiffies(
1647                                 ktime_to_ms(rail->stats.time_at_mv[0]))));
1648
1649                 for (i = 1; i <= DVFS_RAIL_STATS_TOP_BIN; i++) {
1650                         ktime_t ktime_zero = ktime_set(0, 0);
1651                         if (ktime_equal(rail->stats.time_at_mv[i], ktime_zero))
1652                                 continue;
1653                         str += scnprintf(str, end - str, "%-12d %-10llu\n",
1654                                 rail->min_millivolts +
1655                                 (i - 1) * rail->stats.bin_uV / 1000,
1656                                 cputime64_to_clock_t(msecs_to_jiffies(
1657                                         ktime_to_ms(rail->stats.time_at_mv[i])))
1658                         );
1659                 }
1660         }
1661         mutex_unlock(&dvfs_lock);
1662         return str - buf;
1663 }
1664
1665 #ifdef CONFIG_DEBUG_FS
1666 static int dvfs_tree_sort_cmp(void *p, struct list_head *a, struct list_head *b)
1667 {
1668         struct dvfs *da = list_entry(a, struct dvfs, reg_node);
1669         struct dvfs *db = list_entry(b, struct dvfs, reg_node);
1670         int ret;
1671
1672         ret = strcmp(da->dvfs_rail->reg_id, db->dvfs_rail->reg_id);
1673         if (ret != 0)
1674                 return ret;
1675
1676         if (da->cur_millivolts < db->cur_millivolts)
1677                 return 1;
1678         if (da->cur_millivolts > db->cur_millivolts)
1679                 return -1;
1680
1681         return strcmp(da->clk_name, db->clk_name);
1682 }
1683
1684 static int dvfs_tree_show(struct seq_file *s, void *data)
1685 {
1686         struct dvfs *d;
1687         struct dvfs_rail *rail;
1688         struct dvfs_relationship *rel;
1689
1690         seq_printf(s, "   clock      rate       mV\n");
1691         seq_printf(s, "--------------------------------\n");
1692
1693         mutex_lock(&dvfs_lock);
1694
1695         list_for_each_entry(rail, &dvfs_rail_list, node) {
1696                 int thermal_mv_floor = 0;
1697
1698                 seq_printf(s, "%s %d mV%s:\n", rail->reg_id,
1699                            rail->stats.off ? 0 : rail->millivolts,
1700                            rail->dfll_mode ? " dfll mode" :
1701                                 rail->disabled ? " disabled" : "");
1702                 list_for_each_entry(rel, &rail->relationships_from, from_node) {
1703                         seq_printf(s, "   %-10s %-7d mV %-4d mV\n",
1704                                 rel->from->reg_id, rel->from->millivolts,
1705                                 dvfs_solve_relationship(rel));
1706                 }
1707                 seq_printf(s, "   offset     %-7d mV\n", rail->dbg_mv_offs);
1708
1709                 if (rail->therm_mv_floors) {
1710                         int i = rail->therm_floor_idx;
1711                         if (i < rail->therm_mv_floors_num)
1712                                 thermal_mv_floor = rail->therm_mv_floors[i];
1713                 }
1714                 seq_printf(s, "   thermal    %-7d mV\n", thermal_mv_floor);
1715
1716                 if (rail == tegra_core_rail) {
1717                         seq_printf(s, "   override   %-7d mV [%-4d...%-4d]\n",
1718                                    rail->override_millivolts,
1719                                    rail->min_override_millivolts,
1720                                    rail->nominal_millivolts);
1721                 }
1722
1723                 list_sort(NULL, &rail->dvfs, dvfs_tree_sort_cmp);
1724
1725                 list_for_each_entry(d, &rail->dvfs, reg_node) {
1726                         seq_printf(s, "   %-10s %-10lu %-4d mV\n", d->clk_name,
1727                                 d->cur_rate, d->cur_millivolts);
1728                 }
1729         }
1730
1731         mutex_unlock(&dvfs_lock);
1732
1733         return 0;
1734 }
1735
1736 static int dvfs_tree_open(struct inode *inode, struct file *file)
1737 {
1738         return single_open(file, dvfs_tree_show, inode->i_private);
1739 }
1740
1741 static const struct file_operations dvfs_tree_fops = {
1742         .open           = dvfs_tree_open,
1743         .read           = seq_read,
1744         .llseek         = seq_lseek,
1745         .release        = single_release,
1746 };
1747
1748 static int rail_stats_show(struct seq_file *s, void *data)
1749 {
1750         char *buf = kzalloc(PAGE_SIZE, GFP_KERNEL);
1751         int size = 0;
1752
1753         if (!buf)
1754                 return -ENOMEM;
1755
1756         size = rail_stats_save_to_buf(buf, PAGE_SIZE);
1757         seq_write(s, buf, size);
1758         kfree(buf);
1759         return 0;
1760 }
1761
1762 static int rail_stats_open(struct inode *inode, struct file *file)
1763 {
1764         return single_open(file, rail_stats_show, inode->i_private);
1765 }
1766
1767 static const struct file_operations rail_stats_fops = {
1768         .open           = rail_stats_open,
1769         .read           = seq_read,
1770         .llseek         = seq_lseek,
1771         .release        = single_release,
1772 };
1773
1774 static int gpu_dvfs_show(struct seq_file *s, void *data)
1775 {
1776         int idx;
1777         int *millivolts;
1778         unsigned long *freqs;
1779
1780         if (read_gpu_dvfs_table(&millivolts, &freqs)) {
1781                 seq_printf(s, "Only supported for T124 or higher\n");
1782                 return 0;
1783         }
1784
1785         seq_printf(s, "millivolts \t \t frequency\n");
1786         seq_printf(s, "=====================================\n");
1787
1788         for (idx = 0; millivolts[idx]; idx++)
1789                 seq_printf(s, "%d mV \t \t %lu Hz\n", millivolts[idx],
1790                                 freqs[idx]);
1791
1792         return 0;
1793 }
1794
1795 static int gpu_dvfs_open(struct inode *inode, struct file *file)
1796 {
1797         return single_open(file, gpu_dvfs_show, NULL);
1798 }
1799
1800 static const struct file_operations gpu_dvfs_fops = {
1801         .open           = gpu_dvfs_open,
1802         .read           = seq_read,
1803         .llseek         = seq_lseek,
1804         .release        = single_release,
1805 };
1806
1807 static int rail_offs_set(struct dvfs_rail *rail, int offs)
1808 {
1809         if (rail) {
1810                 mutex_lock(&dvfs_lock);
1811                 rail->dbg_mv_offs = offs;
1812                 dvfs_rail_update(rail);
1813                 mutex_unlock(&dvfs_lock);
1814                 return 0;
1815         }
1816         return -ENOENT;
1817 }
1818
1819 static int cpu_offs_get(void *data, u64 *val)
1820 {
1821         if (tegra_cpu_rail) {
1822                 *val = (u64)tegra_cpu_rail->dbg_mv_offs;
1823                 return 0;
1824         }
1825         *val = 0;
1826         return -ENOENT;
1827 }
1828 static int cpu_offs_set(void *data, u64 val)
1829 {
1830         return rail_offs_set(tegra_cpu_rail, (int)val);
1831 }
1832 DEFINE_SIMPLE_ATTRIBUTE(cpu_offs_fops, cpu_offs_get, cpu_offs_set, "%lld\n");
1833
1834 static int gpu_offs_get(void *data, u64 *val)
1835 {
1836         if (tegra_gpu_rail) {
1837                 *val = (u64)tegra_gpu_rail->dbg_mv_offs;
1838                 return 0;
1839         }
1840         *val = 0;
1841         return -ENOENT;
1842 }
1843 static int gpu_offs_set(void *data, u64 val)
1844 {
1845         return rail_offs_set(tegra_gpu_rail, (int)val);
1846 }
1847 DEFINE_SIMPLE_ATTRIBUTE(gpu_offs_fops, gpu_offs_get, gpu_offs_set, "%lld\n");
1848
1849 static int core_offs_get(void *data, u64 *val)
1850 {
1851         if (tegra_core_rail) {
1852                 *val = (u64)tegra_core_rail->dbg_mv_offs;
1853                 return 0;
1854         }
1855         *val = 0;
1856         return -ENOENT;
1857 }
1858 static int core_offs_set(void *data, u64 val)
1859 {
1860         return rail_offs_set(tegra_core_rail, (int)val);
1861 }
1862 DEFINE_SIMPLE_ATTRIBUTE(core_offs_fops, core_offs_get, core_offs_set, "%lld\n");
1863
1864 static int core_override_get(void *data, u64 *val)
1865 {
1866         if (tegra_core_rail) {
1867                 *val = (u64)tegra_core_rail->override_millivolts;
1868                 return 0;
1869         }
1870         *val = 0;
1871         return -ENOENT;
1872 }
1873 static int core_override_set(void *data, u64 val)
1874 {
1875         return dvfs_override_core_voltage((int)val);
1876 }
1877 DEFINE_SIMPLE_ATTRIBUTE(core_override_fops,
1878                         core_override_get, core_override_set, "%llu\n");
1879
1880 static int gpu_dvfs_t_show(struct seq_file *s, void *data)
1881 {
1882         int i, j;
1883         int num_ranges = 1;
1884         int *trips = NULL;
1885         struct dvfs *d;
1886         struct dvfs_rail *rail = tegra_gpu_rail;
1887
1888         if (!tegra_gpu_rail) {
1889                 seq_printf(s, "Only supported for T124 or higher\n");
1890                 return -ENOSYS;
1891         }
1892
1893         mutex_lock(&dvfs_lock);
1894
1895         d = list_first_entry(&rail->dvfs, struct dvfs, reg_node);
1896         if (rail->vts_cdev && d->therm_dvfs) {
1897                 num_ranges = rail->vts_cdev->trip_temperatures_num + 1;
1898                 trips = rail->vts_cdev->trip_temperatures;
1899         }
1900
1901         seq_printf(s, "%-11s", "T(C)\\F(kHz)");
1902         for (i = 0; i < d->num_freqs; i++) {
1903                 unsigned int f = d->freqs[i]/100;
1904                 seq_printf(s, " %7u", f);
1905         }
1906         seq_printf(s, "\n");
1907
1908         for (j = 0; j < num_ranges; j++) {
1909                 seq_printf(s, "%s", j == rail->therm_scale_idx ? ">" : " ");
1910
1911                 if (!trips || (num_ranges == 1))
1912                         seq_printf(s, "%4s..%-4s", "", "");
1913                 else if (j == 0)
1914                         seq_printf(s, "%4s..%-4d", "", trips[j]);
1915                 else if (j == num_ranges - 1)
1916                         seq_printf(s, "%4d..%-4s", trips[j], "");
1917                 else
1918                         seq_printf(s, "%4d..%-4d", trips[j-1], trips[j]);
1919
1920                 for (i = 0; i < d->num_freqs; i++) {
1921                         int mv = *(d->millivolts + j * MAX_DVFS_FREQS + i);
1922                         seq_printf(s, " %7d", mv);
1923                 }
1924                 seq_printf(s, " mV\n");
1925         }
1926
1927         mutex_unlock(&dvfs_lock);
1928
1929         return 0;
1930 }
1931
1932 static int gpu_dvfs_t_open(struct inode *inode, struct file *file)
1933 {
1934         return single_open(file, gpu_dvfs_t_show, NULL);
1935 }
1936
1937 static const struct file_operations gpu_dvfs_t_fops = {
1938         .open           = gpu_dvfs_t_open,
1939         .read           = seq_read,
1940         .llseek         = seq_lseek,
1941         .release        = single_release,
1942 };
1943
1944 static int dvfs_table_show(struct seq_file *s, void *data)
1945 {
1946         int i;
1947         struct dvfs *d;
1948         struct dvfs_rail *rail;
1949
1950         seq_printf(s, "DVFS tables: units mV/MHz\n\n");
1951
1952         mutex_lock(&dvfs_lock);
1953
1954         list_for_each_entry(rail, &dvfs_rail_list, node) {
1955                 bool mv_done = false;
1956                 list_for_each_entry(d, &rail->dvfs, reg_node) {
1957                         if (!mv_done) {
1958                                 const int *m = tegra_dvfs_get_millivolts_pll(d);
1959                                 mv_done = true;
1960                                 seq_printf(s, "%-16s", rail->reg_id);
1961                                 for (i = 0; i < d->num_freqs; i++) {
1962                                         int mv = m[i];
1963                                         seq_printf(s, "%7d", mv);
1964                                 }
1965                                 seq_printf(s, "\n");
1966                                 if (d->dfll_millivolts) {
1967                                         seq_printf(s, "%-8s (dfll) ",
1968                                                    rail->reg_id);
1969                                         for (i = 0; i < d->num_freqs; i++) {
1970                                                 int mv = d->dfll_millivolts[i];
1971                                                 seq_printf(s, "%7d", mv);
1972                                         }
1973                                         seq_printf(s, "\n");
1974                                 }
1975                         }
1976
1977                         seq_printf(s, "%-16s", d->clk_name);
1978                         for (i = 0; i < d->num_freqs; i++) {
1979                                 unsigned int f = d->freqs[i]/100000;
1980                                 seq_printf(s, " %4u.%u", f/10, f%10);
1981                         }
1982                         seq_printf(s, "\n");
1983                 }
1984                 seq_printf(s, "\n");
1985         }
1986
1987         mutex_unlock(&dvfs_lock);
1988
1989         return 0;
1990 }
1991
1992 static int dvfs_table_open(struct inode *inode, struct file *file)
1993 {
1994         return single_open(file, dvfs_table_show, inode->i_private);
1995 }
1996
1997 static const struct file_operations dvfs_table_fops = {
1998         .open           = dvfs_table_open,
1999         .read           = seq_read,
2000         .llseek         = seq_lseek,
2001         .release        = single_release,
2002 };
2003
2004 int __init dvfs_debugfs_init(struct dentry *clk_debugfs_root)
2005 {
2006         struct dentry *d;
2007
2008         d = debugfs_create_file("dvfs", S_IRUGO, clk_debugfs_root, NULL,
2009                 &dvfs_tree_fops);
2010         if (!d)
2011                 return -ENOMEM;
2012
2013         d = debugfs_create_file("rails", S_IRUGO, clk_debugfs_root, NULL,
2014                 &rail_stats_fops);
2015         if (!d)
2016                 return -ENOMEM;
2017
2018         d = debugfs_create_file("vdd_cpu_offs", S_IRUGO | S_IWUSR,
2019                 clk_debugfs_root, NULL, &cpu_offs_fops);
2020         if (!d)
2021                 return -ENOMEM;
2022
2023         d = debugfs_create_file("vdd_gpu_offs", S_IRUGO | S_IWUSR,
2024                 clk_debugfs_root, NULL, &gpu_offs_fops);
2025         if (!d)
2026                 return -ENOMEM;
2027
2028         d = debugfs_create_file("vdd_core_offs", S_IRUGO | S_IWUSR,
2029                 clk_debugfs_root, NULL, &core_offs_fops);
2030         if (!d)
2031                 return -ENOMEM;
2032
2033         d = debugfs_create_file("vdd_core_override", S_IRUGO | S_IWUSR,
2034                 clk_debugfs_root, NULL, &core_override_fops);
2035         if (!d)
2036                 return -ENOMEM;
2037
2038         d = debugfs_create_file("gpu_dvfs", S_IRUGO | S_IWUSR,
2039                 clk_debugfs_root, NULL, &gpu_dvfs_fops);
2040         if (!d)
2041                 return -ENOMEM;
2042
2043         d = debugfs_create_file("gpu_dvfs_t", S_IRUGO | S_IWUSR,
2044                 clk_debugfs_root, NULL, &gpu_dvfs_t_fops);
2045         if (!d)
2046                 return -ENOMEM;
2047
2048         d = debugfs_create_file("dvfs_table", S_IRUGO, clk_debugfs_root, NULL,
2049                 &dvfs_table_fops);
2050         if (!d)
2051                 return -ENOMEM;
2052
2053         return 0;
2054 }
2055
2056 #endif
2057
2058 #ifdef CONFIG_PM
2059 static ssize_t tegra_rail_stats_show(struct kobject *kobj,
2060                                         struct kobj_attribute *attr,
2061                                         char *buf)
2062 {
2063         return rail_stats_save_to_buf(buf, PAGE_SIZE);
2064 }
2065
2066 static struct kobj_attribute rail_stats_attr =
2067                 __ATTR_RO(tegra_rail_stats);
2068
2069 static int __init tegra_dvfs_sysfs_stats_init(void)
2070 {
2071         int error;
2072         error = sysfs_create_file(power_kobj, &rail_stats_attr.attr);
2073         return 0;
2074 }
2075 late_initcall(tegra_dvfs_sysfs_stats_init);
2076 #endif