ARM: tegra: dvfs: Add predict peak voltage interface
[linux-3.10.git] / arch / arm / mach-tegra / dvfs.c
1 /*
2  *
3  * Copyright (C) 2010 Google, Inc.
4  *
5  * Author:
6  *      Colin Cross <ccross@google.com>
7  *
8  * Copyright (C) 2010-2013 NVIDIA CORPORATION. All rights reserved.
9  *
10  * This software is licensed under the terms of the GNU General Public
11  * License version 2, as published by the Free Software Foundation, and
12  * may be copied, distributed, and modified under those terms.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/clk.h>
23 #include <linux/clkdev.h>
24 #include <linux/debugfs.h>
25 #include <linux/init.h>
26 #include <linux/list.h>
27 #include <linux/list_sort.h>
28 #include <linux/module.h>
29 #include <linux/regulator/consumer.h>
30 #include <linux/seq_file.h>
31 #include <linux/slab.h>
32 #include <linux/suspend.h>
33 #include <linux/delay.h>
34 #include <linux/clk/tegra.h>
35 #include <linux/reboot.h>
36 #include <linux/clk/tegra.h>
37 #include <linux/tegra-soc.h>
38
39 #include "board.h"
40 #include "clock.h"
41 #include "dvfs.h"
42
43 #define DVFS_RAIL_STATS_BIN     12500
44
45 struct dvfs_rail *tegra_cpu_rail;
46 struct dvfs_rail *tegra_core_rail;
47 struct dvfs_rail *tegra_gpu_rail;
48
49 static LIST_HEAD(dvfs_rail_list);
50 static DEFINE_MUTEX(dvfs_lock);
51 static DEFINE_MUTEX(rail_disable_lock);
52
53 static int dvfs_rail_update(struct dvfs_rail *rail);
54
55 static inline int tegra_dvfs_rail_get_disable_level(struct dvfs_rail *rail)
56 {
57         return rail->disable_millivolts ? : rail->nominal_millivolts;
58 }
59
60 static inline int tegra_dvfs_rail_get_suspend_level(struct dvfs_rail *rail)
61 {
62         return rail->suspend_millivolts ? : rail->nominal_millivolts;
63 }
64
65 void tegra_dvfs_add_relationships(struct dvfs_relationship *rels, int n)
66 {
67         int i;
68         struct dvfs_relationship *rel;
69
70         mutex_lock(&dvfs_lock);
71
72         for (i = 0; i < n; i++) {
73                 rel = &rels[i];
74                 list_add_tail(&rel->from_node, &rel->to->relationships_from);
75                 list_add_tail(&rel->to_node, &rel->from->relationships_to);
76         }
77
78         mutex_unlock(&dvfs_lock);
79 }
80
81 /* Make sure there is a matching cooling device for thermal limit profile. */
82 static void dvfs_validate_cdevs(struct dvfs_rail *rail)
83 {
84         if (!rail->therm_mv_caps != !rail->therm_mv_caps_num) {
85                 rail->therm_mv_caps_num = 0;
86                 rail->therm_mv_caps = NULL;
87                 WARN(1, "%s: not matching thermal caps/num\n", rail->reg_id);
88         }
89
90         if (rail->therm_mv_caps && !rail->vmax_cdev)
91                 WARN(1, "%s: missing vmax cooling device\n", rail->reg_id);
92
93         if (!rail->therm_mv_floors != !rail->therm_mv_floors_num) {
94                 rail->therm_mv_floors_num = 0;
95                 rail->therm_mv_floors = NULL;
96                 WARN(1, "%s: not matching thermal floors/num\n", rail->reg_id);
97         }
98
99         if (rail->therm_mv_floors && !rail->vmin_cdev)
100                 WARN(1, "%s: missing vmin cooling device\n", rail->reg_id);
101
102         /* Limit override range to maximum floor */
103         if (rail->therm_mv_floors)
104                 rail->min_override_millivolts = rail->therm_mv_floors[0];
105
106         /* Only GPU thermal dvfs is supported */
107         if (rail->vts_cdev && (rail != tegra_gpu_rail)) {
108                 rail->vts_cdev = NULL;
109                 WARN(1, "%s: thermal dvfs is not supported\n", rail->reg_id);
110         }
111 }
112
113 int tegra_dvfs_init_rails(struct dvfs_rail *rails[], int n)
114 {
115         int i, mv;
116
117         mutex_lock(&dvfs_lock);
118
119         for (i = 0; i < n; i++) {
120                 INIT_LIST_HEAD(&rails[i]->dvfs);
121                 INIT_LIST_HEAD(&rails[i]->relationships_from);
122                 INIT_LIST_HEAD(&rails[i]->relationships_to);
123
124                 mv = rails[i]->nominal_millivolts;
125                 if (rails[i]->boot_millivolts > mv)
126                         WARN(1, "%s: boot voltage %d above nominal %d\n",
127                              rails[i]->reg_id, rails[i]->boot_millivolts, mv);
128                 if (rails[i]->disable_millivolts > mv)
129                         rails[i]->disable_millivolts = mv;
130                 if (rails[i]->suspend_millivolts > mv)
131                         rails[i]->suspend_millivolts = mv;
132
133                 mv = tegra_dvfs_rail_get_boot_level(rails[i]);
134                 rails[i]->millivolts = mv;
135                 rails[i]->new_millivolts = mv;
136                 if (!rails[i]->step)
137                         rails[i]->step = rails[i]->max_millivolts;
138                 if (!rails[i]->step_up)
139                         rails[i]->step_up = rails[i]->step;
140
141                 list_add_tail(&rails[i]->node, &dvfs_rail_list);
142
143                 if (!strcmp("vdd_cpu", rails[i]->reg_id))
144                         tegra_cpu_rail = rails[i];
145                 else if (!strcmp("vdd_gpu", rails[i]->reg_id))
146                         tegra_gpu_rail = rails[i];
147                 else if (!strcmp("vdd_core", rails[i]->reg_id))
148                         tegra_core_rail = rails[i];
149
150                 dvfs_validate_cdevs(rails[i]);
151         }
152
153         mutex_unlock(&dvfs_lock);
154
155         return 0;
156 };
157
158 static int dvfs_solve_relationship(struct dvfs_relationship *rel)
159 {
160         return rel->solve(rel->from, rel->to);
161 }
162
163 /* rail statistic - called during rail init, or under dfs_lock, or with
164    CPU0 only on-line, and interrupts disabled */
165 static void dvfs_rail_stats_init(struct dvfs_rail *rail, int millivolts)
166 {
167         int dvfs_rail_stats_range;
168
169         if (!rail->stats.bin_uV)
170                 rail->stats.bin_uV = DVFS_RAIL_STATS_BIN;
171
172         dvfs_rail_stats_range =
173                 (DVFS_RAIL_STATS_TOP_BIN - 1) * rail->stats.bin_uV / 1000;
174
175         rail->stats.last_update = ktime_get();
176         if (millivolts >= rail->min_millivolts) {
177                 int i = 1 + (2 * (millivolts - rail->min_millivolts) * 1000 +
178                              rail->stats.bin_uV) / (2 * rail->stats.bin_uV);
179                 rail->stats.last_index = min(i, DVFS_RAIL_STATS_TOP_BIN);
180         }
181
182         if (rail->max_millivolts >
183             rail->min_millivolts + dvfs_rail_stats_range)
184                 pr_warn("tegra_dvfs: %s: stats above %d mV will be squashed\n",
185                         rail->reg_id,
186                         rail->min_millivolts + dvfs_rail_stats_range);
187 }
188
189 static void dvfs_rail_stats_update(
190         struct dvfs_rail *rail, int millivolts, ktime_t now)
191 {
192         rail->stats.time_at_mv[rail->stats.last_index] = ktime_add(
193                 rail->stats.time_at_mv[rail->stats.last_index], ktime_sub(
194                         now, rail->stats.last_update));
195         rail->stats.last_update = now;
196
197         if (rail->stats.off)
198                 return;
199
200         if (millivolts >= rail->min_millivolts) {
201                 int i = 1 + (2 * (millivolts - rail->min_millivolts) * 1000 +
202                              rail->stats.bin_uV) / (2 * rail->stats.bin_uV);
203                 rail->stats.last_index = min(i, DVFS_RAIL_STATS_TOP_BIN);
204         } else if (millivolts == 0)
205                         rail->stats.last_index = 0;
206 }
207
208 static void dvfs_rail_stats_pause(struct dvfs_rail *rail,
209                                   ktime_t delta, bool on)
210 {
211         int i = on ? rail->stats.last_index : 0;
212         rail->stats.time_at_mv[i] = ktime_add(rail->stats.time_at_mv[i], delta);
213 }
214
215 void tegra_dvfs_rail_off(struct dvfs_rail *rail, ktime_t now)
216 {
217         if (rail) {
218                 dvfs_rail_stats_update(rail, 0, now);
219                 rail->stats.off = true;
220         }
221 }
222
223 void tegra_dvfs_rail_on(struct dvfs_rail *rail, ktime_t now)
224 {
225         if (rail) {
226                 rail->stats.off = false;
227                 dvfs_rail_stats_update(rail, rail->millivolts, now);
228         }
229 }
230
231 void tegra_dvfs_rail_pause(struct dvfs_rail *rail, ktime_t delta, bool on)
232 {
233         if (rail)
234                 dvfs_rail_stats_pause(rail, delta, on);
235 }
236
237 static int dvfs_rail_set_voltage_reg(struct dvfs_rail *rail, int millivolts)
238 {
239         int ret;
240
241         /*
242          * safely return success for low voltage requests on fixed regulator
243          * (higher requests will go through and fail, as they should)
244          */
245         if (rail->fixed_millivolts && (millivolts <= rail->fixed_millivolts))
246                 return 0;
247
248         rail->updating = true;
249         rail->reg_max_millivolts = rail->reg_max_millivolts ==
250                 rail->max_millivolts ?
251                 rail->max_millivolts + 1 : rail->max_millivolts;
252         ret = regulator_set_voltage(rail->reg,
253                 millivolts * 1000,
254                 rail->reg_max_millivolts * 1000);
255         rail->updating = false;
256
257         return ret;
258 }
259
260 /* Sets the voltage on a dvfs rail to a specific value, and updates any
261  * rails that depend on this rail. */
262 static int dvfs_rail_set_voltage(struct dvfs_rail *rail, int millivolts)
263 {
264         int ret = 0;
265         struct dvfs_relationship *rel;
266         int step, offset;
267         int i;
268         int steps;
269         bool jmp_to_zero;
270
271         if (!rail->reg) {
272                 if (millivolts == rail->millivolts)
273                         return 0;
274                 else
275                         return -EINVAL;
276         }
277
278         if (millivolts > rail->millivolts) {
279                 step = rail->step_up;
280                 offset = step;
281         } else {
282                 step = rail->step;
283                 offset = -step;
284         }
285
286         /*
287          * DFLL adjusts rail voltage automatically, but not exactly to the
288          * expected level - update stats, anyway.
289          */
290         if (rail->dfll_mode) {
291                 rail->millivolts = rail->new_millivolts = millivolts;
292                 dvfs_rail_stats_update(rail, millivolts, ktime_get());
293                 return 0;
294         }
295
296         if (rail->disabled)
297                 return 0;
298
299         rail->resolving_to = true;
300         jmp_to_zero = rail->jmp_to_zero &&
301                         ((millivolts == 0) || (rail->millivolts == 0));
302         steps = jmp_to_zero ? 1 :
303                 DIV_ROUND_UP(abs(millivolts - rail->millivolts), step);
304
305         for (i = 0; i < steps; i++) {
306                 if (!jmp_to_zero &&
307                     (abs(millivolts - rail->millivolts) > step))
308                         rail->new_millivolts = rail->millivolts + offset;
309                 else
310                         rail->new_millivolts = millivolts;
311
312                 /* Before changing the voltage, tell each rail that depends
313                  * on this rail that the voltage will change.
314                  * This rail will be the "from" rail in the relationship,
315                  * the rail that depends on this rail will be the "to" rail.
316                  * from->millivolts will be the old voltage
317                  * from->new_millivolts will be the new voltage */
318                 list_for_each_entry(rel, &rail->relationships_to, to_node) {
319                         ret = dvfs_rail_update(rel->to);
320                         if (ret)
321                                 goto out;
322                 }
323
324                 ret = dvfs_rail_set_voltage_reg(rail, rail->new_millivolts);
325                 if (ret) {
326                         pr_err("Failed to set dvfs regulator %s\n", rail->reg_id);
327                         goto out;
328                 }
329
330                 rail->millivolts = rail->new_millivolts;
331                 dvfs_rail_stats_update(rail, rail->millivolts, ktime_get());
332
333                 /* After changing the voltage, tell each rail that depends
334                  * on this rail that the voltage has changed.
335                  * from->millivolts and from->new_millivolts will be the
336                  * new voltage */
337                 list_for_each_entry(rel, &rail->relationships_to, to_node) {
338                         ret = dvfs_rail_update(rel->to);
339                         if (ret)
340                                 goto out;
341                 }
342         }
343
344         if (unlikely(rail->millivolts != millivolts)) {
345                 pr_err("%s: rail didn't reach target %d in %d steps (%d)\n",
346                         __func__, millivolts, steps, rail->millivolts);
347                 ret = -EINVAL;
348         }
349
350 out:
351         rail->resolving_to = false;
352         return ret;
353 }
354
355 /* Determine the minimum valid voltage for a rail, taking into account
356  * the dvfs clocks and any rails that this rail depends on.  Calls
357  * dvfs_rail_set_voltage with the new voltage, which will call
358  * dvfs_rail_update on any rails that depend on this rail. */
359 static inline int dvfs_rail_apply_limits(struct dvfs_rail *rail, int millivolts)
360 {
361         int min_mv = rail->min_millivolts;
362
363         if (rail->therm_mv_floors) {
364                 int i = rail->therm_floor_idx;
365                 if (i < rail->therm_mv_floors_num)
366                         min_mv = rail->therm_mv_floors[i];
367         }
368
369         if (rail->override_millivolts) {
370                 millivolts = rail->override_millivolts;
371         } else {
372                 /* apply offset and clip up to pll mode fixed mv */
373                 millivolts += rail->dbg_mv_offs;
374                 if (!rail->dfll_mode && rail->fixed_millivolts &&
375                     (millivolts < rail->fixed_millivolts))
376                         millivolts = rail->fixed_millivolts;
377         }
378
379         if (millivolts < min_mv)
380                 millivolts = min_mv;
381
382         return millivolts;
383 }
384
385 static int dvfs_rail_update(struct dvfs_rail *rail)
386 {
387         int millivolts = 0;
388         struct dvfs *d;
389         struct dvfs_relationship *rel;
390         int ret = 0;
391         int steps;
392
393         /* if dvfs is suspended, return and handle it during resume */
394         if (rail->suspended)
395                 return 0;
396
397         /* if regulators are not connected yet, return and handle it later */
398         if (!rail->reg)
399                 return 0;
400
401         /* if no clock has requested voltage since boot, defer update */
402         if (!rail->rate_set)
403                 return 0;
404
405         /* if rail update is entered while resolving circular dependencies,
406            abort recursion */
407         if (rail->resolving_to)
408                 return 0;
409
410         /* Find the maximum voltage requested by any clock */
411         list_for_each_entry(d, &rail->dvfs, reg_node)
412                 millivolts = max(d->cur_millivolts, millivolts);
413
414         /* Apply offset and min/max limits if any clock is requesting voltage */
415         if (millivolts)
416                 millivolts = dvfs_rail_apply_limits(rail, millivolts);
417         /* Keep current voltage if regulator is to be disabled via explicitly */
418         else if (rail->in_band_pm)
419                 return 0;
420         /* Keep current voltage if regulator must not be disabled at run time */
421         else if (!rail->jmp_to_zero) {
422                 WARN(1, "%s cannot be turned off by dvfs\n", rail->reg_id);
423                 return 0;
424         }
425         /* else: fall thru if regulator is turned off by side band signaling */
426
427         /* retry update if limited by from-relationship to account for
428            circular dependencies */
429         steps = DIV_ROUND_UP(abs(millivolts - rail->millivolts), rail->step);
430         for (; steps >= 0; steps--) {
431                 rail->new_millivolts = millivolts;
432
433                 /* Check any rails that this rail depends on */
434                 list_for_each_entry(rel, &rail->relationships_from, from_node)
435                         rail->new_millivolts = dvfs_solve_relationship(rel);
436
437                 if (rail->new_millivolts == rail->millivolts)
438                         break;
439
440                 ret = dvfs_rail_set_voltage(rail, rail->new_millivolts);
441         }
442
443         return ret;
444 }
445
446 static struct regulator *get_fixed_regulator(struct dvfs_rail *rail)
447 {
448         struct regulator *reg;
449         char reg_id[80];
450         struct dvfs *d;
451         int v, i;
452         unsigned long dfll_boost;
453
454         strcpy(reg_id, rail->reg_id);
455         strcat(reg_id, "_fixed");
456         reg = regulator_get(NULL, reg_id);
457         if (IS_ERR(reg))
458                 return reg;
459
460         v = regulator_get_voltage(reg) / 1000;
461         if ((v < rail->min_millivolts) || (v > rail->nominal_millivolts) ||
462             (rail->therm_mv_floors && v < rail->therm_mv_floors[0])) {
463                 pr_err("tegra_dvfs: ivalid fixed %s voltage %d\n",
464                        rail->reg_id, v);
465                 return ERR_PTR(-EINVAL);
466         }
467
468         /*
469          * Only fixed at nominal voltage vdd_core regulator is allowed, same
470          * is true for cpu rail if dfll mode is not supported at all. No thermal
471          * capping can be implemented in this case.
472          */
473         if (!IS_ENABLED(CONFIG_ARCH_TEGRA_HAS_CL_DVFS) ||
474             (rail != tegra_cpu_rail)) {
475                 if (v != rail->nominal_millivolts) {
476                         pr_err("tegra_dvfs: %s fixed below nominal at %d\n",
477                                rail->reg_id, v);
478                         return ERR_PTR(-EINVAL);
479                 }
480                 if (rail->therm_mv_caps) {
481                         pr_err("tegra_dvfs: cannot fix %s with thermal caps\n",
482                                rail->reg_id);
483                         return ERR_PTR(-ENOSYS);
484                 }
485                 return reg;
486         }
487
488         /*
489          * If dfll mode is supported, fixed vdd_cpu regulator may be below
490          * nominal in pll mode - maximum cpu rate in pll mode is limited
491          * respectively. Regulator is required to allow automatic scaling
492          * in dfll mode.
493          *
494          * FIXME: platform data to explicitly identify such "hybrid" regulator?
495          */
496         d = list_first_entry(&rail->dvfs, struct dvfs, reg_node);
497         for (i = 0; i < d->num_freqs; i++) {
498                 if (d->millivolts[i] > v)
499                         break;
500         }
501
502         if (!i) {
503                 pr_err("tegra_dvfs: %s fixed at %d: too low for min rate\n",
504                        rail->reg_id, v);
505                 return ERR_PTR(-EINVAL);
506         }
507
508         dfll_boost = (d->freqs[d->num_freqs - 1] - d->freqs[i - 1]);
509         if (d->dfll_data.max_rate_boost < dfll_boost)
510                 d->dfll_data.max_rate_boost = dfll_boost;
511
512         rail->fixed_millivolts = v;
513         return reg;
514 }
515
516 static int dvfs_rail_connect_to_regulator(struct dvfs_rail *rail)
517 {
518         struct regulator *reg;
519         int v;
520
521         if (!rail->reg) {
522                 reg = regulator_get(NULL, rail->reg_id);
523                 if (IS_ERR(reg)) {
524                         reg = get_fixed_regulator(rail);
525                         if (IS_ERR(reg)) {
526                                 pr_err("tegra_dvfs: failed to connect %s rail\n",
527                                        rail->reg_id);
528                                 return PTR_ERR(reg);
529                         }
530                 }
531                 rail->reg = reg;
532         }
533
534         v = regulator_enable(rail->reg);
535         if (v < 0) {
536                 pr_err("tegra_dvfs: failed on enabling regulator %s\n, err %d",
537                         rail->reg_id, v);
538                 return v;
539         }
540
541         v = regulator_get_voltage(rail->reg);
542         if (v < 0) {
543                 pr_err("tegra_dvfs: failed initial get %s voltage\n",
544                        rail->reg_id);
545                 return v;
546         }
547         rail->millivolts = v / 1000;
548         rail->new_millivolts = rail->millivolts;
549         dvfs_rail_stats_init(rail, rail->millivolts);
550
551         if (rail->boot_millivolts &&
552             (rail->boot_millivolts != rail->millivolts)) {
553                 WARN(1, "%s boot voltage %d does not match expected %d\n",
554                      rail->reg_id, rail->millivolts, rail->boot_millivolts);
555                 rail->boot_millivolts = rail->millivolts;
556         }
557         return 0;
558 }
559
560 static inline unsigned long *dvfs_get_freqs(struct dvfs *d)
561 {
562         return d->alt_freqs ? : &d->freqs[0];
563 }
564
565 static inline const int *dvfs_get_millivolts(struct dvfs *d, unsigned long rate)
566 {
567         if (tegra_dvfs_is_dfll_scale(d, rate))
568                 return d->dfll_millivolts;
569
570         return tegra_dvfs_get_millivolts_pll(d);
571 }
572
573 static int
574 __tegra_dvfs_set_rate(struct dvfs *d, unsigned long rate)
575 {
576         int i = 0;
577         int ret, mv, detach_mv;
578         unsigned long *freqs = dvfs_get_freqs(d);
579         const int *millivolts = dvfs_get_millivolts(d, rate);
580
581         if (freqs == NULL || millivolts == NULL)
582                 return -ENODEV;
583
584         /* On entry to dfll range limit 1st step to range bottom (full ramp of
585            voltage/rate is completed automatically in dfll mode) */
586         if (tegra_dvfs_is_dfll_range_entry(d, rate))
587                 rate = d->dfll_data.use_dfll_rate_min;
588
589         if (rate > freqs[d->num_freqs - 1]) {
590                 pr_warn("tegra_dvfs: rate %lu too high for dvfs on %s\n", rate,
591                         d->clk_name);
592                 return -EINVAL;
593         }
594
595         if (rate == 0) {
596                 d->cur_millivolts = 0;
597         } else {
598                 while (i < d->num_freqs && rate > freqs[i])
599                         i++;
600
601                 if ((d->max_millivolts) &&
602                     (millivolts[i] > d->max_millivolts)) {
603                         pr_warn("tegra_dvfs: voltage %d too high for dvfs on"
604                                 " %s\n", millivolts[i], d->clk_name);
605                         return -EINVAL;
606                 }
607
608                 mv = millivolts[i];
609                 detach_mv = tegra_dvfs_rail_get_boot_level(d->dvfs_rail);
610                 if (!d->dvfs_rail->reg && (mv > detach_mv)) {
611                         pr_warn("%s: %s: voltage %d above boot limit %d\n",
612                                 __func__, d->clk_name, mv, detach_mv);
613                         return -EINVAL;
614                 }
615
616                 detach_mv = tegra_dvfs_rail_get_disable_level(d->dvfs_rail);
617                 if (d->dvfs_rail->disabled && (mv > detach_mv)) {
618                         pr_warn("%s: %s: voltage %d above disable limit %d\n",
619                                 __func__, d->clk_name, mv, detach_mv);
620                         return -EINVAL;
621                 }
622
623                 detach_mv = tegra_dvfs_rail_get_suspend_level(d->dvfs_rail);
624                 if (d->dvfs_rail->suspended && (mv > detach_mv)) {
625                         pr_warn("%s: %s: voltage %d above disable limit %d\n",
626                                 __func__, d->clk_name, mv, detach_mv);
627                         return -EINVAL;
628                 }
629
630                 detach_mv = d->dvfs_rail->override_millivolts;
631                 if (detach_mv && (mv > detach_mv)) {
632                         pr_warn("%s: %s: voltage %d above override level %d\n",
633                                 __func__, d->clk_name, mv, detach_mv);
634                         return -EINVAL;
635                 }
636                 d->cur_millivolts = millivolts[i];
637         }
638
639         d->cur_rate = rate;
640
641         d->dvfs_rail->rate_set = true;
642         ret = dvfs_rail_update(d->dvfs_rail);
643         if (ret)
644                 pr_err("Failed to set regulator %s for clock %s to %d mV\n",
645                         d->dvfs_rail->reg_id, d->clk_name, d->cur_millivolts);
646
647         return ret;
648 }
649
650 int tegra_dvfs_alt_freqs_set(struct dvfs *d, unsigned long *alt_freqs)
651 {
652         int ret = 0;
653
654         mutex_lock(&dvfs_lock);
655
656         if (d->alt_freqs != alt_freqs) {
657                 d->alt_freqs = alt_freqs;
658                 ret = __tegra_dvfs_set_rate(d, d->cur_rate);
659         }
660
661         mutex_unlock(&dvfs_lock);
662         return ret;
663 }
664
665 static int predict_millivolts(struct clk *c, const int *millivolts,
666                               unsigned long rate)
667 {
668         int i;
669
670         if (!millivolts)
671                 return -ENODEV;
672         /*
673          * Predicted voltage can not be used across the switch to alternative
674          * frequency limits. For now, just fail the call for clock that has
675          * alternative limits initialized.
676          */
677         if (c->dvfs->alt_freqs)
678                 return -ENOSYS;
679
680         for (i = 0; i < c->dvfs->num_freqs; i++) {
681                 if (rate <= c->dvfs->freqs[i])
682                         break;
683         }
684
685         if (i == c->dvfs->num_freqs)
686                 return -EINVAL;
687
688         return millivolts[i];
689 }
690
691 int tegra_dvfs_predict_millivolts(struct clk *c, unsigned long rate)
692 {
693         const int *millivolts;
694
695         if (!rate || !c->dvfs)
696                 return 0;
697
698         millivolts = tegra_dvfs_is_dfll_range(c->dvfs, rate) ?
699                 c->dvfs->dfll_millivolts :
700                 tegra_dvfs_get_millivolts_pll(c->dvfs);
701         return predict_millivolts(c, millivolts, rate);
702 }
703
704 int tegra_dvfs_predict_peak_millivolts(struct clk *c, unsigned long rate)
705 {
706         const int *millivolts;
707
708         if (!rate || !c->dvfs)
709                 return 0;
710
711         millivolts = tegra_dvfs_is_dfll_range(c->dvfs, rate) ?
712                         c->dvfs->dfll_millivolts : c->dvfs->peak_millivolts ? :
713                         tegra_dvfs_get_millivolts_pll(c->dvfs);
714         return predict_millivolts(c, millivolts, rate);
715 }
716
717 int tegra_dvfs_predict_millivolts_pll(struct clk *c, unsigned long rate)
718 {
719         const int *millivolts;
720
721         if (!rate || !c->dvfs)
722                 return 0;
723
724         millivolts = tegra_dvfs_get_millivolts_pll(c->dvfs);
725         return predict_millivolts(c, millivolts, rate);
726 }
727
728 int tegra_dvfs_predict_millivolts_dfll(struct clk *c, unsigned long rate)
729 {
730         const int *millivolts;
731
732         if (!rate || !c->dvfs)
733                 return 0;
734
735         millivolts = c->dvfs->dfll_millivolts;
736         return predict_millivolts(c, millivolts, rate);
737 }
738
739 const int *tegra_dvfs_get_millivolts_pll(struct dvfs *d)
740 {
741         if (d->therm_dvfs) {
742                 int therm_idx = d->dvfs_rail->therm_scale_idx;
743                 return d->millivolts + therm_idx * MAX_DVFS_FREQS;
744         }
745         return d->millivolts;
746 }
747
748 int tegra_dvfs_set_rate(struct clk *c, unsigned long rate)
749 {
750         int ret;
751
752         if (!c->dvfs)
753                 return -EINVAL;
754
755         mutex_lock(&dvfs_lock);
756         ret = __tegra_dvfs_set_rate(c->dvfs, rate);
757         mutex_unlock(&dvfs_lock);
758
759         return ret;
760 }
761 EXPORT_SYMBOL(tegra_dvfs_set_rate);
762
763 int tegra_dvfs_get_freqs(struct clk *c, unsigned long **freqs, int *num_freqs)
764 {
765         if (!c->dvfs)
766                 return -ENOSYS;
767
768         if (c->dvfs->alt_freqs)
769                 return -ENOSYS;
770
771         *num_freqs = c->dvfs->num_freqs;
772         *freqs = c->dvfs->freqs;
773
774         return 0;
775 }
776 EXPORT_SYMBOL(tegra_dvfs_get_freqs);
777
778 #ifdef CONFIG_TEGRA_VDD_CORE_OVERRIDE
779 static DEFINE_MUTEX(rail_override_lock);
780
781 static int dvfs_override_core_voltage(int override_mv)
782 {
783         int ret, floor, ceiling;
784         struct dvfs_rail *rail = tegra_core_rail;
785
786         if (!rail)
787                 return -ENOENT;
788
789         if (rail->fixed_millivolts)
790                 return -ENOSYS;
791
792         floor = rail->min_override_millivolts;
793         ceiling = rail->nominal_millivolts;
794         if (override_mv && ((override_mv < floor) || (override_mv > ceiling))) {
795                 pr_err("%s: override level %d outside the range [%d...%d]\n",
796                        __func__, override_mv, floor, ceiling);
797                 return -EINVAL;
798         }
799
800         mutex_lock(&rail_override_lock);
801
802         if (override_mv == rail->override_millivolts) {
803                 ret = 0;
804                 goto out;
805         }
806
807         if (override_mv) {
808                 ret = tegra_dvfs_core_cap_level_apply(override_mv);
809                 if (ret) {
810                         pr_err("%s: failed to set cap for override level %d\n",
811                                __func__, override_mv);
812                         goto out;
813                 }
814         }
815
816         mutex_lock(&dvfs_lock);
817         if (rail->disabled || rail->suspended) {
818                 pr_err("%s: cannot scale %s rail\n", __func__,
819                        rail->disabled ? "disabled" : "suspended");
820                 ret = -EPERM;
821                 if (!override_mv) {
822                         mutex_unlock(&dvfs_lock);
823                         goto out;
824                 }
825         } else {
826                 rail->override_millivolts = override_mv;
827                 ret = dvfs_rail_update(rail);
828                 if (ret) {
829                         pr_err("%s: failed to set override level %d\n",
830                                __func__, override_mv);
831                         rail->override_millivolts = 0;
832                         dvfs_rail_update(rail);
833                 }
834         }
835         mutex_unlock(&dvfs_lock);
836
837         if (!override_mv || ret)
838                 tegra_dvfs_core_cap_level_apply(0);
839 out:
840         mutex_unlock(&rail_override_lock);
841         return ret;
842 }
843 #else
844 static int dvfs_override_core_voltage(int override_mv)
845 {
846         pr_err("%s: vdd core override is not supported\n", __func__);
847         return -ENOSYS;
848 }
849 #endif
850
851 int tegra_dvfs_override_core_voltage(struct clk *c, int override_mv)
852 {
853         if (!c->dvfs || !c->dvfs->can_override) {
854                 pr_err("%s: %s cannot override vdd core\n", __func__, c->name);
855                 return -EPERM;
856         }
857         return dvfs_override_core_voltage(override_mv);
858 }
859 EXPORT_SYMBOL(tegra_dvfs_override_core_voltage);
860
861 /* May only be called during clock init, does not take any locks on clock c. */
862 int __init tegra_enable_dvfs_on_clk(struct clk *c, struct dvfs *d)
863 {
864         int i;
865
866         if (c->dvfs) {
867                 pr_err("Error when enabling dvfs on %s for clock %s:\n",
868                         d->dvfs_rail->reg_id, c->name);
869                 pr_err("DVFS already enabled for %s\n",
870                         c->dvfs->dvfs_rail->reg_id);
871                 return -EINVAL;
872         }
873
874         for (i = 0; i < MAX_DVFS_FREQS; i++) {
875                 if (d->millivolts[i] == 0)
876                         break;
877
878                 d->freqs[i] *= d->freqs_mult;
879
880                 /* If final frequencies are 0, pad with previous frequency */
881                 if (d->freqs[i] == 0 && i > 1)
882                         d->freqs[i] = d->freqs[i - 1];
883         }
884         d->num_freqs = i;
885
886         if (d->auto_dvfs) {
887                 c->auto_dvfs = true;
888                 clk_set_cansleep(c);
889         }
890
891         c->dvfs = d;
892
893         /*
894          * Minimum core override level is determined as maximum voltage required
895          * for clocks outside shared buses (shared bus rates can be capped to
896          * safe levels when override limit is set)
897          */
898         if (i && c->ops && !c->ops->shared_bus_update &&
899             !(c->flags & PERIPH_ON_CBUS) && !d->can_override) {
900                 int mv = tegra_dvfs_predict_peak_millivolts(c, d->freqs[i-1]);
901                 if (d->dvfs_rail->min_override_millivolts < mv)
902                         d->dvfs_rail->min_override_millivolts = mv;
903         }
904
905         mutex_lock(&dvfs_lock);
906         list_add_tail(&d->reg_node, &d->dvfs_rail->dvfs);
907         mutex_unlock(&dvfs_lock);
908
909         return 0;
910 }
911
912 static bool tegra_dvfs_all_rails_suspended(void)
913 {
914         struct dvfs_rail *rail;
915         bool all_suspended = true;
916
917         list_for_each_entry(rail, &dvfs_rail_list, node)
918                 if (!rail->suspended && !rail->disabled)
919                         all_suspended = false;
920
921         return all_suspended;
922 }
923
924 static bool tegra_dvfs_from_rails_suspended_or_solved(struct dvfs_rail *to)
925 {
926         struct dvfs_relationship *rel;
927         bool all_suspended = true;
928
929         list_for_each_entry(rel, &to->relationships_from, from_node)
930                 if (!rel->from->suspended && !rel->from->disabled &&
931                         !rel->solved_at_nominal)
932                         all_suspended = false;
933
934         return all_suspended;
935 }
936
937 static int tegra_dvfs_suspend_one(void)
938 {
939         struct dvfs_rail *rail;
940         int ret, mv;
941
942         list_for_each_entry(rail, &dvfs_rail_list, node) {
943                 if (!rail->suspended && !rail->disabled &&
944                     tegra_dvfs_from_rails_suspended_or_solved(rail)) {
945                         /* Safe, as pll mode rate is capped to fixed level */
946                         if (!rail->dfll_mode && rail->fixed_millivolts) {
947                                 mv = rail->fixed_millivolts;
948                         } else {
949                                 mv = tegra_dvfs_rail_get_suspend_level(rail);
950                                 mv = dvfs_rail_apply_limits(rail, mv);
951                         }
952
953                         /* apply suspend limit only if it is above current mv */
954                         ret = -EPERM;
955                         if (mv >= rail->millivolts)
956                                 ret = dvfs_rail_set_voltage(rail, mv);
957                         if (ret) {
958                                 pr_err("tegra_dvfs: failed %s suspend at %d\n",
959                                        rail->reg_id, rail->millivolts);
960                                 return ret;
961                         }
962
963                         rail->suspended = true;
964                         return 0;
965                 }
966         }
967
968         return -EINVAL;
969 }
970
971 static void tegra_dvfs_resume(void)
972 {
973         struct dvfs_rail *rail;
974
975         mutex_lock(&dvfs_lock);
976
977         list_for_each_entry(rail, &dvfs_rail_list, node)
978                 rail->suspended = false;
979
980         list_for_each_entry(rail, &dvfs_rail_list, node)
981                 dvfs_rail_update(rail);
982
983         mutex_unlock(&dvfs_lock);
984 }
985
986 static int tegra_dvfs_suspend(void)
987 {
988         int ret = 0;
989
990         mutex_lock(&dvfs_lock);
991
992         while (!tegra_dvfs_all_rails_suspended()) {
993                 ret = tegra_dvfs_suspend_one();
994                 if (ret)
995                         break;
996         }
997
998         mutex_unlock(&dvfs_lock);
999
1000         if (ret)
1001                 tegra_dvfs_resume();
1002
1003         return ret;
1004 }
1005
1006 static int tegra_dvfs_pm_suspend(struct notifier_block *nb,
1007                                  unsigned long event, void *data)
1008 {
1009         if (event == PM_SUSPEND_PREPARE) {
1010                 if (tegra_dvfs_suspend())
1011                         return NOTIFY_STOP;
1012                 pr_info("tegra_dvfs: suspended\n");
1013         }
1014         return NOTIFY_OK;
1015 };
1016
1017 static int tegra_dvfs_pm_resume(struct notifier_block *nb,
1018                                 unsigned long event, void *data)
1019 {
1020         if (event == PM_POST_SUSPEND) {
1021                 tegra_dvfs_resume();
1022                 pr_info("tegra_dvfs: resumed\n");
1023         }
1024         return NOTIFY_OK;
1025 };
1026
1027 static struct notifier_block tegra_dvfs_suspend_nb = {
1028         .notifier_call = tegra_dvfs_pm_suspend,
1029         .priority = -1,
1030 };
1031
1032 static struct notifier_block tegra_dvfs_resume_nb = {
1033         .notifier_call = tegra_dvfs_pm_resume,
1034         .priority = 1,
1035 };
1036
1037 static int tegra_dvfs_reboot_notify(struct notifier_block *nb,
1038                                 unsigned long event, void *data)
1039 {
1040         switch (event) {
1041         case SYS_RESTART:
1042         case SYS_HALT:
1043         case SYS_POWER_OFF:
1044                 tegra_dvfs_suspend();
1045                 return NOTIFY_OK;
1046         }
1047         return NOTIFY_DONE;
1048 }
1049
1050 static struct notifier_block tegra_dvfs_reboot_nb = {
1051         .notifier_call = tegra_dvfs_reboot_notify,
1052 };
1053
1054 /* must be called with dvfs lock held */
1055 static void __tegra_dvfs_rail_disable(struct dvfs_rail *rail)
1056 {
1057         int ret = -EPERM;
1058         int mv;
1059
1060         /* don't set voltage in DFLL mode - won't work, but break stats */
1061         if (rail->dfll_mode) {
1062                 rail->disabled = true;
1063                 return;
1064         }
1065
1066         /* Safe, as pll mode rate is capped to fixed level */
1067         if (!rail->dfll_mode && rail->fixed_millivolts) {
1068                 mv = rail->fixed_millivolts;
1069         } else {
1070                 mv = tegra_dvfs_rail_get_disable_level(rail);
1071                 mv = dvfs_rail_apply_limits(rail, mv);
1072         }
1073
1074         /* apply detach mode limit provided it is above current volatge */
1075         if (mv >= rail->millivolts)
1076                 ret = dvfs_rail_set_voltage(rail, mv);
1077         if (ret) {
1078                 pr_err("tegra_dvfs: failed to disable %s at %d\n",
1079                        rail->reg_id, rail->millivolts);
1080                 return;
1081         }
1082         rail->disabled = true;
1083 }
1084
1085 /* must be called with dvfs lock held */
1086 static void __tegra_dvfs_rail_enable(struct dvfs_rail *rail)
1087 {
1088         rail->disabled = false;
1089         dvfs_rail_update(rail);
1090 }
1091
1092 void tegra_dvfs_rail_enable(struct dvfs_rail *rail)
1093 {
1094         if (!rail)
1095                 return;
1096
1097         mutex_lock(&rail_disable_lock);
1098
1099         if (rail->disabled) {
1100                 mutex_lock(&dvfs_lock);
1101                 __tegra_dvfs_rail_enable(rail);
1102                 mutex_unlock(&dvfs_lock);
1103
1104                 tegra_dvfs_rail_post_enable(rail);
1105         }
1106         mutex_unlock(&rail_disable_lock);
1107 }
1108
1109 void tegra_dvfs_rail_disable(struct dvfs_rail *rail)
1110 {
1111         if (!rail)
1112                 return;
1113
1114         mutex_lock(&rail_disable_lock);
1115         if (rail->disabled)
1116                 goto out;
1117
1118         /* rail disable will set it to nominal voltage underneath clock
1119            framework - need to re-configure clock rates that are not safe
1120            at nominal (yes, unsafe at nominal is ugly, but possible). Rate
1121            change must be done outside of dvfs lock. */
1122         if (tegra_dvfs_rail_disable_prepare(rail)) {
1123                 pr_info("dvfs: failed to prepare regulator %s to disable\n",
1124                         rail->reg_id);
1125                 goto out;
1126         }
1127
1128         mutex_lock(&dvfs_lock);
1129         __tegra_dvfs_rail_disable(rail);
1130         mutex_unlock(&dvfs_lock);
1131 out:
1132         mutex_unlock(&rail_disable_lock);
1133 }
1134
1135 int tegra_dvfs_rail_disable_by_name(const char *reg_id)
1136 {
1137         struct dvfs_rail *rail = tegra_dvfs_get_rail_by_name(reg_id);
1138         if (!rail)
1139                 return -EINVAL;
1140
1141         tegra_dvfs_rail_disable(rail);
1142         return 0;
1143 }
1144
1145 struct dvfs_rail *tegra_dvfs_get_rail_by_name(const char *reg_id)
1146 {
1147         struct dvfs_rail *rail;
1148
1149         mutex_lock(&dvfs_lock);
1150         list_for_each_entry(rail, &dvfs_rail_list, node) {
1151                 if (!strcmp(reg_id, rail->reg_id)) {
1152                         mutex_unlock(&dvfs_lock);
1153                         return rail;
1154                 }
1155         }
1156         mutex_unlock(&dvfs_lock);
1157         return NULL;
1158 }
1159
1160 int tegra_dvfs_rail_power_up(struct dvfs_rail *rail)
1161 {
1162         int ret = -ENOENT;
1163
1164         if (!rail || !rail->in_band_pm)
1165                 return -ENOSYS;
1166
1167         mutex_lock(&dvfs_lock);
1168         if (rail->reg) {
1169                 ret = regulator_enable(rail->reg);
1170                 if (!ret && !timekeeping_suspended)
1171                         tegra_dvfs_rail_on(rail, ktime_get());
1172         }
1173         mutex_unlock(&dvfs_lock);
1174         return ret;
1175 }
1176
1177 int tegra_dvfs_rail_power_down(struct dvfs_rail *rail)
1178 {
1179         int ret = -ENOENT;
1180
1181         if (!rail || !rail->in_band_pm)
1182                 return -ENOSYS;
1183
1184         mutex_lock(&dvfs_lock);
1185         if (rail->reg) {
1186                 ret = regulator_disable(rail->reg);
1187                 if (!ret && !timekeeping_suspended)
1188                         tegra_dvfs_rail_off(rail, ktime_get());
1189         }
1190         mutex_unlock(&dvfs_lock);
1191         return ret;
1192 }
1193
1194 bool tegra_dvfs_is_rail_up(struct dvfs_rail *rail)
1195 {
1196         bool ret = false;
1197
1198         if (!rail)
1199                 return false;
1200
1201         if (!rail->in_band_pm)
1202                 return true;
1203
1204         mutex_lock(&dvfs_lock);
1205         if (rail->reg)
1206                 ret = regulator_is_enabled(rail->reg) > 0;
1207         mutex_unlock(&dvfs_lock);
1208         return ret;
1209 }
1210
1211 bool tegra_dvfs_rail_updating(struct clk *clk)
1212 {
1213         return (!clk ? false :
1214                 (!clk->dvfs ? false :
1215                  (!clk->dvfs->dvfs_rail ? false :
1216                   (clk->dvfs->dvfs_rail->updating ||
1217                    clk->dvfs->dvfs_rail->dfll_mode_updating))));
1218 }
1219
1220 #ifdef CONFIG_OF
1221 int __init of_tegra_dvfs_init(const struct of_device_id *matches)
1222 {
1223         int ret;
1224         struct device_node *np;
1225
1226         for_each_matching_node(np, matches) {
1227                 const struct of_device_id *match = of_match_node(matches, np);
1228                 of_tegra_dvfs_init_cb_t dvfs_init_cb = match->data;
1229                 ret = dvfs_init_cb(np);
1230                 if (ret) {
1231                         pr_err("dt: Failed to read %s tables from DT\n",
1232                                                         match->compatible);
1233                         return ret;
1234                 }
1235         }
1236         return 0;
1237 }
1238 #endif
1239 int tegra_dvfs_dfll_mode_set(struct dvfs *d, unsigned long rate)
1240 {
1241         mutex_lock(&dvfs_lock);
1242         if (!d->dvfs_rail->dfll_mode) {
1243                 d->dvfs_rail->dfll_mode = true;
1244                 __tegra_dvfs_set_rate(d, rate);
1245         }
1246         mutex_unlock(&dvfs_lock);
1247         return 0;
1248 }
1249
1250 int tegra_dvfs_dfll_mode_clear(struct dvfs *d, unsigned long rate)
1251 {
1252         int ret = 0;
1253
1254         mutex_lock(&dvfs_lock);
1255         if (d->dvfs_rail->dfll_mode) {
1256                 d->dvfs_rail->dfll_mode = false;
1257                 /* avoid false detection of matching target (voltage in dfll
1258                    mode is fluctuating, and recorded level is just estimate) */
1259                 d->dvfs_rail->millivolts--;
1260                 if (d->dvfs_rail->disabled) {
1261                         d->dvfs_rail->disabled = false;
1262                         __tegra_dvfs_rail_disable(d->dvfs_rail);
1263                 }
1264                 ret = __tegra_dvfs_set_rate(d, rate);
1265         }
1266         mutex_unlock(&dvfs_lock);
1267         return ret;
1268 }
1269
1270 struct tegra_cooling_device *tegra_dvfs_get_cpu_vmax_cdev(void)
1271 {
1272         if (tegra_cpu_rail)
1273                 return tegra_cpu_rail->vmax_cdev;
1274         return NULL;
1275 }
1276
1277 struct tegra_cooling_device *tegra_dvfs_get_cpu_vmin_cdev(void)
1278 {
1279         if (tegra_cpu_rail)
1280                 return tegra_cpu_rail->vmin_cdev;
1281         return NULL;
1282 }
1283
1284 struct tegra_cooling_device *tegra_dvfs_get_core_vmin_cdev(void)
1285 {
1286         if (tegra_core_rail)
1287                 return tegra_core_rail->vmin_cdev;
1288         return NULL;
1289 }
1290
1291 struct tegra_cooling_device *tegra_dvfs_get_gpu_vmin_cdev(void)
1292 {
1293         if (tegra_gpu_rail)
1294                 return tegra_gpu_rail->vmin_cdev;
1295         return NULL;
1296 }
1297
1298 struct tegra_cooling_device *tegra_dvfs_get_gpu_vts_cdev(void)
1299 {
1300         if (tegra_gpu_rail)
1301                 return tegra_gpu_rail->vts_cdev;
1302         return NULL;
1303 }
1304
1305 static void make_safe_thermal_dvfs_one(struct dvfs *d,
1306                                   struct tegra_cooling_device *cdev)
1307 {
1308         int i, j, mv;
1309
1310         /* Make 1st row (therm_idx = 0) voltages max across thermal ranges */
1311         for (i = 0; i < d->num_freqs; i++) {
1312                 for (j = 1; j <= cdev->trip_temperatures_num; j++) {
1313                         mv = *(d->millivolts + j * MAX_DVFS_FREQS + i);
1314                         if (d->millivolts[i] < mv)
1315                                 ((int *)d->millivolts)[i] = mv;
1316                 }
1317         }
1318 }
1319
1320 static void make_safe_thermal_dvfs(struct dvfs_rail *rail)
1321 {
1322         struct dvfs *d;
1323
1324         mutex_lock(&dvfs_lock);
1325         list_for_each_entry(d, &rail->dvfs, reg_node) {
1326                 if (d->therm_dvfs)
1327                         make_safe_thermal_dvfs_one(d, rail->vts_cdev);
1328         }
1329         mutex_unlock(&dvfs_lock);
1330 }
1331
1332 #ifdef CONFIG_THERMAL
1333 /* Cooling device limits minimum rail voltage at cold temperature in pll mode */
1334 static int tegra_dvfs_rail_get_vmin_cdev_max_state(
1335         struct thermal_cooling_device *cdev, unsigned long *max_state)
1336 {
1337         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1338         *max_state = rail->vmin_cdev->trip_temperatures_num;
1339         return 0;
1340 }
1341
1342 static int tegra_dvfs_rail_get_vmin_cdev_cur_state(
1343         struct thermal_cooling_device *cdev, unsigned long *cur_state)
1344 {
1345         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1346         *cur_state = rail->therm_floor_idx;
1347         return 0;
1348 }
1349
1350 static int tegra_dvfs_rail_set_vmin_cdev_state(
1351         struct thermal_cooling_device *cdev, unsigned long cur_state)
1352 {
1353         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1354
1355         mutex_lock(&dvfs_lock);
1356         if (rail->therm_floor_idx != cur_state) {
1357                 rail->therm_floor_idx = cur_state;
1358                 dvfs_rail_update(rail);
1359         }
1360         mutex_unlock(&dvfs_lock);
1361         return 0;
1362 }
1363
1364 static struct thermal_cooling_device_ops tegra_dvfs_vmin_cooling_ops = {
1365         .get_max_state = tegra_dvfs_rail_get_vmin_cdev_max_state,
1366         .get_cur_state = tegra_dvfs_rail_get_vmin_cdev_cur_state,
1367         .set_cur_state = tegra_dvfs_rail_set_vmin_cdev_state,
1368 };
1369
1370 static void tegra_dvfs_rail_register_vmin_cdev(struct dvfs_rail *rail)
1371 {
1372         if (!rail->vmin_cdev)
1373                 return;
1374
1375         /* just report error - initialized for cold temperature, anyway */
1376         if (IS_ERR_OR_NULL(thermal_cooling_device_register(
1377                 rail->vmin_cdev->cdev_type, (void *)rail,
1378                 &tegra_dvfs_vmin_cooling_ops)))
1379                 pr_err("tegra cooling device %s failed to register\n",
1380                        rail->vmin_cdev->cdev_type);
1381 }
1382
1383 /* Cooling device to scale voltage with temperature in pll mode */
1384 static int tegra_dvfs_rail_get_vts_cdev_max_state(
1385         struct thermal_cooling_device *cdev, unsigned long *max_state)
1386 {
1387         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1388         *max_state = rail->vts_cdev->trip_temperatures_num;
1389         return 0;
1390 }
1391
1392 static int tegra_dvfs_rail_get_vts_cdev_cur_state(
1393         struct thermal_cooling_device *cdev, unsigned long *cur_state)
1394 {
1395         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1396         *cur_state = rail->therm_scale_idx;
1397         return 0;
1398 }
1399
1400 static int tegra_dvfs_rail_set_vts_cdev_state(
1401         struct thermal_cooling_device *cdev, unsigned long cur_state)
1402 {
1403         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1404         struct dvfs *d;
1405
1406         mutex_lock(&dvfs_lock);
1407         if (rail->therm_scale_idx != cur_state) {
1408                 rail->therm_scale_idx = cur_state;
1409                 list_for_each_entry(d, &rail->dvfs, reg_node) {
1410                         if (d->therm_dvfs)
1411                                 __tegra_dvfs_set_rate(d, d->cur_rate);
1412                 }
1413         }
1414         mutex_unlock(&dvfs_lock);
1415         return 0;
1416 }
1417
1418 static struct thermal_cooling_device_ops tegra_dvfs_vts_cooling_ops = {
1419         .get_max_state = tegra_dvfs_rail_get_vts_cdev_max_state,
1420         .get_cur_state = tegra_dvfs_rail_get_vts_cdev_cur_state,
1421         .set_cur_state = tegra_dvfs_rail_set_vts_cdev_state,
1422 };
1423
1424 static void tegra_dvfs_rail_register_vts_cdev(struct dvfs_rail *rail)
1425 {
1426         struct thermal_cooling_device *dev;
1427
1428         if (!rail->vts_cdev)
1429                 return;
1430
1431         dev = thermal_cooling_device_register(rail->vts_cdev->cdev_type,
1432                 (void *)rail, &tegra_dvfs_vts_cooling_ops);
1433         /* report error & set max limits across thermal ranges as safe dvfs */
1434         if (IS_ERR_OR_NULL(dev) || list_empty(&dev->thermal_instances)) {
1435                 pr_err("tegra cooling device %s failed to register\n",
1436                        rail->vts_cdev->cdev_type);
1437                 make_safe_thermal_dvfs(rail);
1438         }
1439 }
1440
1441 #else
1442 #define tegra_dvfs_rail_register_vmin_cdev(rail)
1443 static inline void tegra_dvfs_rail_register_vts_cdev(struct dvfs_rail *rail)
1444 {
1445         make_safe_thermal_dvfs(rail);
1446 }
1447 #endif
1448
1449 /*
1450  * Validate rail thermal profile, and get its size. Valid profile:
1451  * - voltage limits are descending with temperature increasing
1452  * - the lowest limit is above rail minimum voltage in pll and
1453  *   in dfll mode (if applicable)
1454  * - the highest limit is below rail nominal voltage
1455  */
1456 static int __init get_thermal_profile_size(
1457         int *trips_table, int *limits_table,
1458         struct dvfs_rail *rail, struct dvfs_dfll_data *d)
1459 {
1460         int i, min_mv;
1461
1462         for (i = 0; i < MAX_THERMAL_LIMITS - 1; i++) {
1463                 if (!limits_table[i+1])
1464                         break;
1465
1466                 if ((trips_table[i] >= trips_table[i+1]) ||
1467                     (limits_table[i] < limits_table[i+1])) {
1468                         pr_warn("%s: not ordered profile\n", rail->reg_id);
1469                         return -EINVAL;
1470                 }
1471         }
1472
1473         min_mv = max(rail->min_millivolts, d ? d->min_millivolts : 0);
1474         if (limits_table[i] < min_mv) {
1475                 pr_warn("%s: thermal profile below Vmin\n", rail->reg_id);
1476                 return -EINVAL;
1477         }
1478
1479         if (limits_table[0] > rail->nominal_millivolts) {
1480                 pr_warn("%s: thermal profile above Vmax\n", rail->reg_id);
1481                 return -EINVAL;
1482         }
1483         return i + 1;
1484 }
1485
1486 void __init tegra_dvfs_rail_init_vmax_thermal_profile(
1487         int *therm_trips_table, int *therm_caps_table,
1488         struct dvfs_rail *rail, struct dvfs_dfll_data *d)
1489 {
1490         int i = get_thermal_profile_size(therm_trips_table,
1491                                          therm_caps_table, rail, d);
1492         if (i <= 0) {
1493                 rail->vmax_cdev = NULL;
1494                 WARN(1, "%s: invalid Vmax thermal profile\n", rail->reg_id);
1495                 return;
1496         }
1497
1498         /* Install validated thermal caps */
1499         rail->therm_mv_caps = therm_caps_table;
1500         rail->therm_mv_caps_num = i;
1501
1502         /* Setup trip-points if applicable */
1503         if (rail->vmax_cdev) {
1504                 rail->vmax_cdev->trip_temperatures_num = i;
1505                 rail->vmax_cdev->trip_temperatures = therm_trips_table;
1506         }
1507 }
1508
1509 void __init tegra_dvfs_rail_init_vmin_thermal_profile(
1510         int *therm_trips_table, int *therm_floors_table,
1511         struct dvfs_rail *rail, struct dvfs_dfll_data *d)
1512 {
1513         int i = get_thermal_profile_size(therm_trips_table,
1514                                          therm_floors_table, rail, d);
1515         if (i <= 0) {
1516                 rail->vmin_cdev = NULL;
1517                 WARN(1, "%s: invalid Vmin thermal profile\n", rail->reg_id);
1518                 return;
1519         }
1520
1521         /* Install validated thermal floors */
1522         rail->therm_mv_floors = therm_floors_table;
1523         rail->therm_mv_floors_num = i;
1524
1525         /* Setup trip-points if applicable */
1526         if (rail->vmin_cdev) {
1527                 rail->vmin_cdev->trip_temperatures_num = i;
1528                 rail->vmin_cdev->trip_temperatures = therm_trips_table;
1529         }
1530 }
1531
1532 /*
1533  * Validate thermal dvfs settings:
1534  * - trip-points are montonically increasing
1535  * - voltages in any temperature range are montonically increasing with
1536  *   frequency (can go up/down across ranges at iso frequency)
1537  * - voltage for any frequency/thermal range combination must be within
1538  *   rail minimum/maximum limits
1539  */
1540 int __init tegra_dvfs_rail_init_thermal_dvfs_trips(
1541         int *therm_trips_table, struct dvfs_rail *rail)
1542 {
1543         int i;
1544
1545         if (!rail->vts_cdev) {
1546                 WARN(1, "%s: missing thermal dvfs cooling device\n",
1547                      rail->reg_id);
1548                 return -ENOENT;
1549         }
1550
1551         for (i = 0; i < MAX_THERMAL_LIMITS - 1; i++) {
1552                 if (therm_trips_table[i] >= therm_trips_table[i+1])
1553                         break;
1554         }
1555
1556         rail->vts_cdev->trip_temperatures_num = i + 1;
1557         rail->vts_cdev->trip_temperatures = therm_trips_table;
1558         return 0;
1559 }
1560
1561 int __init tegra_dvfs_init_thermal_dvfs_voltages(
1562         int *therm_voltages, int freqs_num, int ranges_num, struct dvfs *d)
1563 {
1564         int *millivolts;
1565         int freq_idx, therm_idx;
1566
1567         for (therm_idx = 0; therm_idx < ranges_num; therm_idx++) {
1568                 millivolts = therm_voltages + therm_idx * MAX_DVFS_FREQS;
1569                 for (freq_idx = 0; freq_idx < freqs_num; freq_idx++) {
1570                         int mv = millivolts[freq_idx];
1571                         if ((mv > d->dvfs_rail->max_millivolts) ||
1572                             (mv < d->dvfs_rail->min_millivolts) ||
1573                             (freq_idx && (mv < millivolts[freq_idx - 1]))) {
1574                                 WARN(1, "%s: invalid thermal dvfs entry %d(%d, %d)\n",
1575                                      d->clk_name, mv, freq_idx, therm_idx);
1576                                 return -EINVAL;
1577                         }
1578                 }
1579         }
1580
1581         d->millivolts = therm_voltages;
1582         d->therm_dvfs = true;
1583         return 0;
1584 }
1585
1586 /* Directly set cold temperature limit in dfll mode */
1587 int tegra_dvfs_rail_dfll_mode_set_cold(struct dvfs_rail *rail)
1588 {
1589         int ret = 0;
1590
1591         /* No thermal floors - nothing to do */
1592         if (!rail || !rail->therm_mv_floors)
1593                 return ret;
1594
1595         /*
1596          * Since cooling thresholds are the same in pll and dfll modes, pll mode
1597          * thermal index can be used to decide if cold limit should be set in
1598          * dfll mode.
1599          */
1600         mutex_lock(&dvfs_lock);
1601         if (rail->dfll_mode &&
1602             (rail->therm_floor_idx < rail->therm_mv_floors_num)) {
1603                         int mv = rail->therm_mv_floors[rail->therm_floor_idx];
1604                         ret = dvfs_rail_set_voltage_reg(rail, mv);
1605         }
1606         mutex_unlock(&dvfs_lock);
1607
1608         return ret;
1609 }
1610
1611 /*
1612  * Iterate through all the dvfs regulators, finding the regulator exported
1613  * by the regulator api for each one.  Must be called in late init, after
1614  * all the regulator api's regulators are initialized.
1615  */
1616 int __init tegra_dvfs_late_init(void)
1617 {
1618         bool connected = true;
1619         struct dvfs_rail *rail;
1620
1621         mutex_lock(&dvfs_lock);
1622
1623         list_for_each_entry(rail, &dvfs_rail_list, node)
1624                 if (dvfs_rail_connect_to_regulator(rail))
1625                         connected = false;
1626
1627         list_for_each_entry(rail, &dvfs_rail_list, node)
1628                 if (connected)
1629                         dvfs_rail_update(rail);
1630                 else
1631                         __tegra_dvfs_rail_disable(rail);
1632
1633         mutex_unlock(&dvfs_lock);
1634
1635         if (!connected && tegra_platform_is_silicon()) {
1636                 pr_warn("tegra_dvfs: DVFS regulators connection failed\n"
1637                         "            !!!! voltage scaling is disabled !!!!\n");
1638                 return -ENODEV;
1639         }
1640
1641         register_pm_notifier(&tegra_dvfs_suspend_nb);
1642         register_pm_notifier(&tegra_dvfs_resume_nb);
1643         register_reboot_notifier(&tegra_dvfs_reboot_nb);
1644
1645         list_for_each_entry(rail, &dvfs_rail_list, node) {
1646                         tegra_dvfs_rail_register_vmin_cdev(rail);
1647                         tegra_dvfs_rail_register_vts_cdev(rail);
1648         }
1649
1650         return 0;
1651 }
1652
1653 static int rail_stats_save_to_buf(char *buf, int len)
1654 {
1655         int i;
1656         struct dvfs_rail *rail;
1657         char *str = buf;
1658         char *end = buf + len;
1659
1660         str += scnprintf(str, end - str, "%-12s %-10s\n", "millivolts", "time");
1661
1662         mutex_lock(&dvfs_lock);
1663
1664         list_for_each_entry(rail, &dvfs_rail_list, node) {
1665                 str += scnprintf(str, end - str, "%s (bin: %d.%dmV)\n",
1666                            rail->reg_id,
1667                            rail->stats.bin_uV / 1000,
1668                            (rail->stats.bin_uV / 10) % 100);
1669
1670                 dvfs_rail_stats_update(rail, -1, ktime_get());
1671
1672                 str += scnprintf(str, end - str, "%-12d %-10llu\n", 0,
1673                         cputime64_to_clock_t(msecs_to_jiffies(
1674                                 ktime_to_ms(rail->stats.time_at_mv[0]))));
1675
1676                 for (i = 1; i <= DVFS_RAIL_STATS_TOP_BIN; i++) {
1677                         ktime_t ktime_zero = ktime_set(0, 0);
1678                         if (ktime_equal(rail->stats.time_at_mv[i], ktime_zero))
1679                                 continue;
1680                         str += scnprintf(str, end - str, "%-12d %-10llu\n",
1681                                 rail->min_millivolts +
1682                                 (i - 1) * rail->stats.bin_uV / 1000,
1683                                 cputime64_to_clock_t(msecs_to_jiffies(
1684                                         ktime_to_ms(rail->stats.time_at_mv[i])))
1685                         );
1686                 }
1687         }
1688         mutex_unlock(&dvfs_lock);
1689         return str - buf;
1690 }
1691
1692 #ifdef CONFIG_DEBUG_FS
1693 static int dvfs_tree_sort_cmp(void *p, struct list_head *a, struct list_head *b)
1694 {
1695         struct dvfs *da = list_entry(a, struct dvfs, reg_node);
1696         struct dvfs *db = list_entry(b, struct dvfs, reg_node);
1697         int ret;
1698
1699         ret = strcmp(da->dvfs_rail->reg_id, db->dvfs_rail->reg_id);
1700         if (ret != 0)
1701                 return ret;
1702
1703         if (da->cur_millivolts < db->cur_millivolts)
1704                 return 1;
1705         if (da->cur_millivolts > db->cur_millivolts)
1706                 return -1;
1707
1708         return strcmp(da->clk_name, db->clk_name);
1709 }
1710
1711 static int dvfs_tree_show(struct seq_file *s, void *data)
1712 {
1713         struct dvfs *d;
1714         struct dvfs_rail *rail;
1715         struct dvfs_relationship *rel;
1716
1717         seq_printf(s, "   clock      rate       mV\n");
1718         seq_printf(s, "--------------------------------\n");
1719
1720         mutex_lock(&dvfs_lock);
1721
1722         list_for_each_entry(rail, &dvfs_rail_list, node) {
1723                 int thermal_mv_floor = 0;
1724
1725                 seq_printf(s, "%s %d mV%s:\n", rail->reg_id,
1726                            rail->stats.off ? 0 : rail->millivolts,
1727                            rail->dfll_mode ? " dfll mode" :
1728                                 rail->disabled ? " disabled" : "");
1729                 list_for_each_entry(rel, &rail->relationships_from, from_node) {
1730                         seq_printf(s, "   %-10s %-7d mV %-4d mV\n",
1731                                 rel->from->reg_id, rel->from->millivolts,
1732                                 dvfs_solve_relationship(rel));
1733                 }
1734                 seq_printf(s, "   offset     %-7d mV\n", rail->dbg_mv_offs);
1735
1736                 if (rail->therm_mv_floors) {
1737                         int i = rail->therm_floor_idx;
1738                         if (i < rail->therm_mv_floors_num)
1739                                 thermal_mv_floor = rail->therm_mv_floors[i];
1740                 }
1741                 seq_printf(s, "   thermal    %-7d mV\n", thermal_mv_floor);
1742
1743                 if (rail == tegra_core_rail) {
1744                         seq_printf(s, "   override   %-7d mV [%-4d...%-4d]\n",
1745                                    rail->override_millivolts,
1746                                    rail->min_override_millivolts,
1747                                    rail->nominal_millivolts);
1748                 }
1749
1750                 list_sort(NULL, &rail->dvfs, dvfs_tree_sort_cmp);
1751
1752                 list_for_each_entry(d, &rail->dvfs, reg_node) {
1753                         seq_printf(s, "   %-10s %-10lu %-4d mV\n", d->clk_name,
1754                                 d->cur_rate, d->cur_millivolts);
1755                 }
1756         }
1757
1758         mutex_unlock(&dvfs_lock);
1759
1760         return 0;
1761 }
1762
1763 static int dvfs_tree_open(struct inode *inode, struct file *file)
1764 {
1765         return single_open(file, dvfs_tree_show, inode->i_private);
1766 }
1767
1768 static const struct file_operations dvfs_tree_fops = {
1769         .open           = dvfs_tree_open,
1770         .read           = seq_read,
1771         .llseek         = seq_lseek,
1772         .release        = single_release,
1773 };
1774
1775 static int rail_stats_show(struct seq_file *s, void *data)
1776 {
1777         char *buf = kzalloc(PAGE_SIZE, GFP_KERNEL);
1778         int size = 0;
1779
1780         if (!buf)
1781                 return -ENOMEM;
1782
1783         size = rail_stats_save_to_buf(buf, PAGE_SIZE);
1784         seq_write(s, buf, size);
1785         kfree(buf);
1786         return 0;
1787 }
1788
1789 static int rail_stats_open(struct inode *inode, struct file *file)
1790 {
1791         return single_open(file, rail_stats_show, inode->i_private);
1792 }
1793
1794 static const struct file_operations rail_stats_fops = {
1795         .open           = rail_stats_open,
1796         .read           = seq_read,
1797         .llseek         = seq_lseek,
1798         .release        = single_release,
1799 };
1800
1801 static int rail_offs_set(struct dvfs_rail *rail, int offs)
1802 {
1803         if (rail) {
1804                 mutex_lock(&dvfs_lock);
1805                 rail->dbg_mv_offs = offs;
1806                 dvfs_rail_update(rail);
1807                 mutex_unlock(&dvfs_lock);
1808                 return 0;
1809         }
1810         return -ENOENT;
1811 }
1812
1813 static int cpu_offs_get(void *data, u64 *val)
1814 {
1815         if (tegra_cpu_rail) {
1816                 *val = (u64)tegra_cpu_rail->dbg_mv_offs;
1817                 return 0;
1818         }
1819         *val = 0;
1820         return -ENOENT;
1821 }
1822 static int cpu_offs_set(void *data, u64 val)
1823 {
1824         return rail_offs_set(tegra_cpu_rail, (int)val);
1825 }
1826 DEFINE_SIMPLE_ATTRIBUTE(cpu_offs_fops, cpu_offs_get, cpu_offs_set, "%lld\n");
1827
1828 static int gpu_offs_get(void *data, u64 *val)
1829 {
1830         if (tegra_gpu_rail) {
1831                 *val = (u64)tegra_gpu_rail->dbg_mv_offs;
1832                 return 0;
1833         }
1834         *val = 0;
1835         return -ENOENT;
1836 }
1837 static int gpu_offs_set(void *data, u64 val)
1838 {
1839         return rail_offs_set(tegra_gpu_rail, (int)val);
1840 }
1841 DEFINE_SIMPLE_ATTRIBUTE(gpu_offs_fops, gpu_offs_get, gpu_offs_set, "%lld\n");
1842
1843 static int core_offs_get(void *data, u64 *val)
1844 {
1845         if (tegra_core_rail) {
1846                 *val = (u64)tegra_core_rail->dbg_mv_offs;
1847                 return 0;
1848         }
1849         *val = 0;
1850         return -ENOENT;
1851 }
1852 static int core_offs_set(void *data, u64 val)
1853 {
1854         return rail_offs_set(tegra_core_rail, (int)val);
1855 }
1856 DEFINE_SIMPLE_ATTRIBUTE(core_offs_fops, core_offs_get, core_offs_set, "%lld\n");
1857
1858 static int core_override_get(void *data, u64 *val)
1859 {
1860         if (tegra_core_rail) {
1861                 *val = (u64)tegra_core_rail->override_millivolts;
1862                 return 0;
1863         }
1864         *val = 0;
1865         return -ENOENT;
1866 }
1867 static int core_override_set(void *data, u64 val)
1868 {
1869         return dvfs_override_core_voltage((int)val);
1870 }
1871 DEFINE_SIMPLE_ATTRIBUTE(core_override_fops,
1872                         core_override_get, core_override_set, "%llu\n");
1873
1874 static int gpu_dvfs_t_show(struct seq_file *s, void *data)
1875 {
1876         int i, j;
1877         int num_ranges = 1;
1878         int *trips = NULL;
1879         struct dvfs *d;
1880         struct dvfs_rail *rail = tegra_gpu_rail;
1881
1882         if (!tegra_gpu_rail) {
1883                 seq_printf(s, "Only supported for T124 or higher\n");
1884                 return -ENOSYS;
1885         }
1886
1887         mutex_lock(&dvfs_lock);
1888
1889         d = list_first_entry(&rail->dvfs, struct dvfs, reg_node);
1890         if (rail->vts_cdev && d->therm_dvfs) {
1891                 num_ranges = rail->vts_cdev->trip_temperatures_num + 1;
1892                 trips = rail->vts_cdev->trip_temperatures;
1893         }
1894
1895         seq_printf(s, "%-11s", "T(C)\\F(kHz)");
1896         for (i = 0; i < d->num_freqs; i++) {
1897                 unsigned int f = d->freqs[i]/100;
1898                 seq_printf(s, " %7u", f);
1899         }
1900         seq_printf(s, "\n");
1901
1902         for (j = 0; j < num_ranges; j++) {
1903                 seq_printf(s, "%s", j == rail->therm_scale_idx ? ">" : " ");
1904
1905                 if (!trips || (num_ranges == 1))
1906                         seq_printf(s, "%4s..%-4s", "", "");
1907                 else if (j == 0)
1908                         seq_printf(s, "%4s..%-4d", "", trips[j]);
1909                 else if (j == num_ranges - 1)
1910                         seq_printf(s, "%4d..%-4s", trips[j], "");
1911                 else
1912                         seq_printf(s, "%4d..%-4d", trips[j-1], trips[j]);
1913
1914                 for (i = 0; i < d->num_freqs; i++) {
1915                         int mv = *(d->millivolts + j * MAX_DVFS_FREQS + i);
1916                         seq_printf(s, " %7d", mv);
1917                 }
1918                 seq_printf(s, " mV\n");
1919         }
1920
1921         mutex_unlock(&dvfs_lock);
1922
1923         return 0;
1924 }
1925
1926 static int gpu_dvfs_t_open(struct inode *inode, struct file *file)
1927 {
1928         return single_open(file, gpu_dvfs_t_show, NULL);
1929 }
1930
1931 static const struct file_operations gpu_dvfs_t_fops = {
1932         .open           = gpu_dvfs_t_open,
1933         .read           = seq_read,
1934         .llseek         = seq_lseek,
1935         .release        = single_release,
1936 };
1937
1938 static int dvfs_table_show(struct seq_file *s, void *data)
1939 {
1940         int i;
1941         struct dvfs *d;
1942         struct dvfs_rail *rail;
1943         const int *v_pll, *last_v_pll = NULL;
1944         const int *v_dfll, *last_v_dfll = NULL;
1945
1946         seq_printf(s, "DVFS tables: units mV/MHz\n");
1947
1948         mutex_lock(&dvfs_lock);
1949
1950         list_for_each_entry(rail, &dvfs_rail_list, node) {
1951                 list_for_each_entry(d, &rail->dvfs, reg_node) {
1952                         bool mv_done = false;
1953                         v_pll = tegra_dvfs_get_millivolts_pll(d);
1954                         v_dfll = d->dfll_millivolts;
1955
1956                         if (v_pll && (last_v_pll != v_pll)) {
1957                                 if (!mv_done) {
1958                                         seq_printf(s, "\n");
1959                                         mv_done = true;
1960                                 }
1961                                 last_v_pll = v_pll;
1962                                 seq_printf(s, "%-16s", rail->reg_id);
1963                                 for (i = 0; i < d->num_freqs; i++)
1964                                         seq_printf(s, "%7d", v_pll[i]);
1965                                 seq_printf(s, "\n");
1966                         }
1967
1968                         if (v_dfll && (last_v_dfll != v_dfll)) {
1969                                 if (!mv_done) {
1970                                         seq_printf(s, "\n");
1971                                         mv_done = true;
1972                                 }
1973                                 last_v_dfll = v_dfll;
1974                                 seq_printf(s, "%-8s (dfll) ", rail->reg_id);
1975                                 for (i = 0; i < d->num_freqs; i++)
1976                                         seq_printf(s, "%7d", v_dfll[i]);
1977                                 seq_printf(s, "\n");
1978                         }
1979
1980                         seq_printf(s, "%-16s", d->clk_name);
1981                         for (i = 0; i < d->num_freqs; i++) {
1982                                 unsigned int f = d->freqs[i]/100000;
1983                                 seq_printf(s, " %4u.%u", f/10, f%10);
1984                         }
1985                         seq_printf(s, "\n");
1986                 }
1987         }
1988
1989         mutex_unlock(&dvfs_lock);
1990
1991         return 0;
1992 }
1993
1994 static int dvfs_table_open(struct inode *inode, struct file *file)
1995 {
1996         return single_open(file, dvfs_table_show, inode->i_private);
1997 }
1998
1999 static const struct file_operations dvfs_table_fops = {
2000         .open           = dvfs_table_open,
2001         .read           = seq_read,
2002         .llseek         = seq_lseek,
2003         .release        = single_release,
2004 };
2005
2006 int __init dvfs_debugfs_init(struct dentry *clk_debugfs_root)
2007 {
2008         struct dentry *d;
2009
2010         d = debugfs_create_file("dvfs", S_IRUGO, clk_debugfs_root, NULL,
2011                 &dvfs_tree_fops);
2012         if (!d)
2013                 return -ENOMEM;
2014
2015         d = debugfs_create_file("rails", S_IRUGO, clk_debugfs_root, NULL,
2016                 &rail_stats_fops);
2017         if (!d)
2018                 return -ENOMEM;
2019
2020         d = debugfs_create_file("vdd_cpu_offs", S_IRUGO | S_IWUSR,
2021                 clk_debugfs_root, NULL, &cpu_offs_fops);
2022         if (!d)
2023                 return -ENOMEM;
2024
2025         d = debugfs_create_file("vdd_gpu_offs", S_IRUGO | S_IWUSR,
2026                 clk_debugfs_root, NULL, &gpu_offs_fops);
2027         if (!d)
2028                 return -ENOMEM;
2029
2030         d = debugfs_create_file("vdd_core_offs", S_IRUGO | S_IWUSR,
2031                 clk_debugfs_root, NULL, &core_offs_fops);
2032         if (!d)
2033                 return -ENOMEM;
2034
2035         d = debugfs_create_file("vdd_core_override", S_IRUGO | S_IWUSR,
2036                 clk_debugfs_root, NULL, &core_override_fops);
2037         if (!d)
2038                 return -ENOMEM;
2039
2040         d = debugfs_create_file("gpu_dvfs_t", S_IRUGO | S_IWUSR,
2041                 clk_debugfs_root, NULL, &gpu_dvfs_t_fops);
2042         if (!d)
2043                 return -ENOMEM;
2044
2045         d = debugfs_create_file("dvfs_table", S_IRUGO, clk_debugfs_root, NULL,
2046                 &dvfs_table_fops);
2047         if (!d)
2048                 return -ENOMEM;
2049
2050         return 0;
2051 }
2052
2053 #endif
2054
2055 #ifdef CONFIG_PM
2056 static ssize_t tegra_rail_stats_show(struct kobject *kobj,
2057                                         struct kobj_attribute *attr,
2058                                         char *buf)
2059 {
2060         return rail_stats_save_to_buf(buf, PAGE_SIZE);
2061 }
2062
2063 static struct kobj_attribute rail_stats_attr =
2064                 __ATTR_RO(tegra_rail_stats);
2065
2066 static int __init tegra_dvfs_sysfs_stats_init(void)
2067 {
2068         int error;
2069         error = sysfs_create_file(power_kobj, &rail_stats_attr.attr);
2070         return 0;
2071 }
2072 late_initcall(tegra_dvfs_sysfs_stats_init);
2073 #endif