47c38be2dfd4d1cb704043af5292a4c66831399e
[linux-3.10.git] / arch / arm / mach-tegra / dvfs.c
1 /*
2  *
3  * Copyright (C) 2010 Google, Inc.
4  *
5  * Author:
6  *      Colin Cross <ccross@google.com>
7  *
8  * Copyright (C) 2010-2013 NVIDIA CORPORATION. All rights reserved.
9  *
10  * This software is licensed under the terms of the GNU General Public
11  * License version 2, as published by the Free Software Foundation, and
12  * may be copied, distributed, and modified under those terms.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/clk.h>
23 #include <linux/clkdev.h>
24 #include <linux/debugfs.h>
25 #include <linux/init.h>
26 #include <linux/list.h>
27 #include <linux/list_sort.h>
28 #include <linux/module.h>
29 #include <linux/regulator/consumer.h>
30 #include <linux/seq_file.h>
31 #include <linux/slab.h>
32 #include <linux/suspend.h>
33 #include <linux/delay.h>
34 #include <linux/clk/tegra.h>
35 #include <linux/reboot.h>
36 #include <linux/clk/tegra.h>
37 #include <linux/tegra-soc.h>
38
39 #include "board.h"
40 #include "clock.h"
41 #include "dvfs.h"
42
43 #define DVFS_RAIL_STATS_BIN     12500
44
45 struct dvfs_rail *tegra_cpu_rail;
46 struct dvfs_rail *tegra_core_rail;
47 struct dvfs_rail *tegra_gpu_rail;
48
49 static LIST_HEAD(dvfs_rail_list);
50 static DEFINE_MUTEX(dvfs_lock);
51 static DEFINE_MUTEX(rail_disable_lock);
52
53 static int dvfs_rail_update(struct dvfs_rail *rail);
54
55 static inline int tegra_dvfs_rail_get_disable_level(struct dvfs_rail *rail)
56 {
57         return rail->disable_millivolts ? : rail->nominal_millivolts;
58 }
59
60 static inline int tegra_dvfs_rail_get_suspend_level(struct dvfs_rail *rail)
61 {
62         return rail->suspend_millivolts ? : rail->nominal_millivolts;
63 }
64
65 void tegra_dvfs_add_relationships(struct dvfs_relationship *rels, int n)
66 {
67         int i;
68         struct dvfs_relationship *rel;
69
70         mutex_lock(&dvfs_lock);
71
72         for (i = 0; i < n; i++) {
73                 rel = &rels[i];
74                 list_add_tail(&rel->from_node, &rel->to->relationships_from);
75                 list_add_tail(&rel->to_node, &rel->from->relationships_to);
76         }
77
78         mutex_unlock(&dvfs_lock);
79 }
80
81 /* Make sure there is a matching cooling device for thermal limit profile. */
82 static void dvfs_validate_cdevs(struct dvfs_rail *rail)
83 {
84         if (!rail->therm_mv_caps != !rail->therm_mv_caps_num) {
85                 rail->therm_mv_caps_num = 0;
86                 rail->therm_mv_caps = NULL;
87                 WARN(1, "%s: not matching thermal caps/num\n", rail->reg_id);
88         }
89
90         if (rail->therm_mv_caps && !rail->vmax_cdev)
91                 WARN(1, "%s: missing vmax cooling device\n", rail->reg_id);
92
93         if (!rail->therm_mv_floors != !rail->therm_mv_floors_num) {
94                 rail->therm_mv_floors_num = 0;
95                 rail->therm_mv_floors = NULL;
96                 WARN(1, "%s: not matching thermal floors/num\n", rail->reg_id);
97         }
98
99         if (rail->therm_mv_floors && !rail->vmin_cdev)
100                 WARN(1, "%s: missing vmin cooling device\n", rail->reg_id);
101
102         /* Limit override range to maximum floor */
103         if (rail->therm_mv_floors)
104                 rail->min_override_millivolts = rail->therm_mv_floors[0];
105
106         /* Only GPU thermal dvfs is supported */
107         if (rail->vts_cdev && (rail != tegra_gpu_rail)) {
108                 rail->vts_cdev = NULL;
109                 WARN(1, "%s: thermal dvfs is not supported\n", rail->reg_id);
110         }
111
112         if (!rail->simon_vmin_offsets != !rail->simon_vmin_offs_num) {
113                 rail->simon_vmin_offs_num = 0;
114                 rail->simon_vmin_offsets = NULL;
115                 WARN(1, "%s: not matching simon offsets/num\n", rail->reg_id);
116         }
117 }
118
119 int tegra_dvfs_init_rails(struct dvfs_rail *rails[], int n)
120 {
121         int i, mv;
122
123         mutex_lock(&dvfs_lock);
124
125         for (i = 0; i < n; i++) {
126                 INIT_LIST_HEAD(&rails[i]->dvfs);
127                 INIT_LIST_HEAD(&rails[i]->relationships_from);
128                 INIT_LIST_HEAD(&rails[i]->relationships_to);
129
130                 mv = rails[i]->nominal_millivolts;
131                 if (rails[i]->boot_millivolts > mv)
132                         WARN(1, "%s: boot voltage %d above nominal %d\n",
133                              rails[i]->reg_id, rails[i]->boot_millivolts, mv);
134                 if (rails[i]->disable_millivolts > mv)
135                         rails[i]->disable_millivolts = mv;
136                 if (rails[i]->suspend_millivolts > mv)
137                         rails[i]->suspend_millivolts = mv;
138
139                 mv = tegra_dvfs_rail_get_boot_level(rails[i]);
140                 rails[i]->millivolts = mv;
141                 rails[i]->new_millivolts = mv;
142                 if (!rails[i]->step)
143                         rails[i]->step = rails[i]->max_millivolts;
144                 if (!rails[i]->step_up)
145                         rails[i]->step_up = rails[i]->step;
146
147                 list_add_tail(&rails[i]->node, &dvfs_rail_list);
148
149                 if (!strcmp("vdd_cpu", rails[i]->reg_id))
150                         tegra_cpu_rail = rails[i];
151                 else if (!strcmp("vdd_gpu", rails[i]->reg_id))
152                         tegra_gpu_rail = rails[i];
153                 else if (!strcmp("vdd_core", rails[i]->reg_id))
154                         tegra_core_rail = rails[i];
155
156                 dvfs_validate_cdevs(rails[i]);
157         }
158
159         mutex_unlock(&dvfs_lock);
160
161         return 0;
162 };
163
164 static int dvfs_solve_relationship(struct dvfs_relationship *rel)
165 {
166         return rel->solve(rel->from, rel->to);
167 }
168
169 /* rail statistic - called during rail init, or under dfs_lock, or with
170    CPU0 only on-line, and interrupts disabled */
171 static void dvfs_rail_stats_init(struct dvfs_rail *rail, int millivolts)
172 {
173         int dvfs_rail_stats_range;
174
175         if (!rail->stats.bin_uV)
176                 rail->stats.bin_uV = DVFS_RAIL_STATS_BIN;
177
178         dvfs_rail_stats_range =
179                 (DVFS_RAIL_STATS_TOP_BIN - 1) * rail->stats.bin_uV / 1000;
180
181         rail->stats.last_update = ktime_get();
182         if (millivolts >= rail->min_millivolts) {
183                 int i = 1 + (2 * (millivolts - rail->min_millivolts) * 1000 +
184                              rail->stats.bin_uV) / (2 * rail->stats.bin_uV);
185                 rail->stats.last_index = min(i, DVFS_RAIL_STATS_TOP_BIN);
186         }
187
188         if (rail->max_millivolts >
189             rail->min_millivolts + dvfs_rail_stats_range)
190                 pr_warn("tegra_dvfs: %s: stats above %d mV will be squashed\n",
191                         rail->reg_id,
192                         rail->min_millivolts + dvfs_rail_stats_range);
193 }
194
195 static void dvfs_rail_stats_update(
196         struct dvfs_rail *rail, int millivolts, ktime_t now)
197 {
198         rail->stats.time_at_mv[rail->stats.last_index] = ktime_add(
199                 rail->stats.time_at_mv[rail->stats.last_index], ktime_sub(
200                         now, rail->stats.last_update));
201         rail->stats.last_update = now;
202
203         if (rail->stats.off)
204                 return;
205
206         if (millivolts >= rail->min_millivolts) {
207                 int i = 1 + (2 * (millivolts - rail->min_millivolts) * 1000 +
208                              rail->stats.bin_uV) / (2 * rail->stats.bin_uV);
209                 rail->stats.last_index = min(i, DVFS_RAIL_STATS_TOP_BIN);
210         } else if (millivolts == 0)
211                         rail->stats.last_index = 0;
212 }
213
214 static void dvfs_rail_stats_pause(struct dvfs_rail *rail,
215                                   ktime_t delta, bool on)
216 {
217         int i = on ? rail->stats.last_index : 0;
218         rail->stats.time_at_mv[i] = ktime_add(rail->stats.time_at_mv[i], delta);
219 }
220
221 void tegra_dvfs_rail_off(struct dvfs_rail *rail, ktime_t now)
222 {
223         if (rail) {
224                 dvfs_rail_stats_update(rail, 0, now);
225                 rail->stats.off = true;
226         }
227 }
228
229 void tegra_dvfs_rail_on(struct dvfs_rail *rail, ktime_t now)
230 {
231         if (rail) {
232                 rail->stats.off = false;
233                 dvfs_rail_stats_update(rail, rail->millivolts, now);
234         }
235 }
236
237 void tegra_dvfs_rail_pause(struct dvfs_rail *rail, ktime_t delta, bool on)
238 {
239         if (rail)
240                 dvfs_rail_stats_pause(rail, delta, on);
241 }
242
243 static int dvfs_rail_set_voltage_reg(struct dvfs_rail *rail, int millivolts)
244 {
245         int ret;
246
247         /*
248          * safely return success for low voltage requests on fixed regulator
249          * (higher requests will go through and fail, as they should)
250          */
251         if (rail->fixed_millivolts && (millivolts <= rail->fixed_millivolts))
252                 return 0;
253
254         rail->updating = true;
255         rail->reg_max_millivolts = rail->reg_max_millivolts ==
256                 rail->max_millivolts ?
257                 rail->max_millivolts + 1 : rail->max_millivolts;
258         ret = regulator_set_voltage(rail->reg,
259                 millivolts * 1000,
260                 rail->reg_max_millivolts * 1000);
261         rail->updating = false;
262
263         return ret;
264 }
265
266 /* Sets the voltage on a dvfs rail to a specific value, and updates any
267  * rails that depend on this rail. */
268 static int dvfs_rail_set_voltage(struct dvfs_rail *rail, int millivolts)
269 {
270         int ret = 0;
271         struct dvfs_relationship *rel;
272         int step, offset;
273         int i;
274         int steps;
275         bool jmp_to_zero;
276
277         if (!rail->reg) {
278                 if (millivolts == rail->millivolts)
279                         return 0;
280                 else
281                         return -EINVAL;
282         }
283
284         if (millivolts > rail->millivolts) {
285                 step = rail->step_up;
286                 offset = step;
287         } else {
288                 step = rail->step;
289                 offset = -step;
290         }
291
292         /*
293          * DFLL adjusts rail voltage automatically, but not exactly to the
294          * expected level - update stats, anyway.
295          */
296         if (rail->dfll_mode) {
297                 rail->millivolts = rail->new_millivolts = millivolts;
298                 dvfs_rail_stats_update(rail, millivolts, ktime_get());
299                 return 0;
300         }
301
302         if (rail->disabled)
303                 return 0;
304
305         rail->resolving_to = true;
306         jmp_to_zero = rail->jmp_to_zero &&
307                         ((millivolts == 0) || (rail->millivolts == 0));
308         steps = jmp_to_zero ? 1 :
309                 DIV_ROUND_UP(abs(millivolts - rail->millivolts), step);
310
311         for (i = 0; i < steps; i++) {
312                 if (!jmp_to_zero &&
313                     (abs(millivolts - rail->millivolts) > step))
314                         rail->new_millivolts = rail->millivolts + offset;
315                 else
316                         rail->new_millivolts = millivolts;
317
318                 /* Before changing the voltage, tell each rail that depends
319                  * on this rail that the voltage will change.
320                  * This rail will be the "from" rail in the relationship,
321                  * the rail that depends on this rail will be the "to" rail.
322                  * from->millivolts will be the old voltage
323                  * from->new_millivolts will be the new voltage */
324                 list_for_each_entry(rel, &rail->relationships_to, to_node) {
325                         ret = dvfs_rail_update(rel->to);
326                         if (ret)
327                                 goto out;
328                 }
329
330                 ret = dvfs_rail_set_voltage_reg(rail, rail->new_millivolts);
331                 if (ret) {
332                         pr_err("Failed to set dvfs regulator %s\n", rail->reg_id);
333                         goto out;
334                 }
335
336                 rail->millivolts = rail->new_millivolts;
337                 dvfs_rail_stats_update(rail, rail->millivolts, ktime_get());
338
339                 /* After changing the voltage, tell each rail that depends
340                  * on this rail that the voltage has changed.
341                  * from->millivolts and from->new_millivolts will be the
342                  * new voltage */
343                 list_for_each_entry(rel, &rail->relationships_to, to_node) {
344                         ret = dvfs_rail_update(rel->to);
345                         if (ret)
346                                 goto out;
347                 }
348         }
349
350         if (unlikely(rail->millivolts != millivolts)) {
351                 pr_err("%s: rail didn't reach target %d in %d steps (%d)\n",
352                         __func__, millivolts, steps, rail->millivolts);
353                 ret = -EINVAL;
354         }
355
356 out:
357         rail->resolving_to = false;
358         return ret;
359 }
360
361 /* Determine the minimum valid voltage for a rail, taking into account
362  * the dvfs clocks and any rails that this rail depends on.  Calls
363  * dvfs_rail_set_voltage with the new voltage, which will call
364  * dvfs_rail_update on any rails that depend on this rail. */
365 static inline int dvfs_rail_apply_limits(struct dvfs_rail *rail, int millivolts)
366 {
367         int min_mv = rail->min_millivolts;
368
369         if (rail->therm_mv_floors) {
370                 int i = rail->therm_floor_idx;
371                 if (i < rail->therm_mv_floors_num)
372                         min_mv = rail->therm_mv_floors[i];
373         }
374
375         if (rail->override_millivolts) {
376                 millivolts = rail->override_millivolts;
377         } else {
378                 /* apply offset and clip up to pll mode fixed mv */
379                 millivolts += rail->dbg_mv_offs;
380                 if (!rail->dfll_mode && rail->fixed_millivolts &&
381                     (millivolts < rail->fixed_millivolts))
382                         millivolts = rail->fixed_millivolts;
383         }
384
385         if (millivolts < min_mv)
386                 millivolts = min_mv;
387
388         return millivolts;
389 }
390
391 static int dvfs_rail_update(struct dvfs_rail *rail)
392 {
393         int millivolts = 0;
394         struct dvfs *d;
395         struct dvfs_relationship *rel;
396         int ret = 0;
397         int steps;
398
399         /* if dvfs is suspended, return and handle it during resume */
400         if (rail->suspended)
401                 return 0;
402
403         /* if regulators are not connected yet, return and handle it later */
404         if (!rail->reg)
405                 return 0;
406
407         /* if no clock has requested voltage since boot, defer update */
408         if (!rail->rate_set)
409                 return 0;
410
411         /* if rail update is entered while resolving circular dependencies,
412            abort recursion */
413         if (rail->resolving_to)
414                 return 0;
415
416         /* Find the maximum voltage requested by any clock */
417         list_for_each_entry(d, &rail->dvfs, reg_node)
418                 millivolts = max(d->cur_millivolts, millivolts);
419
420         /* Apply offset and min/max limits if any clock is requesting voltage */
421         if (millivolts)
422                 millivolts = dvfs_rail_apply_limits(rail, millivolts);
423         /* Keep current voltage if regulator is to be disabled via explicitly */
424         else if (rail->in_band_pm)
425                 return 0;
426         /* Keep current voltage if regulator must not be disabled at run time */
427         else if (!rail->jmp_to_zero) {
428                 WARN(1, "%s cannot be turned off by dvfs\n", rail->reg_id);
429                 return 0;
430         }
431         /* else: fall thru if regulator is turned off by side band signaling */
432
433         /* retry update if limited by from-relationship to account for
434            circular dependencies */
435         steps = DIV_ROUND_UP(abs(millivolts - rail->millivolts), rail->step);
436         for (; steps >= 0; steps--) {
437                 rail->new_millivolts = millivolts;
438
439                 /* Check any rails that this rail depends on */
440                 list_for_each_entry(rel, &rail->relationships_from, from_node)
441                         rail->new_millivolts = dvfs_solve_relationship(rel);
442
443                 if (rail->new_millivolts == rail->millivolts)
444                         break;
445
446                 ret = dvfs_rail_set_voltage(rail, rail->new_millivolts);
447         }
448
449         return ret;
450 }
451
452 static struct regulator *get_fixed_regulator(struct dvfs_rail *rail)
453 {
454         struct regulator *reg;
455         char reg_id[80];
456         struct dvfs *d;
457         int v, i;
458         unsigned long dfll_boost;
459
460         strcpy(reg_id, rail->reg_id);
461         strcat(reg_id, "_fixed");
462         reg = regulator_get(NULL, reg_id);
463         if (IS_ERR(reg))
464                 return reg;
465
466         v = regulator_get_voltage(reg) / 1000;
467         if ((v < rail->min_millivolts) || (v > rail->nominal_millivolts) ||
468             (rail->therm_mv_floors && v < rail->therm_mv_floors[0])) {
469                 pr_err("tegra_dvfs: ivalid fixed %s voltage %d\n",
470                        rail->reg_id, v);
471                 return ERR_PTR(-EINVAL);
472         }
473
474         /*
475          * Only fixed at nominal voltage vdd_core regulator is allowed, same
476          * is true for cpu rail if dfll mode is not supported at all. No thermal
477          * capping can be implemented in this case.
478          */
479         if (!IS_ENABLED(CONFIG_ARCH_TEGRA_HAS_CL_DVFS) ||
480             (rail != tegra_cpu_rail)) {
481                 if (v != rail->nominal_millivolts) {
482                         pr_err("tegra_dvfs: %s fixed below nominal at %d\n",
483                                rail->reg_id, v);
484                         return ERR_PTR(-EINVAL);
485                 }
486                 if (rail->therm_mv_caps) {
487                         pr_err("tegra_dvfs: cannot fix %s with thermal caps\n",
488                                rail->reg_id);
489                         return ERR_PTR(-ENOSYS);
490                 }
491                 return reg;
492         }
493
494         /*
495          * If dfll mode is supported, fixed vdd_cpu regulator may be below
496          * nominal in pll mode - maximum cpu rate in pll mode is limited
497          * respectively. Regulator is required to allow automatic scaling
498          * in dfll mode.
499          *
500          * FIXME: platform data to explicitly identify such "hybrid" regulator?
501          */
502         d = list_first_entry(&rail->dvfs, struct dvfs, reg_node);
503         for (i = 0; i < d->num_freqs; i++) {
504                 if (d->millivolts[i] > v)
505                         break;
506         }
507
508         if (!i) {
509                 pr_err("tegra_dvfs: %s fixed at %d: too low for min rate\n",
510                        rail->reg_id, v);
511                 return ERR_PTR(-EINVAL);
512         }
513
514         dfll_boost = (d->freqs[d->num_freqs - 1] - d->freqs[i - 1]);
515         if (d->dfll_data.max_rate_boost < dfll_boost)
516                 d->dfll_data.max_rate_boost = dfll_boost;
517
518         rail->fixed_millivolts = v;
519         return reg;
520 }
521
522 static int dvfs_rail_connect_to_regulator(struct dvfs_rail *rail)
523 {
524         struct regulator *reg;
525         int v;
526
527         if (!rail->reg) {
528                 reg = regulator_get(NULL, rail->reg_id);
529                 if (IS_ERR(reg)) {
530                         reg = get_fixed_regulator(rail);
531                         if (IS_ERR(reg)) {
532                                 pr_err("tegra_dvfs: failed to connect %s rail\n",
533                                        rail->reg_id);
534                                 return PTR_ERR(reg);
535                         }
536                 }
537                 rail->reg = reg;
538         }
539
540         v = regulator_enable(rail->reg);
541         if (v < 0) {
542                 pr_err("tegra_dvfs: failed on enabling regulator %s\n, err %d",
543                         rail->reg_id, v);
544                 return v;
545         }
546
547         v = regulator_get_voltage(rail->reg);
548         if (v < 0) {
549                 pr_err("tegra_dvfs: failed initial get %s voltage\n",
550                        rail->reg_id);
551                 return v;
552         }
553         rail->millivolts = v / 1000;
554         rail->new_millivolts = rail->millivolts;
555         dvfs_rail_stats_init(rail, rail->millivolts);
556
557         if (rail->boot_millivolts &&
558             (rail->boot_millivolts != rail->millivolts)) {
559                 WARN(1, "%s boot voltage %d does not match expected %d\n",
560                      rail->reg_id, rail->millivolts, rail->boot_millivolts);
561                 rail->boot_millivolts = rail->millivolts;
562         }
563         return 0;
564 }
565
566 static inline unsigned long *dvfs_get_freqs(struct dvfs *d)
567 {
568         return d->alt_freqs && d->use_alt_freqs ? d->alt_freqs : &d->freqs[0];
569 }
570
571 static inline const int *dvfs_get_millivolts(struct dvfs *d, unsigned long rate)
572 {
573         if (tegra_dvfs_is_dfll_scale(d, rate))
574                 return d->dfll_millivolts;
575
576         return tegra_dvfs_get_millivolts_pll(d);
577 }
578
579 static int
580 __tegra_dvfs_set_rate(struct dvfs *d, unsigned long rate)
581 {
582         int i = 0;
583         int ret, mv, detach_mv;
584         unsigned long *freqs = dvfs_get_freqs(d);
585         const int *millivolts = dvfs_get_millivolts(d, rate);
586
587         if (freqs == NULL || millivolts == NULL)
588                 return -ENODEV;
589
590         /* On entry to dfll range limit 1st step to range bottom (full ramp of
591            voltage/rate is completed automatically in dfll mode) */
592         if (tegra_dvfs_is_dfll_range_entry(d, rate))
593                 rate = d->dfll_data.use_dfll_rate_min;
594
595         if (rate > freqs[d->num_freqs - 1]) {
596                 pr_warn("tegra_dvfs: rate %lu too high for dvfs on %s\n", rate,
597                         d->clk_name);
598                 return -EINVAL;
599         }
600
601         if (rate == 0) {
602                 d->cur_millivolts = 0;
603         } else {
604                 while (i < d->num_freqs && rate > freqs[i])
605                         i++;
606
607                 mv = millivolts[i];
608
609                 if ((d->max_millivolts) && (mv > d->max_millivolts)) {
610                         pr_warn("tegra_dvfs: voltage %d too high for dvfs on %s\n",
611                                 mv, d->clk_name);
612                         return -EINVAL;
613                 }
614
615                 detach_mv = tegra_dvfs_rail_get_boot_level(d->dvfs_rail);
616                 if (!d->dvfs_rail->reg && (mv > detach_mv)) {
617                         pr_warn("%s: %s: voltage %d above boot limit %d\n",
618                                 __func__, d->clk_name, mv, detach_mv);
619                         return -EINVAL;
620                 }
621
622                 detach_mv = tegra_dvfs_rail_get_disable_level(d->dvfs_rail);
623                 if (d->dvfs_rail->disabled && (mv > detach_mv)) {
624                         pr_warn("%s: %s: voltage %d above disable limit %d\n",
625                                 __func__, d->clk_name, mv, detach_mv);
626                         return -EINVAL;
627                 }
628
629                 detach_mv = tegra_dvfs_rail_get_suspend_level(d->dvfs_rail);
630                 if (d->dvfs_rail->suspended && (mv > detach_mv)) {
631                         pr_warn("%s: %s: voltage %d above disable limit %d\n",
632                                 __func__, d->clk_name, mv, detach_mv);
633                         return -EINVAL;
634                 }
635
636                 detach_mv = d->dvfs_rail->override_millivolts;
637                 if (detach_mv && (mv > detach_mv)) {
638                         pr_warn("%s: %s: voltage %d above override level %d\n",
639                                 __func__, d->clk_name, mv, detach_mv);
640                         return -EINVAL;
641                 }
642                 d->cur_millivolts = mv;
643         }
644
645         d->cur_rate = rate;
646
647         d->dvfs_rail->rate_set = true;
648         ret = dvfs_rail_update(d->dvfs_rail);
649         if (ret)
650                 pr_err("Failed to set regulator %s for clock %s to %d mV\n",
651                         d->dvfs_rail->reg_id, d->clk_name, d->cur_millivolts);
652
653         return ret;
654 }
655
656 /*
657  * Some clocks may have alternative frequency ladder that provides lower minimum
658  * voltage at the same rate (or complimentary: higher maximum rate at the same
659  * voltage). Interfaces below allows dvfs clients to install such ladder, and
660  * switch between primary and alternative frequencies in flight.
661  */
662 static int alt_freqs_validate(struct dvfs *d, unsigned long *alt_freqs)
663 {
664         int i;
665
666         if (alt_freqs) {
667                 for (i = 0; i < d->num_freqs; i++) {
668                         if (d->freqs[i] > alt_freqs[i]) {
669                                 pr_err("%s: Invalid alt freqs for %s\n",
670                                        __func__, d->clk_name);
671                                 return -EINVAL;
672                         }
673                 }
674         }
675         return 0;
676 }
677
678 int tegra_dvfs_alt_freqs_install(struct dvfs *d, unsigned long *alt_freqs)
679 {
680         int ret = 0;
681
682         mutex_lock(&dvfs_lock);
683
684         ret = alt_freqs_validate(d, alt_freqs);
685         if (!ret)
686                 d->alt_freqs = alt_freqs;
687
688         mutex_unlock(&dvfs_lock);
689         return ret;
690 }
691
692 int tegra_dvfs_use_alt_freqs_on_clk(struct clk *c, bool use_alt_freq)
693 {
694         int ret = -ENOENT;
695         struct dvfs *d = c->dvfs;
696
697         mutex_lock(&dvfs_lock);
698
699         if (d && d->alt_freqs) {
700                 ret = 0;
701                 if (d->use_alt_freqs != use_alt_freq) {
702                         d->use_alt_freqs = use_alt_freq;
703                         ret = __tegra_dvfs_set_rate(d, d->cur_rate);
704                 }
705         }
706
707         mutex_unlock(&dvfs_lock);
708         return ret;
709 }
710
711 int tegra_dvfs_alt_freqs_set(struct dvfs *d, unsigned long *alt_freqs)
712 {
713         int ret = 0;
714
715         mutex_lock(&dvfs_lock);
716
717         if (d->alt_freqs != alt_freqs) {
718                 ret = alt_freqs_validate(d, alt_freqs);
719                 if (!ret) {
720                         d->use_alt_freqs = !!alt_freqs;
721                         d->alt_freqs = alt_freqs;
722                         ret = __tegra_dvfs_set_rate(d, d->cur_rate);
723                 }
724         }
725
726         mutex_unlock(&dvfs_lock);
727         return ret;
728 }
729
730 /*
731  * Some clocks may need run-time voltage ladder replacement. Allow it only if
732  * peak voltages across all possible ladders are specified, and new voltages
733  * do not violate peaks.
734  */
735 static int new_voltages_validate(struct dvfs *d, const int *new_millivolts,
736                                  int freqs_num, int ranges_num)
737 {
738         const int *millivolts;
739         int freq_idx, therm_idx;
740
741         for (therm_idx = 0; therm_idx < ranges_num; therm_idx++) {
742                 millivolts = new_millivolts + therm_idx * MAX_DVFS_FREQS;
743                 for (freq_idx = 0; freq_idx < freqs_num; freq_idx++) {
744                         if (millivolts[freq_idx] >
745                             d->peak_millivolts[freq_idx]) {
746                                 pr_err("%s: Invalid new voltages for %s\n",
747                                        __func__, d->clk_name);
748                                 return -EINVAL;
749                         }
750                 }
751         }
752         return 0;
753 }
754
755 int tegra_dvfs_replace_voltage_table(struct dvfs *d, const int *new_millivolts)
756 {
757         int ret = 0;
758         int ranges_num = 1;
759
760         mutex_lock(&dvfs_lock);
761
762         if (!d->peak_millivolts) {
763                 ret = -EINVAL;
764                 goto out;
765         }
766
767         if (d->therm_dvfs && d->dvfs_rail->vts_cdev)
768                 ranges_num += d->dvfs_rail->vts_cdev->trip_temperatures_num;
769
770         if (new_voltages_validate(d, new_millivolts,
771                                   d->num_freqs, ranges_num)) {
772                 ret = -EINVAL;
773                 goto out;
774         }
775
776         d->millivolts = new_millivolts;
777         if (__tegra_dvfs_set_rate(d, d->cur_rate))
778                 ret = -EAGAIN;
779 out:
780         mutex_unlock(&dvfs_lock);
781         return ret;
782 }
783
784 /*
785  *  Using non alt frequencies always results in peak voltage
786  * (enforced by alt_freqs_validate())
787  */
788 static int predict_non_alt_millivolts(struct clk *c, const int *millivolts,
789                                       unsigned long rate)
790 {
791         int i;
792
793         if (!millivolts)
794                 return -ENODEV;
795
796         for (i = 0; i < c->dvfs->num_freqs; i++) {
797                 if (rate <= c->dvfs->freqs[i])
798                         break;
799         }
800
801         if (i == c->dvfs->num_freqs)
802                 i--;
803
804         return millivolts[i];
805 }
806
807 static int predict_millivolts(struct clk *c, const int *millivolts,
808                               unsigned long rate)
809 {
810         /*
811          * Predicted voltage can not be used across the switch to alternative
812          * frequency limits. For now, just fail the call for clock that has
813          * alternative limits initialized.
814          */
815         if (c->dvfs->alt_freqs)
816                 return -ENOSYS;
817
818         return predict_non_alt_millivolts(c, millivolts, rate);
819 }
820
821 int tegra_dvfs_predict_millivolts(struct clk *c, unsigned long rate)
822 {
823         const int *millivolts;
824
825         if (!rate || !c->dvfs)
826                 return 0;
827
828         millivolts = tegra_dvfs_is_dfll_range(c->dvfs, rate) ?
829                 c->dvfs->dfll_millivolts :
830                 tegra_dvfs_get_millivolts_pll(c->dvfs);
831         return predict_millivolts(c, millivolts, rate);
832 }
833
834 int tegra_dvfs_predict_peak_millivolts(struct clk *c, unsigned long rate)
835 {
836         int mv;
837         const int *millivolts;
838
839         if (!rate || !c->dvfs)
840                 return 0;
841
842         millivolts = tegra_dvfs_is_dfll_range(c->dvfs, rate) ?
843                         c->dvfs->dfll_millivolts : c->dvfs->peak_millivolts ? :
844                         tegra_dvfs_get_millivolts_pll(c->dvfs);
845
846         mv = predict_non_alt_millivolts(c, millivolts, rate);
847         if (mv < 0)
848                 return mv;
849
850         if (c->dvfs->dvfs_rail->therm_mv_floors)
851                 mv = max(mv, c->dvfs->dvfs_rail->therm_mv_floors[0]);
852         return mv;
853 }
854
855 const int *tegra_dvfs_get_millivolts_pll(struct dvfs *d)
856 {
857         if (d->therm_dvfs) {
858                 int therm_idx = d->dvfs_rail->therm_scale_idx;
859                 return d->millivolts + therm_idx * MAX_DVFS_FREQS;
860         }
861         return d->millivolts;
862 }
863
864 int tegra_dvfs_set_rate(struct clk *c, unsigned long rate)
865 {
866         int ret;
867
868         if (!c->dvfs)
869                 return -EINVAL;
870
871         mutex_lock(&dvfs_lock);
872         ret = __tegra_dvfs_set_rate(c->dvfs, rate);
873         mutex_unlock(&dvfs_lock);
874
875         return ret;
876 }
877 EXPORT_SYMBOL(tegra_dvfs_set_rate);
878
879 int tegra_dvfs_get_freqs(struct clk *c, unsigned long **freqs, int *num_freqs)
880 {
881         if (!c->dvfs)
882                 return -ENOSYS;
883
884         if (c->dvfs->alt_freqs)
885                 return -ENOSYS;
886
887         *num_freqs = c->dvfs->num_freqs;
888         *freqs = c->dvfs->freqs;
889
890         return 0;
891 }
892 EXPORT_SYMBOL(tegra_dvfs_get_freqs);
893
894 static inline int dvfs_rail_get_override_floor(struct dvfs_rail *rail)
895 {
896         return rail->override_unresolved ? rail->nominal_millivolts :
897                 rail->min_override_millivolts;
898 }
899
900 #ifdef CONFIG_TEGRA_VDD_CORE_OVERRIDE
901 static DEFINE_MUTEX(rail_override_lock);
902
903 static int dvfs_override_core_voltage(int override_mv)
904 {
905         int ret, floor, ceiling;
906         struct dvfs_rail *rail = tegra_core_rail;
907
908         if (!rail)
909                 return -ENOENT;
910
911         if (rail->fixed_millivolts)
912                 return -ENOSYS;
913
914         mutex_lock(&rail_override_lock);
915
916         floor = dvfs_rail_get_override_floor(rail);
917         ceiling = rail->nominal_millivolts;
918         if (override_mv && ((override_mv < floor) || (override_mv > ceiling))) {
919                 pr_err("%s: override level %d outside the range [%d...%d]\n",
920                        __func__, override_mv, floor, ceiling);
921                 mutex_unlock(&rail_override_lock);
922                 return -EINVAL;
923         }
924
925         if (override_mv == rail->override_millivolts) {
926                 ret = 0;
927                 goto out;
928         }
929
930         if (override_mv) {
931                 ret = tegra_dvfs_override_core_cap_apply(override_mv);
932                 if (ret) {
933                         pr_err("%s: failed to set cap for override level %d\n",
934                                __func__, override_mv);
935                         goto out;
936                 }
937         }
938
939         mutex_lock(&dvfs_lock);
940         if (rail->disabled || rail->suspended) {
941                 pr_err("%s: cannot scale %s rail\n", __func__,
942                        rail->disabled ? "disabled" : "suspended");
943                 ret = -EPERM;
944                 if (!override_mv) {
945                         mutex_unlock(&dvfs_lock);
946                         goto out;
947                 }
948         } else {
949                 rail->override_millivolts = override_mv;
950                 ret = dvfs_rail_update(rail);
951                 if (ret) {
952                         pr_err("%s: failed to set override level %d\n",
953                                __func__, override_mv);
954                         rail->override_millivolts = 0;
955                         dvfs_rail_update(rail);
956                 }
957         }
958         mutex_unlock(&dvfs_lock);
959
960         if (!override_mv || ret)
961                 tegra_dvfs_override_core_cap_apply(0);
962 out:
963         mutex_unlock(&rail_override_lock);
964         return ret;
965 }
966
967 int tegra_dvfs_resolve_override(struct clk *c, unsigned long max_rate)
968 {
969         int mv;
970         struct dvfs *d = c->dvfs;
971         struct dvfs_rail *rail;
972
973         if (!d)
974                 return 0;
975         rail = d->dvfs_rail;
976
977         mutex_lock(&rail_override_lock);
978         mutex_lock(&dvfs_lock);
979
980         if (d->defer_override && rail->override_unresolved) {
981                 d->defer_override = false;
982
983                 mv = tegra_dvfs_predict_peak_millivolts(c, max_rate);
984                 if (rail->min_override_millivolts < mv)
985                         rail->min_override_millivolts = mv;
986
987                 rail->override_unresolved--;
988                 if (!rail->override_unresolved && rail->resolve_override)
989                         rail->resolve_override(rail->min_override_millivolts);
990         }
991         mutex_unlock(&dvfs_lock);
992         mutex_unlock(&rail_override_lock);
993         return 0;
994 }
995
996 int tegra_dvfs_rail_get_override_floor(struct dvfs_rail *rail)
997 {
998         if (rail) {
999                 int mv;
1000                 mutex_lock(&rail_override_lock);
1001                 mv = dvfs_rail_get_override_floor(rail);
1002                 mutex_unlock(&rail_override_lock);
1003                 return mv;
1004         }
1005         return -ENOENT;
1006 }
1007 #else
1008 static int dvfs_override_core_voltage(int override_mv)
1009 {
1010         pr_err("%s: vdd core override is not supported\n", __func__);
1011         return -ENOSYS;
1012 }
1013 #endif
1014
1015 int tegra_dvfs_override_core_voltage(struct clk *c, int override_mv)
1016 {
1017         if (!c->dvfs || !c->dvfs->can_override) {
1018                 pr_err("%s: %s cannot override vdd core\n", __func__, c->name);
1019                 return -EPERM;
1020         }
1021         return dvfs_override_core_voltage(override_mv);
1022 }
1023 EXPORT_SYMBOL(tegra_dvfs_override_core_voltage);
1024
1025 /* May only be called during clock init, does not take any locks on clock c. */
1026 int __init tegra_enable_dvfs_on_clk(struct clk *c, struct dvfs *d)
1027 {
1028         int i;
1029
1030         if (c->dvfs) {
1031                 pr_err("Error when enabling dvfs on %s for clock %s:\n",
1032                         d->dvfs_rail->reg_id, c->name);
1033                 pr_err("DVFS already enabled for %s\n",
1034                         c->dvfs->dvfs_rail->reg_id);
1035                 return -EINVAL;
1036         }
1037
1038         for (i = 0; i < MAX_DVFS_FREQS; i++) {
1039                 if (d->millivolts[i] == 0)
1040                         break;
1041
1042                 d->freqs[i] *= d->freqs_mult;
1043
1044                 /* If final frequencies are 0, pad with previous frequency */
1045                 if (d->freqs[i] == 0 && i > 1)
1046                         d->freqs[i] = d->freqs[i - 1];
1047         }
1048         d->num_freqs = i;
1049
1050         if (d->auto_dvfs) {
1051                 c->auto_dvfs = true;
1052                 clk_set_cansleep(c);
1053         }
1054
1055         c->dvfs = d;
1056
1057         /*
1058          * Minimum core override level is determined as maximum voltage required
1059          * for clocks outside shared buses (shared bus rates can be capped to
1060          * safe levels when override limit is set)
1061          */
1062         if (i && c->ops && !c->ops->shared_bus_update &&
1063             !(c->flags & PERIPH_ON_CBUS) && !d->can_override) {
1064                 int mv = tegra_dvfs_predict_peak_millivolts(c, d->freqs[i-1]);
1065                 struct dvfs_rail *rail = d->dvfs_rail;
1066                 if (d->defer_override)
1067                         rail->override_unresolved++;
1068                 else if (rail->min_override_millivolts < mv)
1069                         rail->min_override_millivolts =
1070                                 min(mv, rail->nominal_millivolts);
1071         }
1072
1073         mutex_lock(&dvfs_lock);
1074         list_add_tail(&d->reg_node, &d->dvfs_rail->dvfs);
1075         mutex_unlock(&dvfs_lock);
1076
1077         return 0;
1078 }
1079
1080 static bool tegra_dvfs_all_rails_suspended(void)
1081 {
1082         struct dvfs_rail *rail;
1083         bool all_suspended = true;
1084
1085         list_for_each_entry(rail, &dvfs_rail_list, node)
1086                 if (!rail->suspended && !rail->disabled)
1087                         all_suspended = false;
1088
1089         return all_suspended;
1090 }
1091
1092 static bool tegra_dvfs_from_rails_suspended_or_solved(struct dvfs_rail *to)
1093 {
1094         struct dvfs_relationship *rel;
1095         bool all_suspended = true;
1096
1097         list_for_each_entry(rel, &to->relationships_from, from_node)
1098                 if (!rel->from->suspended && !rel->from->disabled &&
1099                         !rel->solved_at_nominal)
1100                         all_suspended = false;
1101
1102         return all_suspended;
1103 }
1104
1105 static int tegra_dvfs_suspend_one(void)
1106 {
1107         struct dvfs_rail *rail;
1108         int ret, mv;
1109
1110         list_for_each_entry(rail, &dvfs_rail_list, node) {
1111                 if (!rail->suspended && !rail->disabled &&
1112                     tegra_dvfs_from_rails_suspended_or_solved(rail)) {
1113                         /* Safe, as pll mode rate is capped to fixed level */
1114                         if (!rail->dfll_mode && rail->fixed_millivolts) {
1115                                 mv = rail->fixed_millivolts;
1116                         } else {
1117                                 mv = tegra_dvfs_rail_get_suspend_level(rail);
1118                                 mv = dvfs_rail_apply_limits(rail, mv);
1119                         }
1120
1121                         /* apply suspend limit only if it is above current mv */
1122                         ret = -EPERM;
1123                         if (mv >= rail->millivolts)
1124                                 ret = dvfs_rail_set_voltage(rail, mv);
1125                         if (ret) {
1126                                 pr_err("tegra_dvfs: failed %s suspend at %d\n",
1127                                        rail->reg_id, rail->millivolts);
1128                                 return ret;
1129                         }
1130
1131                         rail->suspended = true;
1132                         return 0;
1133                 }
1134         }
1135
1136         return -EINVAL;
1137 }
1138
1139 static void tegra_dvfs_resume(void)
1140 {
1141         struct dvfs_rail *rail;
1142
1143         mutex_lock(&dvfs_lock);
1144
1145         list_for_each_entry(rail, &dvfs_rail_list, node)
1146                 rail->suspended = false;
1147
1148         list_for_each_entry(rail, &dvfs_rail_list, node)
1149                 dvfs_rail_update(rail);
1150
1151         mutex_unlock(&dvfs_lock);
1152 }
1153
1154 static int tegra_dvfs_suspend(void)
1155 {
1156         int ret = 0;
1157
1158         mutex_lock(&dvfs_lock);
1159
1160         while (!tegra_dvfs_all_rails_suspended()) {
1161                 ret = tegra_dvfs_suspend_one();
1162                 if (ret)
1163                         break;
1164         }
1165
1166         mutex_unlock(&dvfs_lock);
1167
1168         if (ret)
1169                 tegra_dvfs_resume();
1170
1171         return ret;
1172 }
1173
1174 static int tegra_dvfs_pm_suspend(struct notifier_block *nb,
1175                                  unsigned long event, void *data)
1176 {
1177         if (event == PM_SUSPEND_PREPARE) {
1178                 if (tegra_dvfs_suspend())
1179                         return NOTIFY_STOP;
1180                 pr_info("tegra_dvfs: suspended\n");
1181         }
1182         return NOTIFY_OK;
1183 };
1184
1185 static int tegra_dvfs_pm_resume(struct notifier_block *nb,
1186                                 unsigned long event, void *data)
1187 {
1188         if (event == PM_POST_SUSPEND) {
1189                 tegra_dvfs_resume();
1190                 pr_info("tegra_dvfs: resumed\n");
1191         }
1192         return NOTIFY_OK;
1193 };
1194
1195 static struct notifier_block tegra_dvfs_suspend_nb = {
1196         .notifier_call = tegra_dvfs_pm_suspend,
1197         .priority = -1,
1198 };
1199
1200 static struct notifier_block tegra_dvfs_resume_nb = {
1201         .notifier_call = tegra_dvfs_pm_resume,
1202         .priority = 1,
1203 };
1204
1205 static int tegra_dvfs_reboot_notify(struct notifier_block *nb,
1206                                 unsigned long event, void *data)
1207 {
1208         switch (event) {
1209         case SYS_RESTART:
1210         case SYS_HALT:
1211         case SYS_POWER_OFF:
1212                 tegra_dvfs_suspend();
1213                 return NOTIFY_OK;
1214         }
1215         return NOTIFY_DONE;
1216 }
1217
1218 static struct notifier_block tegra_dvfs_reboot_nb = {
1219         .notifier_call = tegra_dvfs_reboot_notify,
1220 };
1221
1222 /* must be called with dvfs lock held */
1223 static void __tegra_dvfs_rail_disable(struct dvfs_rail *rail)
1224 {
1225         int ret = -EPERM;
1226         int mv;
1227
1228         /* don't set voltage in DFLL mode - won't work, but break stats */
1229         if (rail->dfll_mode) {
1230                 rail->disabled = true;
1231                 return;
1232         }
1233
1234         /* Safe, as pll mode rate is capped to fixed level */
1235         if (!rail->dfll_mode && rail->fixed_millivolts) {
1236                 mv = rail->fixed_millivolts;
1237         } else {
1238                 mv = tegra_dvfs_rail_get_disable_level(rail);
1239                 mv = dvfs_rail_apply_limits(rail, mv);
1240         }
1241
1242         /* apply detach mode limit provided it is above current volatge */
1243         if (mv >= rail->millivolts)
1244                 ret = dvfs_rail_set_voltage(rail, mv);
1245         if (ret) {
1246                 pr_err("tegra_dvfs: failed to disable %s at %d\n",
1247                        rail->reg_id, rail->millivolts);
1248                 return;
1249         }
1250         rail->disabled = true;
1251 }
1252
1253 /* must be called with dvfs lock held */
1254 static void __tegra_dvfs_rail_enable(struct dvfs_rail *rail)
1255 {
1256         rail->disabled = false;
1257         dvfs_rail_update(rail);
1258 }
1259
1260 void tegra_dvfs_rail_enable(struct dvfs_rail *rail)
1261 {
1262         if (!rail)
1263                 return;
1264
1265         mutex_lock(&rail_disable_lock);
1266
1267         if (rail->disabled) {
1268                 mutex_lock(&dvfs_lock);
1269                 __tegra_dvfs_rail_enable(rail);
1270                 mutex_unlock(&dvfs_lock);
1271
1272                 tegra_dvfs_rail_post_enable(rail);
1273         }
1274         mutex_unlock(&rail_disable_lock);
1275 }
1276
1277 void tegra_dvfs_rail_disable(struct dvfs_rail *rail)
1278 {
1279         if (!rail)
1280                 return;
1281
1282         mutex_lock(&rail_disable_lock);
1283         if (rail->disabled)
1284                 goto out;
1285
1286         /* rail disable will set it to nominal voltage underneath clock
1287            framework - need to re-configure clock rates that are not safe
1288            at nominal (yes, unsafe at nominal is ugly, but possible). Rate
1289            change must be done outside of dvfs lock. */
1290         if (tegra_dvfs_rail_disable_prepare(rail)) {
1291                 pr_info("dvfs: failed to prepare regulator %s to disable\n",
1292                         rail->reg_id);
1293                 goto out;
1294         }
1295
1296         mutex_lock(&dvfs_lock);
1297         __tegra_dvfs_rail_disable(rail);
1298         mutex_unlock(&dvfs_lock);
1299 out:
1300         mutex_unlock(&rail_disable_lock);
1301 }
1302
1303 int tegra_dvfs_rail_disable_by_name(const char *reg_id)
1304 {
1305         struct dvfs_rail *rail = tegra_dvfs_get_rail_by_name(reg_id);
1306         if (!rail)
1307                 return -EINVAL;
1308
1309         tegra_dvfs_rail_disable(rail);
1310         return 0;
1311 }
1312
1313 struct dvfs_rail *tegra_dvfs_get_rail_by_name(const char *reg_id)
1314 {
1315         struct dvfs_rail *rail;
1316
1317         mutex_lock(&dvfs_lock);
1318         list_for_each_entry(rail, &dvfs_rail_list, node) {
1319                 if (!strcmp(reg_id, rail->reg_id)) {
1320                         mutex_unlock(&dvfs_lock);
1321                         return rail;
1322                 }
1323         }
1324         mutex_unlock(&dvfs_lock);
1325         return NULL;
1326 }
1327
1328 int tegra_dvfs_rail_power_up(struct dvfs_rail *rail)
1329 {
1330         int ret = -ENOENT;
1331
1332         if (!rail || !rail->in_band_pm)
1333                 return -ENOSYS;
1334
1335         mutex_lock(&dvfs_lock);
1336         if (rail->reg) {
1337                 ret = regulator_enable(rail->reg);
1338                 if (!ret && !timekeeping_suspended)
1339                         tegra_dvfs_rail_on(rail, ktime_get());
1340         }
1341         mutex_unlock(&dvfs_lock);
1342         return ret;
1343 }
1344
1345 int tegra_dvfs_rail_power_down(struct dvfs_rail *rail)
1346 {
1347         int ret = -ENOENT;
1348
1349         if (!rail || !rail->in_band_pm)
1350                 return -ENOSYS;
1351
1352         mutex_lock(&dvfs_lock);
1353         if (rail->reg) {
1354                 ret = regulator_disable(rail->reg);
1355                 if (!ret && !timekeeping_suspended)
1356                         tegra_dvfs_rail_off(rail, ktime_get());
1357         }
1358         mutex_unlock(&dvfs_lock);
1359         return ret;
1360 }
1361
1362 bool tegra_dvfs_is_rail_up(struct dvfs_rail *rail)
1363 {
1364         bool ret = false;
1365
1366         if (!rail)
1367                 return false;
1368
1369         if (!rail->in_band_pm)
1370                 return true;
1371
1372         mutex_lock(&dvfs_lock);
1373         if (rail->reg)
1374                 ret = regulator_is_enabled(rail->reg) > 0;
1375         mutex_unlock(&dvfs_lock);
1376         return ret;
1377 }
1378
1379 int tegra_dvfs_rail_set_mode(struct dvfs_rail *rail, unsigned int mode)
1380 {
1381         int ret = -ENOENT;
1382
1383         if (!rail)
1384                 return ret;
1385
1386         pr_debug("%s: updating %s mode from %u to %u\n", __func__,
1387                 rail->reg_id, regulator_get_mode(rail->reg), mode);
1388
1389         if (rail->reg)
1390                 ret = regulator_set_mode(rail->reg, mode);
1391
1392         if (ret)
1393                 pr_err("Failed to set dvfs regulator %s mode %u\n",
1394                         rail->reg_id, mode);
1395         return ret;
1396 }
1397
1398 bool tegra_dvfs_rail_updating(struct clk *clk)
1399 {
1400         return (!clk ? false :
1401                 (!clk->dvfs ? false :
1402                  (!clk->dvfs->dvfs_rail ? false :
1403                   (clk->dvfs->dvfs_rail->updating ||
1404                    clk->dvfs->dvfs_rail->dfll_mode_updating))));
1405 }
1406
1407 #ifdef CONFIG_OF
1408 int __init of_tegra_dvfs_init(const struct of_device_id *matches)
1409 {
1410         int ret;
1411         struct device_node *np;
1412
1413         for_each_matching_node(np, matches) {
1414                 const struct of_device_id *match = of_match_node(matches, np);
1415                 of_tegra_dvfs_init_cb_t dvfs_init_cb = match->data;
1416                 ret = dvfs_init_cb(np);
1417                 if (ret) {
1418                         pr_err("dt: Failed to read %s tables from DT\n",
1419                                                         match->compatible);
1420                         return ret;
1421                 }
1422         }
1423         return 0;
1424 }
1425 #endif
1426 int tegra_dvfs_dfll_mode_set(struct dvfs *d, unsigned long rate)
1427 {
1428         mutex_lock(&dvfs_lock);
1429         if (!d->dvfs_rail->dfll_mode) {
1430                 d->dvfs_rail->dfll_mode = true;
1431                 __tegra_dvfs_set_rate(d, rate);
1432         }
1433         mutex_unlock(&dvfs_lock);
1434         return 0;
1435 }
1436
1437 int tegra_dvfs_dfll_mode_clear(struct dvfs *d, unsigned long rate)
1438 {
1439         int ret = 0;
1440
1441         mutex_lock(&dvfs_lock);
1442         if (d->dvfs_rail->dfll_mode) {
1443                 d->dvfs_rail->dfll_mode = false;
1444                 /* avoid false detection of matching target (voltage in dfll
1445                    mode is fluctuating, and recorded level is just estimate) */
1446                 d->dvfs_rail->millivolts--;
1447                 if (d->dvfs_rail->disabled) {
1448                         d->dvfs_rail->disabled = false;
1449                         __tegra_dvfs_rail_disable(d->dvfs_rail);
1450                 }
1451                 ret = __tegra_dvfs_set_rate(d, rate);
1452         }
1453         mutex_unlock(&dvfs_lock);
1454         return ret;
1455 }
1456
1457 struct tegra_cooling_device *tegra_dvfs_get_cpu_vmax_cdev(void)
1458 {
1459         if (tegra_cpu_rail)
1460                 return tegra_cpu_rail->vmax_cdev;
1461         return NULL;
1462 }
1463
1464 struct tegra_cooling_device *tegra_dvfs_get_cpu_vmin_cdev(void)
1465 {
1466         if (tegra_cpu_rail)
1467                 return tegra_cpu_rail->vmin_cdev;
1468         return NULL;
1469 }
1470
1471 struct tegra_cooling_device *tegra_dvfs_get_core_vmax_cdev(void)
1472 {
1473         if (tegra_core_rail)
1474                 return tegra_core_rail->vmax_cdev;
1475         return NULL;
1476 }
1477
1478 struct tegra_cooling_device *tegra_dvfs_get_core_vmin_cdev(void)
1479 {
1480         if (tegra_core_rail)
1481                 return tegra_core_rail->vmin_cdev;
1482         return NULL;
1483 }
1484
1485 struct tegra_cooling_device *tegra_dvfs_get_gpu_vmin_cdev(void)
1486 {
1487         if (tegra_gpu_rail)
1488                 return tegra_gpu_rail->vmin_cdev;
1489         return NULL;
1490 }
1491
1492 struct tegra_cooling_device *tegra_dvfs_get_gpu_vts_cdev(void)
1493 {
1494         if (tegra_gpu_rail)
1495                 return tegra_gpu_rail->vts_cdev;
1496         return NULL;
1497 }
1498
1499 static void make_safe_thermal_dvfs(struct dvfs_rail *rail)
1500 {
1501         struct dvfs *d;
1502
1503         mutex_lock(&dvfs_lock);
1504         list_for_each_entry(d, &rail->dvfs, reg_node) {
1505                 if (d->therm_dvfs) {
1506                         BUG_ON(!d->peak_millivolts);
1507                         d->millivolts = d->peak_millivolts;
1508                         d->therm_dvfs = false;
1509                 }
1510         }
1511         mutex_unlock(&dvfs_lock);
1512 }
1513
1514 #ifdef CONFIG_THERMAL
1515 /* Cooling device limits minimum rail voltage at cold temperature in pll mode */
1516 static int tegra_dvfs_rail_get_vmin_cdev_max_state(
1517         struct thermal_cooling_device *cdev, unsigned long *max_state)
1518 {
1519         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1520         *max_state = rail->vmin_cdev->trip_temperatures_num;
1521         return 0;
1522 }
1523
1524 static int tegra_dvfs_rail_get_vmin_cdev_cur_state(
1525         struct thermal_cooling_device *cdev, unsigned long *cur_state)
1526 {
1527         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1528         *cur_state = rail->therm_floor_idx;
1529         return 0;
1530 }
1531
1532 static int tegra_dvfs_rail_set_vmin_cdev_state(
1533         struct thermal_cooling_device *cdev, unsigned long cur_state)
1534 {
1535         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1536
1537         mutex_lock(&dvfs_lock);
1538         if (rail->therm_floor_idx != cur_state) {
1539                 rail->therm_floor_idx = cur_state;
1540                 dvfs_rail_update(rail);
1541         }
1542         mutex_unlock(&dvfs_lock);
1543         return 0;
1544 }
1545
1546 static struct thermal_cooling_device_ops tegra_dvfs_vmin_cooling_ops = {
1547         .get_max_state = tegra_dvfs_rail_get_vmin_cdev_max_state,
1548         .get_cur_state = tegra_dvfs_rail_get_vmin_cdev_cur_state,
1549         .set_cur_state = tegra_dvfs_rail_set_vmin_cdev_state,
1550 };
1551
1552 static void tegra_dvfs_rail_register_vmin_cdev(struct dvfs_rail *rail)
1553 {
1554         if (!rail->vmin_cdev)
1555                 return;
1556
1557         /* just report error - initialized for cold temperature, anyway */
1558         if (IS_ERR_OR_NULL(thermal_cooling_device_register(
1559                 rail->vmin_cdev->cdev_type, (void *)rail,
1560                 &tegra_dvfs_vmin_cooling_ops)))
1561                 pr_err("tegra cooling device %s failed to register\n",
1562                        rail->vmin_cdev->cdev_type);
1563 }
1564
1565 /*
1566  * Cooling device limits frequencies of the clocks in pll mode based on rail
1567  * vmax thermal profile. Supported for core rail only, and applied only to
1568  * shared buses selected by platform specific code.
1569  */
1570 static int tegra_dvfs_rail_get_vmax_cdev_max_state(
1571         struct thermal_cooling_device *cdev, unsigned long *max_state)
1572 {
1573         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1574         *max_state = rail->vmax_cdev->trip_temperatures_num;
1575         return 0;
1576 }
1577
1578 static int tegra_dvfs_rail_get_vmax_cdev_cur_state(
1579         struct thermal_cooling_device *cdev, unsigned long *cur_state)
1580 {
1581         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1582         *cur_state = rail->therm_cap_idx;
1583         return 0;
1584 }
1585
1586 static int tegra_dvfs_rail_set_vmax_cdev_state(
1587         struct thermal_cooling_device *cdev, unsigned long cur_state)
1588 {
1589         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1590         int cur_cap = cur_state ? rail->therm_mv_caps[cur_state - 1] : 0;
1591
1592         return tegra_dvfs_therm_vmax_core_cap_apply(&rail->therm_cap_idx,
1593                                                     cur_state, cur_cap);
1594 }
1595
1596 static struct thermal_cooling_device_ops tegra_dvfs_vmax_cooling_ops = {
1597         .get_max_state = tegra_dvfs_rail_get_vmax_cdev_max_state,
1598         .get_cur_state = tegra_dvfs_rail_get_vmax_cdev_cur_state,
1599         .set_cur_state = tegra_dvfs_rail_set_vmax_cdev_state,
1600 };
1601
1602 void tegra_dvfs_rail_register_vmax_cdev(struct dvfs_rail *rail)
1603 {
1604         struct thermal_cooling_device *dev;
1605
1606         if (!rail || !rail->vmax_cdev || (rail != tegra_core_rail))
1607                 return;
1608
1609         dev = thermal_cooling_device_register(rail->vmax_cdev->cdev_type,
1610                 (void *)rail, &tegra_dvfs_vmax_cooling_ops);
1611
1612         if (IS_ERR_OR_NULL(dev) || list_empty(&dev->thermal_instances)) {
1613                 /* report error & set the most agressive caps */
1614                 int cur_state = rail->vmax_cdev->trip_temperatures_num;
1615                 int cur_cap = rail->therm_mv_caps[cur_state - 1];
1616                 tegra_dvfs_therm_vmax_core_cap_apply(&rail->therm_cap_idx,
1617                                                      cur_state, cur_cap);
1618                 pr_err("tegra cooling device %s failed to register\n",
1619                        rail->vmax_cdev->cdev_type);
1620         }
1621 }
1622
1623 /* Cooling device to scale voltage with temperature in pll mode */
1624 static int tegra_dvfs_rail_get_vts_cdev_max_state(
1625         struct thermal_cooling_device *cdev, unsigned long *max_state)
1626 {
1627         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1628         *max_state = rail->vts_cdev->trip_temperatures_num;
1629         return 0;
1630 }
1631
1632 static int tegra_dvfs_rail_get_vts_cdev_cur_state(
1633         struct thermal_cooling_device *cdev, unsigned long *cur_state)
1634 {
1635         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1636         *cur_state = rail->therm_scale_idx;
1637         return 0;
1638 }
1639
1640 static int tegra_dvfs_rail_set_vts_cdev_state(
1641         struct thermal_cooling_device *cdev, unsigned long cur_state)
1642 {
1643         struct dvfs_rail *rail = (struct dvfs_rail *)cdev->devdata;
1644         struct dvfs *d;
1645
1646         mutex_lock(&dvfs_lock);
1647         if (rail->therm_scale_idx != cur_state) {
1648                 rail->therm_scale_idx = cur_state;
1649                 list_for_each_entry(d, &rail->dvfs, reg_node) {
1650                         if (d->therm_dvfs)
1651                                 __tegra_dvfs_set_rate(d, d->cur_rate);
1652                 }
1653         }
1654         mutex_unlock(&dvfs_lock);
1655         return 0;
1656 }
1657
1658 static struct thermal_cooling_device_ops tegra_dvfs_vts_cooling_ops = {
1659         .get_max_state = tegra_dvfs_rail_get_vts_cdev_max_state,
1660         .get_cur_state = tegra_dvfs_rail_get_vts_cdev_cur_state,
1661         .set_cur_state = tegra_dvfs_rail_set_vts_cdev_state,
1662 };
1663
1664 static void tegra_dvfs_rail_register_vts_cdev(struct dvfs_rail *rail)
1665 {
1666         struct thermal_cooling_device *dev;
1667
1668         if (!rail->vts_cdev)
1669                 return;
1670
1671         dev = thermal_cooling_device_register(rail->vts_cdev->cdev_type,
1672                 (void *)rail, &tegra_dvfs_vts_cooling_ops);
1673         /* report error & set max limits across thermal ranges as safe dvfs */
1674         if (IS_ERR_OR_NULL(dev) || list_empty(&dev->thermal_instances)) {
1675                 pr_err("tegra cooling device %s failed to register\n",
1676                        rail->vts_cdev->cdev_type);
1677                 make_safe_thermal_dvfs(rail);
1678         }
1679 }
1680
1681 #else
1682 #define tegra_dvfs_rail_register_vmin_cdev(rail)
1683 void tegra_dvfs_rail_register_vmax_cdev(struct dvfs_rail *rail)
1684 { }
1685 static inline void tegra_dvfs_rail_register_vts_cdev(struct dvfs_rail *rail)
1686 {
1687         make_safe_thermal_dvfs(rail);
1688 }
1689 #endif
1690
1691 /*
1692  * Validate rail SiMon Vmin offsets. Valid offsets should be negative,
1693  * descending, starting from zero.
1694  */
1695 void __init tegra_dvfs_rail_init_simon_vmin_offsets(
1696         int *offsets, int offs_num, struct dvfs_rail *rail)
1697 {
1698         int i;
1699
1700         if (!offsets || !offs_num || offsets[0]) {
1701                 WARN(1, "%s: invalid initial SiMon offset\n", rail->reg_id);
1702                 return;
1703         }
1704
1705         for (i = 0; i < offs_num - 1; i++) {
1706                 if (offsets[i] < offsets[i+1]) {
1707                         WARN(1, "%s: SiMon offsets are not ordered\n",
1708                              rail->reg_id);
1709                         return;
1710                 }
1711         }
1712         rail->simon_vmin_offsets = offsets;
1713         rail->simon_vmin_offs_num = offs_num;
1714 }
1715
1716 /*
1717  * Validate rail thermal profile, and get its size. Valid profile:
1718  * - voltage limits are descending with temperature increasing
1719  * - the lowest limit is above rail minimum voltage in pll and
1720  *   in dfll mode (if applicable)
1721  * - the highest limit is below rail nominal voltage (required only
1722  *   for Vmin profile)
1723  */
1724 static int __init get_thermal_profile_size(
1725         int *trips_table, int *limits_table,
1726         struct dvfs_rail *rail, struct dvfs_dfll_data *d)
1727 {
1728         int i, min_mv;
1729
1730         for (i = 0; i < MAX_THERMAL_LIMITS - 1; i++) {
1731                 if (!limits_table[i+1])
1732                         break;
1733
1734                 if ((trips_table[i] >= trips_table[i+1]) ||
1735                     (limits_table[i] < limits_table[i+1])) {
1736                         pr_warn("%s: not ordered profile\n", rail->reg_id);
1737                         return -EINVAL;
1738                 }
1739         }
1740
1741         min_mv = max(rail->min_millivolts, d ? d->min_millivolts : 0);
1742         if (limits_table[i] < min_mv) {
1743                 pr_warn("%s: thermal profile below Vmin\n", rail->reg_id);
1744                 return -EINVAL;
1745         }
1746
1747         return i + 1;
1748 }
1749
1750 void __init tegra_dvfs_rail_init_vmax_thermal_profile(
1751         int *therm_trips_table, int *therm_caps_table,
1752         struct dvfs_rail *rail, struct dvfs_dfll_data *d)
1753 {
1754         int i = get_thermal_profile_size(therm_trips_table,
1755                                          therm_caps_table, rail, d);
1756         if (i <= 0) {
1757                 rail->vmax_cdev = NULL;
1758                 WARN(1, "%s: invalid Vmax thermal profile\n", rail->reg_id);
1759                 return;
1760         }
1761
1762         /* Install validated thermal caps */
1763         rail->therm_mv_caps = therm_caps_table;
1764         rail->therm_mv_caps_num = i;
1765
1766         /* Setup trip-points if applicable */
1767         if (rail->vmax_cdev) {
1768                 rail->vmax_cdev->trip_temperatures_num = i;
1769                 rail->vmax_cdev->trip_temperatures = therm_trips_table;
1770         }
1771 }
1772
1773 void __init tegra_dvfs_rail_init_vmin_thermal_profile(
1774         int *therm_trips_table, int *therm_floors_table,
1775         struct dvfs_rail *rail, struct dvfs_dfll_data *d)
1776 {
1777         int i = get_thermal_profile_size(therm_trips_table,
1778                                          therm_floors_table, rail, d);
1779
1780         if (i <= 0 || therm_floors_table[0] > rail->nominal_millivolts) {
1781                 rail->vmin_cdev = NULL;
1782                 WARN(1, "%s: invalid Vmin thermal profile\n", rail->reg_id);
1783                 return;
1784         }
1785
1786         /* Install validated thermal floors */
1787         rail->therm_mv_floors = therm_floors_table;
1788         rail->therm_mv_floors_num = i;
1789
1790         /* Setup trip-points if applicable */
1791         if (rail->vmin_cdev) {
1792                 rail->vmin_cdev->trip_temperatures_num = i;
1793                 rail->vmin_cdev->trip_temperatures = therm_trips_table;
1794         }
1795 }
1796
1797 /*
1798  * Validate thermal dvfs settings:
1799  * - trip-points are montonically increasing
1800  * - voltages in any temperature range are montonically increasing with
1801  *   frequency (can go up/down across ranges at iso frequency)
1802  * - voltage for any frequency/thermal range combination must be within
1803  *   rail minimum/maximum limits
1804  */
1805 int __init tegra_dvfs_rail_init_thermal_dvfs_trips(
1806         int *therm_trips_table, struct dvfs_rail *rail)
1807 {
1808         int i;
1809
1810         if (!rail->vts_cdev) {
1811                 WARN(1, "%s: missing thermal dvfs cooling device\n",
1812                      rail->reg_id);
1813                 return -ENOENT;
1814         }
1815
1816         for (i = 0; i < MAX_THERMAL_LIMITS - 1; i++) {
1817                 if (therm_trips_table[i] >= therm_trips_table[i+1])
1818                         break;
1819         }
1820
1821         rail->vts_cdev->trip_temperatures_num = i + 1;
1822         rail->vts_cdev->trip_temperatures = therm_trips_table;
1823         return 0;
1824 }
1825
1826 int __init tegra_dvfs_init_thermal_dvfs_voltages(int *therm_voltages,
1827         int *peak_voltages, int freqs_num, int ranges_num, struct dvfs *d)
1828 {
1829         int *millivolts;
1830         int freq_idx, therm_idx;
1831
1832         for (therm_idx = 0; therm_idx < ranges_num; therm_idx++) {
1833                 millivolts = therm_voltages + therm_idx * MAX_DVFS_FREQS;
1834                 for (freq_idx = 0; freq_idx < freqs_num; freq_idx++) {
1835                         int mv = millivolts[freq_idx];
1836                         if ((mv > d->dvfs_rail->max_millivolts) ||
1837                             (mv < d->dvfs_rail->min_millivolts) ||
1838                             (freq_idx && (mv < millivolts[freq_idx - 1]))) {
1839                                 WARN(1, "%s: invalid thermal dvfs entry %d(%d, %d)\n",
1840                                      d->clk_name, mv, freq_idx, therm_idx);
1841                                 return -EINVAL;
1842                         }
1843                         if (mv > peak_voltages[freq_idx])
1844                                 peak_voltages[freq_idx] = mv;
1845                 }
1846         }
1847
1848         d->millivolts = therm_voltages;
1849         d->peak_millivolts = peak_voltages;
1850         d->therm_dvfs = true;
1851         return 0;
1852 }
1853
1854 /* Directly set cold temperature limit in dfll mode */
1855 int tegra_dvfs_rail_dfll_mode_set_cold(struct dvfs_rail *rail)
1856 {
1857         int ret = 0;
1858
1859         /* No thermal floors - nothing to do */
1860         if (!rail || !rail->therm_mv_floors)
1861                 return ret;
1862
1863         /*
1864          * Since cooling thresholds are the same in pll and dfll modes, pll mode
1865          * thermal index can be used to decide if cold limit should be set in
1866          * dfll mode.
1867          */
1868         mutex_lock(&dvfs_lock);
1869         if (rail->dfll_mode &&
1870             (rail->therm_floor_idx < rail->therm_mv_floors_num)) {
1871                         int mv = rail->therm_mv_floors[rail->therm_floor_idx];
1872                         ret = dvfs_rail_set_voltage_reg(rail, mv);
1873         }
1874         mutex_unlock(&dvfs_lock);
1875
1876         return ret;
1877 }
1878
1879 /*
1880  * Iterate through all the dvfs regulators, finding the regulator exported
1881  * by the regulator api for each one.  Must be called in late init, after
1882  * all the regulator api's regulators are initialized.
1883  */
1884 int __init tegra_dvfs_rail_connect_regulators(void)
1885 {
1886         bool connected = true;
1887         struct dvfs_rail *rail;
1888
1889         mutex_lock(&dvfs_lock);
1890
1891         list_for_each_entry(rail, &dvfs_rail_list, node)
1892                 if (dvfs_rail_connect_to_regulator(rail))
1893                         connected = false;
1894
1895         list_for_each_entry(rail, &dvfs_rail_list, node) {
1896                 if (connected) {
1897                         dvfs_rail_update(rail);
1898                         if (!rail->disabled)
1899                                 continue;
1900                         /* Don't rely on boot level - force disabled voltage */
1901                         rail->disabled = false;
1902                 }
1903                 __tegra_dvfs_rail_disable(rail);
1904         }
1905         mutex_unlock(&dvfs_lock);
1906
1907         if (!connected && tegra_platform_is_silicon()) {
1908                 pr_warn("tegra_dvfs: DVFS regulators connection failed\n"
1909                         "            !!!! voltage scaling is disabled !!!!\n");
1910                 return -ENODEV;
1911         }
1912
1913         return 0;
1914 }
1915
1916 int __init tegra_dvfs_rail_register_notifiers(void)
1917 {
1918         struct dvfs_rail *rail;
1919
1920         register_pm_notifier(&tegra_dvfs_suspend_nb);
1921         register_pm_notifier(&tegra_dvfs_resume_nb);
1922         register_reboot_notifier(&tegra_dvfs_reboot_nb);
1923
1924         list_for_each_entry(rail, &dvfs_rail_list, node) {
1925                         tegra_dvfs_rail_register_vmin_cdev(rail);
1926                         tegra_dvfs_rail_register_vts_cdev(rail);
1927         }
1928
1929         return 0;
1930 }
1931
1932 static int rail_stats_save_to_buf(char *buf, int len)
1933 {
1934         int i;
1935         struct dvfs_rail *rail;
1936         char *str = buf;
1937         char *end = buf + len;
1938
1939         str += scnprintf(str, end - str, "%-12s %-10s\n", "millivolts", "time");
1940
1941         mutex_lock(&dvfs_lock);
1942
1943         list_for_each_entry(rail, &dvfs_rail_list, node) {
1944                 str += scnprintf(str, end - str, "%s (bin: %d.%dmV)\n",
1945                            rail->reg_id,
1946                            rail->stats.bin_uV / 1000,
1947                            (rail->stats.bin_uV / 10) % 100);
1948
1949                 dvfs_rail_stats_update(rail, -1, ktime_get());
1950
1951                 str += scnprintf(str, end - str, "%-12d %-10llu\n", 0,
1952                         cputime64_to_clock_t(msecs_to_jiffies(
1953                                 ktime_to_ms(rail->stats.time_at_mv[0]))));
1954
1955                 for (i = 1; i <= DVFS_RAIL_STATS_TOP_BIN; i++) {
1956                         ktime_t ktime_zero = ktime_set(0, 0);
1957                         if (ktime_equal(rail->stats.time_at_mv[i], ktime_zero))
1958                                 continue;
1959                         str += scnprintf(str, end - str, "%-12d %-10llu\n",
1960                                 rail->min_millivolts +
1961                                 (i - 1) * rail->stats.bin_uV / 1000,
1962                                 cputime64_to_clock_t(msecs_to_jiffies(
1963                                         ktime_to_ms(rail->stats.time_at_mv[i])))
1964                         );
1965                 }
1966         }
1967         mutex_unlock(&dvfs_lock);
1968         return str - buf;
1969 }
1970
1971 #ifdef CONFIG_DEBUG_FS
1972 static int dvfs_tree_sort_cmp(void *p, struct list_head *a, struct list_head *b)
1973 {
1974         struct dvfs *da = list_entry(a, struct dvfs, reg_node);
1975         struct dvfs *db = list_entry(b, struct dvfs, reg_node);
1976         int ret;
1977
1978         ret = strcmp(da->dvfs_rail->reg_id, db->dvfs_rail->reg_id);
1979         if (ret != 0)
1980                 return ret;
1981
1982         if (da->cur_millivolts < db->cur_millivolts)
1983                 return 1;
1984         if (da->cur_millivolts > db->cur_millivolts)
1985                 return -1;
1986
1987         return strcmp(da->clk_name, db->clk_name);
1988 }
1989
1990 static int dvfs_tree_show(struct seq_file *s, void *data)
1991 {
1992         struct dvfs *d;
1993         struct dvfs_rail *rail;
1994         struct dvfs_relationship *rel;
1995
1996         seq_printf(s, "   clock      rate       mV\n");
1997         seq_printf(s, "--------------------------------\n");
1998
1999         mutex_lock(&dvfs_lock);
2000
2001         list_for_each_entry(rail, &dvfs_rail_list, node) {
2002                 int thermal_mv_floor = 0;
2003
2004                 seq_printf(s, "%s %d mV%s:\n", rail->reg_id,
2005                            rail->stats.off ? 0 : rail->millivolts,
2006                            rail->dfll_mode ? " dfll mode" :
2007                                 rail->disabled ? " disabled" : "");
2008                 list_for_each_entry(rel, &rail->relationships_from, from_node) {
2009                         seq_printf(s, "   %-10s %-7d mV %-4d mV\n",
2010                                 rel->from->reg_id, rel->from->millivolts,
2011                                 dvfs_solve_relationship(rel));
2012                 }
2013                 seq_printf(s, "   nominal    %-7d mV\n",
2014                            rail->nominal_millivolts);
2015                 seq_printf(s, "   offset     %-7d mV\n", rail->dbg_mv_offs);
2016
2017                 if (rail->therm_mv_floors) {
2018                         int i = rail->therm_floor_idx;
2019                         if (i < rail->therm_mv_floors_num)
2020                                 thermal_mv_floor = rail->therm_mv_floors[i];
2021                 }
2022                 seq_printf(s, "   thermal    %-7d mV\n", thermal_mv_floor);
2023
2024                 if (rail == tegra_core_rail) {
2025                         seq_printf(s, "   override   %-7d mV [%-4d...%-4d]",
2026                                    rail->override_millivolts,
2027                                    dvfs_rail_get_override_floor(rail),
2028                                    rail->nominal_millivolts);
2029                         if (rail->override_unresolved)
2030                                 seq_printf(s, " unresolved %d",
2031                                            rail->override_unresolved);
2032                         seq_putc(s, '\n');
2033                 }
2034
2035                 list_sort(NULL, &rail->dvfs, dvfs_tree_sort_cmp);
2036
2037                 list_for_each_entry(d, &rail->dvfs, reg_node) {
2038                         seq_printf(s, "   %-10s %-10lu %-4d mV\n", d->clk_name,
2039                                 d->cur_rate, d->cur_millivolts);
2040                 }
2041         }
2042
2043         mutex_unlock(&dvfs_lock);
2044
2045         return 0;
2046 }
2047
2048 static int dvfs_tree_open(struct inode *inode, struct file *file)
2049 {
2050         return single_open(file, dvfs_tree_show, inode->i_private);
2051 }
2052
2053 static const struct file_operations dvfs_tree_fops = {
2054         .open           = dvfs_tree_open,
2055         .read           = seq_read,
2056         .llseek         = seq_lseek,
2057         .release        = single_release,
2058 };
2059
2060 static int rail_stats_show(struct seq_file *s, void *data)
2061 {
2062         char *buf = kzalloc(PAGE_SIZE, GFP_KERNEL);
2063         int size = 0;
2064
2065         if (!buf)
2066                 return -ENOMEM;
2067
2068         size = rail_stats_save_to_buf(buf, PAGE_SIZE);
2069         seq_write(s, buf, size);
2070         kfree(buf);
2071         return 0;
2072 }
2073
2074 static int rail_stats_open(struct inode *inode, struct file *file)
2075 {
2076         return single_open(file, rail_stats_show, inode->i_private);
2077 }
2078
2079 static const struct file_operations rail_stats_fops = {
2080         .open           = rail_stats_open,
2081         .read           = seq_read,
2082         .llseek         = seq_lseek,
2083         .release        = single_release,
2084 };
2085
2086 static int rail_offs_set(struct dvfs_rail *rail, int offs)
2087 {
2088         if (rail) {
2089                 mutex_lock(&dvfs_lock);
2090                 rail->dbg_mv_offs = offs;
2091                 dvfs_rail_update(rail);
2092                 mutex_unlock(&dvfs_lock);
2093                 return 0;
2094         }
2095         return -ENOENT;
2096 }
2097
2098 static int cpu_offs_get(void *data, u64 *val)
2099 {
2100         if (tegra_cpu_rail) {
2101                 *val = (u64)tegra_cpu_rail->dbg_mv_offs;
2102                 return 0;
2103         }
2104         *val = 0;
2105         return -ENOENT;
2106 }
2107 static int cpu_offs_set(void *data, u64 val)
2108 {
2109         return rail_offs_set(tegra_cpu_rail, (int)val);
2110 }
2111 DEFINE_SIMPLE_ATTRIBUTE(cpu_offs_fops, cpu_offs_get, cpu_offs_set, "%lld\n");
2112
2113 static int gpu_offs_get(void *data, u64 *val)
2114 {
2115         if (tegra_gpu_rail) {
2116                 *val = (u64)tegra_gpu_rail->dbg_mv_offs;
2117                 return 0;
2118         }
2119         *val = 0;
2120         return -ENOENT;
2121 }
2122 static int gpu_offs_set(void *data, u64 val)
2123 {
2124         return rail_offs_set(tegra_gpu_rail, (int)val);
2125 }
2126 DEFINE_SIMPLE_ATTRIBUTE(gpu_offs_fops, gpu_offs_get, gpu_offs_set, "%lld\n");
2127
2128 static int core_offs_get(void *data, u64 *val)
2129 {
2130         if (tegra_core_rail) {
2131                 *val = (u64)tegra_core_rail->dbg_mv_offs;
2132                 return 0;
2133         }
2134         *val = 0;
2135         return -ENOENT;
2136 }
2137 static int core_offs_set(void *data, u64 val)
2138 {
2139         return rail_offs_set(tegra_core_rail, (int)val);
2140 }
2141 DEFINE_SIMPLE_ATTRIBUTE(core_offs_fops, core_offs_get, core_offs_set, "%lld\n");
2142
2143 static int core_override_get(void *data, u64 *val)
2144 {
2145         if (tegra_core_rail) {
2146                 *val = (u64)tegra_core_rail->override_millivolts;
2147                 return 0;
2148         }
2149         *val = 0;
2150         return -ENOENT;
2151 }
2152 static int core_override_set(void *data, u64 val)
2153 {
2154         return dvfs_override_core_voltage((int)val);
2155 }
2156 DEFINE_SIMPLE_ATTRIBUTE(core_override_fops,
2157                         core_override_get, core_override_set, "%llu\n");
2158
2159 static int gpu_dvfs_t_show(struct seq_file *s, void *data)
2160 {
2161         int i, j;
2162         int num_ranges = 1;
2163         int *trips = NULL;
2164         struct dvfs *d;
2165         struct dvfs_rail *rail = tegra_gpu_rail;
2166         int max_mv[MAX_DVFS_FREQS] = {};
2167
2168         if (!tegra_gpu_rail) {
2169                 seq_printf(s, "Only supported for T124 or higher\n");
2170                 return -ENOSYS;
2171         }
2172
2173         mutex_lock(&dvfs_lock);
2174
2175         d = list_first_entry(&rail->dvfs, struct dvfs, reg_node);
2176         if (rail->vts_cdev && d->therm_dvfs) {
2177                 num_ranges = rail->vts_cdev->trip_temperatures_num + 1;
2178                 trips = rail->vts_cdev->trip_temperatures;
2179         }
2180
2181         seq_printf(s, "%-11s", "T(C)\\F(kHz)");
2182         for (i = 0; i < d->num_freqs; i++) {
2183                 unsigned int f = d->freqs[i]/1000;
2184                 seq_printf(s, " %7u", f);
2185         }
2186         seq_printf(s, "\n");
2187
2188         for (j = 0; j < num_ranges; j++) {
2189                 seq_printf(s, "%s", j == rail->therm_scale_idx ? ">" : " ");
2190
2191                 if (!trips || (num_ranges == 1))
2192                         seq_printf(s, "%4s..%-4s", "", "");
2193                 else if (j == 0)
2194                         seq_printf(s, "%4s..%-4d", "", trips[j]);
2195                 else if (j == num_ranges - 1)
2196                         seq_printf(s, "%4d..%-4s", trips[j], "");
2197                 else
2198                         seq_printf(s, "%4d..%-4d", trips[j-1], trips[j]);
2199
2200                 for (i = 0; i < d->num_freqs; i++) {
2201                         int mv = *(d->millivolts + j * MAX_DVFS_FREQS + i);
2202                         seq_printf(s, " %7d", mv);
2203                         max_mv[i] = max(max_mv[i], mv);
2204                 }
2205                 seq_printf(s, " mV\n");
2206         }
2207
2208         seq_printf(s, "%3s%-8s\n", "", "------");
2209         seq_printf(s, "%3s%-8s", "", "max(T)");
2210         for (i = 0; i < d->num_freqs; i++)
2211                 seq_printf(s, " %7d", max_mv[i]);
2212         seq_printf(s, " mV\n");
2213
2214         mutex_unlock(&dvfs_lock);
2215
2216         return 0;
2217 }
2218
2219 static int gpu_dvfs_t_open(struct inode *inode, struct file *file)
2220 {
2221         return single_open(file, gpu_dvfs_t_show, NULL);
2222 }
2223
2224 static const struct file_operations gpu_dvfs_t_fops = {
2225         .open           = gpu_dvfs_t_open,
2226         .read           = seq_read,
2227         .llseek         = seq_lseek,
2228         .release        = single_release,
2229 };
2230
2231 static int dvfs_table_show(struct seq_file *s, void *data)
2232 {
2233         int i;
2234         struct dvfs *d;
2235         struct dvfs_rail *rail;
2236         const int *v_pll, *last_v_pll = NULL;
2237         const int *v_dfll, *last_v_dfll = NULL;
2238
2239         seq_printf(s, "DVFS tables: units mV/MHz\n");
2240
2241         mutex_lock(&dvfs_lock);
2242
2243         list_for_each_entry(rail, &dvfs_rail_list, node) {
2244                 list_for_each_entry(d, &rail->dvfs, reg_node) {
2245                         bool mv_done = false;
2246                         v_pll = tegra_dvfs_get_millivolts_pll(d);
2247                         v_dfll = d->dfll_millivolts;
2248
2249                         if (v_pll && (last_v_pll != v_pll)) {
2250                                 if (!mv_done) {
2251                                         seq_printf(s, "\n");
2252                                         mv_done = true;
2253                                 }
2254                                 last_v_pll = v_pll;
2255                                 seq_printf(s, "%-16s", rail->reg_id);
2256                                 for (i = 0; i < d->num_freqs; i++)
2257                                         seq_printf(s, "%7d", v_pll[i]);
2258                                 seq_printf(s, "\n");
2259                         }
2260
2261                         if (v_dfll && (last_v_dfll != v_dfll)) {
2262                                 if (!mv_done) {
2263                                         seq_printf(s, "\n");
2264                                         mv_done = true;
2265                                 }
2266                                 last_v_dfll = v_dfll;
2267                                 seq_printf(s, "%-8s (dfll) ", rail->reg_id);
2268                                 for (i = 0; i < d->num_freqs; i++)
2269                                         seq_printf(s, "%7d", v_dfll[i]);
2270                                 seq_printf(s, "\n");
2271                         }
2272
2273                         seq_printf(s, "%-16s", d->clk_name);
2274                         for (i = 0; i < d->num_freqs; i++) {
2275                                 unsigned long *freqs = dvfs_get_freqs(d);
2276                                 unsigned int f = freqs[i]/100000;
2277                                 seq_printf(s, " %4u.%u", f/10, f%10);
2278                         }
2279                         seq_printf(s, "\n");
2280                 }
2281         }
2282
2283         mutex_unlock(&dvfs_lock);
2284
2285         return 0;
2286 }
2287
2288 static int dvfs_table_open(struct inode *inode, struct file *file)
2289 {
2290         return single_open(file, dvfs_table_show, inode->i_private);
2291 }
2292
2293 static const struct file_operations dvfs_table_fops = {
2294         .open           = dvfs_table_open,
2295         .read           = seq_read,
2296         .llseek         = seq_lseek,
2297         .release        = single_release,
2298 };
2299
2300 int __init dvfs_debugfs_init(struct dentry *clk_debugfs_root)
2301 {
2302         struct dentry *d;
2303
2304         d = debugfs_create_file("dvfs", S_IRUGO, clk_debugfs_root, NULL,
2305                 &dvfs_tree_fops);
2306         if (!d)
2307                 return -ENOMEM;
2308
2309         d = debugfs_create_file("rails", S_IRUGO, clk_debugfs_root, NULL,
2310                 &rail_stats_fops);
2311         if (!d)
2312                 return -ENOMEM;
2313
2314         d = debugfs_create_file("vdd_cpu_offs", S_IRUGO | S_IWUSR,
2315                 clk_debugfs_root, NULL, &cpu_offs_fops);
2316         if (!d)
2317                 return -ENOMEM;
2318
2319         d = debugfs_create_file("vdd_gpu_offs", S_IRUGO | S_IWUSR,
2320                 clk_debugfs_root, NULL, &gpu_offs_fops);
2321         if (!d)
2322                 return -ENOMEM;
2323
2324         d = debugfs_create_file("vdd_core_offs", S_IRUGO | S_IWUSR,
2325                 clk_debugfs_root, NULL, &core_offs_fops);
2326         if (!d)
2327                 return -ENOMEM;
2328
2329         d = debugfs_create_file("vdd_core_override", S_IRUGO | S_IWUSR,
2330                 clk_debugfs_root, NULL, &core_override_fops);
2331         if (!d)
2332                 return -ENOMEM;
2333
2334         d = debugfs_create_file("gpu_dvfs_t", S_IRUGO | S_IWUSR,
2335                 clk_debugfs_root, NULL, &gpu_dvfs_t_fops);
2336         if (!d)
2337                 return -ENOMEM;
2338
2339         d = debugfs_create_file("dvfs_table", S_IRUGO, clk_debugfs_root, NULL,
2340                 &dvfs_table_fops);
2341         if (!d)
2342                 return -ENOMEM;
2343
2344         return 0;
2345 }
2346
2347 #endif
2348
2349 #ifdef CONFIG_PM
2350 static ssize_t tegra_rail_stats_show(struct kobject *kobj,
2351                                         struct kobj_attribute *attr,
2352                                         char *buf)
2353 {
2354         return rail_stats_save_to_buf(buf, PAGE_SIZE);
2355 }
2356
2357 static struct kobj_attribute rail_stats_attr =
2358                 __ATTR_RO(tegra_rail_stats);
2359
2360 static int __init tegra_dvfs_sysfs_stats_init(void)
2361 {
2362         int error;
2363         error = sysfs_create_file(power_kobj, &rail_stats_attr.attr);
2364         return 0;
2365 }
2366 late_initcall(tegra_dvfs_sysfs_stats_init);
2367 #endif