ARM: tegra: add avp platform_device
[linux-3.10.git] / arch / arm / mach-tegra / devices.c
1 /*
2  * Copyright (C) 2010,2011 Google, Inc.
3  *
4  * Author:
5  *      Colin Cross <ccross@android.com>
6  *      Erik Gilling <ccross@android.com>
7  *
8  * This software is licensed under the terms of the GNU General Public
9  * License version 2, as published by the Free Software Foundation, and
10  * may be copied, distributed, and modified under those terms.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  */
18
19
20 #include <linux/resource.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/fsl_devices.h>
24 #include <linux/serial_8250.h>
25 #include <linux/i2c-tegra.h>
26 #include <mach/irqs.h>
27 #include <mach/dma.h>
28 #include <linux/usb/tegra_usb_phy.h>
29
30 #include "gpio-names.h"
31 #include "iomap.h"
32 #include "devices.h"
33
34 static struct resource gpio_resource[] = {
35         [0] = {
36                 .start  = TEGRA_GPIO_BASE,
37                 .end    = TEGRA_GPIO_BASE + TEGRA_GPIO_SIZE-1,
38                 .flags  = IORESOURCE_MEM,
39         },
40         [1] = {
41                 .start  = INT_GPIO1,
42                 .end    = INT_GPIO1,
43                 .flags  = IORESOURCE_IRQ,
44         },
45         [2] = {
46                 .start  = INT_GPIO2,
47                 .end    = INT_GPIO2,
48                 .flags  = IORESOURCE_IRQ,
49         },
50         [3] = {
51                 .start  = INT_GPIO3,
52                 .end    = INT_GPIO3,
53                 .flags  = IORESOURCE_IRQ,
54         },
55         [4] = {
56                 .start  = INT_GPIO4,
57                 .end    = INT_GPIO4,
58                 .flags  = IORESOURCE_IRQ,
59         },
60         [5] = {
61                 .start  = INT_GPIO5,
62                 .end    = INT_GPIO5,
63                 .flags  = IORESOURCE_IRQ,
64         },
65         [6] = {
66                 .start  = INT_GPIO6,
67                 .end    = INT_GPIO6,
68                 .flags  = IORESOURCE_IRQ,
69         },
70         [7] = {
71                 .start  = INT_GPIO7,
72                 .end    = INT_GPIO7,
73                 .flags  = IORESOURCE_IRQ,
74         },
75 };
76
77 struct platform_device tegra_gpio_device = {
78         .name           = "tegra-gpio",
79         .id             = -1,
80         .resource       = gpio_resource,
81         .num_resources  = ARRAY_SIZE(gpio_resource),
82 };
83
84 static struct resource pinmux_resource[] = {
85         [0] = {
86                 /* Tri-state registers */
87                 .start  = TEGRA_APB_MISC_BASE + 0x14,
88                 .end    = TEGRA_APB_MISC_BASE + 0x20 + 3,
89                 .flags  = IORESOURCE_MEM,
90         },
91         [1] = {
92                 /* Mux registers */
93                 .start  = TEGRA_APB_MISC_BASE + 0x80,
94                 .end    = TEGRA_APB_MISC_BASE + 0x9c + 3,
95                 .flags  = IORESOURCE_MEM,
96         },
97         [2] = {
98                 /* Pull-up/down registers */
99                 .start  = TEGRA_APB_MISC_BASE + 0xa0,
100                 .end    = TEGRA_APB_MISC_BASE + 0xb0 + 3,
101                 .flags  = IORESOURCE_MEM,
102         },
103         [3] = {
104                 /* Pad control registers */
105                 .start  = TEGRA_APB_MISC_BASE + 0x868,
106                 .end    = TEGRA_APB_MISC_BASE + 0x90c + 3,
107                 .flags  = IORESOURCE_MEM,
108         },
109 };
110
111 struct platform_device tegra_pinmux_device = {
112         .name           = "tegra20-pinctrl",
113         .id             = -1,
114         .resource       = pinmux_resource,
115         .num_resources  = ARRAY_SIZE(pinmux_resource),
116 };
117
118 static struct resource i2c_resource1[] = {
119         [0] = {
120                 .start  = INT_I2C,
121                 .end    = INT_I2C,
122                 .flags  = IORESOURCE_IRQ,
123         },
124         [1] = {
125                 .start  = TEGRA_I2C_BASE,
126                 .end    = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
127                 .flags  = IORESOURCE_MEM,
128         },
129 };
130
131 static struct resource i2c_resource2[] = {
132         [0] = {
133                 .start  = INT_I2C2,
134                 .end    = INT_I2C2,
135                 .flags  = IORESOURCE_IRQ,
136         },
137         [1] = {
138                 .start  = TEGRA_I2C2_BASE,
139                 .end    = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
140                 .flags  = IORESOURCE_MEM,
141         },
142 };
143
144 static struct resource i2c_resource3[] = {
145         [0] = {
146                 .start  = INT_I2C3,
147                 .end    = INT_I2C3,
148                 .flags  = IORESOURCE_IRQ,
149         },
150         [1] = {
151                 .start  = TEGRA_I2C3_BASE,
152                 .end    = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
153                 .flags  = IORESOURCE_MEM,
154         },
155 };
156
157 static struct resource i2c_resource4[] = {
158         [0] = {
159                 .start  = INT_DVC,
160                 .end    = INT_DVC,
161                 .flags  = IORESOURCE_IRQ,
162         },
163         [1] = {
164                 .start  = TEGRA_DVC_BASE,
165                 .end    = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
166                 .flags  = IORESOURCE_MEM,
167         },
168 };
169
170 static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
171         .bus_clk_rate   = 400000,
172 };
173
174 static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
175         .bus_clk_rate   = 400000,
176 };
177
178 static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
179         .bus_clk_rate   = 400000,
180 };
181
182 static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
183         .bus_clk_rate   = 400000,
184 };
185
186 struct platform_device tegra_i2c_device1 = {
187         .name           = "tegra-i2c",
188         .id             = 0,
189         .resource       = i2c_resource1,
190         .num_resources  = ARRAY_SIZE(i2c_resource1),
191         .dev = {
192                 .platform_data = &tegra_i2c1_platform_data,
193         },
194 };
195
196 struct platform_device tegra_i2c_device2 = {
197         .name           = "tegra-i2c",
198         .id             = 1,
199         .resource       = i2c_resource2,
200         .num_resources  = ARRAY_SIZE(i2c_resource2),
201         .dev = {
202                 .platform_data = &tegra_i2c2_platform_data,
203         },
204 };
205
206 struct platform_device tegra_i2c_device3 = {
207         .name           = "tegra-i2c",
208         .id             = 2,
209         .resource       = i2c_resource3,
210         .num_resources  = ARRAY_SIZE(i2c_resource3),
211         .dev = {
212                 .platform_data = &tegra_i2c3_platform_data,
213         },
214 };
215
216 struct platform_device tegra_i2c_device4 = {
217         .name           = "tegra-i2c",
218         .id             = 3,
219         .resource       = i2c_resource4,
220         .num_resources  = ARRAY_SIZE(i2c_resource4),
221         .dev = {
222                 .platform_data = &tegra_dvc_platform_data,
223         },
224 };
225
226 static struct resource spi_resource1[] = {
227         [0] = {
228                 .start  = INT_S_LINK1,
229                 .end    = INT_S_LINK1,
230                 .flags  = IORESOURCE_IRQ,
231         },
232         [1] = {
233                 .start  = TEGRA_SPI1_BASE,
234                 .end    = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
235                 .flags  = IORESOURCE_MEM,
236         },
237 };
238
239 static struct resource spi_resource2[] = {
240         [0] = {
241                 .start  = INT_SPI_2,
242                 .end    = INT_SPI_2,
243                 .flags  = IORESOURCE_IRQ,
244         },
245         [1] = {
246                 .start  = TEGRA_SPI2_BASE,
247                 .end    = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
248                 .flags  = IORESOURCE_MEM,
249         },
250 };
251
252 static struct resource spi_resource3[] = {
253         [0] = {
254                 .start  = INT_SPI_3,
255                 .end    = INT_SPI_3,
256                 .flags  = IORESOURCE_IRQ,
257         },
258         [1] = {
259                 .start  = TEGRA_SPI3_BASE,
260                 .end    = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
261                 .flags  = IORESOURCE_MEM,
262         },
263 };
264
265 static struct resource spi_resource4[] = {
266         [0] = {
267                 .start  = INT_SPI_4,
268                 .end    = INT_SPI_4,
269                 .flags  = IORESOURCE_IRQ,
270         },
271         [1] = {
272                 .start  = TEGRA_SPI4_BASE,
273                 .end    = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
274                 .flags  = IORESOURCE_MEM,
275         },
276 };
277
278 struct platform_device tegra_spi_device1 = {
279         .name           = "spi_tegra",
280         .id             = 0,
281         .resource       = spi_resource1,
282         .num_resources  = ARRAY_SIZE(spi_resource1),
283         .dev            = {
284                 .coherent_dma_mask      = 0xffffffff,
285         },
286 };
287
288 struct platform_device tegra_spi_device2 = {
289         .name           = "spi_tegra",
290         .id             = 1,
291         .resource       = spi_resource2,
292         .num_resources  = ARRAY_SIZE(spi_resource2),
293         .dev            = {
294                 .coherent_dma_mask      = 0xffffffff,
295         },
296 };
297
298 struct platform_device tegra_spi_device3 = {
299         .name           = "spi_tegra",
300         .id             = 2,
301         .resource       = spi_resource3,
302         .num_resources  = ARRAY_SIZE(spi_resource3),
303         .dev            = {
304                 .coherent_dma_mask      = 0xffffffff,
305         },
306 };
307
308 struct platform_device tegra_spi_device4 = {
309         .name           = "spi_tegra",
310         .id             = 3,
311         .resource       = spi_resource4,
312         .num_resources  = ARRAY_SIZE(spi_resource4),
313         .dev            = {
314                 .coherent_dma_mask      = 0xffffffff,
315         },
316 };
317
318
319 static struct resource sdhci_resource1[] = {
320         [0] = {
321                 .start  = INT_SDMMC1,
322                 .end    = INT_SDMMC1,
323                 .flags  = IORESOURCE_IRQ,
324         },
325         [1] = {
326                 .start  = TEGRA_SDMMC1_BASE,
327                 .end    = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
328                 .flags  = IORESOURCE_MEM,
329         },
330 };
331
332 static struct resource sdhci_resource2[] = {
333         [0] = {
334                 .start  = INT_SDMMC2,
335                 .end    = INT_SDMMC2,
336                 .flags  = IORESOURCE_IRQ,
337         },
338         [1] = {
339                 .start  = TEGRA_SDMMC2_BASE,
340                 .end    = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
341                 .flags  = IORESOURCE_MEM,
342         },
343 };
344
345 static struct resource sdhci_resource3[] = {
346         [0] = {
347                 .start  = INT_SDMMC3,
348                 .end    = INT_SDMMC3,
349                 .flags  = IORESOURCE_IRQ,
350         },
351         [1] = {
352                 .start  = TEGRA_SDMMC3_BASE,
353                 .end    = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
354                 .flags  = IORESOURCE_MEM,
355         },
356 };
357
358 static struct resource sdhci_resource4[] = {
359         [0] = {
360                 .start  = INT_SDMMC4,
361                 .end    = INT_SDMMC4,
362                 .flags  = IORESOURCE_IRQ,
363         },
364         [1] = {
365                 .start  = TEGRA_SDMMC4_BASE,
366                 .end    = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
367                 .flags  = IORESOURCE_MEM,
368         },
369 };
370
371 /* board files should fill in platform_data register the devices themselvs.
372  * See board-harmony.c for an example
373  */
374 struct platform_device tegra_sdhci_device1 = {
375         .name           = "sdhci-tegra",
376         .id             = 0,
377         .resource       = sdhci_resource1,
378         .num_resources  = ARRAY_SIZE(sdhci_resource1),
379 };
380
381 struct platform_device tegra_sdhci_device2 = {
382         .name           = "sdhci-tegra",
383         .id             = 1,
384         .resource       = sdhci_resource2,
385         .num_resources  = ARRAY_SIZE(sdhci_resource2),
386 };
387
388 struct platform_device tegra_sdhci_device3 = {
389         .name           = "sdhci-tegra",
390         .id             = 2,
391         .resource       = sdhci_resource3,
392         .num_resources  = ARRAY_SIZE(sdhci_resource3),
393 };
394
395 struct platform_device tegra_sdhci_device4 = {
396         .name           = "sdhci-tegra",
397         .id             = 3,
398         .resource       = sdhci_resource4,
399         .num_resources  = ARRAY_SIZE(sdhci_resource4),
400 };
401
402 static struct resource tegra_usb1_resources[] = {
403         [0] = {
404                 .start  = TEGRA_USB_BASE,
405                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
406                 .flags  = IORESOURCE_MEM,
407         },
408         [1] = {
409                 .start  = INT_USB,
410                 .end    = INT_USB,
411                 .flags  = IORESOURCE_IRQ,
412         },
413 };
414
415 static struct resource tegra_usb2_resources[] = {
416         [0] = {
417                 .start  = TEGRA_USB2_BASE,
418                 .end    = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
419                 .flags  = IORESOURCE_MEM,
420         },
421         [1] = {
422                 .start  = INT_USB2,
423                 .end    = INT_USB2,
424                 .flags  = IORESOURCE_IRQ,
425         },
426 };
427
428 static struct resource tegra_usb3_resources[] = {
429         [0] = {
430                 .start  = TEGRA_USB3_BASE,
431                 .end    = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
432                 .flags  = IORESOURCE_MEM,
433         },
434         [1] = {
435                 .start  = INT_USB3,
436                 .end    = INT_USB3,
437                 .flags  = IORESOURCE_IRQ,
438         },
439 };
440
441 struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
442         .reset_gpio = -1,
443         .clk = "cdev2",
444 };
445
446 struct tegra_ehci_platform_data tegra_ehci1_pdata = {
447         .operating_mode = TEGRA_USB_OTG,
448         .power_down_on_bus_suspend = 1,
449         .vbus_gpio = -1,
450 };
451
452 struct tegra_ehci_platform_data tegra_ehci2_pdata = {
453         .phy_config = &tegra_ehci2_ulpi_phy_config,
454         .operating_mode = TEGRA_USB_HOST,
455         .power_down_on_bus_suspend = 1,
456         .vbus_gpio = -1,
457 };
458
459 struct tegra_ehci_platform_data tegra_ehci3_pdata = {
460         .operating_mode = TEGRA_USB_HOST,
461         .power_down_on_bus_suspend = 1,
462         .vbus_gpio = -1,
463 };
464
465 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
466
467 struct platform_device tegra_ehci1_device = {
468         .name   = "tegra-ehci",
469         .id     = 0,
470         .dev    = {
471                 .dma_mask       = &tegra_ehci_dmamask,
472                 .coherent_dma_mask = DMA_BIT_MASK(32),
473                 .platform_data = &tegra_ehci1_pdata,
474         },
475         .resource = tegra_usb1_resources,
476         .num_resources = ARRAY_SIZE(tegra_usb1_resources),
477 };
478
479 struct platform_device tegra_ehci2_device = {
480         .name   = "tegra-ehci",
481         .id     = 1,
482         .dev    = {
483                 .dma_mask       = &tegra_ehci_dmamask,
484                 .coherent_dma_mask = DMA_BIT_MASK(32),
485                 .platform_data = &tegra_ehci2_pdata,
486         },
487         .resource = tegra_usb2_resources,
488         .num_resources = ARRAY_SIZE(tegra_usb2_resources),
489 };
490
491 struct platform_device tegra_ehci3_device = {
492         .name   = "tegra-ehci",
493         .id     = 2,
494         .dev    = {
495                 .dma_mask       = &tegra_ehci_dmamask,
496                 .coherent_dma_mask = DMA_BIT_MASK(32),
497                 .platform_data = &tegra_ehci3_pdata,
498         },
499         .resource = tegra_usb3_resources,
500         .num_resources = ARRAY_SIZE(tegra_usb3_resources),
501 };
502
503 static struct resource tegra_pmu_resources[] = {
504         [0] = {
505                 .start  = INT_CPU0_PMU_INTR,
506                 .end    = INT_CPU0_PMU_INTR,
507                 .flags  = IORESOURCE_IRQ,
508         },
509         [1] = {
510                 .start  = INT_CPU1_PMU_INTR,
511                 .end    = INT_CPU1_PMU_INTR,
512                 .flags  = IORESOURCE_IRQ,
513         },
514 };
515
516 struct platform_device tegra_pmu_device = {
517         .name           = "arm-pmu",
518         .id             = -1,
519         .num_resources  = ARRAY_SIZE(tegra_pmu_resources),
520         .resource       = tegra_pmu_resources,
521 };
522
523 static struct resource tegra_uarta_resources[] = {
524         [0] = {
525                 .start  = TEGRA_UARTA_BASE,
526                 .end    = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
527                 .flags  = IORESOURCE_MEM,
528         },
529         [1] = {
530                 .start  = INT_UARTA,
531                 .end    = INT_UARTA,
532                 .flags  = IORESOURCE_IRQ,
533         },
534 };
535
536 static struct resource tegra_uartb_resources[] = {
537         [0] = {
538                 .start  = TEGRA_UARTB_BASE,
539                 .end    = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
540                 .flags  = IORESOURCE_MEM,
541         },
542         [1] = {
543                 .start  = INT_UARTB,
544                 .end    = INT_UARTB,
545                 .flags  = IORESOURCE_IRQ,
546         },
547 };
548
549 static struct resource tegra_uartc_resources[] = {
550         [0] = {
551                 .start  = TEGRA_UARTC_BASE,
552                 .end    = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
553                 .flags  = IORESOURCE_MEM,
554         },
555         [1] = {
556                 .start  = INT_UARTC,
557                 .end    = INT_UARTC,
558                 .flags  = IORESOURCE_IRQ,
559         },
560 };
561
562 static struct resource tegra_uartd_resources[] = {
563         [0] = {
564                 .start  = TEGRA_UARTD_BASE,
565                 .end    = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
566                 .flags  = IORESOURCE_MEM,
567         },
568         [1] = {
569                 .start  = INT_UARTD,
570                 .end    = INT_UARTD,
571                 .flags  = IORESOURCE_IRQ,
572         },
573 };
574
575 static struct resource tegra_uarte_resources[] = {
576         [0] = {
577                 .start  = TEGRA_UARTE_BASE,
578                 .end    = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
579                 .flags  = IORESOURCE_MEM,
580         },
581         [1] = {
582                 .start  = INT_UARTE,
583                 .end    = INT_UARTE,
584                 .flags  = IORESOURCE_IRQ,
585         },
586 };
587
588 struct platform_device tegra_uarta_device = {
589         .name   = "tegra_uart",
590         .id     = 0,
591         .num_resources  = ARRAY_SIZE(tegra_uarta_resources),
592         .resource       = tegra_uarta_resources,
593         .dev    = {
594                 .coherent_dma_mask      = DMA_BIT_MASK(32),
595         },
596 };
597
598 struct platform_device tegra_uartb_device = {
599         .name   = "tegra_uart",
600         .id     = 1,
601         .num_resources  = ARRAY_SIZE(tegra_uartb_resources),
602         .resource       = tegra_uartb_resources,
603         .dev    = {
604                 .coherent_dma_mask      = DMA_BIT_MASK(32),
605         },
606 };
607
608 struct platform_device tegra_uartc_device = {
609         .name   = "tegra_uart",
610         .id     = 2,
611         .num_resources  = ARRAY_SIZE(tegra_uartc_resources),
612         .resource       = tegra_uartc_resources,
613         .dev    = {
614                 .coherent_dma_mask      = DMA_BIT_MASK(32),
615         },
616 };
617
618 struct platform_device tegra_uartd_device = {
619         .name   = "tegra_uart",
620         .id     = 3,
621         .num_resources  = ARRAY_SIZE(tegra_uartd_resources),
622         .resource       = tegra_uartd_resources,
623         .dev    = {
624                 .coherent_dma_mask      = DMA_BIT_MASK(32),
625         },
626 };
627
628 struct platform_device tegra_uarte_device = {
629         .name   = "tegra_uart",
630         .id     = 4,
631         .num_resources  = ARRAY_SIZE(tegra_uarte_resources),
632         .resource       = tegra_uarte_resources,
633         .dev    = {
634                 .coherent_dma_mask      = DMA_BIT_MASK(32),
635         },
636 };
637
638 static struct resource i2s_resource1[] = {
639         [0] = {
640                 .start  = INT_I2S1,
641                 .end    = INT_I2S1,
642                 .flags  = IORESOURCE_IRQ
643         },
644         [1] = {
645                 .start  = TEGRA_DMA_REQ_SEL_I2S_1,
646                 .end    = TEGRA_DMA_REQ_SEL_I2S_1,
647                 .flags  = IORESOURCE_DMA
648         },
649         [2] = {
650                 .start  = TEGRA_I2S1_BASE,
651                 .end    = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
652                 .flags  = IORESOURCE_MEM
653         }
654 };
655
656 static struct resource i2s_resource2[] = {
657         [0] = {
658                 .start  = INT_I2S2,
659                 .end    = INT_I2S2,
660                 .flags  = IORESOURCE_IRQ
661         },
662         [1] = {
663                 .start  = TEGRA_DMA_REQ_SEL_I2S2_1,
664                 .end    = TEGRA_DMA_REQ_SEL_I2S2_1,
665                 .flags  = IORESOURCE_DMA
666         },
667         [2] = {
668                 .start  = TEGRA_I2S2_BASE,
669                 .end    = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
670                 .flags  = IORESOURCE_MEM
671         }
672 };
673
674 struct platform_device tegra_i2s_device1 = {
675         .name           = "tegra20-i2s",
676         .id             = 0,
677         .resource       = i2s_resource1,
678         .num_resources  = ARRAY_SIZE(i2s_resource1),
679 };
680
681 struct platform_device tegra_i2s_device2 = {
682         .name           = "tegra20-i2s",
683         .id             = 1,
684         .resource       = i2s_resource2,
685         .num_resources  = ARRAY_SIZE(i2s_resource2),
686 };
687
688 static struct resource tegra_das_resources[] = {
689         [0] = {
690                 .start = TEGRA_APB_MISC_DAS_BASE,
691                 .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
692                 .flags = IORESOURCE_MEM,
693         },
694 };
695
696 struct platform_device tegra_das_device = {
697         .name           = "tegra20-das",
698         .id             = -1,
699         .num_resources  = ARRAY_SIZE(tegra_das_resources),
700         .resource       = tegra_das_resources,
701 };
702
703 static struct resource w1_resources[] = {
704         [0] = {
705                 .start = INT_OWR,
706                 .end   = INT_OWR,
707                 .flags = IORESOURCE_IRQ
708         },
709         [1] = {
710                 .start = TEGRA_OWR_BASE,
711                 .end = TEGRA_OWR_BASE + TEGRA_OWR_SIZE - 1,
712                 .flags = IORESOURCE_MEM
713         }
714 };
715
716 struct platform_device tegra_w1_device = {
717         .name          = "tegra_w1",
718         .id            = -1,
719         .resource      = w1_resources,
720         .num_resources = ARRAY_SIZE(w1_resources),
721 };
722
723 static struct resource tegra_udc_resources[] = {
724         [0] = {
725                 .start  = TEGRA_USB_BASE,
726                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
727                 .flags  = IORESOURCE_MEM,
728         },
729         [1] = {
730                 .start  = INT_USB,
731                 .end    = INT_USB,
732                 .flags  = IORESOURCE_IRQ,
733         },
734 };
735
736 static struct resource tegra_usb1_resources[] = {
737         [0] = {
738                 .start  = TEGRA_USB_BASE,
739                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
740                 .flags  = IORESOURCE_MEM,
741         },
742         [1] = {
743                 .start  = INT_USB,
744                 .end    = INT_USB,
745                 .flags  = IORESOURCE_IRQ,
746         },
747 };
748
749 static struct resource tegra_usb2_resources[] = {
750         [0] = {
751                 .start  = TEGRA_USB2_BASE,
752                 .end    = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
753                 .flags  = IORESOURCE_MEM,
754         },
755         [1] = {
756                 .start  = INT_USB2,
757                 .end    = INT_USB2,
758                 .flags  = IORESOURCE_IRQ,
759         },
760 };
761
762 static struct resource tegra_usb3_resources[] = {
763         [0] = {
764                 .start  = TEGRA_USB3_BASE,
765                 .end    = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
766                 .flags  = IORESOURCE_MEM,
767         },
768         [1] = {
769                 .start  = INT_USB3,
770                 .end    = INT_USB3,
771                 .flags  = IORESOURCE_IRQ,
772         },
773 };
774
775 static u64 tegra_udc_dmamask = DMA_BIT_MASK(32);
776
777 static struct fsl_usb2_platform_data tegra_udc_pdata = {
778         .operating_mode = FSL_USB2_DR_DEVICE,
779         .phy_mode       = FSL_USB2_PHY_UTMI,
780 };
781
782 struct platform_device tegra_udc_device = {
783         .name   = "fsl-tegra-udc",
784         .id     = -1,
785         .dev    = {
786                 .dma_mask       = &tegra_udc_dmamask,
787                 .coherent_dma_mask = DMA_BIT_MASK(32),
788                 .platform_data  = &tegra_udc_pdata,
789         },
790         .resource = tegra_udc_resources,
791         .num_resources = ARRAY_SIZE(tegra_udc_resources),
792 };
793
794 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
795
796 struct platform_device tegra_ehci1_device = {
797         .name   = "tegra-ehci",
798         .id     = 0,
799         .dev    = {
800                 .dma_mask       = &tegra_ehci_dmamask,
801                 .coherent_dma_mask = DMA_BIT_MASK(32),
802         },
803         .resource = tegra_usb1_resources,
804         .num_resources = ARRAY_SIZE(tegra_usb1_resources),
805 };
806
807 struct platform_device tegra_ehci2_device = {
808         .name   = "tegra-ehci",
809         .id     = 1,
810         .dev    = {
811                 .dma_mask       = &tegra_ehci_dmamask,
812                 .coherent_dma_mask = DMA_BIT_MASK(32),
813         },
814         .resource = tegra_usb2_resources,
815         .num_resources = ARRAY_SIZE(tegra_usb2_resources),
816 };
817
818 struct platform_device tegra_ehci3_device = {
819         .name   = "tegra-ehci",
820         .id     = 2,
821         .dev    = {
822                 .dma_mask       = &tegra_ehci_dmamask,
823                 .coherent_dma_mask = DMA_BIT_MASK(32),
824         },
825         .resource = tegra_usb3_resources,
826         .num_resources = ARRAY_SIZE(tegra_usb3_resources),
827 };
828
829 static struct resource tegra_otg_resources[] = {
830         [0] = {
831                 .start  = TEGRA_USB_BASE,
832                 .end    = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
833                 .flags  = IORESOURCE_MEM,
834         },
835         [1] = {
836                 .start  = INT_USB,
837                 .end    = INT_USB,
838                 .flags  = IORESOURCE_IRQ,
839         },
840 };
841
842 struct platform_device tegra_otg_device = {
843         .name           = "tegra-otg",
844         .id             = -1,
845         .resource       = tegra_otg_resources,
846         .num_resources  = ARRAY_SIZE(tegra_otg_resources),
847 };
848
849 static struct resource i2s_resource1[] = {
850         [0] = {
851                 .start  = INT_I2S1,
852                 .end    = INT_I2S1,
853                 .flags  = IORESOURCE_IRQ
854         },
855         [1] = {
856                 .start  = TEGRA_DMA_REQ_SEL_I2S_1,
857                 .end    = TEGRA_DMA_REQ_SEL_I2S_1,
858                 .flags  = IORESOURCE_DMA
859         },
860         [2] = {
861                 .start  = TEGRA_I2S1_BASE,
862                 .end    = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
863                 .flags  = IORESOURCE_MEM
864         }
865 };
866
867 static struct resource i2s_resource2[] = {
868         [0] = {
869                 .start  = INT_I2S2,
870                 .end    = INT_I2S2,
871                 .flags  = IORESOURCE_IRQ
872         },
873         [1] = {
874                 .start  = TEGRA_DMA_REQ_SEL_I2S2_1,
875                 .end    = TEGRA_DMA_REQ_SEL_I2S2_1,
876                 .flags  = IORESOURCE_DMA
877         },
878         [2] = {
879                 .start  = TEGRA_I2S2_BASE,
880                 .end    = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
881                 .flags  = IORESOURCE_MEM
882         }
883 };
884
885 static struct resource spdif_resource[] = {
886         [0] = {
887                 .start  = INT_SPDIF,
888                 .end    = INT_SPDIF,
889                 .flags  = IORESOURCE_IRQ
890         },
891         [1] = {
892                 .start  = TEGRA_DMA_REQ_SEL_SPD_I,
893                 .end    = TEGRA_DMA_REQ_SEL_SPD_I,
894                 .flags  = IORESOURCE_DMA
895         },
896         [2] = {
897                 .start  = TEGRA_SPDIF_BASE,
898                 .end    = TEGRA_SPDIF_BASE + TEGRA_SPDIF_SIZE - 1,
899                 .flags  = IORESOURCE_MEM
900         }
901 };
902
903 struct platform_device tegra_i2s_device1 = {
904         .name           = "i2s",
905         .id             = 0,
906         .resource       = i2s_resource1,
907         .num_resources  = ARRAY_SIZE(i2s_resource1),
908 };
909
910 struct platform_device tegra_i2s_device2 = {
911         .name           = "i2s",
912         .id             = 1,
913         .resource       = i2s_resource2,
914         .num_resources  = ARRAY_SIZE(i2s_resource2),
915 };
916
917 struct platform_device tegra_spdif_device = {
918         .name           = "spdif_out",
919         .id             = -1,
920         .resource       = spdif_resource,
921         .num_resources  = ARRAY_SIZE(spdif_resource),
922 };
923
924 static struct resource tegra_gart_resources[] = {
925         [0] = {
926                 .name   = "mc",
927                 .flags  = IORESOURCE_MEM,
928                 .start  = TEGRA_MC_BASE,
929                 .end    = TEGRA_MC_BASE + TEGRA_MC_SIZE - 1,
930         },
931         [1] = {
932                 .name   = "gart",
933                 .flags  = IORESOURCE_MEM,
934                 .start  = TEGRA_GART_BASE,
935                 .end    = TEGRA_GART_BASE + TEGRA_GART_SIZE - 1,
936         }
937 };
938
939 struct platform_device tegra_gart_device = {
940         .name           = "tegra_gart",
941         .id             = -1,
942         .num_resources  = ARRAY_SIZE(tegra_gart_resources),
943         .resource       = tegra_gart_resources
944 };
945
946 static struct resource tegra_wdt_resources[] = {
947         [0] = {
948                 .start  = TEGRA_CLK_RESET_BASE,
949                 .end    = TEGRA_CLK_RESET_BASE + 4 - 1,
950                 .flags  = IORESOURCE_MEM,
951         },
952         [1] = {
953                 .start  = TEGRA_TMR1_BASE,
954                 .end    = TEGRA_TMR1_BASE + TEGRA_TMR1_SIZE - 1,
955                 .flags  = IORESOURCE_MEM,
956         },
957         [2] = {
958                 .start  = INT_TMR1,
959                 .end    = INT_TMR1,
960                 .flags  = IORESOURCE_IRQ,
961         },
962 };
963
964 struct platform_device tegra_wdt_device = {
965         .name           = "tegra_wdt",
966         .id             = -1,
967         .num_resources  = ARRAY_SIZE(tegra_wdt_resources),
968         .resource       = tegra_wdt_resources,
969 };
970
971 static struct resource tegra_pwfm_resource = {
972         .start  = TEGRA_PWFM_BASE,
973         .end    = TEGRA_PWFM_BASE + TEGRA_PWFM_SIZE - 1,
974         .flags  = IORESOURCE_MEM,
975 };
976
977 struct platform_device tegra_pwfm_device = {
978         .name           = "tegra-pwm",
979         .id             = 0,
980         .num_resources  = 1,
981         .resource       = &tegra_pwfm_resource,
982 };
983
984 static struct plat_serial8250_port tegra_uart0_port[] = {
985         [0] = {
986                 .mapbase        = TEGRA_UARTA_BASE,
987                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
988                 .irq            = INT_UARTA,
989         },
990         [1] = {
991                 .flags          = 0,
992         },
993 };
994
995 static struct plat_serial8250_port tegra_uart1_port[] = {
996         [0] = {
997                 .mapbase        = TEGRA_UARTB_BASE,
998                 .membase        = IO_ADDRESS(TEGRA_UARTB_BASE),
999                 .irq            = INT_UARTB,
1000         },
1001         [1] = {
1002                 .flags          = 0,
1003         },
1004 };
1005
1006 static struct plat_serial8250_port tegra_uart2_port[] = {
1007         [0] = {
1008                 .mapbase        = TEGRA_UARTC_BASE,
1009                 .membase        = IO_ADDRESS(TEGRA_UARTC_BASE),
1010                 .irq            = INT_UARTC,
1011         },
1012         [1] = {
1013                 .flags          = 0,
1014         },
1015 };
1016
1017 static struct plat_serial8250_port tegra_uart3_port[] = {
1018         [0] = {
1019                 .mapbase        = TEGRA_UARTD_BASE,
1020                 .membase        = IO_ADDRESS(TEGRA_UARTD_BASE),
1021                 .irq            = INT_UARTD,
1022         },
1023         [1] = {
1024                 .flags          = 0,
1025         },
1026 };
1027
1028 static struct plat_serial8250_port tegra_uart4_port[] = {
1029         [0] = {
1030                 .mapbase        = TEGRA_UARTE_BASE,
1031                 .membase        = IO_ADDRESS(TEGRA_UARTE_BASE),
1032                 .irq            = INT_UARTE,
1033         },
1034         [1] = {
1035                 .flags          = 0,
1036         },
1037 };
1038
1039 struct platform_device tegra_uart0_device = {
1040         .name   = "tegra_uart",
1041         .id     = 0,
1042         .dev    = {
1043                 .platform_data          = tegra_uart0_port,
1044                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1045         },
1046 };
1047
1048 struct platform_device tegra_uart1_device = {
1049         .name   = "tegra_uart",
1050         .id     = 1,
1051         .dev    = {
1052                 .platform_data          = tegra_uart1_port,
1053                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1054         },
1055 };
1056
1057 struct platform_device tegra_uart2_device = {
1058         .name   = "tegra_uart",
1059         .id     = 2,
1060         .dev    = {
1061                 .platform_data          = tegra_uart2_port,
1062                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1063         },
1064 };
1065
1066 struct platform_device tegra_uart3_device = {
1067         .name   = "tegra_uart",
1068         .id     = 3,
1069         .dev    = {
1070                 .platform_data          = tegra_uart3_port,
1071                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1072         },
1073 };
1074
1075 struct platform_device tegra_uart4_device = {
1076         .name   = "tegra_uart",
1077         .id     = 4,
1078         .dev    = {
1079                 .platform_data          = tegra_uart4_port,
1080                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1081         },
1082 };
1083
1084 static struct resource tegra_grhost_resources[] = {
1085         {
1086                 .start = TEGRA_HOST1X_BASE,
1087                 .end = TEGRA_HOST1X_BASE + TEGRA_HOST1X_SIZE - 1,
1088                 .flags = IORESOURCE_MEM,
1089         },
1090         {
1091                 .start = TEGRA_DISPLAY_BASE,
1092                 .end = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE - 1,
1093                 .flags = IORESOURCE_MEM,
1094         },
1095         {
1096                 .start = TEGRA_DISPLAY2_BASE,
1097                 .end = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
1098                 .flags = IORESOURCE_MEM,
1099         },
1100         {
1101                 .start = TEGRA_VI_BASE,
1102                 .end = TEGRA_VI_BASE + TEGRA_VI_SIZE - 1,
1103                 .flags = IORESOURCE_MEM,
1104         },
1105         {
1106                 .start = TEGRA_ISP_BASE,
1107                 .end = TEGRA_ISP_BASE + TEGRA_ISP_SIZE - 1,
1108                 .flags = IORESOURCE_MEM,
1109         },
1110         {
1111                 .start = TEGRA_MPE_BASE,
1112                 .end = TEGRA_MPE_BASE + TEGRA_MPE_SIZE - 1,
1113                 .flags = IORESOURCE_MEM,
1114         },
1115         {
1116                 .start = INT_SYNCPT_THRESH_BASE,
1117                 .end = INT_SYNCPT_THRESH_BASE + INT_SYNCPT_THRESH_NR - 1,
1118                 .flags = IORESOURCE_IRQ,
1119         },
1120         {
1121                 .start = INT_HOST1X_MPCORE_GENERAL,
1122                 .end = INT_HOST1X_MPCORE_GENERAL,
1123                 .flags = IORESOURCE_IRQ,
1124         },
1125 };
1126
1127 struct platform_device tegra_grhost_device = {
1128         .name = "tegra_grhost",
1129         .id = -1,
1130         .resource = tegra_grhost_resources,
1131         .num_resources = ARRAY_SIZE(tegra_grhost_resources),
1132 };
1133
1134 static struct resource tegra_avp_resources[] = {
1135         [0] = {
1136                 .start  = INT_SHR_SEM_INBOX_IBF,
1137                 .end    = INT_SHR_SEM_INBOX_IBF,
1138                 .flags  = IORESOURCE_IRQ,
1139                 .name   = "mbox_from_avp_pending",
1140         },
1141 };
1142
1143 struct platform_device tegra_avp_device = {
1144         .name           = "tegra-avp",
1145         .id             = -1,
1146         .num_resources  = ARRAY_SIZE(tegra_avp_resources),
1147         .resource       = tegra_avp_resources,
1148         .dev  = {
1149                 .coherent_dma_mask      = 0xffffffffULL,
1150         },
1151 };