ARM: tegra12: enable DT support for host1x
[linux-3.10.git] / arch / arm / mach-tegra / board-vcm30_t124.c
1 /*
2  * arch/arm/mach-tegra/board-vcm30_t124.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18
19 #include <linux/platform_device.h>
20 #include <linux/i2c-tegra.h>
21 #include <linux/i2c.h>
22 #include <linux/platform_data/serial-tegra.h>
23 #include <linux/platform_data/tegra_usb.h>
24 #include <linux/platform_data/tegra_nor.h>
25 #include <linux/platform_data/tegra_ahci.h>
26 #include <linux/spi/spi-tegra.h>
27 #include <linux/of_platform.h>
28 #include <linux/kernel.h>
29 #include <linux/clocksource.h>
30 #include <linux/irqchip.h>
31 #include <linux/pci-tegra.h>
32
33 #include <mach/tegra_asoc_pdata.h>
34 #include <mach/io_dpd.h>
35 #include <asm/mach/arch.h>
36 #include <mach/isomgr.h>
37
38 #include "iomap.h"
39 #include "board.h"
40 #include "clock.h"
41 #include "board-vcm30_t124.h"
42 #include "devices.h"
43 #include "board-common.h"
44 #include "common.h"
45
46 #include <asm/mach-types.h>
47
48 static struct board_info board_info, display_board_info;
49
50 static __initdata struct tegra_clk_init_table vcm30_t124_clk_init_table[] = {
51         /* name         parent          rate            enabled (always on)*/
52         { "pll_m",      NULL,           0,              false},
53         { "hda",        "pll_p",        108000000,      false},
54         { "hda2codec_2x", "pll_p",      48000000,       false},
55         { "pwm",        "pll_p",        3187500,        false},
56         { "i2s0",       "pll_a_out0",   0,              false},
57         { "i2s1",       "pll_a_out0",   0,              false},
58         { "i2s3",       "pll_a_out0",   0,              false},
59         { "i2s4",       "pll_a_out0",   0,              false},
60         { "spdif_out",  "pll_a_out0",   0,              false},
61         { "d_audio",    "clk_m",        12000000,       false},
62         { "dam0",       "clk_m",        12000000,       false},
63         { "dam1",       "clk_m",        12000000,       false},
64         { "dam2",       "clk_m",        12000000,       false},
65         { "audio1",     "i2s1_sync",    0,              false},
66         { "audio3",     "i2s3_sync",    0,              false},
67         { "vi_sensor",  "pll_p",        150000000,      false},
68         { "vi_sensor2", "pll_p",        150000000,      false},
69         { "cilab",      "pll_p",        150000000,      false},
70         { "cilcd",      "pll_p",        150000000,      false},
71         { "cile",       "pll_p",        150000000,      false},
72         { "i2c1",       "pll_p",        3200000,        false},
73         { "i2c2",       "pll_p",        3200000,        false},
74         { "i2c3",       "pll_p",        3200000,        false},
75         { "i2c4",       "pll_p",        3200000,        false},
76         { "i2c5",       "pll_p",        3200000,        false},
77         { "sbc1",       "pll_p",        25000000,       false},
78         { "sbc2",       "pll_p",        25000000,       false},
79         { "sbc3",       "pll_p",        25000000,       false},
80         { "sbc4",       "pll_p",        25000000,       false},
81         { "sbc5",       "pll_p",        25000000,       false},
82         { "sbc6",       "pll_p",        25000000,       false},
83         { "uarta",      "pll_p",        408000000,      false},
84         { "uartb",      "pll_p",        408000000,      false},
85         { "uartc",      "pll_p",        408000000,      false},
86         { "uartd",      "pll_p",        408000000,      false},
87         { "nor",        "pll_p",        102000000,      true},
88         { NULL,         NULL,           0,              0},
89 };
90
91 static struct tegra_i2c_platform_data vcm30_t124_i2c1_platform_data = {
92         .bus_clk_rate   = 100000,
93         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
94         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
95 };
96
97 static struct tegra_i2c_platform_data vcm30_t124_i2c2_platform_data = {
98         .bus_clk_rate   = 100000,
99         .is_clkon_always = true,
100         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
101         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
102 };
103
104 static struct tegra_i2c_platform_data vcm30_t124_i2c3_platform_data = {
105         .bus_clk_rate   = 400000,
106         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
107         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
108 };
109
110 static struct tegra_i2c_platform_data vcm30_t124_i2c4_platform_data = {
111         .bus_clk_rate   = 10000,
112         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
113         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
114 };
115
116 static struct tegra_i2c_platform_data vcm30_t124_i2c5_platform_data = {
117         .bus_clk_rate   = 400000,
118         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
119         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
120 };
121
122 static struct tegra_nor_platform_data vcm30_t124_nor_data = {
123         .flash = {
124                 .map_name = "cfi_probe",
125                 .width = 2,
126         },
127         .chip_parms = {
128                 .MuxMode = NorMuxMode_ADNonMux,
129                 .ReadMode = NorReadMode_Page,
130                 .PageLength = NorPageLength_8Word,
131                 .ReadyActive = NorReadyActive_WithData,
132                 /* FIXME: Need to use characterized value */
133                 .timing_default = {
134                         .timing0 = 0x30300273,
135                         .timing1 = 0x00030302,
136                 },
137                 .timing_read = {
138                         .timing0 = 0x30300273,
139                         .timing1 = 0x00030302,
140                 },
141         },
142 };
143
144 static struct cs_info vcm30_t124_cs_info[] = {
145         {
146                 .cs = CS_0,
147                 .num_cs_gpio = 0,
148                 .virt = IO_ADDRESS(TEGRA_NOR_FLASH_BASE),
149                 .size = SZ_64M,
150                 .phys = TEGRA_NOR_FLASH_BASE,
151         },
152 };
153
154 static void vcm30_t124_nor_init(void)
155 {
156         tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
157
158         vcm30_t124_nor_data.info.cs = kzalloc(sizeof(struct cs_info) *
159                                         ARRAY_SIZE(vcm30_t124_cs_info),
160                                         GFP_KERNEL);
161         if (!vcm30_t124_nor_data.info.cs)
162                 BUG();
163
164         vcm30_t124_nor_data.info.num_chips = ARRAY_SIZE(vcm30_t124_cs_info);
165
166         memcpy(vcm30_t124_nor_data.info.cs, vcm30_t124_cs_info,
167                                 sizeof(struct cs_info) * ARRAY_SIZE(vcm30_t124_cs_info));
168
169         tegra_nor_device.dev.platform_data = &vcm30_t124_nor_data;
170         platform_device_register(&tegra_nor_device);
171 }
172
173 static struct i2c_board_info __initdata wm8731_board_info = {
174         I2C_BOARD_INFO("wm8731", 0x1a),
175 };
176
177 static struct i2c_board_info __initdata ad1937_board_info = {
178         I2C_BOARD_INFO("ad1937", 0x07),
179 };
180
181 static void vcm30_t124_i2c_init(void)
182 {
183         struct board_info board_info;
184         tegra_get_board_info(&board_info);
185         /* T124 does not use device tree as of now */
186         tegra12_i2c_device1.dev.platform_data = &vcm30_t124_i2c1_platform_data;
187         tegra12_i2c_device2.dev.platform_data = &vcm30_t124_i2c2_platform_data;
188         tegra12_i2c_device3.dev.platform_data = &vcm30_t124_i2c3_platform_data;
189         tegra12_i2c_device4.dev.platform_data = &vcm30_t124_i2c4_platform_data;
190         tegra12_i2c_device5.dev.platform_data = &vcm30_t124_i2c5_platform_data;
191
192         platform_device_register(&tegra12_i2c_device5);
193         platform_device_register(&tegra12_i2c_device4);
194         platform_device_register(&tegra12_i2c_device3);
195         platform_device_register(&tegra12_i2c_device2);
196         platform_device_register(&tegra12_i2c_device1);
197
198         i2c_register_board_info(0, &wm8731_board_info, 1);
199         i2c_register_board_info(0, &ad1937_board_info, 1);
200 }
201
202 /* Register debug UART in old fashion and use DT for all others */
203 #ifndef CONFIG_USE_OF
204 static struct platform_device *vcm30_t124_uart_devices[] __initdata = {
205         &tegra_uarta_device,
206         &tegra_uartb_device,
207         &tegra_uartd_device,
208 };
209
210 static struct tegra_serial_platform_data vcm30_t124_uarta_pdata = {
211         .dma_req_selector = 8,
212         .modem_interrupt = false,
213 };
214
215 static struct tegra_serial_platform_data vcm30_t124_uartb_pdata = {
216         .dma_req_selector = 9,
217         .modem_interrupt = false,
218 };
219
220 static struct tegra_serial_platform_data vcm30_t124_uartd_pdata = {
221         .dma_req_selector = 19,
222         .modem_interrupt = false,
223 };
224 #endif
225
226 static struct tegra_serial_platform_data vcm30_t124_uartc_pdata = {
227         .dma_req_selector = 10,
228         .modem_interrupt = false,
229 };
230
231 static void __init vcm30_t124_uart_init(void)
232 {
233         int debug_port_id;
234
235 #ifndef CONFIG_USE_OF
236         tegra_uarta_device.dev.platform_data = &vcm30_t124_uarta_pdata;
237         tegra_uartb_device.dev.platform_data = &vcm30_t124_uartb_pdata;
238         tegra_uartd_device.dev.platform_data = &vcm30_t124_uartd_pdata;
239         platform_add_devices(vcm30_t124_uart_devices,
240                         ARRAY_SIZE(vcm30_t124_uart_devices));
241 #endif
242         tegra_uartc_device.dev.platform_data = &vcm30_t124_uartc_pdata;
243         if (!is_tegra_debug_uartport_hs()) {
244                 debug_port_id = uart_console_debug_init(2);
245                 if (debug_port_id < 0)
246                         return;
247
248                 platform_device_register(uart_console_debug_device);
249         } else {
250                 tegra_uartc_device.dev.platform_data = &vcm30_t124_uartc_pdata;
251                 platform_device_register(&tegra_uartc_device);
252         }
253
254 }
255
256 static struct resource tegra_rtc_resources[] = {
257         [0] = {
258                 .start = TEGRA_RTC_BASE,
259                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
260                 .flags = IORESOURCE_MEM,
261         },
262         [1] = {
263                 .start = INT_RTC,
264                 .end = INT_RTC,
265                 .flags = IORESOURCE_IRQ,
266         },
267 };
268
269 static struct platform_device tegra_rtc_device = {
270         .name = "tegra_rtc",
271         .id   = -1,
272         .resource = tegra_rtc_resources,
273         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
274 };
275
276 static struct tegra_pci_platform_data vcm30_t124_pcie_platform_data = {
277         .port_status[0] = 1,
278         .port_status[1] = 1,
279         .use_dock_detect        = 1,
280         .gpio   = TEGRA_GPIO_PO1,
281         .gpio_x1_slot   = PMU_TCA6416_GPIO(12),
282 };
283
284 static void vcm30_t124_pcie_init(void)
285 {
286 /* FIXME: Check this for VCM30_T124 */
287 #if 0
288         struct board_info board_info;
289         /* root port 1(x1 slot) is supported only on of ERS-S board */
290         laguna_pcie_platform_data.port_status[1] = 0;
291
292         tegra_pci_device.dev.platform_data = &laguna_pcie_platform_data;
293         platform_device_register(&tegra_pci_device);
294 #endif
295 }
296
297 #ifdef CONFIG_SATA_AHCI_TEGRA
298 static struct tegra_ahci_platform_data ahci_plat_data = {
299         .gen2_rx_eq = 7,
300 };
301
302 static void vcm30_t124_sata_init(void)
303 {
304         tegra_sata_device.dev.platform_data = &ahci_plat_data;
305         platform_device_register(&tegra_sata_device);
306 }
307 #else
308 static void vcm30_t124_sata_init(void) { }
309 #endif
310
311 static struct platform_device tegra_snd_vcm30t124 = {
312         .name = "tegra-snd-vcm30t124",
313         .id = 0,
314 };
315
316 /* FIXME: Check which devices are needed from the below list */
317 static struct platform_device *vcm30_t124_devices[] __initdata = {
318         &tegra_pmu_device,
319         &tegra_rtc_device,
320         &tegra_udc_device,
321 #if defined(CONFIG_TEGRA_AVP)
322         &tegra_avp_device,
323 #endif
324 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
325         &tegra12_se_device,
326 #endif
327         &tegra_snd_vcm30t124,
328 };
329
330 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
331         .port_otg = false,
332         .has_hostpc = true,
333         .unaligned_dma_buf_supported = true,
334         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
335         .op_mode = TEGRA_USB_OPMODE_HOST,
336         .u_data.host = {
337                 .vbus_gpio = -1,
338                 .hot_plug = false,
339                 .remote_wakeup_supported = false,
340                 .power_off_on_suspend = true,
341                 .turn_off_vbus_on_lp0 = true,
342         },
343         .u_cfg.utmi = {
344                 .hssync_start_delay = 0,
345                 .elastic_limit = 16,
346                 .idle_wait_delay = 17,
347                 .term_range_adj = 6,
348                 .xcvr_setup = 15,
349                 .xcvr_lsfslew = 2,
350                 .xcvr_lsrslew = 2,
351                 .xcvr_setup_offset = 0,
352                 .xcvr_use_fuses = 1,
353                 .vbus_oc_map = 0x4,
354         },
355 };
356
357 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
358         .port_otg = false,
359         .has_hostpc = true,
360         .unaligned_dma_buf_supported = true,
361         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
362         .op_mode = TEGRA_USB_OPMODE_HOST,
363         .u_data.host = {
364                 /* FIXME: Set this only for E1855. */
365                 .vbus_gpio = TEGRA_GPIO_PN5,
366                 .hot_plug = false,
367                 .remote_wakeup_supported = false,
368                 .power_off_on_suspend = true,
369                 .turn_off_vbus_on_lp0 = true,
370         },
371         .u_cfg.utmi = {
372                 .hssync_start_delay = 0,
373                 .elastic_limit = 16,
374                 .idle_wait_delay = 17,
375                 .term_range_adj = 6,
376                 .xcvr_setup = 8,
377                 .xcvr_lsfslew = 2,
378                 .xcvr_lsrslew = 2,
379                 .xcvr_setup_offset = 0,
380                 .xcvr_use_fuses = 1,
381                 .vbus_oc_map = 0x5,
382         },
383 };
384
385 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
386         .port_otg = false,
387         .has_hostpc = true,
388         .unaligned_dma_buf_supported = true,
389         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
390         .op_mode = TEGRA_USB_OPMODE_HOST,
391         .u_data.host = {
392                 .vbus_gpio = -1,
393                 .hot_plug = false,
394                 .remote_wakeup_supported = false,
395                 .power_off_on_suspend = true,
396                 .turn_off_vbus_on_lp0 = true,
397         },
398         .u_cfg.utmi = {
399         .hssync_start_delay = 0,
400                 .elastic_limit = 16,
401                 .idle_wait_delay = 17,
402                 .term_range_adj = 6,
403                 .xcvr_setup = 8,
404                 .xcvr_lsfslew = 2,
405                 .xcvr_lsrslew = 2,
406                 .xcvr_setup_offset = 0,
407                 .xcvr_use_fuses = 1,
408                 .vbus_oc_map = 0x5,
409         },
410 };
411
412 static struct tegra_usb_otg_data tegra_otg_pdata = {
413         .ehci_device = &tegra_ehci1_device,
414         .ehci_pdata = &tegra_ehci1_utmi_pdata,
415 };
416
417 static void vcm30_t124_usb_init(void)
418 {
419         int usb_port_owner_info = tegra_get_usb_port_owner_info();
420
421         if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB)) {
422                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
423                 platform_device_register(&tegra_ehci2_device);
424         }
425
426         if (!(usb_port_owner_info & UTMI3_PORT_OWNER_XUSB)) {
427                 tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
428                 platform_device_register(&tegra_ehci3_device);
429         }
430 }
431
432 #ifndef CONFIG_USE_OF
433 static struct platform_device *vcm30_t124_spi_devices[] __initdata = {
434         &tegra11_spi_device1,
435         &tegra11_spi_device4,
436 };
437
438 static struct tegra_spi_platform_data vcm30_t124_spi1_pdata = {
439         .dma_req_sel            = 15,
440         .spi_max_frequency      = 25000000,
441         .clock_always_on        = false,
442 };
443
444 static struct tegra_spi_platform_data vcm30_t124_spi4_pdata = {
445         .dma_req_sel            = 18,
446         .spi_max_frequency      = 25000000,
447         .clock_always_on        = false,
448 };
449
450 static void __init vcm30_t124_spi_init(void)
451 {
452         tegra11_spi_device1.dev.platform_data = &vcm30_t124_spi1_pdata;
453         tegra11_spi_device4.dev.platform_data = &vcm30_t124_spi4_pdata;
454         platform_add_devices(vcm30_t124_spi_devices,
455                         ARRAY_SIZE(vcm30_t124_spi_devices));
456 }
457 #else
458 static void __init vcm30_t124_spi_init(void)
459 {
460 }
461 #endif
462
463 #ifdef CONFIG_USE_OF
464 struct of_dev_auxdata vcm30_t124_auxdata_lookup[] __initdata = {
465         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTA_BASE,
466                                 "serial-tegra.0", NULL),
467         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTB_BASE,
468                                 "serial-tegra.1", NULL),
469         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTD_BASE,
470                                 "serial-tegra.3", NULL),
471         OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
472                 NULL),
473         OF_DEV_AUXDATA("nvidia,tegra124-gk20a", TEGRA_GK20A_BAR0_BASE, "gk20a.0", NULL),
474         OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03.0", NULL),
475         OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
476                 NULL),
477         OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi.0", NULL),
478         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp.0", NULL),
479         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISPB_BASE, "isp.1", NULL),
480         OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
481         OF_DEV_AUXDATA("nvidia,tegra124-apbdma", 0x60020000, "tegra-apbdma",
482                                 NULL),
483         OF_DEV_AUXDATA("nvidia,tegra124-ahub", 0x70300000,
484                                 "tegra30-ahub-apbif", NULL),
485         {}
486 };
487 #endif
488
489 static void __init tegra_vcm30_t124_early_init(void)
490 {
491         tegra_clk_init_from_table(vcm30_t124_clk_init_table);
492         tegra_clk_verify_parents();
493         tegra_soc_device_init("vcm30_t124");
494 }
495
496 static void __init tegra_vcm30_t124_late_init(void)
497 {
498         struct board_info board_info;
499         tegra_get_board_info(&board_info);
500         pr_info("board_info: id:sku:fab:major:minor = 0x%04x:0x%04x:0x%02x:0x%02x:0x%02x\n",
501                 board_info.board_id, board_info.sku,
502                 board_info.fab, board_info.major_revision,
503                 board_info.minor_revision);
504         platform_device_register(&tegra_pinmux_device);
505         vcm30_t124_pinmux_init();
506         vcm30_t124_usb_init();
507 /*      vcm30_t124_xusb_init(); */
508         vcm30_t124_nor_init();
509         vcm30_t124_i2c_init();
510         vcm30_t124_spi_init();
511         vcm30_t124_uart_init();
512         vcm30_t124_pca953x_init();
513         platform_add_devices(vcm30_t124_devices,
514                         ARRAY_SIZE(vcm30_t124_devices));
515         tegra_io_dpd_init();
516         vcm30_t124_sdhci_init();
517         vcm30_t124_regulator_init();
518         vcm30_t124_suspend_init();
519 #if 0
520         vcm30_t124_emc_init();
521         vcm30_t124_edp_init();
522 #endif
523         isomgr_init();
524         /* vcm30_t124_panel_init(); */
525         /* vcm30_t124_pmon_init(); */
526         vcm30_t124_pcie_init();
527         vcm30_t124_sata_init();
528 #ifdef CONFIG_TEGRA_WDT_RECOVERY
529         tegra_wdt_recovery_init();
530 #endif
531         /* FIXME: Required? */
532 #if 0
533         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
534
535         vcm30_t124_sensors_init();
536         vcm30_t124_soctherm_init();
537 #endif
538         tegra_register_fuse();
539         vcm30_t124_panel_init();
540 }
541
542 static void __init vcm30_t124_ramconsole_reserve(unsigned long size)
543 {
544         tegra_ram_console_debug_reserve(SZ_1M);
545 }
546
547 static void __init tegra_vcm30_t124_dt_init(void)
548 {
549         tegra_get_board_info(&board_info);
550         tegra_get_display_board_info(&display_board_info);
551
552         tegra_vcm30_t124_early_init();
553 #ifdef CONFIG_USE_OF
554         of_platform_populate(NULL,
555                 of_default_bus_match_table, vcm30_t124_auxdata_lookup,
556                 &platform_bus);
557 #endif
558
559         tegra_vcm30_t124_late_init();
560 }
561
562 static void __init tegra_vcm30_t124_reserve(void)
563 {
564 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
565         /* 1920*1200*4*2 = 18432000 bytes */
566         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
567 #else
568         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
569 #endif
570         vcm30_t124_ramconsole_reserve(SZ_1M);
571 }
572
573 static const char * const vcm30_t124_dt_board_compat[] = {
574         "nvidia,vcm30_t124",
575         NULL
576 };
577
578 DT_MACHINE_START(VCM30_T124, "vcm30_t124")
579         .atag_offset    = 0x100,
580         .smp            = smp_ops(tegra_smp_ops),
581         .map_io         = tegra_map_common_io,
582         .reserve        = tegra_vcm30_t124_reserve,
583         .init_early     = tegra12x_init_early,
584         .init_irq       = irqchip_init,
585         .init_time      = clocksource_of_init,
586         .init_machine   = tegra_vcm30_t124_dt_init,
587         .restart        = tegra_assert_system_reset,
588         .dt_compat      = vcm30_t124_dt_board_compat,
589         .init_late      = tegra_init_late
590 MACHINE_END