arm: tegra: vcm30_t124: Fix build errors for K3.10
[linux-3.10.git] / arch / arm / mach-tegra / board-vcm30_t124.c
1 /*
2  * arch/arm/mach-tegra/board-vcm30_t124.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18
19 #include <linux/platform_device.h>
20 #include <linux/i2c-tegra.h>
21 #include <linux/i2c.h>
22 #include <linux/platform_data/serial-tegra.h>
23 #include <linux/platform_data/tegra_usb.h>
24 #include <linux/spi/spi-tegra.h>
25 #include <linux/of_platform.h>
26
27 #include <mach/tegra_asoc_pdata.h>
28 #include <mach/pci.h>
29 #include <mach/io_dpd.h>
30 #include <asm/mach/arch.h>
31 #include <mach/isomgr.h>
32
33 #include "iomap.h"
34 #include "board.h"
35 #include "clock.h"
36 #include "board-vcm30_t124.h"
37 #include "devices.h"
38 #include "board-common.h"
39 #include "common.h"
40
41 #include <asm/mach-types.h>
42
43 static struct board_info board_info, display_board_info;
44
45 static __initdata struct tegra_clk_init_table vcm30_t124_clk_init_table[] = {
46         /* name         parent          rate            enabled (always on)*/
47         { "pll_m",      NULL,           0,              false},
48         { "hda",        "pll_p",        108000000,      false},
49         { "hda2codec_2x", "pll_p",      48000000,       false},
50         { "pwm",        "pll_p",        3187500,        false},
51         { "i2s1",       "pll_a_out0",   0,              false},
52         { "i2s3",       "pll_a_out0",   0,              false},
53         { "i2s4",       "pll_a_out0",   0,              false},
54         { "spdif_out",  "pll_a_out0",   0,              false},
55         { "d_audio",    "clk_m",        12000000,       false},
56         { "dam0",       "clk_m",        12000000,       false},
57         { "dam1",       "clk_m",        12000000,       false},
58         { "dam2",       "clk_m",        12000000,       false},
59         { "audio1",     "i2s1_sync",    0,              false},
60         { "audio3",     "i2s3_sync",    0,              false},
61         { "vi_sensor",  "pll_p",        150000000,      false},
62         { "vi_sensor2", "pll_p",        150000000,      false},
63         { "cilab",      "pll_p",        150000000,      false},
64         { "cilcd",      "pll_p",        150000000,      false},
65         { "cile",       "pll_p",        150000000,      false},
66         { "i2c1",       "pll_p",        3200000,        false},
67         { "i2c2",       "pll_p",        3200000,        false},
68         { "i2c3",       "pll_p",        3200000,        false},
69         { "i2c4",       "pll_p",        3200000,        false},
70         { "i2c5",       "pll_p",        3200000,        false},
71         { "sbc1",       "pll_p",        25000000,       false},
72         { "sbc2",       "pll_p",        25000000,       false},
73         { "sbc3",       "pll_p",        25000000,       false},
74         { "sbc4",       "pll_p",        25000000,       false},
75         { "sbc5",       "pll_p",        25000000,       false},
76         { "sbc6",       "pll_p",        25000000,       false},
77         { "uarta",      "pll_p",        408000000,      false},
78         { "uartb",      "pll_p",        408000000,      false},
79         { "uartc",      "pll_p",        408000000,      false},
80         { "uartd",      "pll_p",        408000000,      false},
81         { NULL,         NULL,           0,              0},
82 };
83
84 static struct tegra_i2c_platform_data vcm30_t124_i2c1_platform_data = {
85         .bus_clk_rate   = 100000,
86         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
87         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
88 };
89
90 static struct tegra_i2c_platform_data vcm30_t124_i2c2_platform_data = {
91         .bus_clk_rate   = 100000,
92         .is_clkon_always = true,
93         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
94         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
95 };
96
97 static struct tegra_i2c_platform_data vcm30_t124_i2c3_platform_data = {
98         .bus_clk_rate   = 400000,
99         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
100         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
101 };
102
103 static struct tegra_i2c_platform_data vcm30_t124_i2c4_platform_data = {
104         .bus_clk_rate   = 10000,
105         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
106         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
107 };
108
109 static struct tegra_i2c_platform_data vcm30_t124_i2c5_platform_data = {
110         .bus_clk_rate   = 400000,
111         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
112         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
113 };
114
115 static void vcm30_t124_i2c_init(void)
116 {
117         struct board_info board_info;
118         tegra_get_board_info(&board_info);
119         /* T124 does not use device tree as of now */
120         tegra12_i2c_device1.dev.platform_data = &vcm30_t124_i2c1_platform_data;
121         tegra12_i2c_device2.dev.platform_data = &vcm30_t124_i2c2_platform_data;
122         tegra12_i2c_device3.dev.platform_data = &vcm30_t124_i2c3_platform_data;
123         tegra12_i2c_device4.dev.platform_data = &vcm30_t124_i2c4_platform_data;
124         tegra12_i2c_device5.dev.platform_data = &vcm30_t124_i2c5_platform_data;
125
126         platform_device_register(&tegra12_i2c_device5);
127         platform_device_register(&tegra12_i2c_device4);
128         platform_device_register(&tegra12_i2c_device3);
129         platform_device_register(&tegra12_i2c_device2);
130         platform_device_register(&tegra12_i2c_device1);
131 }
132
133 /* Register debug UART in old fashion and use DT for all others */
134 #ifndef CONFIG_USE_OF
135 static struct platform_device *vcm30_t124_uart_devices[] __initdata = {
136         &tegra_uarta_device,
137         &tegra_uartb_device,
138         &tegra_uartd_device,
139 };
140
141 static struct tegra_serial_platform_data vcm30_t124_uarta_pdata = {
142         .dma_req_selector = 8,
143         .modem_interrupt = false,
144 };
145
146 static struct tegra_serial_platform_data vcm30_t124_uartb_pdata = {
147         .dma_req_selector = 9,
148         .modem_interrupt = false,
149 };
150
151 static struct tegra_serial_platform_data vcm30_t124_uartd_pdata = {
152         .dma_req_selector = 19,
153         .modem_interrupt = false,
154 };
155 #endif
156
157 static struct tegra_serial_platform_data vcm30_t124_uartc_pdata = {
158         .dma_req_selector = 10,
159         .modem_interrupt = false,
160 };
161
162 static void __init vcm30_t124_uart_init(void)
163 {
164         int debug_port_id;
165
166 #ifndef CONFIG_USE_OF
167         tegra_uarta_device.dev.platform_data = &vcm30_t124_uarta_pdata;
168         tegra_uartb_device.dev.platform_data = &vcm30_t124_uartb_pdata;
169         tegra_uartd_device.dev.platform_data = &vcm30_t124_uartd_pdata;
170         platform_add_devices(vcm30_t124_uart_devices,
171                         ARRAY_SIZE(vcm30_t124_uart_devices));
172 #endif
173         tegra_uartc_device.dev.platform_data = &vcm30_t124_uartc_pdata;
174         if (!is_tegra_debug_uartport_hs()) {
175                 debug_port_id = uart_console_debug_init(2);
176                 if (debug_port_id < 0)
177                         return;
178
179                 platform_device_register(uart_console_debug_device);
180         } else {
181                 tegra_uartc_device.dev.platform_data = &vcm30_t124_uartc_pdata;
182                 platform_device_register(&tegra_uartc_device);
183         }
184
185 }
186
187 static struct resource tegra_rtc_resources[] = {
188         [0] = {
189                 .start = TEGRA_RTC_BASE,
190                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
191                 .flags = IORESOURCE_MEM,
192         },
193         [1] = {
194                 .start = INT_RTC,
195                 .end = INT_RTC,
196                 .flags = IORESOURCE_IRQ,
197         },
198 };
199
200 static struct platform_device tegra_rtc_device = {
201         .name = "tegra_rtc",
202         .id   = -1,
203         .resource = tegra_rtc_resources,
204         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
205 };
206
207 static struct tegra_pci_platform_data vcm30_t124_pcie_platform_data = {
208         .port_status[0] = 1,
209         .port_status[1] = 1,
210         .use_dock_detect        = 1,
211         .gpio   = TEGRA_GPIO_PO1,
212         .gpio_x1_slot   = PMU_TCA6416_GPIO(12),
213 };
214
215 static void vcm30_t124_pcie_init(void)
216 {
217 /* FIXME: Check this for VCM30_T124 */
218 #if 0
219         struct board_info board_info;
220         /* root port 1(x1 slot) is supported only on of ERS-S board */
221         laguna_pcie_platform_data.port_status[1] = 0;
222
223         tegra_pci_device.dev.platform_data = &laguna_pcie_platform_data;
224         platform_device_register(&tegra_pci_device);
225 #endif
226 }
227
228 /* FIXME: Check which devices are needed from the below list */
229 static struct platform_device *vcm30_t124_devices[] __initdata = {
230         &tegra_pmu_device,
231         &tegra_rtc_device,
232         &tegra_udc_device,
233 #if defined(CONFIG_TEGRA_AVP)
234         &tegra_avp_device,
235 #endif
236 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
237         &tegra12_se_device,
238 #endif
239         &tegra_ahub_device,
240         &tegra_dam_device0,
241         &tegra_dam_device1,
242         &tegra_dam_device2,
243         &tegra_i2s_device1,
244         &tegra_i2s_device3,
245         &tegra_i2s_device4,
246         &tegra_spdif_device,
247         &spdif_dit_device,
248         &bluetooth_dit_device,
249         &tegra_hda_device,
250 };
251
252 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
253         .port_otg = true,
254         .has_hostpc = true,
255         .unaligned_dma_buf_supported = true,
256         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
257         .op_mode = TEGRA_USB_OPMODE_HOST,
258         .u_data.host = {
259                 .vbus_gpio = -1,
260                 .hot_plug = false,
261                 .remote_wakeup_supported = true,
262                 .power_off_on_suspend = true,
263         },
264         .u_cfg.utmi = {
265                 .hssync_start_delay = 0,
266                 .elastic_limit = 16,
267                 .idle_wait_delay = 17,
268                 .term_range_adj = 6,
269                 .xcvr_setup = 15,
270                 .xcvr_lsfslew = 2,
271                 .xcvr_lsrslew = 2,
272                 .xcvr_setup_offset = 0,
273                 .xcvr_use_fuses = 1,
274                 .vbus_oc_map = 0x4,
275         },
276 };
277
278 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
279         .port_otg = false,
280         .has_hostpc = true,
281         .unaligned_dma_buf_supported = true,
282         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
283         .op_mode = TEGRA_USB_OPMODE_HOST,
284         .u_data.host = {
285                 /* FIXME: Set this only for E1855. */
286                 .vbus_gpio = TEGRA_GPIO_PN5,
287                 .hot_plug = false,
288                 .remote_wakeup_supported = true,
289                 .power_off_on_suspend = true,
290         },
291         .u_cfg.utmi = {
292                 .hssync_start_delay = 0,
293                 .elastic_limit = 16,
294                 .idle_wait_delay = 17,
295                 .term_range_adj = 6,
296                 .xcvr_setup = 8,
297                 .xcvr_lsfslew = 2,
298                 .xcvr_lsrslew = 2,
299                 .xcvr_setup_offset = 0,
300                 .xcvr_use_fuses = 1,
301                 .vbus_oc_map = 0x5,
302         },
303 };
304
305 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
306         .port_otg = false,
307         .has_hostpc = true,
308         .unaligned_dma_buf_supported = true,
309         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
310         .op_mode = TEGRA_USB_OPMODE_HOST,
311         .u_data.host = {
312                 .vbus_gpio = -1,
313                 .hot_plug = false,
314                 .remote_wakeup_supported = true,
315                 .power_off_on_suspend = true,
316         },
317         .u_cfg.utmi = {
318         .hssync_start_delay = 0,
319                 .elastic_limit = 16,
320                 .idle_wait_delay = 17,
321                 .term_range_adj = 6,
322                 .xcvr_setup = 8,
323                 .xcvr_lsfslew = 2,
324                 .xcvr_lsrslew = 2,
325                 .xcvr_setup_offset = 0,
326                 .xcvr_use_fuses = 1,
327                 .vbus_oc_map = 0x5,
328         },
329 };
330
331 static struct tegra_usb_otg_data tegra_otg_pdata = {
332         .ehci_device = &tegra_ehci1_device,
333         .ehci_pdata = &tegra_ehci1_utmi_pdata,
334 };
335
336 static void vcm30_t124_usb_init(void)
337 {
338         int usb_port_owner_info = tegra_get_usb_port_owner_info();
339
340         if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB)) {
341                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
342                 platform_device_register(&tegra_ehci2_device);
343         }
344
345         if (!(usb_port_owner_info & UTMI3_PORT_OWNER_XUSB)) {
346                 tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
347                 platform_device_register(&tegra_ehci3_device);
348         }
349 }
350
351 #ifndef CONFIG_USE_OF
352 static struct platform_device *vcm30_t124_spi_devices[] __initdata = {
353         &tegra11_spi_device1,
354         &tegra11_spi_device4,
355 };
356
357 static struct tegra_spi_platform_data vcm30_t124_spi1_pdata = {
358         .dma_req_sel            = 15,
359         .spi_max_frequency      = 25000000,
360         .clock_always_on        = false,
361 };
362
363 static struct tegra_spi_platform_data vcm30_t124_spi4_pdata = {
364         .dma_req_sel            = 18,
365         .spi_max_frequency      = 25000000,
366         .clock_always_on        = false,
367 };
368
369 static void __init vcm30_t124_spi_init(void)
370 {
371         tegra11_spi_device1.dev.platform_data = &vcm30_t124_spi1_pdata;
372         tegra11_spi_device4.dev.platform_data = &vcm30_t124_spi4_pdata;
373         platform_add_devices(vcm30_t124_spi_devices,
374                         ARRAY_SIZE(vcm30_t124_spi_devices));
375 }
376 #else
377 static void __init vcm30_t124_spi_init(void)
378 {
379 }
380 #endif
381
382 #ifdef CONFIG_USE_OF
383 struct of_dev_auxdata vcm30_t124_auxdata_lookup[] __initdata = {
384         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTA_BASE,
385                                 "serial-tegra.0", NULL),
386         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTB_BASE,
387                                 "serial-tegra.1", NULL),
388         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTD_BASE,
389                                 "serial-tegra.3", NULL),
390         {}
391 };
392 #endif
393
394 static void __init tegra_vcm30_t124_early_init(void)
395 {
396         tegra_clk_init_from_table(vcm30_t124_clk_init_table);
397         tegra_clk_verify_parents();
398         tegra_soc_device_init("vcm30_t124");
399 }
400
401 static void __init tegra_vcm30_t124_late_init(void)
402 {
403         struct board_info board_info;
404         tegra_get_board_info(&board_info);
405         pr_info("board_info: id:sku:fab:major:minor = 0x%04x:0x%04x:0x%02x:0x%02x:0x%02x\n",
406                 board_info.board_id, board_info.sku,
407                 board_info.fab, board_info.major_revision,
408                 board_info.minor_revision);
409         platform_device_register(&tegra_pinmux_device);
410         vcm30_t124_pinmux_init();
411         vcm30_t124_usb_init();
412 /*      vcm30_t124_xusb_init(); */
413         vcm30_t124_i2c_init();
414         vcm30_t124_spi_init();
415         vcm30_t124_uart_init();
416         platform_add_devices(vcm30_t124_devices,
417                         ARRAY_SIZE(vcm30_t124_devices));
418         tegra_io_dpd_init();
419         /* vcm30_t124_sdhci_init(); */
420         vcm30_t124_regulator_init();
421         /* vcm30_t124_suspend_init(); */
422 #if 0
423         vcm30_t124_emc_init();
424         vcm30_t124_edp_init();
425 #endif
426         isomgr_init();
427         /* vcm30_t124_panel_init(); */
428         /* vcm30_t124_pmon_init(); */
429         vcm30_t124_pcie_init();
430 #ifdef CONFIG_TEGRA_WDT_RECOVERY
431         tegra_wdt_recovery_init();
432 #endif
433         /* FIXME: Required? */
434 #if 0
435         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
436
437         vcm30_t124_sensors_init();
438         vcm30_t124_soctherm_init();
439 #endif
440         tegra_register_fuse();
441 }
442
443 static void __init vcm30_t124_ramconsole_reserve(unsigned long size)
444 {
445         tegra_ram_console_debug_reserve(SZ_1M);
446 }
447
448 static void __init tegra_vcm30_t124_dt_init(void)
449 {
450         tegra_get_board_info(&board_info);
451         tegra_get_display_board_info(&display_board_info);
452
453         tegra_vcm30_t124_early_init();
454 #ifdef CONFIG_USE_OF
455         of_platform_populate(NULL,
456                 of_default_bus_match_table, vcm30_t124_auxdata_lookup,
457                 &platform_bus);
458 #endif
459
460         tegra_vcm30_t124_late_init();
461 }
462
463 static void __init tegra_vcm30_t124_reserve(void)
464 {
465 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
466         /* 1920*1200*4*2 = 18432000 bytes */
467         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
468 #else
469         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
470 #endif
471         vcm30_t124_ramconsole_reserve(SZ_1M);
472 }
473
474 static const char * const vcm30_t124_dt_board_compat[] = {
475         "nvidia,vcm30_t124",
476         NULL
477 };
478
479 DT_MACHINE_START(VCM30_T124, "vcm30_t124")
480         .atag_offset    = 0x100,
481         .smp            = smp_ops(tegra_smp_ops),
482         .map_io         = tegra_map_common_io,
483         .reserve        = tegra_vcm30_t124_reserve,
484         .init_early     = tegra12x_init_early,
485         .init_irq       = tegra_dt_init_irq,
486         .init_time      = tegra_init_timer,
487         .init_machine   = tegra_vcm30_t124_dt_init,
488         .restart        = tegra_assert_system_reset,
489         .dt_compat      = vcm30_t124_dt_board_compat,
490         .init_late      = tegra_init_late
491 MACHINE_END