ARM: tegra: vcm3.0: t124: support audio driver
[linux-3.10.git] / arch / arm / mach-tegra / board-vcm30_t124.c
1 /*
2  * arch/arm/mach-tegra/board-vcm30_t124.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18
19 #include <linux/platform_device.h>
20 #include <linux/i2c-tegra.h>
21 #include <linux/i2c.h>
22 #include <linux/platform_data/serial-tegra.h>
23 #include <linux/platform_data/tegra_usb.h>
24 #include <linux/platform_data/tegra_nor.h>
25 #include <linux/platform_data/tegra_ahci.h>
26 #include <linux/spi/spi-tegra.h>
27 #include <linux/of_platform.h>
28 #include <linux/kernel.h>
29 #include <linux/clocksource.h>
30
31 #include <mach/tegra_asoc_pdata.h>
32 #include <mach/pci.h>
33 #include <mach/io_dpd.h>
34 #include <asm/mach/arch.h>
35 #include <mach/isomgr.h>
36
37 #include "iomap.h"
38 #include "board.h"
39 #include "clock.h"
40 #include "board-vcm30_t124.h"
41 #include "devices.h"
42 #include "board-common.h"
43 #include "common.h"
44
45 #include <asm/mach-types.h>
46
47 static struct board_info board_info, display_board_info;
48
49 static __initdata struct tegra_clk_init_table vcm30_t124_clk_init_table[] = {
50         /* name         parent          rate            enabled (always on)*/
51         { "pll_m",      NULL,           0,              false},
52         { "hda",        "pll_p",        108000000,      false},
53         { "hda2codec_2x", "pll_p",      48000000,       false},
54         { "pwm",        "pll_p",        3187500,        false},
55         { "i2s0",       "pll_a_out0",   0,              false},
56         { "i2s1",       "pll_a_out0",   0,              false},
57         { "i2s3",       "pll_a_out0",   0,              false},
58         { "i2s4",       "pll_a_out0",   0,              false},
59         { "spdif_out",  "pll_a_out0",   0,              false},
60         { "d_audio",    "clk_m",        12000000,       false},
61         { "dam0",       "clk_m",        12000000,       false},
62         { "dam1",       "clk_m",        12000000,       false},
63         { "dam2",       "clk_m",        12000000,       false},
64         { "audio1",     "i2s1_sync",    0,              false},
65         { "audio3",     "i2s3_sync",    0,              false},
66         { "vi_sensor",  "pll_p",        150000000,      false},
67         { "vi_sensor2", "pll_p",        150000000,      false},
68         { "cilab",      "pll_p",        150000000,      false},
69         { "cilcd",      "pll_p",        150000000,      false},
70         { "cile",       "pll_p",        150000000,      false},
71         { "i2c1",       "pll_p",        3200000,        false},
72         { "i2c2",       "pll_p",        3200000,        false},
73         { "i2c3",       "pll_p",        3200000,        false},
74         { "i2c4",       "pll_p",        3200000,        false},
75         { "i2c5",       "pll_p",        3200000,        false},
76         { "sbc1",       "pll_p",        25000000,       false},
77         { "sbc2",       "pll_p",        25000000,       false},
78         { "sbc3",       "pll_p",        25000000,       false},
79         { "sbc4",       "pll_p",        25000000,       false},
80         { "sbc5",       "pll_p",        25000000,       false},
81         { "sbc6",       "pll_p",        25000000,       false},
82         { "uarta",      "pll_p",        408000000,      false},
83         { "uartb",      "pll_p",        408000000,      false},
84         { "uartc",      "pll_p",        408000000,      false},
85         { "uartd",      "pll_p",        408000000,      false},
86         { "nor",        "pll_p",        102000000,      true},
87         { NULL,         NULL,           0,              0},
88 };
89
90 static struct tegra_i2c_platform_data vcm30_t124_i2c1_platform_data = {
91         .bus_clk_rate   = 100000,
92         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
93         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
94 };
95
96 static struct tegra_i2c_platform_data vcm30_t124_i2c2_platform_data = {
97         .bus_clk_rate   = 100000,
98         .is_clkon_always = true,
99         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
100         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
101 };
102
103 static struct tegra_i2c_platform_data vcm30_t124_i2c3_platform_data = {
104         .bus_clk_rate   = 400000,
105         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
106         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
107 };
108
109 static struct tegra_i2c_platform_data vcm30_t124_i2c4_platform_data = {
110         .bus_clk_rate   = 10000,
111         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
112         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
113 };
114
115 static struct tegra_i2c_platform_data vcm30_t124_i2c5_platform_data = {
116         .bus_clk_rate   = 400000,
117         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
118         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
119 };
120
121 static struct tegra_nor_platform_data vcm30_t124_nor_data = {
122         .flash = {
123                 .map_name = "cfi_probe",
124                 .width = 2,
125         },
126         .chip_parms = {
127                 .MuxMode = NorMuxMode_ADNonMux,
128                 .ReadMode = NorReadMode_Page,
129                 .PageLength = NorPageLength_8Word,
130                 .ReadyActive = NorReadyActive_WithData,
131                 /* FIXME: Need to use characterized value */
132                 .timing_default = {
133                         .timing0 = 0x30300273,
134                         .timing1 = 0x00030302,
135                 },
136                 .timing_read = {
137                         .timing0 = 0x30300273,
138                         .timing1 = 0x00030302,
139                 },
140         },
141 };
142
143 static struct cs_info vcm30_t124_cs_info[] = {
144         {
145                 .cs = CS_0,
146                 .num_cs_gpio = 0,
147                 .virt = IO_ADDRESS(TEGRA_NOR_FLASH_BASE),
148                 .size = SZ_64M,
149                 .phys = TEGRA_NOR_FLASH_BASE,
150         },
151 };
152
153 static void vcm30_t124_nor_init(void)
154 {
155         tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
156
157         vcm30_t124_nor_data.info.cs = kzalloc(sizeof(struct cs_info) *
158                                         ARRAY_SIZE(vcm30_t124_cs_info),
159                                         GFP_KERNEL);
160         if (!vcm30_t124_nor_data.info.cs)
161                 BUG();
162
163         vcm30_t124_nor_data.info.num_chips = ARRAY_SIZE(vcm30_t124_cs_info);
164
165         memcpy(vcm30_t124_nor_data.info.cs, vcm30_t124_cs_info,
166                                 sizeof(struct cs_info) * ARRAY_SIZE(vcm30_t124_cs_info));
167
168         tegra_nor_device.dev.platform_data = &vcm30_t124_nor_data;
169         platform_device_register(&tegra_nor_device);
170 }
171
172 static struct i2c_board_info __initdata wm8731_board_info = {
173         I2C_BOARD_INFO("wm8731", 0x1a),
174 };
175
176 static struct i2c_board_info __initdata ad1937_board_info = {
177         I2C_BOARD_INFO("ad1937", 0x07),
178 };
179
180 static void vcm30_t124_i2c_init(void)
181 {
182         struct board_info board_info;
183         tegra_get_board_info(&board_info);
184         /* T124 does not use device tree as of now */
185         tegra12_i2c_device1.dev.platform_data = &vcm30_t124_i2c1_platform_data;
186         tegra12_i2c_device2.dev.platform_data = &vcm30_t124_i2c2_platform_data;
187         tegra12_i2c_device3.dev.platform_data = &vcm30_t124_i2c3_platform_data;
188         tegra12_i2c_device4.dev.platform_data = &vcm30_t124_i2c4_platform_data;
189         tegra12_i2c_device5.dev.platform_data = &vcm30_t124_i2c5_platform_data;
190
191         platform_device_register(&tegra12_i2c_device5);
192         platform_device_register(&tegra12_i2c_device4);
193         platform_device_register(&tegra12_i2c_device3);
194         platform_device_register(&tegra12_i2c_device2);
195         platform_device_register(&tegra12_i2c_device1);
196
197         i2c_register_board_info(0, &wm8731_board_info, 1);
198         i2c_register_board_info(0, &ad1937_board_info, 1);
199 }
200
201 /* Register debug UART in old fashion and use DT for all others */
202 #ifndef CONFIG_USE_OF
203 static struct platform_device *vcm30_t124_uart_devices[] __initdata = {
204         &tegra_uarta_device,
205         &tegra_uartb_device,
206         &tegra_uartd_device,
207 };
208
209 static struct tegra_serial_platform_data vcm30_t124_uarta_pdata = {
210         .dma_req_selector = 8,
211         .modem_interrupt = false,
212 };
213
214 static struct tegra_serial_platform_data vcm30_t124_uartb_pdata = {
215         .dma_req_selector = 9,
216         .modem_interrupt = false,
217 };
218
219 static struct tegra_serial_platform_data vcm30_t124_uartd_pdata = {
220         .dma_req_selector = 19,
221         .modem_interrupt = false,
222 };
223 #endif
224
225 static struct tegra_serial_platform_data vcm30_t124_uartc_pdata = {
226         .dma_req_selector = 10,
227         .modem_interrupt = false,
228 };
229
230 static void __init vcm30_t124_uart_init(void)
231 {
232         int debug_port_id;
233
234 #ifndef CONFIG_USE_OF
235         tegra_uarta_device.dev.platform_data = &vcm30_t124_uarta_pdata;
236         tegra_uartb_device.dev.platform_data = &vcm30_t124_uartb_pdata;
237         tegra_uartd_device.dev.platform_data = &vcm30_t124_uartd_pdata;
238         platform_add_devices(vcm30_t124_uart_devices,
239                         ARRAY_SIZE(vcm30_t124_uart_devices));
240 #endif
241         tegra_uartc_device.dev.platform_data = &vcm30_t124_uartc_pdata;
242         if (!is_tegra_debug_uartport_hs()) {
243                 debug_port_id = uart_console_debug_init(2);
244                 if (debug_port_id < 0)
245                         return;
246
247                 platform_device_register(uart_console_debug_device);
248         } else {
249                 tegra_uartc_device.dev.platform_data = &vcm30_t124_uartc_pdata;
250                 platform_device_register(&tegra_uartc_device);
251         }
252
253 }
254
255 static struct resource tegra_rtc_resources[] = {
256         [0] = {
257                 .start = TEGRA_RTC_BASE,
258                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
259                 .flags = IORESOURCE_MEM,
260         },
261         [1] = {
262                 .start = INT_RTC,
263                 .end = INT_RTC,
264                 .flags = IORESOURCE_IRQ,
265         },
266 };
267
268 static struct platform_device tegra_rtc_device = {
269         .name = "tegra_rtc",
270         .id   = -1,
271         .resource = tegra_rtc_resources,
272         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
273 };
274
275 static struct tegra_pci_platform_data vcm30_t124_pcie_platform_data = {
276         .port_status[0] = 1,
277         .port_status[1] = 1,
278         .use_dock_detect        = 1,
279         .gpio   = TEGRA_GPIO_PO1,
280         .gpio_x1_slot   = PMU_TCA6416_GPIO(12),
281 };
282
283 static void vcm30_t124_pcie_init(void)
284 {
285 /* FIXME: Check this for VCM30_T124 */
286 #if 0
287         struct board_info board_info;
288         /* root port 1(x1 slot) is supported only on of ERS-S board */
289         laguna_pcie_platform_data.port_status[1] = 0;
290
291         tegra_pci_device.dev.platform_data = &laguna_pcie_platform_data;
292         platform_device_register(&tegra_pci_device);
293 #endif
294 }
295
296 #ifdef CONFIG_SATA_AHCI_TEGRA
297 static struct tegra_ahci_platform_data ahci_plat_data = {
298         .gen2_rx_eq = 7,
299 };
300
301 static void vcm30_t124_sata_init(void)
302 {
303         tegra_sata_device.dev.platform_data = &ahci_plat_data;
304         platform_device_register(&tegra_sata_device);
305 }
306 #else
307 static void vcm30_t124_sata_init(void) { }
308 #endif
309
310 static struct platform_device tegra_snd_vcm30t124 = {
311         .name = "tegra-snd-vcm30t124",
312         .id = 0,
313 };
314
315 /* FIXME: Check which devices are needed from the below list */
316 static struct platform_device *vcm30_t124_devices[] __initdata = {
317         &tegra_pmu_device,
318         &tegra_rtc_device,
319         &tegra_udc_device,
320 #if defined(CONFIG_TEGRA_AVP)
321         &tegra_avp_device,
322 #endif
323 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
324         &tegra12_se_device,
325 #endif
326         &tegra_snd_vcm30t124,
327 };
328
329 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
330         .port_otg = false,
331         .has_hostpc = true,
332         .unaligned_dma_buf_supported = true,
333         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
334         .op_mode = TEGRA_USB_OPMODE_HOST,
335         .u_data.host = {
336                 .vbus_gpio = -1,
337                 .hot_plug = false,
338                 .remote_wakeup_supported = false,
339                 .power_off_on_suspend = true,
340                 .turn_off_vbus_on_lp0 = true,
341         },
342         .u_cfg.utmi = {
343                 .hssync_start_delay = 0,
344                 .elastic_limit = 16,
345                 .idle_wait_delay = 17,
346                 .term_range_adj = 6,
347                 .xcvr_setup = 15,
348                 .xcvr_lsfslew = 2,
349                 .xcvr_lsrslew = 2,
350                 .xcvr_setup_offset = 0,
351                 .xcvr_use_fuses = 1,
352                 .vbus_oc_map = 0x4,
353         },
354 };
355
356 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
357         .port_otg = false,
358         .has_hostpc = true,
359         .unaligned_dma_buf_supported = true,
360         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
361         .op_mode = TEGRA_USB_OPMODE_HOST,
362         .u_data.host = {
363                 /* FIXME: Set this only for E1855. */
364                 .vbus_gpio = TEGRA_GPIO_PN5,
365                 .hot_plug = false,
366                 .remote_wakeup_supported = false,
367                 .power_off_on_suspend = true,
368                 .turn_off_vbus_on_lp0 = true,
369         },
370         .u_cfg.utmi = {
371                 .hssync_start_delay = 0,
372                 .elastic_limit = 16,
373                 .idle_wait_delay = 17,
374                 .term_range_adj = 6,
375                 .xcvr_setup = 8,
376                 .xcvr_lsfslew = 2,
377                 .xcvr_lsrslew = 2,
378                 .xcvr_setup_offset = 0,
379                 .xcvr_use_fuses = 1,
380                 .vbus_oc_map = 0x5,
381         },
382 };
383
384 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
385         .port_otg = false,
386         .has_hostpc = true,
387         .unaligned_dma_buf_supported = true,
388         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
389         .op_mode = TEGRA_USB_OPMODE_HOST,
390         .u_data.host = {
391                 .vbus_gpio = -1,
392                 .hot_plug = false,
393                 .remote_wakeup_supported = false,
394                 .power_off_on_suspend = true,
395                 .turn_off_vbus_on_lp0 = true,
396         },
397         .u_cfg.utmi = {
398         .hssync_start_delay = 0,
399                 .elastic_limit = 16,
400                 .idle_wait_delay = 17,
401                 .term_range_adj = 6,
402                 .xcvr_setup = 8,
403                 .xcvr_lsfslew = 2,
404                 .xcvr_lsrslew = 2,
405                 .xcvr_setup_offset = 0,
406                 .xcvr_use_fuses = 1,
407                 .vbus_oc_map = 0x5,
408         },
409 };
410
411 static struct tegra_usb_otg_data tegra_otg_pdata = {
412         .ehci_device = &tegra_ehci1_device,
413         .ehci_pdata = &tegra_ehci1_utmi_pdata,
414 };
415
416 static void vcm30_t124_usb_init(void)
417 {
418         int usb_port_owner_info = tegra_get_usb_port_owner_info();
419
420         if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB)) {
421                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
422                 platform_device_register(&tegra_ehci2_device);
423         }
424
425         if (!(usb_port_owner_info & UTMI3_PORT_OWNER_XUSB)) {
426                 tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
427                 platform_device_register(&tegra_ehci3_device);
428         }
429 }
430
431 #ifndef CONFIG_USE_OF
432 static struct platform_device *vcm30_t124_spi_devices[] __initdata = {
433         &tegra11_spi_device1,
434         &tegra11_spi_device4,
435 };
436
437 static struct tegra_spi_platform_data vcm30_t124_spi1_pdata = {
438         .dma_req_sel            = 15,
439         .spi_max_frequency      = 25000000,
440         .clock_always_on        = false,
441 };
442
443 static struct tegra_spi_platform_data vcm30_t124_spi4_pdata = {
444         .dma_req_sel            = 18,
445         .spi_max_frequency      = 25000000,
446         .clock_always_on        = false,
447 };
448
449 static void __init vcm30_t124_spi_init(void)
450 {
451         tegra11_spi_device1.dev.platform_data = &vcm30_t124_spi1_pdata;
452         tegra11_spi_device4.dev.platform_data = &vcm30_t124_spi4_pdata;
453         platform_add_devices(vcm30_t124_spi_devices,
454                         ARRAY_SIZE(vcm30_t124_spi_devices));
455 }
456 #else
457 static void __init vcm30_t124_spi_init(void)
458 {
459 }
460 #endif
461
462 #ifdef CONFIG_USE_OF
463 struct of_dev_auxdata vcm30_t124_auxdata_lookup[] __initdata = {
464         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTA_BASE,
465                                 "serial-tegra.0", NULL),
466         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTB_BASE,
467                                 "serial-tegra.1", NULL),
468         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTD_BASE,
469                                 "serial-tegra.3", NULL),
470         OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
471                 NULL),
472         OF_DEV_AUXDATA("nvidia,tegra124-gk20a", 0x538F0000, "gk20a", NULL),
473         OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03", NULL),
474         OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
475                 NULL),
476         OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi", NULL),
477         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp", NULL),
478         OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
479         OF_DEV_AUXDATA("nvidia,tegra124-apbdma", 0x60020000, "tegra-apbdma",
480                                 NULL),
481         OF_DEV_AUXDATA("nvidia,tegra124-ahub", 0x70300000,
482                                 "tegra30-ahub-apbif", NULL),
483         {}
484 };
485 #endif
486
487 static void __init tegra_vcm30_t124_early_init(void)
488 {
489         tegra_clk_init_from_table(vcm30_t124_clk_init_table);
490         tegra_clk_verify_parents();
491         tegra_soc_device_init("vcm30_t124");
492 }
493
494 static void __init tegra_vcm30_t124_late_init(void)
495 {
496         struct board_info board_info;
497         tegra_get_board_info(&board_info);
498         pr_info("board_info: id:sku:fab:major:minor = 0x%04x:0x%04x:0x%02x:0x%02x:0x%02x\n",
499                 board_info.board_id, board_info.sku,
500                 board_info.fab, board_info.major_revision,
501                 board_info.minor_revision);
502         platform_device_register(&tegra_pinmux_device);
503         vcm30_t124_pinmux_init();
504         vcm30_t124_usb_init();
505 /*      vcm30_t124_xusb_init(); */
506         vcm30_t124_nor_init();
507         vcm30_t124_i2c_init();
508         vcm30_t124_spi_init();
509         vcm30_t124_uart_init();
510         vcm30_t124_pca953x_init();
511         platform_add_devices(vcm30_t124_devices,
512                         ARRAY_SIZE(vcm30_t124_devices));
513         tegra_io_dpd_init();
514         vcm30_t124_sdhci_init();
515         vcm30_t124_regulator_init();
516         vcm30_t124_suspend_init();
517 #if 0
518         vcm30_t124_emc_init();
519         vcm30_t124_edp_init();
520 #endif
521         isomgr_init();
522         /* vcm30_t124_panel_init(); */
523         /* vcm30_t124_pmon_init(); */
524         vcm30_t124_pcie_init();
525         vcm30_t124_sata_init();
526 #ifdef CONFIG_TEGRA_WDT_RECOVERY
527         tegra_wdt_recovery_init();
528 #endif
529         /* FIXME: Required? */
530 #if 0
531         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
532
533         vcm30_t124_sensors_init();
534         vcm30_t124_soctherm_init();
535 #endif
536         tegra_register_fuse();
537         vcm30_t124_panel_init();
538 }
539
540 static void __init vcm30_t124_ramconsole_reserve(unsigned long size)
541 {
542         tegra_ram_console_debug_reserve(SZ_1M);
543 }
544
545 static void __init tegra_vcm30_t124_dt_init(void)
546 {
547         tegra_get_board_info(&board_info);
548         tegra_get_display_board_info(&display_board_info);
549
550         tegra_vcm30_t124_early_init();
551 #ifdef CONFIG_USE_OF
552         of_platform_populate(NULL,
553                 of_default_bus_match_table, vcm30_t124_auxdata_lookup,
554                 &platform_bus);
555 #endif
556
557         tegra_vcm30_t124_late_init();
558 }
559
560 static void __init tegra_vcm30_t124_reserve(void)
561 {
562 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
563         /* 1920*1200*4*2 = 18432000 bytes */
564         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
565 #else
566         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
567 #endif
568         vcm30_t124_ramconsole_reserve(SZ_1M);
569 }
570
571 static const char * const vcm30_t124_dt_board_compat[] = {
572         "nvidia,vcm30_t124",
573         NULL
574 };
575
576 DT_MACHINE_START(VCM30_T124, "vcm30_t124")
577         .atag_offset    = 0x100,
578         .smp            = smp_ops(tegra_smp_ops),
579         .map_io         = tegra_map_common_io,
580         .reserve        = tegra_vcm30_t124_reserve,
581         .init_early     = tegra12x_init_early,
582         .init_irq       = tegra_dt_init_irq,
583         .init_time      = clocksource_of_init,
584         .init_machine   = tegra_vcm30_t124_dt_init,
585         .restart        = tegra_assert_system_reset,
586         .dt_compat      = vcm30_t124_dt_board_compat,
587         .init_late      = tegra_init_late
588 MACHINE_END