ARM: tegra: move i2c registration to DT for vcm30
[linux-3.10.git] / arch / arm / mach-tegra / board-vcm30_t124.c
1 /*
2  * arch/arm/mach-tegra/board-vcm30_t124.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18
19 #include <linux/platform_device.h>
20 #include <linux/i2c-tegra.h>
21 #include <linux/i2c.h>
22 #include <linux/platform_data/serial-tegra.h>
23 #include <linux/platform_data/tegra_usb.h>
24 #include <linux/platform_data/tegra_nor.h>
25 #include <linux/platform_data/tegra_ahci.h>
26 #include <linux/of_platform.h>
27 #include <linux/kernel.h>
28 #include <linux/clocksource.h>
29 #include <linux/irqchip.h>
30 #include <linux/pci-tegra.h>
31
32 #include <mach/tegra_asoc_pdata.h>
33 #include <mach/io_dpd.h>
34 #include <asm/mach/arch.h>
35 #include <mach/isomgr.h>
36
37 #include "iomap.h"
38 #include "board.h"
39 #include "clock.h"
40 #include "board-vcm30_t124.h"
41 #include "devices.h"
42 #include "board-common.h"
43 #include "common.h"
44
45 #include <asm/mach-types.h>
46 #include "tegra-of-dev-auxdata.h"
47
48 static struct board_info board_info, display_board_info;
49
50 /*
51  * Set clock values as per automotive POR
52  */
53 static __initdata struct tegra_clk_init_table vcm30_t124_clk_init_table[] = {
54         /* name                 parent          rate    enabled (always on)*/
55
56         { "pll_c",              NULL,           792000000,      true},
57
58         { "automotive.sclk",    NULL,           316800000,      true},
59         { "automotive.hclk",    NULL,           316800000,      true},
60         { "automotive.pclk",    NULL,           158400000,      true},
61
62         { "mselect",            "pll_p",        408000000,      true},
63         /* FIXME: Remove this once the issue with cap.vcore.mselect is fixed */
64         { "override.mselect",   NULL,           408000000,      true},
65
66         { "se.cbus",            NULL,           432000000,      false},
67         { "msenc.cbus",         NULL,           432000000,      false},
68         { "vde.cbus",           NULL,           432000000,      false},
69
70         { "vic03.cbus",         NULL,           660000000,      false},
71         { "tsec.cbus",          NULL,           660000000,      false},
72
73         { "vi.c4bus",           NULL,           600000000,      false},
74         { "isp.c4bus",          NULL,           600000000,      false},
75
76         { "pll_d_out0",         "pll_d",        474000000,      true},
77         { "disp2",              "pll_d_out0",   474000000,      false},
78         { "disp1",              "pll_d_out0",   474000000,      false},
79
80         { "pll_d2",             NULL,           297000000,      true},
81         { "hdmi",               "pll_d2",       297000000,      false},
82
83         { "pll_a_out0",         NULL,           24600000,       true},
84         { "i2s0",               "pll_a_out0",   24600000,       false},
85         { "i2s1",               "pll_a_out0",   24600000,       false},
86         { "i2s2",               "pll_a_out0",   24600000,       false},
87         { "i2s3",               "pll_a_out0",   24600000,       false},
88         { "i2s4",               "pll_a_out0",   24600000,       false},
89
90         { "dam0",               "pll_p",        19900000,       false},
91         { "dam1",               "pll_p",        19900000,       false},
92         { "dam2",               "pll_p",        19900000,       false},
93         { "adx",                "pll_p",        19900000,       false},
94         { "adx1",               "pll_p",        19900000,       false},
95         { "amx",                "pll_p",        19900000,       false},
96         { "amx1",               "pll_p",        19900000,       false},
97
98         { "spdif_out",          "pll_a_out0",   24600000,       false},
99         { "hda",                "pll_p",        48000000,       false},
100         { "cilab",              "pll_p",        10200000,       false},
101         { "cilcd",              "pll_p",        10200000,       false},
102         { "cile",               "pll_p",        10200000,       false},
103
104         { "nor",                "pll_p",        102000000,      false},
105
106         { "sbc1",               "pll_p",        25000000,       false},
107         { "sbc2",               "pll_p",        25000000,       false},
108         { "sbc3",               "pll_p",        25000000,       false},
109         { "sbc4",               "pll_p",        25000000,       false},
110         { "sbc5",               "pll_p",        25000000,       false},
111         { "sbc6",               "pll_p",        25000000,       false},
112
113         { "uarta",              "pll_p",        408000000,      false},
114         { "uartb",              "pll_p",        408000000,      false},
115         { "uartc",              "pll_p",        408000000,      false},
116         { "uartd",              "pll_p",        408000000,      false},
117
118         { NULL,                 NULL,           0,              0},
119 };
120
121 static struct tegra_nor_platform_data vcm30_t124_nor_data = {
122         .flash = {
123                 .map_name = "cfi_probe",
124                 .width = 2,
125         },
126         .chip_parms = {
127                 .MuxMode = NorMuxMode_ADNonMux,
128                 .ReadMode = NorReadMode_Page,
129                 .PageLength = NorPageLength_8Word,
130                 .ReadyActive = NorReadyActive_WithData,
131                 /* FIXME: Need to use characterized value */
132                 .timing_default = {
133                         .timing0 = 0x30300273,
134                         .timing1 = 0x00030302,
135                 },
136                 .timing_read = {
137                         .timing0 = 0x30300273,
138                         .timing1 = 0x00030302,
139                 },
140         },
141 };
142
143 static struct cs_info vcm30_t124_cs_info[] = {
144         {
145                 .cs = CS_0,
146                 .num_cs_gpio = 0,
147                 .virt = IO_ADDRESS(TEGRA_NOR_FLASH_BASE),
148                 .size = SZ_64M,
149                 .phys = TEGRA_NOR_FLASH_BASE,
150         },
151 };
152
153 static void vcm30_t124_nor_init(void)
154 {
155         tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
156
157         vcm30_t124_nor_data.info.cs = kzalloc(sizeof(struct cs_info) *
158                                         ARRAY_SIZE(vcm30_t124_cs_info),
159                                         GFP_KERNEL);
160         if (!vcm30_t124_nor_data.info.cs)
161                 BUG();
162
163         vcm30_t124_nor_data.info.num_chips = ARRAY_SIZE(vcm30_t124_cs_info);
164
165         memcpy(vcm30_t124_nor_data.info.cs, vcm30_t124_cs_info,
166                                 sizeof(struct cs_info) * ARRAY_SIZE(vcm30_t124_cs_info));
167
168         tegra_nor_device.dev.platform_data = &vcm30_t124_nor_data;
169         platform_device_register(&tegra_nor_device);
170 }
171
172 static struct i2c_board_info __initdata wm8731_board_info = {
173         I2C_BOARD_INFO("wm8731", 0x1a),
174 };
175
176 static struct i2c_board_info __initdata ad1937_board_info = {
177         I2C_BOARD_INFO("ad1937", 0x07),
178 };
179
180 static void vcm30_t124_i2c_init(void)
181 {
182         struct board_info board_info;
183
184         tegra_get_board_info(&board_info);
185         i2c_register_board_info(0, &wm8731_board_info, 1);
186         i2c_register_board_info(0, &ad1937_board_info, 1);
187 }
188
189 /* Register debug UART in old fashion and use DT for all others */
190 #ifndef CONFIG_USE_OF
191 static struct platform_device *vcm30_t124_uart_devices[] __initdata = {
192         &tegra_uarta_device,
193         &tegra_uartb_device,
194         &tegra_uartd_device,
195 };
196
197 static struct tegra_serial_platform_data vcm30_t124_uarta_pdata = {
198         .dma_req_selector = 8,
199         .modem_interrupt = false,
200 };
201
202 static struct tegra_serial_platform_data vcm30_t124_uartb_pdata = {
203         .dma_req_selector = 9,
204         .modem_interrupt = false,
205 };
206
207 static struct tegra_serial_platform_data vcm30_t124_uartd_pdata = {
208         .dma_req_selector = 19,
209         .modem_interrupt = false,
210 };
211 #endif
212
213 static struct tegra_serial_platform_data vcm30_t124_uartc_pdata = {
214         .dma_req_selector = 10,
215         .modem_interrupt = false,
216 };
217
218 static void __init vcm30_t124_uart_init(void)
219 {
220         int debug_port_id;
221
222 #ifndef CONFIG_USE_OF
223         tegra_uarta_device.dev.platform_data = &vcm30_t124_uarta_pdata;
224         tegra_uartb_device.dev.platform_data = &vcm30_t124_uartb_pdata;
225         tegra_uartd_device.dev.platform_data = &vcm30_t124_uartd_pdata;
226         platform_add_devices(vcm30_t124_uart_devices,
227                         ARRAY_SIZE(vcm30_t124_uart_devices));
228 #endif
229         tegra_uartc_device.dev.platform_data = &vcm30_t124_uartc_pdata;
230         if (!is_tegra_debug_uartport_hs()) {
231                 debug_port_id = uart_console_debug_init(2);
232                 if (debug_port_id < 0)
233                         return;
234
235                 platform_device_register(uart_console_debug_device);
236         } else {
237                 tegra_uartc_device.dev.platform_data = &vcm30_t124_uartc_pdata;
238                 platform_device_register(&tegra_uartc_device);
239         }
240
241 }
242
243 static struct resource tegra_rtc_resources[] = {
244         [0] = {
245                 .start = TEGRA_RTC_BASE,
246                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
247                 .flags = IORESOURCE_MEM,
248         },
249         [1] = {
250                 .start = INT_RTC,
251                 .end = INT_RTC,
252                 .flags = IORESOURCE_IRQ,
253         },
254 };
255
256 static struct platform_device tegra_rtc_device = {
257         .name = "tegra_rtc",
258         .id   = -1,
259         .resource = tegra_rtc_resources,
260         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
261 };
262
263 static struct tegra_pci_platform_data vcm30_t124_pcie_platform_data = {
264         .port_status[0] = 1,
265         .port_status[1] = 1,
266         .gpio_hot_plug  = TEGRA_GPIO_PO1,
267         .gpio_x1_slot   = PMU_TCA6416_GPIO(12),
268 };
269
270 static void vcm30_t124_pcie_init(void)
271 {
272 /* FIXME: Check this for VCM30_T124 */
273 #if 0
274         struct board_info board_info;
275         /* root port 1(x1 slot) is supported only on of ERS-S board */
276         laguna_pcie_platform_data.port_status[1] = 0;
277
278         tegra_pci_device.dev.platform_data = &laguna_pcie_platform_data;
279         platform_device_register(&tegra_pci_device);
280 #endif
281 }
282
283 #ifdef CONFIG_SATA_AHCI_TEGRA
284 static struct tegra_ahci_platform_data ahci_plat_data = {
285         .gen2_rx_eq = 7,
286 };
287
288 static void vcm30_t124_sata_init(void)
289 {
290         tegra_sata_device.dev.platform_data = &ahci_plat_data;
291         platform_device_register(&tegra_sata_device);
292 }
293 #else
294 static void vcm30_t124_sata_init(void) { }
295 #endif
296
297 static struct platform_device tegra_snd_vcm30t124 = {
298         .name = "tegra-snd-vcm30t124",
299         .id = 0,
300 };
301
302 /* FIXME: Check which devices are needed from the below list */
303 static struct platform_device *vcm30_t124_devices[] __initdata = {
304         &tegra_pmu_device,
305         &tegra_rtc_device,
306         &tegra_udc_device,
307 #if defined(CONFIG_TEGRA_AVP)
308         &tegra_avp_device,
309 #endif
310 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
311         &tegra12_se_device,
312 #endif
313         &tegra_snd_vcm30t124,
314 };
315
316 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
317         .port_otg = false,
318         .has_hostpc = true,
319         .unaligned_dma_buf_supported = true,
320         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
321         .op_mode = TEGRA_USB_OPMODE_HOST,
322         .u_data.host = {
323                 .vbus_gpio = -1,
324                 .hot_plug = false,
325                 .remote_wakeup_supported = false,
326                 .power_off_on_suspend = true,
327                 .turn_off_vbus_on_lp0 = true,
328         },
329         .u_cfg.utmi = {
330                 .hssync_start_delay = 0,
331                 .elastic_limit = 16,
332                 .idle_wait_delay = 17,
333                 .term_range_adj = 6,
334                 .xcvr_setup = 15,
335                 .xcvr_lsfslew = 2,
336                 .xcvr_lsrslew = 2,
337                 .xcvr_setup_offset = 0,
338                 .xcvr_use_fuses = 1,
339                 .vbus_oc_map = 0x4,
340         },
341 };
342
343 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
344         .port_otg = false,
345         .has_hostpc = true,
346         .unaligned_dma_buf_supported = true,
347         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
348         .op_mode = TEGRA_USB_OPMODE_HOST,
349         .u_data.host = {
350                 /* FIXME: Set this only for E1855. */
351                 .vbus_gpio = TEGRA_GPIO_PN5,
352                 .hot_plug = true,
353                 .remote_wakeup_supported = false,
354                 .power_off_on_suspend = true,
355                 .turn_off_vbus_on_lp0 = true,
356         },
357         .u_cfg.utmi = {
358                 .hssync_start_delay = 0,
359                 .elastic_limit = 16,
360                 .idle_wait_delay = 17,
361                 .term_range_adj = 6,
362                 .xcvr_setup = 8,
363                 .xcvr_lsfslew = 2,
364                 .xcvr_lsrslew = 2,
365                 .xcvr_setup_offset = 0,
366                 .xcvr_use_fuses = 1,
367                 .vbus_oc_map = 0x5,
368         },
369 };
370
371 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
372         .port_otg = false,
373         .has_hostpc = true,
374         .unaligned_dma_buf_supported = true,
375         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
376         .op_mode = TEGRA_USB_OPMODE_HOST,
377         .u_data.host = {
378                 .vbus_gpio = -1,
379                 .hot_plug = true,
380                 .remote_wakeup_supported = false,
381                 .power_off_on_suspend = true,
382                 .turn_off_vbus_on_lp0 = true,
383         },
384         .u_cfg.utmi = {
385         .hssync_start_delay = 0,
386                 .elastic_limit = 16,
387                 .idle_wait_delay = 17,
388                 .term_range_adj = 6,
389                 .xcvr_setup = 8,
390                 .xcvr_lsfslew = 2,
391                 .xcvr_lsrslew = 2,
392                 .xcvr_setup_offset = 0,
393                 .xcvr_use_fuses = 1,
394                 .vbus_oc_map = 0x5,
395         },
396 };
397
398 static struct tegra_usb_otg_data tegra_otg_pdata = {
399         .ehci_device = &tegra_ehci1_device,
400         .ehci_pdata = &tegra_ehci1_utmi_pdata,
401 };
402
403 static void vcm30_t124_usb_init(void)
404 {
405         int usb_port_owner_info = tegra_get_usb_port_owner_info();
406
407         if (!(usb_port_owner_info & UTMI2_PORT_OWNER_XUSB)) {
408                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
409                 platform_device_register(&tegra_ehci2_device);
410         }
411
412         if (!(usb_port_owner_info & UTMI3_PORT_OWNER_XUSB)) {
413                 tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
414                 platform_device_register(&tegra_ehci3_device);
415         }
416 }
417
418 #ifdef CONFIG_USE_OF
419 struct of_dev_auxdata vcm30_t124_auxdata_lookup[] __initdata = {
420         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTA_BASE,
421                                 "serial-tegra.0", NULL),
422         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTB_BASE,
423                                 "serial-tegra.1", NULL),
424         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", TEGRA_UARTD_BASE,
425                                 "serial-tegra.3", NULL),
426         OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
427                 NULL),
428         OF_DEV_AUXDATA("nvidia,tegra124-gk20a", TEGRA_GK20A_BAR0_BASE, "gk20a.0", NULL),
429         OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03.0", NULL),
430         OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
431                 NULL),
432         OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi.0", NULL),
433         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp.0", NULL),
434         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISPB_BASE, "isp.1", NULL),
435         OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
436         OF_DEV_AUXDATA("nvidia,tegra124-apbdma", 0x60020000, "tegra-apbdma",
437                                 NULL),
438         OF_DEV_AUXDATA("nvidia,tegra124-ahub", 0x70300000,
439                                 "tegra30-ahub-apbif", NULL),
440         T124_I2C_OF_DEV_AUXDATA,
441         T124_SPI_OF_DEV_AUXDATA,
442
443         {}
444 };
445 #endif
446
447 static void __init tegra_vcm30_t124_early_init(void)
448 {
449         tegra_clk_init_from_table(vcm30_t124_clk_init_table);
450         tegra_clk_verify_parents();
451         tegra_soc_device_init("vcm30t124");
452 }
453
454 static void __init tegra_vcm30_t124_late_init(void)
455 {
456         struct board_info board_info;
457         tegra_get_board_info(&board_info);
458         pr_info("board_info: id:sku:fab:major:minor = 0x%04x:0x%04x:0x%02x:0x%02x:0x%02x\n",
459                 board_info.board_id, board_info.sku,
460                 board_info.fab, board_info.major_revision,
461                 board_info.minor_revision);
462         platform_device_register(&tegra124_pinctrl_device);
463         vcm30_t124_pinmux_init();
464         vcm30_t124_usb_init();
465 /*      vcm30_t124_xusb_init(); */
466         vcm30_t124_nor_init();
467         vcm30_t124_i2c_init();
468         vcm30_t124_uart_init();
469         vcm30_t124_pca953x_init();
470         platform_add_devices(vcm30_t124_devices,
471                         ARRAY_SIZE(vcm30_t124_devices));
472         tegra_io_dpd_init();
473         vcm30_t124_sdhci_init();
474         vcm30_t124_regulator_init();
475         vcm30_t124_suspend_init();
476 #if 0
477         vcm30_t124_emc_init();
478         vcm30_t124_edp_init();
479 #endif
480         isomgr_init();
481         /* vcm30_t124_panel_init(); */
482         /* vcm30_t124_pmon_init(); */
483         vcm30_t124_pcie_init();
484         vcm30_t124_sata_init();
485 #ifdef CONFIG_TEGRA_WDT_RECOVERY
486         tegra_wdt_recovery_init();
487 #endif
488         /* FIXME: Required? */
489 #if 0
490         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
491
492         vcm30_t124_sensors_init();
493         vcm30_t124_soctherm_init();
494 #endif
495         tegra_register_fuse();
496         vcm30_t124_panel_init();
497 }
498
499 static void __init vcm30_t124_ramconsole_reserve(unsigned long size)
500 {
501         tegra_ram_console_debug_reserve(SZ_1M);
502 }
503
504 static void __init tegra_vcm30_t124_dt_init(void)
505 {
506         tegra_get_board_info(&board_info);
507         tegra_get_display_board_info(&display_board_info);
508
509         tegra_vcm30_t124_early_init();
510 #ifdef CONFIG_USE_OF
511         of_platform_populate(NULL,
512                 of_default_bus_match_table, vcm30_t124_auxdata_lookup,
513                 &platform_bus);
514 #endif
515
516         tegra_vcm30_t124_late_init();
517 }
518
519 static void __init tegra_vcm30_t124_reserve(void)
520 {
521 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
522         /* 1920*1200*4*2 = 18432000 bytes */
523         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
524 #else
525         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
526 #endif
527         vcm30_t124_ramconsole_reserve(SZ_1M);
528 }
529
530 static const char * const vcm30_t124_dt_board_compat[] = {
531         "nvidia,vcm30t124",
532         NULL
533 };
534
535 DT_MACHINE_START(VCM30_T124, "vcm30t124")
536         .atag_offset    = 0x100,
537         .smp            = smp_ops(tegra_smp_ops),
538         .map_io         = tegra_map_common_io,
539         .reserve        = tegra_vcm30_t124_reserve,
540         .init_early     = tegra12x_init_early,
541         .init_irq       = irqchip_init,
542         .init_time      = clocksource_of_init,
543         .init_machine   = tegra_vcm30_t124_dt_init,
544         .restart        = tegra_assert_system_reset,
545         .dt_compat      = vcm30_t124_dt_board_compat,
546         .init_late      = tegra_init_late
547 MACHINE_END