ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
[linux-3.10.git] / arch / arm / mach-tegra / board-tn8-sysedp.c
1 /*
2  * Copyright (c) 2013-2014, NVIDIA Corporation. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License along
14  * with this program; if not, write to the Free Software Foundation, Inc.,
15  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
16  */
17
18 #include <linux/sysedp.h>
19 #include <linux/platform_device.h>
20 #include <linux/platform_data/tegra_edp.h>
21 #include <linux/power_supply.h>
22 #include <mach/edp.h>
23 #include "board.h"
24 #include "board-panel.h"
25 #include "common.h"
26
27 /* --- EDP consumers data --- */
28 static unsigned int ov5693_states[] = { 0, 300 };
29 static unsigned int mt9m114_states[] = { 0, 150 };
30 static unsigned int sdhci_states[] = { 0, 966 };
31 static unsigned int speaker_states[] = { 0, 1080 };
32 static unsigned int wifi_states[] = { 0, 1020 };
33 static unsigned int modem_states[] = { 0, 4100 };
34 static unsigned int pwm_backlight_states[] = {
35         0, 125, 250, 375, 500, 625, 750, 875, 1000, 1125, 1250
36 };
37
38 /* (optional) 10" panel */
39 static unsigned int pwm_backlight_10_states[] = {
40         0, 425, 851, 1276, 1702, 2127, 2553, 2978, 3404, 3829, 4255
41 };
42 static unsigned int as364x_states[] = {
43         0, 350, 700, 1050, 1400, 1750, 2100, 2450, 2800, 3150, 3500
44 };
45
46 static struct sysedp_consumer_data tn8_sysedp_consumer_data[] = {
47         SYSEDP_CONSUMER_DATA("ov5693", ov5693_states),
48         SYSEDP_CONSUMER_DATA("mt9m114", mt9m114_states),
49         SYSEDP_CONSUMER_DATA("speaker", speaker_states),
50         SYSEDP_CONSUMER_DATA("wifi", wifi_states),
51         SYSEDP_CONSUMER_DATA("pwm-backlight", pwm_backlight_states),
52         SYSEDP_CONSUMER_DATA("sdhci-tegra.2", sdhci_states),
53         SYSEDP_CONSUMER_DATA("sdhci-tegra.3", sdhci_states),
54         SYSEDP_CONSUMER_DATA("as364x", as364x_states),
55         SYSEDP_CONSUMER_DATA("modem", modem_states),
56 };
57
58 static struct sysedp_platform_data tn8_sysedp_platform_data = {
59         .consumer_data = tn8_sysedp_consumer_data,
60         .consumer_data_size = ARRAY_SIZE(tn8_sysedp_consumer_data),
61         .margin = 0,
62 };
63
64 static struct platform_device tn8_sysedp_device = {
65         .name = "sysedp",
66         .id = -1,
67         .dev = { .platform_data = &tn8_sysedp_platform_data }
68 };
69
70 void __init tn8_new_sysedp_init(void)
71 {
72         int r;
73         struct board_info board;
74
75         tegra_get_display_board_info(&board);
76
77         /* Some TN8 boards use non-default display */
78         if (board.board_id != BOARD_E1549)
79                 memcpy(pwm_backlight_states, pwm_backlight_10_states,
80                        sizeof(pwm_backlight_states));
81
82         r = platform_device_register(&tn8_sysedp_device);
83         WARN_ON(r);
84 }
85
86 static struct tegra_sysedp_platform_data tn8_sysedp_dynamic_capping_platdata = {
87         .corecap = td575d_sysedp_corecap,
88         .corecap_size = td575d_sysedp_corecap_sz,
89         .core_gain = 100,
90         .init_req_watts = 20000,
91 };
92
93 static struct platform_device tn8_sysedp_dynamic_capping = {
94         .name = "sysedp_dynamic_capping",
95         .id = -1,
96         .dev = { .platform_data = &tn8_sysedp_dynamic_capping_platdata }
97 };
98
99 void __init tn8_sysedp_dynamic_capping_init(void)
100 {
101         int r;
102         int sku_id;
103
104         tn8_sysedp_dynamic_capping_platdata.cpufreq_lim = tegra_get_system_edp_entries(
105                 &tn8_sysedp_dynamic_capping_platdata.cpufreq_lim_size);
106         if (!tn8_sysedp_dynamic_capping_platdata.cpufreq_lim) {
107                 WARN_ON(1);
108                 return;
109         }
110
111         sku_id = tegra_get_sku_id();
112         switch (sku_id) {
113         case 0x1F:
114                 break;
115         default:
116                 pr_warn("%s: Unknown tn8 sku id, %x!  Assuming td570d.\n",
117                                 __func__, sku_id);
118         case 0xF:
119                 tn8_sysedp_dynamic_capping_platdata.corecap = td570d_sysedp_corecap;
120                 tn8_sysedp_dynamic_capping_platdata.corecap_size = td570d_sysedp_corecap_sz;
121                 break;
122         }
123
124         r = platform_device_register(&tn8_sysedp_dynamic_capping);
125         WARN_ON(r);
126 }