2 * arch/arm/mach-tegra/board-roth.h
4 * Copyright (c) 2012 - 2013, NVIDIA Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
20 #ifndef _MACH_TEGRA_BOARD_ROTH_H
21 #define _MACH_TEGRA_BOARD_ROTH_H
23 #include <mach/irqs.h>
24 #include <linux/mfd/max77663-core.h>
25 #include "gpio-names.h"
27 #define PMC_WAKE_STATUS 0x14
28 #define PMC_WAKE2_STATUS 0x168
30 /* External peripheral act as gpio */
32 #define MAX77663_GPIO_BASE TEGRA_NR_GPIOS
33 #define PALMAS_TEGRA_GPIO_BASE TEGRA_NR_GPIOS
34 #define MAX77663_GPIO_END (MAX77663_GPIO_BASE + MAX77663_GPIO_NR)
36 /* Hall Effect Sensor GPIO */
37 #define TEGRA_GPIO_HALL TEGRA_GPIO_PS0
39 /* Audio-related GPIOs */
40 #define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PW3
41 #define TEGRA_GPIO_LDO1_EN TEGRA_GPIO_PV3
42 #define TEGRA_GPIO_CODEC1_EN TEGRA_GPIO_PP3
43 #define TEGRA_GPIO_CODEC2_EN TEGRA_GPIO_PP1
44 #define TEGRA_GPIO_CODEC3_EN TEGRA_GPIO_PV0
46 #define TEGRA_GPIO_SPKR_EN -1
47 #define TEGRA_GPIO_HP_DET TEGRA_GPIO_PR7
48 #define TEGRA_GPIO_INT_MIC_EN -1
49 #define TEGRA_GPIO_EXT_MIC_EN -1
51 #define TEGRA_GPIO_W_DISABLE TEGRA_GPIO_PDD7
52 #define TEGRA_GPIO_MODEM_RSVD1 TEGRA_GPIO_PV0
53 #define TEGRA_GPIO_MODEM_RSVD2 TEGRA_GPIO_PH7
55 /* External peripheral act as interrupt controller */
57 #define PALMAS_TEGRA_IRQ_BASE TEGRA_NR_IRQS
58 #define MAX77663_IRQ_BASE TEGRA_NR_IRQS
59 #define MAX77663_IRQ_END (MAX77663_IRQ_BASE + MAX77663_IRQ_NR)
60 #define MAX77663_IRQ_ACOK_RISING MAX77663_IRQ_ONOFF_ACOK_RISING
62 /* I2C related GPIOs */
63 #define TEGRA_GPIO_I2C1_SCL TEGRA_GPIO_PC4
64 #define TEGRA_GPIO_I2C1_SDA TEGRA_GPIO_PC5
65 #define TEGRA_GPIO_I2C2_SCL TEGRA_GPIO_PT5
66 #define TEGRA_GPIO_I2C2_SDA TEGRA_GPIO_PT6
67 #define TEGRA_GPIO_I2C3_SCL TEGRA_GPIO_PBB1
68 #define TEGRA_GPIO_I2C3_SDA TEGRA_GPIO_PBB2
69 #define TEGRA_GPIO_I2C4_SCL TEGRA_GPIO_PV4
70 #define TEGRA_GPIO_I2C4_SDA TEGRA_GPIO_PV5
71 #define TEGRA_GPIO_I2C5_SCL TEGRA_GPIO_PZ6
72 #define TEGRA_GPIO_I2C5_SDA TEGRA_GPIO_PZ7
74 /* Touchscreen definitions */
75 #define TOUCH_GPIO_IRQ_RAYDIUM_SPI TEGRA_GPIO_PK2
76 #define TOUCH_GPIO_RST_RAYDIUM_SPI TEGRA_GPIO_PK4
78 #define TOUCH_GPIO_CLK TEGRA_GPIO_PW5
79 #define TOUCH_GPIO_CLK_PG TEGRA_PINGROUP_CLK2_OUT
88 /* Invensense MPU Definitions */
89 #define MPU_GYRO_NAME "mpu6050"
90 #define MPU_GYRO_IRQ_GPIO TEGRA_GPIO_PR3
91 #define MPU_GYRO_ADDR 0x68
92 #define MPU_GYRO_BUS_NUM 0
93 #define MPU_GYRO_ORIENTATION { 0, 1, 0, -1, 0, 0, 0, 0, 1 }
94 #define MPU_ACCEL_NAME "kxtf9"
95 #define MPU_ACCEL_IRQ_GPIO 0 /* DISABLE ACCELIRQ: TEGRA_GPIO_PJ2 */
96 #define MPU_ACCEL_ADDR 0x0F
97 #define MPU_ACCEL_BUS_NUM 0
98 #define MPU_ACCEL_ORIENTATION { 0, 1, 0, -1, 0, 0, 0, 0, 1 }
99 #define MPU_COMPASS_NAME "ak8975"
100 #define MPU_COMPASS_IRQ_GPIO 0
101 #define MPU_COMPASS_ADDR 0x0D
102 #define MPU_COMPASS_BUS_NUM 0
103 #define MPU_COMPASS_ORIENTATION { 0, 1, 0, -1, 0, 0, 0, 0, 1 }
110 int roth_regulator_init(void);
111 int roth_suspend_init(void);
112 int roth_sdhci_init(void);
113 int roth_pinmux_init(void);
114 int roth_sensors_init(void);
115 int roth_emc_init(void);
116 int roth_edp_init(void);
117 int roth_panel_init(int board_id);
118 int roth_kbc_init(void);
119 int roth_pmon_init(void);
120 int roth_soctherm_init(void);
121 int roth_fan_init(void);
122 int roth_led_init(void);