ARM: tegra: Move platform detect from <mach/hardware.h> to <linux/tegra-soc.h>
[linux-3.10.git] / arch / arm / mach-tegra / board-roth.c
1 /*
2  * arch/arm/mach-tegra/board-roth.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/rm31080a_ts.h>
36 #include <linux/spi-tegra.h>
37 #include <linux/memblock.h>
38 #include <linux/rfkill-gpio.h>
39 #include <linux/skbuff.h>
40 #include <linux/ti_wilink_st.h>
41 #include <linux/regulator/consumer.h>
42 #include <linux/max17048_battery.h>
43 #include <linux/leds.h>
44 #include <linux/leds_pwm.h>
45 #include <linux/i2c/at24.h>
46 #include <linux/issp.h>
47 #include <linux/of_platform.h>
48 #include <linux/usb/tegra_usb_phy.h>
49 #include <linux/clk/tegra.h>
50
51 #include <asm/system_info.h>
52
53 #include <mach/irqs.h>
54 #include <mach/pinmux.h>
55 #include <mach/pinmux-t11.h>
56 #include <mach/io_dpd.h>
57 #include <mach/i2s.h>
58 #include <mach/isomgr.h>
59 #include <mach/tegra_asoc_pdata.h>
60 #include <asm/mach-types.h>
61 #include <asm/mach/arch.h>
62 #include <mach/gpio-tegra.h>
63 #include <mach/tegra_fiq_debugger.h>
64 #include <mach/edp.h>
65
66 #include "board.h"
67 #include "board-common.h"
68 #include "clock.h"
69 #include "board-roth.h"
70 #include "devices.h"
71 #include "gpio-names.h"
72 #include "fuse.h"
73 #include "iomap.h"
74 #include "pm.h"
75 #include "common.h"
76 #include "tegra-board-id.h"
77 #include "board-touch-raydium.h"
78
79 #ifdef CONFIG_BT_BLUESLEEP
80 static struct rfkill_gpio_platform_data roth_bt_rfkill_pdata = {
81                 .name           = "bt_rfkill",
82                 .shutdown_gpio  = TEGRA_GPIO_PQ7,
83                 .type           = RFKILL_TYPE_BLUETOOTH,
84 };
85
86 static struct platform_device roth_bt_rfkill_device = {
87         .name = "rfkill_gpio",
88         .id             = -1,
89         .dev = {
90                 .platform_data = &roth_bt_rfkill_pdata,
91         },
92 };
93
94 static struct resource roth_bluesleep_resources[] = {
95         [0] = {
96                 .name = "gpio_host_wake",
97                         .start  = TEGRA_GPIO_PU6,
98                         .end    = TEGRA_GPIO_PU6,
99                         .flags  = IORESOURCE_IO,
100         },
101         [1] = {
102                 .name = "gpio_ext_wake",
103                         .start  = TEGRA_GPIO_PEE1,
104                         .end    = TEGRA_GPIO_PEE1,
105                         .flags  = IORESOURCE_IO,
106         },
107         [2] = {
108                 .name = "host_wake",
109                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
110         },
111 };
112
113 static struct platform_device roth_bluesleep_device = {
114         .name           = "bluesleep",
115         .id             = -1,
116         .num_resources  = ARRAY_SIZE(roth_bluesleep_resources),
117         .resource       = roth_bluesleep_resources,
118 };
119
120 static noinline void __init roth_setup_bt_rfkill(void)
121 {
122                 roth_bt_rfkill_pdata.reset_gpio = TEGRA_GPIO_PQ6;
123         platform_device_register(&roth_bt_rfkill_device);
124 }
125
126 static noinline void __init roth_setup_bluesleep(void)
127 {
128         roth_bluesleep_resources[2].start =
129                 roth_bluesleep_resources[2].end =
130                         gpio_to_irq(TEGRA_GPIO_PU6);
131         platform_device_register(&roth_bluesleep_device);
132         return;
133 }
134 #elif defined CONFIG_BLUEDROID_PM
135 static struct resource roth_bluedroid_pm_resources[] = {
136         [0] = {
137                 .name   = "shutdown_gpio",
138                 .start  = TEGRA_GPIO_PQ7,
139                 .end    = TEGRA_GPIO_PQ7,
140                 .flags  = IORESOURCE_IO,
141         },
142         [1] = {
143                 .name = "host_wake",
144                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
145         },
146         [2] = {
147                 .name = "gpio_ext_wake",
148                 .start  = TEGRA_GPIO_PEE1,
149                 .end    = TEGRA_GPIO_PEE1,
150                 .flags  = IORESOURCE_IO,
151         },
152         [3] = {
153                 .name = "gpio_host_wake",
154                 .start  = TEGRA_GPIO_PU6,
155                 .end    = TEGRA_GPIO_PU6,
156                 .flags  = IORESOURCE_IO,
157         },
158 };
159
160 static struct platform_device roth_bluedroid_pm_device = {
161         .name = "bluedroid_pm",
162         .id             = 0,
163         .num_resources  = ARRAY_SIZE(roth_bluedroid_pm_resources),
164         .resource       = roth_bluedroid_pm_resources,
165 };
166
167 static noinline void __init roth_setup_bluedroid_pm(void)
168 {
169         roth_bluedroid_pm_resources[1].start =
170                 roth_bluedroid_pm_resources[1].end =
171                                 gpio_to_irq(TEGRA_GPIO_PU6);
172         platform_device_register(&roth_bluedroid_pm_device);
173 }
174 #endif
175 static __initdata struct tegra_clk_init_table roth_clk_init_table[] = {
176         /* name         parent          rate            enabled */
177         { "pll_m",      NULL,           0,              false},
178         { "hda",        "pll_p",        108000000,      false},
179         { "hda2codec_2x", "pll_p",      48000000,       false},
180         { "pwm",        "pll_p",        6000000,        false},
181         { "blink",      "clk_32k",      32768,          true},
182         { "i2s1",       "pll_a_out0",   0,              false},
183         { "i2s3",       "pll_a_out0",   0,              false},
184         { "i2s4",       "pll_a_out0",   0,              false},
185         { "spdif_out",  "pll_a_out0",   0,              false},
186         { "d_audio",    "clk_m",        12000000,       false},
187         { "dam0",       "clk_m",        12000000,       false},
188         { "dam1",       "clk_m",        12000000,       false},
189         { "dam2",       "clk_m",        12000000,       false},
190         { "audio1",     "i2s1_sync",    0,              false},
191         { "audio3",     "i2s3_sync",    0,              false},
192         /* Setting vi_sensor-clk to true for validation purpose, will imapact
193          * power, later set to be false.*/
194         { "vi_sensor",  "pll_p",        150000000,      false},
195         { "cilab",      "pll_p",        150000000,      false},
196         { "cilcd",      "pll_p",        150000000,      false},
197         { "cile",       "pll_p",        150000000,      false},
198         { "i2c1",       "pll_p",        3200000,        false},
199         { "i2c2",       "pll_p",        3200000,        false},
200         { "i2c3",       "pll_p",        3200000,        false},
201         { "i2c4",       "pll_p",        3200000,        false},
202         { "i2c5",       "pll_p",        3200000,        false},
203         { NULL,         NULL,           0,              0},
204 };
205
206 static struct tegra_i2c_platform_data roth_i2c1_platform_data = {
207         .bus_clk_rate   = 100000,
208         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
209         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
210 };
211
212 static struct tegra_i2c_platform_data roth_i2c2_platform_data = {
213         .bus_clk_rate   = 100000,
214         .is_clkon_always = true,
215         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
216         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
217 };
218
219 static struct tegra_i2c_platform_data roth_i2c3_platform_data = {
220         .bus_clk_rate   = 100000,
221         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
222         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
223 };
224
225 static struct tegra_i2c_platform_data roth_i2c4_platform_data = {
226         .bus_clk_rate   = 10000,
227         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
228         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
229 };
230
231 static struct tegra_i2c_platform_data roth_i2c5_platform_data = {
232         .bus_clk_rate   = 400000,
233         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
234         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
235         .needs_cl_dvfs_clock = true,
236 };
237
238 #if defined(CONFIG_ARCH_TEGRA_11x_SOC)
239 static struct i2c_board_info __initdata rt5640_board_info = {
240         I2C_BOARD_INFO("rt5640", 0x1c),
241 };
242
243 static struct i2c_board_info __initdata roth_codec_tfa9887R_info = {
244         I2C_BOARD_INFO("tfa9887R", 0x37),
245 };
246
247 static struct i2c_board_info __initdata roth_codec_tfa9887L_info = {
248         I2C_BOARD_INFO("tfa9887L", 0x34),
249 };
250 #endif
251
252 static void roth_i2c_init(void)
253 {
254         tegra11_i2c_device1.dev.platform_data = &roth_i2c1_platform_data;
255         tegra11_i2c_device2.dev.platform_data = &roth_i2c2_platform_data;
256         tegra11_i2c_device3.dev.platform_data = &roth_i2c3_platform_data;
257         tegra11_i2c_device4.dev.platform_data = &roth_i2c4_platform_data;
258         tegra11_i2c_device5.dev.platform_data = &roth_i2c5_platform_data;
259
260         platform_device_register(&tegra11_i2c_device5);
261         platform_device_register(&tegra11_i2c_device4);
262         platform_device_register(&tegra11_i2c_device3);
263         platform_device_register(&tegra11_i2c_device2);
264         platform_device_register(&tegra11_i2c_device1);
265
266         i2c_register_board_info(0, &rt5640_board_info, 1);
267         i2c_register_board_info(0, &roth_codec_tfa9887R_info, 1);
268         i2c_register_board_info(0, &roth_codec_tfa9887L_info, 1);
269 }
270
271 static struct platform_device *roth_uart_devices[] __initdata = {
272         &tegra_uarta_device,
273         &tegra_uartb_device,
274         &tegra_uartc_device,
275         &tegra_uartd_device,
276 };
277
278 static void __init uart_debug_init(void)
279 {
280         int debug_port_id;
281
282         debug_port_id = uart_console_debug_init(3);
283         if (debug_port_id < 0)
284                 return;
285
286         roth_uart_devices[debug_port_id] = uart_console_debug_device;
287 }
288
289 static void __init roth_uart_init(void)
290 {
291         /* Register low speed only if it is selected */
292         if (!is_tegra_debug_uartport_hs())
293                 uart_debug_init();
294
295         platform_add_devices(roth_uart_devices,
296                                 ARRAY_SIZE(roth_uart_devices));
297 }
298
299 static struct resource tegra_rtc_resources[] = {
300         [0] = {
301                 .start = TEGRA_RTC_BASE,
302                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
303                 .flags = IORESOURCE_MEM,
304         },
305         [1] = {
306                 .start = INT_RTC,
307                 .end = INT_RTC,
308                 .flags = IORESOURCE_IRQ,
309         },
310 };
311
312 static struct platform_device tegra_rtc_device = {
313         .name = "tegra_rtc",
314         .id   = -1,
315         .resource = tegra_rtc_resources,
316         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
317 };
318
319 static struct tegra_asoc_platform_data roth_audio_pdata = {
320         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
321         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
322         .gpio_hp_mute           = -1,
323         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
324         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
325         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
326         .gpio_codec1 = TEGRA_GPIO_CODEC1_EN,
327         .gpio_codec2 = TEGRA_GPIO_CODEC2_EN,
328         .gpio_codec3 = TEGRA_GPIO_CODEC3_EN,
329         .i2s_param[HIFI_CODEC]  = {
330                 .audio_port_id  = 1,
331                 .is_i2s_master  = 1,
332                 .i2s_mode       = TEGRA_DAIFMT_I2S,
333         },
334         .i2s_param[BT_SCO]      = {
335                 .audio_port_id  = 3,
336                 .is_i2s_master  = 1,
337                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
338         },
339 };
340
341 static struct platform_device roth_audio_device = {
342         .name   = "tegra-snd-rt5640",
343         .id     = 0,
344         .dev    = {
345                 .platform_data = &roth_audio_pdata,
346         },
347 };
348
349 static struct platform_device tegra_camera = {
350         .name = "tegra_camera",
351         .id = -1,
352 };
353
354
355 static struct issp_platform_data roth_issp_pdata_p2454 = {
356         .reset_gpio     = TEGRA_GPIO_PH4,
357         .data_gpio      = TEGRA_GPIO_PH6,
358         .clk_gpio       = TEGRA_GPIO_PH7,
359         .fw_name        = "p2454-uc.fw",
360         .si_id          = {0x00, 0xA2, 0x52, 0x21}, /* CY7C64345 */
361         .block_size     = 128,
362         .blocks         = 128,
363         .security_size  = 64,
364         .version_addr   = 0x0286,
365         .force_update   = 1,
366 };
367
368 static struct platform_device roth_issp_device_p2454 = {
369         .name   = "issp",
370         .dev    = {
371                 .platform_data = &roth_issp_pdata_p2454,
372         },
373 };
374
375 static struct issp_platform_data roth_issp_pdata_p2560 = {
376         .reset_gpio     = TEGRA_GPIO_PH4,
377         .data_gpio      = TEGRA_GPIO_PH6,
378         .clk_gpio       = TEGRA_GPIO_PH7,
379         .fw_name        = "p2560-uc.fw",
380         .si_id          = {0x00, 0xA2, 0x52, 0x21}, /* CY7C64345 */
381         .block_size     = 128,
382         .blocks         = 128,
383         .security_size  = 64,
384         .version_addr   = 0x0286,
385         .force_update   = 0,
386 };
387
388 static struct platform_device roth_issp_device_p2560 = {
389         .name   = "issp",
390         .dev    = {
391                 .platform_data = &roth_issp_pdata_p2560,
392         },
393 };
394
395 static void __init roth_issp_init(void)
396 {
397         if (system_rev == P2454)
398                 platform_device_register(&roth_issp_device_p2454);
399         else
400                 platform_device_register(&roth_issp_device_p2560);
401 }
402
403 static struct platform_device *roth_devices[] __initdata = {
404         &tegra_pmu_device,
405         &tegra_rtc_device,
406         &tegra_udc_device,
407 #if defined(CONFIG_TEGRA_AVP)
408         &tegra_avp_device,
409 #endif
410         &tegra_camera,
411 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
412         &tegra11_se_device,
413 #endif
414         &tegra_ahub_device,
415         &tegra_dam_device0,
416         &tegra_dam_device1,
417         &tegra_dam_device2,
418         &tegra_i2s_device1,
419         &tegra_i2s_device3,
420         &tegra_i2s_device4,
421         &tegra_spdif_device,
422         &spdif_dit_device,
423         &bluetooth_dit_device,
424         &roth_audio_device,
425         &tegra_hda_device,
426 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
427         &tegra_aes_device,
428 #endif
429 };
430
431 #ifdef CONFIG_USB_SUPPORT
432 static struct tegra_usb_platform_data tegra_udc_pdata = {
433         .port_otg = true,
434         .has_hostpc = true,
435         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
436         .op_mode = TEGRA_USB_OPMODE_DEVICE,
437         .u_data.dev = {
438                 .vbus_pmu_irq = 0,
439                 .vbus_gpio = -1,
440                 .charging_supported = false,
441                 .remote_wakeup_supported = false,
442         },
443         .u_cfg.utmi = {
444                 .hssync_start_delay = 0,
445                 .elastic_limit = 16,
446                 .idle_wait_delay = 17,
447                 .term_range_adj = 6,
448                 .xcvr_setup = 8,
449                 .xcvr_lsfslew = 2,
450                 .xcvr_lsrslew = 2,
451                 .xcvr_setup_offset = 0,
452                 .xcvr_use_fuses = 1,
453         },
454 };
455
456 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
457         .port_otg = true,
458         .has_hostpc = true,
459         .unaligned_dma_buf_supported = false,
460         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
461         .op_mode = TEGRA_USB_OPMODE_HOST,
462         .u_data.host = {
463                 .vbus_gpio = -1,
464                 .hot_plug = true,
465                 .remote_wakeup_supported = true,
466                 .power_off_on_suspend = false,
467         },
468         .u_cfg.utmi = {
469                 .hssync_start_delay = 0,
470                 .elastic_limit = 16,
471                 .idle_wait_delay = 17,
472                 .term_range_adj = 6,
473                 .xcvr_setup = 15,
474                 .xcvr_lsfslew = 2,
475                 .xcvr_lsrslew = 2,
476                 .xcvr_setup_offset = 0,
477                 .xcvr_use_fuses = 1,
478                 .vbus_oc_map = 0x4,
479         },
480 };
481
482 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
483         .port_otg = false,
484         .has_hostpc = true,
485         .unaligned_dma_buf_supported = false,
486         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
487         .op_mode = TEGRA_USB_OPMODE_HOST,
488         .u_data.host = {
489                 .vbus_gpio = -1,
490                 .hot_plug = true,
491                 .remote_wakeup_supported = true,
492                 .power_off_on_suspend = false,
493         },
494         .u_cfg.utmi = {
495         .hssync_start_delay = 0,
496                 .elastic_limit = 16,
497                 .idle_wait_delay = 17,
498                 .term_range_adj = 6,
499                 .xcvr_setup = 8,
500                 .xcvr_lsfslew = 2,
501                 .xcvr_lsrslew = 2,
502                 .xcvr_setup_offset = 0,
503                 .xcvr_use_fuses = 1,
504                 .vbus_oc_map = 0x5,
505         },
506 };
507
508 static struct tegra_usb_otg_data tegra_otg_pdata = {
509         .ehci_device = &tegra_ehci1_device,
510         .ehci_pdata = &tegra_ehci1_utmi_pdata,
511 };
512
513 static void roth_usb_init(void)
514 {
515         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
516         platform_device_register(&tegra_otg_device);
517
518         /* Setup the udc platform data */
519         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
520
521         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
522         platform_device_register(&tegra_ehci3_device);
523 }
524
525 #else
526 static void roth_usb_init(void) { }
527 #endif
528
529 static void roth_audio_init(void)
530 {
531         roth_audio_pdata.codec_name = "rt5640.0-001c";
532         roth_audio_pdata.codec_dai_name = "rt5640-aif1";
533 }
534
535
536 static struct platform_device *roth_spi_devices[] __initdata = {
537         &tegra11_spi_device4,
538 };
539
540 struct spi_clk_parent spi_parent_clk_roth[] = {
541         [0] = {.name = "pll_p"},
542 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
543         [1] = {.name = "pll_m"},
544         [2] = {.name = "clk_m"},
545 #else
546         [1] = {.name = "clk_m"},
547 #endif
548 };
549
550 static struct tegra_spi_platform_data roth_spi_pdata = {
551         .is_dma_based           = false,
552         .max_dma_buffer         = 16 * 1024,
553         .is_clkon_always        = false,
554         .max_rate               = 25000000,
555 };
556
557 static void __init roth_spi_init(void)
558 {
559         int i;
560         struct clk *c;
561
562         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_roth); ++i) {
563                 c = tegra_get_clock_by_name(spi_parent_clk_roth[i].name);
564                 if (IS_ERR_OR_NULL(c)) {
565                         pr_err("Not able to get the clock for %s\n",
566                                 spi_parent_clk_roth[i].name);
567                         continue;
568                 }
569                 spi_parent_clk_roth[i].parent_clk = c;
570                 spi_parent_clk_roth[i].fixed_clk_rate = clk_get_rate(c);
571         }
572         roth_spi_pdata.parent_clk_list = spi_parent_clk_roth;
573         roth_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_roth);
574         tegra11_spi_device4.dev.platform_data = &roth_spi_pdata;
575         platform_add_devices(roth_spi_devices,
576                 ARRAY_SIZE(roth_spi_devices));
577 }
578
579 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
580         /* name         parent          rate            enabled */
581         { "extern2",    "pll_p",        41000000,       false},
582         { "clk_out_2",  "extern2",      40800000,       false},
583         { NULL,         NULL,           0,              0},
584 };
585
586 struct rm_spi_ts_platform_data rm31080ts_roth_data = {
587         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
588         .config = 0,
589         .platform_id = RM_PLATFORM_R005,
590         .name_of_clock = "clk_out_2",
591         .name_of_clock_con = "extern2",
592 };
593
594 static struct tegra_spi_device_controller_data dev_cdata = {
595         .rx_clk_tap_delay = 0,
596         .tx_clk_tap_delay = 16,
597 };
598
599 struct spi_board_info rm31080a_roth_spi_board[1] = {
600         {
601          .modalias = "rm_ts_spidev",
602          .bus_num = 3,
603          .chip_select = 2,
604          .max_speed_hz = 12 * 1000 * 1000,
605          .mode = SPI_MODE_0,
606          .controller_data = &dev_cdata,
607          .platform_data = &rm31080ts_roth_data,
608          },
609 };
610
611 static int __init roth_touch_init(void)
612 {
613         struct board_info board_info;
614
615         tegra_get_board_info(&board_info);
616         int touch_panel_id = tegra_get_touch_panel_id();
617         if (touch_panel_id == PANEL_TPK ||
618                         touch_panel_id == PANEL_WINTEK) {
619                 int err;
620                 err = gpio_request(TOUCH_GPIO_CLK, "touch-gpio-clk");
621                 if (err < 0)
622                         pr_err("%s: gpio_request failed %d\n",
623                                 __func__, err);
624                 else {
625                         err = gpio_direction_output(TOUCH_GPIO_CLK, 0);
626                         if (err < 0)
627                                 pr_err("%s: set output failed %d\n",
628                                 __func__, err);
629                         gpio_free(TOUCH_GPIO_CLK);
630                 }
631                 tegra_pinmux_set_pullupdown(TOUCH_GPIO_CLK_PG,
632                                                 TEGRA_PUPD_NORMAL);
633                 tegra_pinmux_set_tristate(TOUCH_GPIO_CLK_PG,
634                                                 TEGRA_TRI_TRISTATE);
635                 rm31080ts_roth_data.name_of_clock = NULL;
636                 rm31080ts_roth_data.name_of_clock_con = NULL;
637         } else
638                 tegra_clk_init_from_table(touch_clk_init_table);
639         rm31080a_roth_spi_board[0].irq =
640                 gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
641         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
642                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
643                                 &rm31080ts_roth_data,
644                                 &rm31080a_roth_spi_board[0],
645                                 ARRAY_SIZE(rm31080a_roth_spi_board));
646         return 0;
647 }
648
649 static void __init tegra_roth_init(void)
650 {
651         tegra_clk_init_from_table(roth_clk_init_table);
652         tegra_clk_verify_parents();
653         tegra_soc_device_init("roth");
654         tegra_enable_pinmux();
655         roth_pinmux_init();
656         roth_i2c_init();
657         roth_spi_init();
658         roth_usb_init();
659         roth_uart_init();
660         roth_led_init();
661         roth_audio_init();
662         platform_add_devices(roth_devices, ARRAY_SIZE(roth_devices));
663         //tegra_ram_console_debug_init();
664         tegra_io_dpd_init();
665         roth_regulator_init();
666         roth_sdhci_init();
667         roth_suspend_init();
668         roth_emc_init();
669         roth_edp_init();
670         isomgr_init();
671         roth_touch_init();
672         /* roth will pass a null board id to panel_init */
673         roth_panel_init(0);
674         roth_kbc_init();
675         roth_pmon_init();
676 #ifdef CONFIG_BT_BLUESLEEP
677         roth_setup_bluesleep();
678         roth_setup_bt_rfkill();
679 #elif defined CONFIG_BLUEDROID_PM
680         roth_setup_bluedroid_pm();
681 #endif
682         tegra_release_bootloader_fb();
683 #ifdef CONFIG_TEGRA_WDT_RECOVERY
684         tegra_wdt_recovery_init();
685 #endif
686         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
687         roth_sensors_init();
688         roth_soctherm_init();
689         roth_fan_init();
690         tegra_register_fuse();
691         roth_issp_init();
692 }
693
694 static void __init roth_ramconsole_reserve(unsigned long size)
695 {
696         tegra_ram_console_debug_reserve(SZ_1M);
697 }
698
699 #ifdef CONFIG_USE_OF
700 struct of_dev_auxdata roth_auxdata_lookup[] __initdata = {
701         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
702                 NULL),
703         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d", NULL),
704         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d", NULL),
705         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
706                 NULL),
707         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi", NULL),
708         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp", NULL),
709         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
710         {}
711 };
712 #endif
713
714 static void __init tegra_roth_dt_init(void)
715 {
716 #ifdef CONFIG_USE_OF
717         of_platform_populate(NULL,
718                 of_default_bus_match_table, roth_auxdata_lookup,
719                 &platform_bus);
720 #endif
721
722         tegra_roth_init();
723 }
724
725 static void __init tegra_roth_reserve(void)
726 {
727 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
728         /* 1920*1200*4*2 = 18432000 bytes */
729         tegra_reserve(0, SZ_16M + SZ_2M, SZ_4M);
730 #else
731         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
732 #endif
733         roth_ramconsole_reserve(SZ_1M);
734 }
735
736 static const char * const roth_dt_board_compat[] = {
737         "nvidia,roth",
738         NULL
739 };
740
741 MACHINE_START(ROTH, "roth")
742         .atag_offset    = 0x100,
743         .smp            = smp_ops(tegra_smp_ops),
744         .map_io         = tegra_map_common_io,
745         .reserve        = tegra_roth_reserve,
746         .init_early     = tegra11x_init_early,
747         .init_irq       = tegra_dt_init_irq,
748         .init_time      = tegra_init_timer,
749         .init_machine   = tegra_roth_dt_init,
750         .restart        = tegra_assert_system_reset,
751         .dt_compat      = roth_dt_board_compat,
752 MACHINE_END