fixup board-roth.c move iomap.h
[linux-3.10.git] / arch / arm / mach-tegra / board-roth.c
1 /*
2  * arch/arm/mach-tegra/board-roth.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/tegra_uart.h>
35 #include <linux/memblock.h>
36 #include <linux/rfkill-gpio.h>
37 #include <linux/skbuff.h>
38 #include <linux/ti_wilink_st.h>
39 #include <linux/regulator/consumer.h>
40 #include <linux/max17048_battery.h>
41 #include <linux/leds.h>
42 #include <linux/leds_pwm.h>
43 #include <linux/i2c/at24.h>
44 #include <linux/of_platform.h>
45 #include <linux/usb/tegra_usb_phy.h>
46 #include <asm/hardware/gic.h>
47
48 #include <mach/clk.h>
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/pinmux-tegra30.h>
52 #include <mach/io_dpd.h>
53 #include <mach/i2s.h>
54 #include <mach/isomgr.h>
55 #include <mach/tegra_asoc_pdata.h>
56 #include <asm/mach-types.h>
57 #include <asm/mach/arch.h>
58 #include <mach/gpio-tegra.h>
59 #include <mach/tegra_fiq_debugger.h>
60 #include <mach/edp.h>
61
62 #include "board.h"
63 #include "board-common.h"
64 #include "clock.h"
65 #include "board-roth.h"
66 #include "devices.h"
67 #include "gpio-names.h"
68 #include "fuse.h"
69 #include "iomap.h"
70 #include "pm.h"
71 #include "common.h"
72 #include "tegra-board-id.h"
73
74 #ifdef CONFIG_BT_BLUESLEEP
75 static struct rfkill_gpio_platform_data roth_bt_rfkill_pdata = {
76                 .name           = "bt_rfkill",
77                 .shutdown_gpio  = TEGRA_GPIO_PQ7,
78                 .type           = RFKILL_TYPE_BLUETOOTH,
79 };
80
81 static struct platform_device roth_bt_rfkill_device = {
82         .name = "rfkill_gpio",
83         .id             = -1,
84         .dev = {
85                 .platform_data = &roth_bt_rfkill_pdata,
86         },
87 };
88
89 static struct resource roth_bluesleep_resources[] = {
90         [0] = {
91                 .name = "gpio_host_wake",
92                         .start  = TEGRA_GPIO_PU6,
93                         .end    = TEGRA_GPIO_PU6,
94                         .flags  = IORESOURCE_IO,
95         },
96         [1] = {
97                 .name = "gpio_ext_wake",
98                         .start  = TEGRA_GPIO_PEE1,
99                         .end    = TEGRA_GPIO_PEE1,
100                         .flags  = IORESOURCE_IO,
101         },
102         [2] = {
103                 .name = "host_wake",
104                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
105         },
106 };
107
108 static struct platform_device roth_bluesleep_device = {
109         .name           = "bluesleep",
110         .id             = -1,
111         .num_resources  = ARRAY_SIZE(roth_bluesleep_resources),
112         .resource       = roth_bluesleep_resources,
113 };
114
115 static noinline void __init roth_setup_bt_rfkill(void)
116 {
117                 roth_bt_rfkill_pdata.reset_gpio = TEGRA_GPIO_PQ6;
118         platform_device_register(&roth_bt_rfkill_device);
119 }
120
121 static noinline void __init roth_setup_bluesleep(void)
122 {
123         roth_bluesleep_resources[2].start =
124                 roth_bluesleep_resources[2].end =
125                         gpio_to_irq(TEGRA_GPIO_PU6);
126         platform_device_register(&roth_bluesleep_device);
127         return;
128 }
129 #elif defined CONFIG_BLUEDROID_PM
130 static struct resource roth_bluedroid_pm_resources[] = {
131         [0] = {
132                 .name   = "shutdown_gpio",
133                 .start  = TEGRA_GPIO_PQ7,
134                 .end    = TEGRA_GPIO_PQ7,
135                 .flags  = IORESOURCE_IO,
136         },
137         [1] = {
138                 .name = "host_wake",
139                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
140         },
141         [2] = {
142                 .name = "gpio_ext_wake",
143                 .start  = TEGRA_GPIO_PEE1,
144                 .end    = TEGRA_GPIO_PEE1,
145                 .flags  = IORESOURCE_IO,
146         },
147         [3] = {
148                 .name = "gpio_host_wake",
149                 .start  = TEGRA_GPIO_PU6,
150                 .end    = TEGRA_GPIO_PU6,
151                 .flags  = IORESOURCE_IO,
152         },
153 };
154
155 static struct platform_device roth_bluedroid_pm_device = {
156         .name = "bluedroid_pm",
157         .id             = 0,
158         .num_resources  = ARRAY_SIZE(roth_bluedroid_pm_resources),
159         .resource       = roth_bluedroid_pm_resources,
160 };
161
162 static noinline void __init roth_setup_bluedroid_pm(void)
163 {
164         roth_bluedroid_pm_resources[1].start =
165                 roth_bluedroid_pm_resources[1].end =
166                                 gpio_to_irq(TEGRA_GPIO_PU6);
167         platform_device_register(&roth_bluedroid_pm_device);
168 }
169 #endif
170 static __initdata struct tegra_clk_init_table roth_clk_init_table[] = {
171         /* name         parent          rate            enabled */
172         { "pll_m",      NULL,           0,              false},
173         { "hda",        "pll_p",        108000000,      false},
174         { "hda2codec_2x", "pll_p",      48000000,       false},
175         { "pwm",        "pll_p",        37000000,       false},
176         { "blink",      "clk_32k",      32768,          true},
177         { "i2s1",       "pll_a_out0",   0,              false},
178         { "i2s3",       "pll_a_out0",   0,              false},
179         { "i2s4",       "pll_a_out0",   0,              false},
180         { "spdif_out",  "pll_a_out0",   0,              false},
181         { "d_audio",    "clk_m",        12000000,       false},
182         { "dam0",       "clk_m",        12000000,       false},
183         { "dam1",       "clk_m",        12000000,       false},
184         { "dam2",       "clk_m",        12000000,       false},
185         { "audio1",     "i2s1_sync",    0,              false},
186         { "audio3",     "i2s3_sync",    0,              false},
187         /* Setting vi_sensor-clk to true for validation purpose, will imapact
188          * power, later set to be false.*/
189         { "vi_sensor",  "pll_p",        150000000,      false},
190         { "cilab",      "pll_p",        150000000,      false},
191         { "cilcd",      "pll_p",        150000000,      false},
192         { "cile",       "pll_p",        150000000,      false},
193         { "i2c1",       "pll_p",        3200000,        false},
194         { "i2c2",       "pll_p",        3200000,        false},
195         { "i2c3",       "pll_p",        3200000,        false},
196         { "i2c4",       "pll_p",        3200000,        false},
197         { "i2c5",       "pll_p",        3200000,        false},
198         { NULL,         NULL,           0,              0},
199 };
200
201 static struct tegra_i2c_platform_data roth_i2c1_platform_data = {
202         .bus_clk_rate   = 100000,
203         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
204         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
205 };
206
207 static struct tegra_i2c_platform_data roth_i2c2_platform_data = {
208         .bus_clk_rate   = 100000,
209         .is_clkon_always = true,
210         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
211         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
212 };
213
214 static struct tegra_i2c_platform_data roth_i2c3_platform_data = {
215         .bus_clk_rate   = 100000,
216         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
217         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
218 };
219
220 static struct tegra_i2c_platform_data roth_i2c4_platform_data = {
221         .bus_clk_rate   = 10000,
222         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
223         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
224 };
225
226 static struct tegra_i2c_platform_data roth_i2c5_platform_data = {
227         .bus_clk_rate   = 400000,
228         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
229         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
230 };
231
232 #if defined(CONFIG_ARCH_TEGRA_11x_SOC)
233 static struct i2c_board_info __initdata rt5640_board_info = {
234         I2C_BOARD_INFO("rt5640", 0x1c),
235 };
236
237 static struct i2c_board_info __initdata roth_codec_tfa9887R_info = {
238         I2C_BOARD_INFO("tfa9887R", 0x37),
239 };
240
241 static struct i2c_board_info __initdata roth_codec_tfa9887L_info = {
242         I2C_BOARD_INFO("tfa9887L", 0x34),
243 };
244
245 /* On A01, Left Speaker is moved to 0x34 */
246 static struct i2c_board_info __initdata roth_codec_tfa9887L_info_a01 = {
247         I2C_BOARD_INFO("tfa9887L", 0x34),
248 };
249 #endif
250
251 static void roth_i2c_init(void)
252 {
253         struct board_info board_info;
254
255         tegra_get_board_info(&board_info);
256
257         tegra11_i2c_device1.dev.platform_data = &roth_i2c1_platform_data;
258         tegra11_i2c_device2.dev.platform_data = &roth_i2c2_platform_data;
259         tegra11_i2c_device3.dev.platform_data = &roth_i2c3_platform_data;
260         tegra11_i2c_device4.dev.platform_data = &roth_i2c4_platform_data;
261         tegra11_i2c_device5.dev.platform_data = &roth_i2c5_platform_data;
262
263         platform_device_register(&tegra11_i2c_device5);
264         platform_device_register(&tegra11_i2c_device4);
265         platform_device_register(&tegra11_i2c_device3);
266         platform_device_register(&tegra11_i2c_device2);
267         platform_device_register(&tegra11_i2c_device1);
268
269         i2c_register_board_info(0, &rt5640_board_info, 1);
270         i2c_register_board_info(0, &roth_codec_tfa9887R_info, 1);
271
272         if (board_info.fab >= BOARD_FAB_A01)
273                 i2c_register_board_info(0, &roth_codec_tfa9887L_info_a01, 1);
274         else
275                 i2c_register_board_info(0, &roth_codec_tfa9887L_info, 1);
276 }
277
278 static struct platform_device *roth_uart_devices[] __initdata = {
279         &tegra_uarta_device,
280         &tegra_uartb_device,
281         &tegra_uartc_device,
282         &tegra_uartd_device,
283 };
284 static struct uart_clk_parent uart_parent_clk[] = {
285         [0] = {.name = "clk_m"},
286         [1] = {.name = "pll_p"},
287 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
288         [2] = {.name = "pll_m"},
289 #endif
290 };
291
292 static struct tegra_uart_platform_data roth_uart_pdata;
293 static struct tegra_uart_platform_data roth_loopback_uart_pdata;
294
295 static void __init uart_debug_init(void)
296 {
297         int debug_port_id;
298
299         debug_port_id = uart_console_debug_init(3);
300         if (debug_port_id < 0)
301                 return;
302
303         roth_uart_devices[debug_port_id] = uart_console_debug_device;
304 }
305
306 static void __init roth_uart_init(void)
307 {
308         struct clk *c;
309         int i;
310
311         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
312                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
313                 if (IS_ERR_OR_NULL(c)) {
314                         pr_err("Not able to get the clock for %s\n",
315                                                 uart_parent_clk[i].name);
316                         continue;
317                 }
318                 uart_parent_clk[i].parent_clk = c;
319                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
320         }
321         roth_uart_pdata.parent_clk_list = uart_parent_clk;
322         roth_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
323         roth_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
324         roth_loopback_uart_pdata.parent_clk_count =
325                                                 ARRAY_SIZE(uart_parent_clk);
326         roth_loopback_uart_pdata.is_loopback = true;
327         tegra_uarta_device.dev.platform_data = &roth_uart_pdata;
328         tegra_uartb_device.dev.platform_data = &roth_uart_pdata;
329         tegra_uartc_device.dev.platform_data = &roth_uart_pdata;
330         tegra_uartd_device.dev.platform_data = &roth_uart_pdata;
331
332         /* Register low speed only if it is selected */
333         if (!is_tegra_debug_uartport_hs())
334                 uart_debug_init();
335
336         platform_add_devices(roth_uart_devices,
337                                 ARRAY_SIZE(roth_uart_devices));
338 }
339
340 static struct resource tegra_rtc_resources[] = {
341         [0] = {
342                 .start = TEGRA_RTC_BASE,
343                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
344                 .flags = IORESOURCE_MEM,
345         },
346         [1] = {
347                 .start = INT_RTC,
348                 .end = INT_RTC,
349                 .flags = IORESOURCE_IRQ,
350         },
351 };
352
353 static struct platform_device tegra_rtc_device = {
354         .name = "tegra_rtc",
355         .id   = -1,
356         .resource = tegra_rtc_resources,
357         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
358 };
359
360 static struct tegra_asoc_platform_data roth_audio_pdata = {
361         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
362         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
363         .gpio_hp_mute           = -1,
364         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
365         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
366         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
367         .gpio_codec1 = TEGRA_GPIO_CODEC1_EN,
368         .gpio_codec2 = TEGRA_GPIO_CODEC2_EN,
369         .gpio_codec3 = TEGRA_GPIO_CODEC3_EN,
370         .i2s_param[HIFI_CODEC]  = {
371                 .audio_port_id  = 1,
372                 .is_i2s_master  = 1,
373                 .i2s_mode       = TEGRA_DAIFMT_I2S,
374         },
375         .i2s_param[BT_SCO]      = {
376                 .audio_port_id  = 3,
377                 .is_i2s_master  = 1,
378                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
379         },
380 };
381
382 static struct platform_device roth_audio_device = {
383         .name   = "tegra-snd-rt5640",
384         .id     = 0,
385         .dev    = {
386                 .platform_data = &roth_audio_pdata,
387         },
388 };
389
390 static struct platform_device tegra_camera = {
391         .name = "tegra_camera",
392         .id = -1,
393 };
394
395 static struct led_pwm roth_led_info[] = {
396         {
397                 .name                   = "roth-led",
398                 .default_trigger        = "none",
399                 .pwm_id                 = 2,
400                 .active_low             = 0,
401                 .max_brightness         = 255,
402                 .pwm_period_ns          = 10000000,
403         },
404 };
405
406 static struct led_pwm_platform_data roth_leds_pdata = {
407         .leds           = roth_led_info,
408         .num_leds       = ARRAY_SIZE(roth_led_info),
409 };
410
411 static struct platform_device roth_leds_pwm_device = {
412         .name   = "leds_pwm",
413         .id     = -1,
414         .dev    = {
415                 .platform_data = &roth_leds_pdata,
416         },
417 };
418
419
420 static struct platform_device *roth_devices[] __initdata = {
421         &tegra_pmu_device,
422         &tegra_rtc_device,
423         &tegra_udc_device,
424 #if defined(CONFIG_TEGRA_AVP)
425         &tegra_avp_device,
426 #endif
427         &tegra_camera,
428 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
429         &tegra11_se_device,
430 #endif
431         &tegra_ahub_device,
432         &tegra_dam_device0,
433         &tegra_dam_device1,
434         &tegra_dam_device2,
435         &tegra_i2s_device1,
436         &tegra_i2s_device3,
437         &tegra_i2s_device4,
438         &tegra_spdif_device,
439         &spdif_dit_device,
440         &bluetooth_dit_device,
441         &roth_audio_device,
442         &tegra_hda_device,
443 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
444         &tegra_aes_device,
445 #endif
446
447         &tegra_pwfm_device,
448         &roth_leds_pwm_device,
449 };
450
451 #ifdef CONFIG_USB_SUPPORT
452 static struct tegra_usb_platform_data tegra_udc_pdata = {
453         .port_otg = true,
454         .has_hostpc = true,
455         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
456         .op_mode = TEGRA_USB_OPMODE_DEVICE,
457         .u_data.dev = {
458                 .vbus_pmu_irq = 0,
459                 .vbus_gpio = -1,
460                 .charging_supported = false,
461                 .remote_wakeup_supported = false,
462         },
463         .u_cfg.utmi = {
464                 .hssync_start_delay = 0,
465                 .elastic_limit = 16,
466                 .idle_wait_delay = 17,
467                 .term_range_adj = 6,
468                 .xcvr_setup = 8,
469                 .xcvr_lsfslew = 2,
470                 .xcvr_lsrslew = 2,
471                 .xcvr_setup_offset = 0,
472                 .xcvr_use_fuses = 1,
473         },
474 };
475
476 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
477         .port_otg = true,
478         .has_hostpc = true,
479         .unaligned_dma_buf_supported = false,
480         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
481         .op_mode = TEGRA_USB_OPMODE_HOST,
482         .u_data.host = {
483                 .vbus_gpio = -1,
484                 .hot_plug = true,
485                 .remote_wakeup_supported = true,
486                 .power_off_on_suspend = false,
487         },
488         .u_cfg.utmi = {
489                 .hssync_start_delay = 0,
490                 .elastic_limit = 16,
491                 .idle_wait_delay = 17,
492                 .term_range_adj = 6,
493                 .xcvr_setup = 15,
494                 .xcvr_lsfslew = 2,
495                 .xcvr_lsrslew = 2,
496                 .xcvr_setup_offset = 0,
497                 .xcvr_use_fuses = 1,
498                 .vbus_oc_map = 0x4,
499         },
500 };
501
502 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
503         .port_otg = false,
504         .has_hostpc = true,
505         .unaligned_dma_buf_supported = false,
506         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
507         .op_mode = TEGRA_USB_OPMODE_HOST,
508         .u_data.host = {
509                 .vbus_gpio = -1,
510                 .hot_plug = true,
511                 .remote_wakeup_supported = true,
512                 .power_off_on_suspend = false,
513         },
514         .u_cfg.utmi = {
515         .hssync_start_delay = 0,
516                 .elastic_limit = 16,
517                 .idle_wait_delay = 17,
518                 .term_range_adj = 6,
519                 .xcvr_setup = 8,
520                 .xcvr_lsfslew = 2,
521                 .xcvr_lsrslew = 2,
522                 .xcvr_setup_offset = 0,
523                 .xcvr_use_fuses = 1,
524                 .vbus_oc_map = 0x5,
525         },
526 };
527
528 static struct tegra_usb_otg_data tegra_otg_pdata = {
529         .ehci_device = &tegra_ehci1_device,
530         .ehci_pdata = &tegra_ehci1_utmi_pdata,
531 };
532
533 static void roth_usb_init(void)
534 {
535         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
536         platform_device_register(&tegra_otg_device);
537
538         /* Setup the udc platform data */
539         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
540
541         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
542         platform_device_register(&tegra_ehci3_device);
543 }
544
545 #else
546 static void roth_usb_init(void) { }
547 #endif
548
549 static void roth_audio_init(void)
550 {
551         struct board_info board_info;
552
553         tegra_get_board_info(&board_info);
554
555         roth_audio_pdata.codec_name = "rt5640.0-001c";
556         roth_audio_pdata.codec_dai_name = "rt5640-aif1";
557 }
558
559
560 static void __init tegra_roth_init(void)
561 {
562         tegra_clk_init_from_table(roth_clk_init_table);
563         tegra_clk_vefify_parents();
564         tegra_smmu_init();
565         tegra_soc_device_init("roth");
566         tegra_enable_pinmux();
567         roth_pinmux_init();
568         roth_i2c_init();
569         roth_usb_init();
570         roth_uart_init();
571         roth_audio_init();
572         platform_add_devices(roth_devices, ARRAY_SIZE(roth_devices));
573         //tegra_ram_console_debug_init();
574         tegra_io_dpd_init();
575         roth_regulator_init();
576         roth_sdhci_init();
577         roth_suspend_init();
578         roth_emc_init();
579         roth_edp_init();
580         isomgr_init();
581         roth_panel_init();
582         roth_kbc_init();
583         roth_pmon_init();
584 #ifdef CONFIG_BT_BLUESLEEP
585         roth_setup_bluesleep();
586         roth_setup_bt_rfkill();
587 #elif defined CONFIG_BLUEDROID_PM
588         roth_setup_bluedroid_pm();
589 #endif
590         tegra_release_bootloader_fb();
591 #ifdef CONFIG_TEGRA_WDT_RECOVERY
592         tegra_wdt_recovery_init();
593 #endif
594         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
595         roth_sensors_init();
596         roth_soctherm_init();
597         roth_fan_init();
598         tegra_register_fuse();
599 }
600
601 static void __init roth_ramconsole_reserve(unsigned long size)
602 {
603         tegra_ram_console_debug_reserve(SZ_1M);
604 }
605
606 #ifdef CONFIG_USE_OF
607 struct of_dev_auxdata roth_auxdata_lookup[] __initdata = {
608         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
609                 NULL),
610         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d", NULL),
611         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d", NULL),
612         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
613                 NULL),
614         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi", NULL),
615         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp", NULL),
616         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
617         {}
618 };
619 #endif
620
621 static void __init tegra_roth_dt_init(void)
622 {
623 #ifdef CONFIG_USE_OF
624         of_platform_populate(NULL,
625                 of_default_bus_match_table, roth_auxdata_lookup,
626                 &platform_bus);
627 #endif
628
629         tegra_roth_init();
630 }
631
632 static void __init tegra_roth_reserve(void)
633 {
634 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
635         /* 1920*1200*4*2 = 18432000 bytes */
636         tegra_reserve(0, SZ_16M + SZ_2M, SZ_4M);
637 #else
638         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
639 #endif
640         roth_ramconsole_reserve(SZ_1M);
641 }
642
643 static const char * const roth_dt_board_compat[] = {
644         "nvidia,roth",
645         NULL
646 };
647
648 MACHINE_START(ROTH, "roth")
649         .atag_offset    = 0x100,
650         .smp            = smp_ops(tegra_smp_ops),
651         .map_io         = tegra_map_common_io,
652         .reserve        = tegra_roth_reserve,
653         .init_early     = tegra11x_init_early,
654         .init_irq       = tegra_dt_init_irq,
655         .handle_irq     = gic_handle_irq,
656         .timer          = &tegra_sys_timer,
657         .init_machine   = tegra_roth_dt_init,
658         .restart        = tegra_assert_system_reset,
659         .dt_compat      = roth_dt_board_compat,
660 MACHINE_END