ARM: tegra: Add cl_dvfs clock requirement for PWR_I2C
[linux-3.10.git] / arch / arm / mach-tegra / board-roth.c
1 /*
2  * arch/arm/mach-tegra/board-roth.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/rm31080a_ts.h>
36 #include <linux/spi-tegra.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/rfkill-gpio.h>
40 #include <linux/skbuff.h>
41 #include <linux/ti_wilink_st.h>
42 #include <linux/regulator/consumer.h>
43 #include <linux/max17048_battery.h>
44 #include <linux/leds.h>
45 #include <linux/leds_pwm.h>
46 #include <linux/i2c/at24.h>
47 #include <linux/of_platform.h>
48 #include <linux/usb/tegra_usb_phy.h>
49 #include <asm/hardware/gic.h>
50
51 #include <mach/clk.h>
52 #include <mach/irqs.h>
53 #include <mach/pinmux.h>
54 #include <mach/pinmux-tegra30.h>
55 #include <mach/io_dpd.h>
56 #include <mach/i2s.h>
57 #include <mach/isomgr.h>
58 #include <mach/tegra_asoc_pdata.h>
59 #include <asm/mach-types.h>
60 #include <asm/mach/arch.h>
61 #include <mach/gpio-tegra.h>
62 #include <mach/tegra_fiq_debugger.h>
63 #include <mach/edp.h>
64
65 #include "board.h"
66 #include "board-common.h"
67 #include "clock.h"
68 #include "board-roth.h"
69 #include "devices.h"
70 #include "gpio-names.h"
71 #include "fuse.h"
72 #include "iomap.h"
73 #include "pm.h"
74 #include "common.h"
75 #include "tegra-board-id.h"
76 #include "board-touch-raydium.h"
77
78 #ifdef CONFIG_BT_BLUESLEEP
79 static struct rfkill_gpio_platform_data roth_bt_rfkill_pdata = {
80                 .name           = "bt_rfkill",
81                 .shutdown_gpio  = TEGRA_GPIO_PQ7,
82                 .type           = RFKILL_TYPE_BLUETOOTH,
83 };
84
85 static struct platform_device roth_bt_rfkill_device = {
86         .name = "rfkill_gpio",
87         .id             = -1,
88         .dev = {
89                 .platform_data = &roth_bt_rfkill_pdata,
90         },
91 };
92
93 static struct resource roth_bluesleep_resources[] = {
94         [0] = {
95                 .name = "gpio_host_wake",
96                         .start  = TEGRA_GPIO_PU6,
97                         .end    = TEGRA_GPIO_PU6,
98                         .flags  = IORESOURCE_IO,
99         },
100         [1] = {
101                 .name = "gpio_ext_wake",
102                         .start  = TEGRA_GPIO_PEE1,
103                         .end    = TEGRA_GPIO_PEE1,
104                         .flags  = IORESOURCE_IO,
105         },
106         [2] = {
107                 .name = "host_wake",
108                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
109         },
110 };
111
112 static struct platform_device roth_bluesleep_device = {
113         .name           = "bluesleep",
114         .id             = -1,
115         .num_resources  = ARRAY_SIZE(roth_bluesleep_resources),
116         .resource       = roth_bluesleep_resources,
117 };
118
119 static noinline void __init roth_setup_bt_rfkill(void)
120 {
121                 roth_bt_rfkill_pdata.reset_gpio = TEGRA_GPIO_PQ6;
122         platform_device_register(&roth_bt_rfkill_device);
123 }
124
125 static noinline void __init roth_setup_bluesleep(void)
126 {
127         roth_bluesleep_resources[2].start =
128                 roth_bluesleep_resources[2].end =
129                         gpio_to_irq(TEGRA_GPIO_PU6);
130         platform_device_register(&roth_bluesleep_device);
131         return;
132 }
133 #elif defined CONFIG_BLUEDROID_PM
134 static struct resource roth_bluedroid_pm_resources[] = {
135         [0] = {
136                 .name   = "shutdown_gpio",
137                 .start  = TEGRA_GPIO_PQ7,
138                 .end    = TEGRA_GPIO_PQ7,
139                 .flags  = IORESOURCE_IO,
140         },
141         [1] = {
142                 .name = "host_wake",
143                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
144         },
145         [2] = {
146                 .name = "gpio_ext_wake",
147                 .start  = TEGRA_GPIO_PEE1,
148                 .end    = TEGRA_GPIO_PEE1,
149                 .flags  = IORESOURCE_IO,
150         },
151         [3] = {
152                 .name = "gpio_host_wake",
153                 .start  = TEGRA_GPIO_PU6,
154                 .end    = TEGRA_GPIO_PU6,
155                 .flags  = IORESOURCE_IO,
156         },
157 };
158
159 static struct platform_device roth_bluedroid_pm_device = {
160         .name = "bluedroid_pm",
161         .id             = 0,
162         .num_resources  = ARRAY_SIZE(roth_bluedroid_pm_resources),
163         .resource       = roth_bluedroid_pm_resources,
164 };
165
166 static noinline void __init roth_setup_bluedroid_pm(void)
167 {
168         roth_bluedroid_pm_resources[1].start =
169                 roth_bluedroid_pm_resources[1].end =
170                                 gpio_to_irq(TEGRA_GPIO_PU6);
171         platform_device_register(&roth_bluedroid_pm_device);
172 }
173 #endif
174 static __initdata struct tegra_clk_init_table roth_clk_init_table[] = {
175         /* name         parent          rate            enabled */
176         { "pll_m",      NULL,           0,              false},
177         { "hda",        "pll_p",        108000000,      false},
178         { "hda2codec_2x", "pll_p",      48000000,       false},
179         { "pwm",        "pll_p",        37000000,       false},
180         { "blink",      "clk_32k",      32768,          true},
181         { "i2s1",       "pll_a_out0",   0,              false},
182         { "i2s3",       "pll_a_out0",   0,              false},
183         { "i2s4",       "pll_a_out0",   0,              false},
184         { "spdif_out",  "pll_a_out0",   0,              false},
185         { "d_audio",    "clk_m",        12000000,       false},
186         { "dam0",       "clk_m",        12000000,       false},
187         { "dam1",       "clk_m",        12000000,       false},
188         { "dam2",       "clk_m",        12000000,       false},
189         { "audio1",     "i2s1_sync",    0,              false},
190         { "audio3",     "i2s3_sync",    0,              false},
191         /* Setting vi_sensor-clk to true for validation purpose, will imapact
192          * power, later set to be false.*/
193         { "vi_sensor",  "pll_p",        150000000,      false},
194         { "cilab",      "pll_p",        150000000,      false},
195         { "cilcd",      "pll_p",        150000000,      false},
196         { "cile",       "pll_p",        150000000,      false},
197         { "i2c1",       "pll_p",        3200000,        false},
198         { "i2c2",       "pll_p",        3200000,        false},
199         { "i2c3",       "pll_p",        3200000,        false},
200         { "i2c4",       "pll_p",        3200000,        false},
201         { "i2c5",       "pll_p",        3200000,        false},
202         { NULL,         NULL,           0,              0},
203 };
204
205 static struct tegra_i2c_platform_data roth_i2c1_platform_data = {
206         .bus_clk_rate   = 100000,
207         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
208         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
209 };
210
211 static struct tegra_i2c_platform_data roth_i2c2_platform_data = {
212         .bus_clk_rate   = 100000,
213         .is_clkon_always = true,
214         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
215         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
216 };
217
218 static struct tegra_i2c_platform_data roth_i2c3_platform_data = {
219         .bus_clk_rate   = 100000,
220         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
221         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
222 };
223
224 static struct tegra_i2c_platform_data roth_i2c4_platform_data = {
225         .bus_clk_rate   = 10000,
226         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
227         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
228 };
229
230 static struct tegra_i2c_platform_data roth_i2c5_platform_data = {
231         .bus_clk_rate   = 400000,
232         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
233         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
234         .needs_cl_dvfs_clock = true,
235 };
236
237 #if defined(CONFIG_ARCH_TEGRA_11x_SOC)
238 static struct i2c_board_info __initdata rt5640_board_info = {
239         I2C_BOARD_INFO("rt5640", 0x1c),
240 };
241
242 static struct i2c_board_info __initdata roth_codec_tfa9887R_info = {
243         I2C_BOARD_INFO("tfa9887R", 0x37),
244 };
245
246 static struct i2c_board_info __initdata roth_codec_tfa9887L_info = {
247         I2C_BOARD_INFO("tfa9887L", 0x34),
248 };
249
250 /* On A01, Left Speaker is moved to 0x34 */
251 static struct i2c_board_info __initdata roth_codec_tfa9887L_info_a01 = {
252         I2C_BOARD_INFO("tfa9887L", 0x34),
253 };
254 #endif
255
256 static void roth_i2c_init(void)
257 {
258         struct board_info board_info;
259
260         tegra_get_board_info(&board_info);
261
262         tegra11_i2c_device1.dev.platform_data = &roth_i2c1_platform_data;
263         tegra11_i2c_device2.dev.platform_data = &roth_i2c2_platform_data;
264         tegra11_i2c_device3.dev.platform_data = &roth_i2c3_platform_data;
265         tegra11_i2c_device4.dev.platform_data = &roth_i2c4_platform_data;
266         tegra11_i2c_device5.dev.platform_data = &roth_i2c5_platform_data;
267
268         platform_device_register(&tegra11_i2c_device5);
269         platform_device_register(&tegra11_i2c_device4);
270         platform_device_register(&tegra11_i2c_device3);
271         platform_device_register(&tegra11_i2c_device2);
272         platform_device_register(&tegra11_i2c_device1);
273
274         i2c_register_board_info(0, &rt5640_board_info, 1);
275         i2c_register_board_info(0, &roth_codec_tfa9887R_info, 1);
276
277         if (board_info.fab >= BOARD_FAB_A01)
278                 i2c_register_board_info(0, &roth_codec_tfa9887L_info_a01, 1);
279         else
280                 i2c_register_board_info(0, &roth_codec_tfa9887L_info, 1);
281 }
282
283 static struct platform_device *roth_uart_devices[] __initdata = {
284         &tegra_uarta_device,
285         &tegra_uartb_device,
286         &tegra_uartc_device,
287         &tegra_uartd_device,
288 };
289 static struct uart_clk_parent uart_parent_clk[] = {
290         [0] = {.name = "clk_m"},
291         [1] = {.name = "pll_p"},
292 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
293         [2] = {.name = "pll_m"},
294 #endif
295 };
296
297 static struct tegra_uart_platform_data roth_uart_pdata;
298 static struct tegra_uart_platform_data roth_loopback_uart_pdata;
299
300 static void __init uart_debug_init(void)
301 {
302         int debug_port_id;
303
304         debug_port_id = uart_console_debug_init(3);
305         if (debug_port_id < 0)
306                 return;
307
308         roth_uart_devices[debug_port_id] = uart_console_debug_device;
309 }
310
311 static void __init roth_uart_init(void)
312 {
313         struct clk *c;
314         int i;
315
316         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
317                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
318                 if (IS_ERR_OR_NULL(c)) {
319                         pr_err("Not able to get the clock for %s\n",
320                                                 uart_parent_clk[i].name);
321                         continue;
322                 }
323                 uart_parent_clk[i].parent_clk = c;
324                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
325         }
326         roth_uart_pdata.parent_clk_list = uart_parent_clk;
327         roth_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
328         roth_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
329         roth_loopback_uart_pdata.parent_clk_count =
330                                                 ARRAY_SIZE(uart_parent_clk);
331         roth_loopback_uart_pdata.is_loopback = true;
332         tegra_uarta_device.dev.platform_data = &roth_uart_pdata;
333         tegra_uartb_device.dev.platform_data = &roth_uart_pdata;
334         tegra_uartc_device.dev.platform_data = &roth_uart_pdata;
335         tegra_uartd_device.dev.platform_data = &roth_uart_pdata;
336
337         /* Register low speed only if it is selected */
338         if (!is_tegra_debug_uartport_hs())
339                 uart_debug_init();
340
341         platform_add_devices(roth_uart_devices,
342                                 ARRAY_SIZE(roth_uart_devices));
343 }
344
345 static struct resource tegra_rtc_resources[] = {
346         [0] = {
347                 .start = TEGRA_RTC_BASE,
348                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
349                 .flags = IORESOURCE_MEM,
350         },
351         [1] = {
352                 .start = INT_RTC,
353                 .end = INT_RTC,
354                 .flags = IORESOURCE_IRQ,
355         },
356 };
357
358 static struct platform_device tegra_rtc_device = {
359         .name = "tegra_rtc",
360         .id   = -1,
361         .resource = tegra_rtc_resources,
362         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
363 };
364
365 static struct tegra_asoc_platform_data roth_audio_pdata = {
366         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
367         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
368         .gpio_hp_mute           = -1,
369         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
370         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
371         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
372         .gpio_codec1 = TEGRA_GPIO_CODEC1_EN,
373         .gpio_codec2 = TEGRA_GPIO_CODEC2_EN,
374         .gpio_codec3 = TEGRA_GPIO_CODEC3_EN,
375         .i2s_param[HIFI_CODEC]  = {
376                 .audio_port_id  = 1,
377                 .is_i2s_master  = 1,
378                 .i2s_mode       = TEGRA_DAIFMT_I2S,
379         },
380         .i2s_param[BT_SCO]      = {
381                 .audio_port_id  = 3,
382                 .is_i2s_master  = 1,
383                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
384         },
385 };
386
387 static struct platform_device roth_audio_device = {
388         .name   = "tegra-snd-rt5640",
389         .id     = 0,
390         .dev    = {
391                 .platform_data = &roth_audio_pdata,
392         },
393 };
394
395 static struct platform_device tegra_camera = {
396         .name = "tegra_camera",
397         .id = -1,
398 };
399
400 static struct led_pwm roth_led_info[] = {
401         {
402                 .name                   = "roth-led",
403                 .default_trigger        = "none",
404                 .pwm_id                 = 2,
405                 .active_low             = 0,
406                 .max_brightness         = 255,
407                 .pwm_period_ns          = 10000000,
408         },
409 };
410
411 static struct led_pwm_platform_data roth_leds_pdata = {
412         .leds           = roth_led_info,
413         .num_leds       = ARRAY_SIZE(roth_led_info),
414 };
415
416 static struct platform_device roth_leds_pwm_device = {
417         .name   = "leds_pwm",
418         .id     = -1,
419         .dev    = {
420                 .platform_data = &roth_leds_pdata,
421         },
422 };
423
424
425 static struct platform_device *roth_devices[] __initdata = {
426         &tegra_pmu_device,
427         &tegra_rtc_device,
428         &tegra_udc_device,
429 #if defined(CONFIG_TEGRA_AVP)
430         &tegra_avp_device,
431 #endif
432         &tegra_camera,
433 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
434         &tegra11_se_device,
435 #endif
436         &tegra_ahub_device,
437         &tegra_dam_device0,
438         &tegra_dam_device1,
439         &tegra_dam_device2,
440         &tegra_i2s_device1,
441         &tegra_i2s_device3,
442         &tegra_i2s_device4,
443         &tegra_spdif_device,
444         &spdif_dit_device,
445         &bluetooth_dit_device,
446         &roth_audio_device,
447         &tegra_hda_device,
448 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
449         &tegra_aes_device,
450 #endif
451
452         &tegra_pwfm_device,
453         &roth_leds_pwm_device,
454 };
455
456 #ifdef CONFIG_USB_SUPPORT
457 static struct tegra_usb_platform_data tegra_udc_pdata = {
458         .port_otg = true,
459         .has_hostpc = true,
460         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
461         .op_mode = TEGRA_USB_OPMODE_DEVICE,
462         .u_data.dev = {
463                 .vbus_pmu_irq = 0,
464                 .vbus_gpio = -1,
465                 .charging_supported = false,
466                 .remote_wakeup_supported = false,
467         },
468         .u_cfg.utmi = {
469                 .hssync_start_delay = 0,
470                 .elastic_limit = 16,
471                 .idle_wait_delay = 17,
472                 .term_range_adj = 6,
473                 .xcvr_setup = 8,
474                 .xcvr_lsfslew = 2,
475                 .xcvr_lsrslew = 2,
476                 .xcvr_setup_offset = 0,
477                 .xcvr_use_fuses = 1,
478         },
479 };
480
481 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
482         .port_otg = true,
483         .has_hostpc = true,
484         .unaligned_dma_buf_supported = false,
485         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
486         .op_mode = TEGRA_USB_OPMODE_HOST,
487         .u_data.host = {
488                 .vbus_gpio = -1,
489                 .hot_plug = true,
490                 .remote_wakeup_supported = true,
491                 .power_off_on_suspend = false,
492         },
493         .u_cfg.utmi = {
494                 .hssync_start_delay = 0,
495                 .elastic_limit = 16,
496                 .idle_wait_delay = 17,
497                 .term_range_adj = 6,
498                 .xcvr_setup = 15,
499                 .xcvr_lsfslew = 2,
500                 .xcvr_lsrslew = 2,
501                 .xcvr_setup_offset = 0,
502                 .xcvr_use_fuses = 1,
503                 .vbus_oc_map = 0x4,
504         },
505 };
506
507 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
508         .port_otg = false,
509         .has_hostpc = true,
510         .unaligned_dma_buf_supported = false,
511         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
512         .op_mode = TEGRA_USB_OPMODE_HOST,
513         .u_data.host = {
514                 .vbus_gpio = -1,
515                 .hot_plug = true,
516                 .remote_wakeup_supported = true,
517                 .power_off_on_suspend = false,
518         },
519         .u_cfg.utmi = {
520         .hssync_start_delay = 0,
521                 .elastic_limit = 16,
522                 .idle_wait_delay = 17,
523                 .term_range_adj = 6,
524                 .xcvr_setup = 8,
525                 .xcvr_lsfslew = 2,
526                 .xcvr_lsrslew = 2,
527                 .xcvr_setup_offset = 0,
528                 .xcvr_use_fuses = 1,
529                 .vbus_oc_map = 0x5,
530         },
531 };
532
533 static struct tegra_usb_otg_data tegra_otg_pdata = {
534         .ehci_device = &tegra_ehci1_device,
535         .ehci_pdata = &tegra_ehci1_utmi_pdata,
536 };
537
538 static void roth_usb_init(void)
539 {
540         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
541         platform_device_register(&tegra_otg_device);
542
543         /* Setup the udc platform data */
544         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
545
546         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
547         platform_device_register(&tegra_ehci3_device);
548 }
549
550 #else
551 static void roth_usb_init(void) { }
552 #endif
553
554 static void roth_audio_init(void)
555 {
556         struct board_info board_info;
557
558         tegra_get_board_info(&board_info);
559
560         roth_audio_pdata.codec_name = "rt5640.0-001c";
561         roth_audio_pdata.codec_dai_name = "rt5640-aif1";
562 }
563
564
565 static struct platform_device *roth_spi_devices[] __initdata = {
566         &tegra11_spi_device4,
567 };
568
569 struct spi_clk_parent spi_parent_clk_roth[] = {
570         [0] = {.name = "pll_p"},
571 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
572         [1] = {.name = "pll_m"},
573         [2] = {.name = "clk_m"},
574 #else
575         [1] = {.name = "clk_m"},
576 #endif
577 };
578
579 static struct tegra_spi_platform_data roth_spi_pdata = {
580         .is_dma_based           = false,
581         .max_dma_buffer         = 16 * 1024,
582         .is_clkon_always        = false,
583         .max_rate               = 25000000,
584 };
585
586 static void __init roth_spi_init(void)
587 {
588         int i;
589         struct clk *c;
590
591         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_roth); ++i) {
592                 c = tegra_get_clock_by_name(spi_parent_clk_roth[i].name);
593                 if (IS_ERR_OR_NULL(c)) {
594                         pr_err("Not able to get the clock for %s\n",
595                                 spi_parent_clk_roth[i].name);
596                         continue;
597                 }
598                 spi_parent_clk_roth[i].parent_clk = c;
599                 spi_parent_clk_roth[i].fixed_clk_rate = clk_get_rate(c);
600         }
601         roth_spi_pdata.parent_clk_list = spi_parent_clk_roth;
602         roth_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_roth);
603         tegra11_spi_device4.dev.platform_data = &roth_spi_pdata;
604         platform_add_devices(roth_spi_devices,
605                 ARRAY_SIZE(roth_spi_devices));
606 }
607
608 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
609         /* name         parent          rate            enabled */
610         { "extern2",    "pll_p",        41000000,       false},
611         { "clk_out_2",  "extern2",      40800000,       false},
612         { NULL,         NULL,           0,              0},
613 };
614
615 struct rm_spi_ts_platform_data rm31080ts_roth_data = {
616         .gpio_reset = 0,
617         .config = 0,
618         .platform_id = RM_PLATFORM_D010,
619         .name_of_clock = "clk_out_2",
620         .name_of_clock_con = "extern2",
621 };
622
623 static struct tegra_spi_device_controller_data dev_cdata = {
624         .rx_clk_tap_delay = 0,
625         .tx_clk_tap_delay = 16,
626 };
627
628 struct spi_board_info rm31080a_roth_spi_board[1] = {
629         {
630          .modalias = "rm_ts_spidev",
631          .bus_num = 3,
632          .chip_select = 2,
633          .max_speed_hz = 12 * 1000 * 1000,
634          .mode = SPI_MODE_0,
635          .controller_data = &dev_cdata,
636          .platform_data = &rm31080ts_roth_data,
637          },
638 };
639
640 static int __init roth_touch_init(void)
641 {
642         tegra_clk_init_from_table(touch_clk_init_table);
643         rm31080ts_roth_data.platform_id = RM_PLATFORM_R005;
644         rm31080a_roth_spi_board[0].irq =
645                 gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
646         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
647                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
648                                 &rm31080ts_roth_data,
649                                 &rm31080a_roth_spi_board[0],
650                                 ARRAY_SIZE(rm31080a_roth_spi_board));
651         return 0;
652 }
653
654 static void __init tegra_roth_init(void)
655 {
656         tegra_clk_init_from_table(roth_clk_init_table);
657         tegra_clk_vefify_parents();
658         tegra_smmu_init();
659         tegra_soc_device_init("roth");
660         tegra_enable_pinmux();
661         roth_pinmux_init();
662         roth_i2c_init();
663         roth_spi_init();
664         roth_usb_init();
665         roth_uart_init();
666         roth_audio_init();
667         platform_add_devices(roth_devices, ARRAY_SIZE(roth_devices));
668         //tegra_ram_console_debug_init();
669         tegra_io_dpd_init();
670         roth_regulator_init();
671         roth_sdhci_init();
672         roth_suspend_init();
673         roth_emc_init();
674         roth_edp_init();
675         isomgr_init();
676         roth_touch_init();
677         /* roth will pass a null board id to panel_init */
678         roth_panel_init(0);
679         roth_kbc_init();
680         roth_pmon_init();
681 #ifdef CONFIG_BT_BLUESLEEP
682         roth_setup_bluesleep();
683         roth_setup_bt_rfkill();
684 #elif defined CONFIG_BLUEDROID_PM
685         roth_setup_bluedroid_pm();
686 #endif
687         tegra_release_bootloader_fb();
688 #ifdef CONFIG_TEGRA_WDT_RECOVERY
689         tegra_wdt_recovery_init();
690 #endif
691         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
692         roth_sensors_init();
693         roth_soctherm_init();
694         roth_fan_init();
695         tegra_register_fuse();
696 }
697
698 static void __init roth_ramconsole_reserve(unsigned long size)
699 {
700         tegra_ram_console_debug_reserve(SZ_1M);
701 }
702
703 #ifdef CONFIG_USE_OF
704 struct of_dev_auxdata roth_auxdata_lookup[] __initdata = {
705         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
706                 NULL),
707         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d", NULL),
708         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d", NULL),
709         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
710                 NULL),
711         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi", NULL),
712         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp", NULL),
713         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
714         {}
715 };
716 #endif
717
718 static void __init tegra_roth_dt_init(void)
719 {
720 #ifdef CONFIG_USE_OF
721         of_platform_populate(NULL,
722                 of_default_bus_match_table, roth_auxdata_lookup,
723                 &platform_bus);
724 #endif
725
726         tegra_roth_init();
727 }
728
729 static void __init tegra_roth_reserve(void)
730 {
731 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
732         /* 1920*1200*4*2 = 18432000 bytes */
733         tegra_reserve(0, SZ_16M + SZ_2M, SZ_4M);
734 #else
735         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
736 #endif
737         roth_ramconsole_reserve(SZ_1M);
738 }
739
740 static const char * const roth_dt_board_compat[] = {
741         "nvidia,roth",
742         NULL
743 };
744
745 MACHINE_START(ROTH, "roth")
746         .atag_offset    = 0x100,
747         .smp            = smp_ops(tegra_smp_ops),
748         .map_io         = tegra_map_common_io,
749         .reserve        = tegra_roth_reserve,
750         .init_early     = tegra11x_init_early,
751         .init_irq       = tegra_dt_init_irq,
752         .handle_irq     = gic_handle_irq,
753         .timer          = &tegra_sys_timer,
754         .init_machine   = tegra_roth_dt_init,
755         .restart        = tegra_assert_system_reset,
756         .dt_compat      = roth_dt_board_compat,
757 MACHINE_END