Arm: Tegra: Roth: Support Roth platform
[linux-3.10.git] / arch / arm / mach-tegra / board-roth.c
1 /*
2  * arch/arm/mach-tegra/board-roth.c
3  *
4  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/rm31080a_ts.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/memblock.h>
38 #include <linux/spi-tegra.h>
39 #include <linux/nfc/pn544.h>
40 #include <linux/rfkill-gpio.h>
41 #include <linux/skbuff.h>
42 #include <linux/ti_wilink_st.h>
43 #include <linux/regulator/consumer.h>
44 #include <linux/smb349-charger.h>
45 #include <linux/max17048_battery.h>
46 #include <linux/leds.h>
47 #include <linux/i2c/at24.h>
48 #include <linux/of_platform.h>
49
50 #include <asm/hardware/gic.h>
51
52 #include <mach/clk.h>
53 #include <mach/iomap.h>
54 #include <mach/irqs.h>
55 #include <mach/pinmux.h>
56 #include <mach/pinmux-tegra30.h>
57 #include <mach/iomap.h>
58 #include <mach/io.h>
59 #include <mach/io_dpd.h>
60 #include <mach/i2s.h>
61 #include <mach/tegra_asoc_pdata.h>
62 #include <asm/mach-types.h>
63 #include <asm/mach/arch.h>
64 #include <mach/usb_phy.h>
65 #include <mach/gpio-tegra.h>
66 #include <mach/tegra_fiq_debugger.h>
67 #include <mach/edp.h>
68
69 #include "board-touch-raydium.h"
70 #include "board.h"
71 #include "board-common.h"
72 #include "clock.h"
73 #include "board-roth.h"
74 #include "board-roth.h"
75 #include "devices.h"
76 #include "gpio-names.h"
77 #include "fuse.h"
78 #include "pm.h"
79 #include "common.h"
80 #include "tegra-board-id.h"
81
82 static struct rfkill_gpio_platform_data roth_bt_rfkill_pdata = {
83                 .name           = "bt_rfkill",
84                 .shutdown_gpio  = TEGRA_GPIO_PQ7,
85                 .type           = RFKILL_TYPE_BLUETOOTH,
86 };
87
88 static struct platform_device roth_bt_rfkill_device = {
89         .name = "rfkill_gpio",
90         .id             = -1,
91         .dev = {
92                 .platform_data = &roth_bt_rfkill_pdata,
93         },
94 };
95
96 static struct resource roth_bluesleep_resources[] = {
97         [0] = {
98                 .name = "gpio_host_wake",
99                         .start  = TEGRA_GPIO_PU6,
100                         .end    = TEGRA_GPIO_PU6,
101                         .flags  = IORESOURCE_IO,
102         },
103         [1] = {
104                 .name = "gpio_ext_wake",
105                         .start  = TEGRA_GPIO_PEE1,
106                         .end    = TEGRA_GPIO_PEE1,
107                         .flags  = IORESOURCE_IO,
108         },
109         [2] = {
110                 .name = "host_wake",
111                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
112         },
113 };
114
115 static struct platform_device roth_bluesleep_device = {
116         .name           = "bluesleep",
117         .id             = -1,
118         .num_resources  = ARRAY_SIZE(roth_bluesleep_resources),
119         .resource       = roth_bluesleep_resources,
120 };
121
122 static noinline void __init roth_setup_bt_rfkill(void)
123 {
124         if ((tegra_get_commchip_id() == COMMCHIP_BROADCOM_BCM43241) ||
125                 (tegra_get_commchip_id() == COMMCHIP_DEFAULT))
126                 roth_bt_rfkill_pdata.reset_gpio = TEGRA_GPIO_INVALID;
127         else
128                 roth_bt_rfkill_pdata.reset_gpio = TEGRA_GPIO_PQ6;
129         platform_device_register(&roth_bt_rfkill_device);
130 }
131
132 static noinline void __init roth_setup_bluesleep(void)
133 {
134         roth_bluesleep_resources[2].start =
135                 roth_bluesleep_resources[2].end =
136                         gpio_to_irq(TEGRA_GPIO_PU6);
137         platform_device_register(&roth_bluesleep_device);
138         return;
139 }
140 static __initdata struct tegra_clk_init_table roth_clk_init_table[] = {
141         /* name         parent          rate            enabled */
142         { "pll_m",      NULL,           0,              false},
143         { "hda",        "pll_p",        108000000,      false},
144         { "hda2codec_2x", "pll_p",      48000000,       false},
145         { "pwm",        "pll_p",        3187500,        false},
146         { "blink",      "clk_32k",      32768,          true},
147         { "i2s1",       "pll_a_out0",   0,              false},
148         { "i2s3",       "pll_a_out0",   0,              false},
149         { "i2s4",       "pll_a_out0",   0,              false},
150         { "spdif_out",  "pll_a_out0",   0,              false},
151         { "d_audio",    "clk_m",        12000000,       false},
152         { "dam0",       "clk_m",        12000000,       false},
153         { "dam1",       "clk_m",        12000000,       false},
154         { "dam2",       "clk_m",        12000000,       false},
155         { "audio1",     "i2s1_sync",    0,              false},
156         { "audio3",     "i2s3_sync",    0,              false},
157         /* Setting vi_sensor-clk to true for validation purpose, will imapact
158          * power, later set to be false.*/
159         { "vi_sensor",  "pll_p",        150000000,      false},
160         { "cilab",      "pll_p",        150000000,      false},
161         { "cilcd",      "pll_p",        150000000,      false},
162         { "cile",       "pll_p",        150000000,      false},
163         { "i2c1",       "pll_p",        3200000,        false},
164         { "i2c2",       "pll_p",        3200000,        false},
165         { "i2c3",       "pll_p",        3200000,        false},
166         { "i2c4",       "pll_p",        3200000,        false},
167         { "i2c5",       "pll_p",        3200000,        false},
168         { NULL,         NULL,           0,              0},
169 };
170
171 static struct tegra_i2c_platform_data roth_i2c1_platform_data = {
172         .adapter_nr     = 0,
173         .bus_count      = 1,
174         .bus_clk_rate   = { 100000, 0 },
175         .scl_gpio               = {TEGRA_GPIO_I2C1_SCL, 0},
176         .sda_gpio               = {TEGRA_GPIO_I2C1_SDA, 0},
177         .arb_recovery = arb_lost_recovery,
178 };
179
180 static struct tegra_i2c_platform_data roth_i2c2_platform_data = {
181         .adapter_nr     = 1,
182         .bus_count      = 1,
183         .bus_clk_rate   = { 100000, 0 },
184         .is_clkon_always = true,
185         .scl_gpio               = {TEGRA_GPIO_I2C2_SCL, 0},
186         .sda_gpio               = {TEGRA_GPIO_I2C2_SDA, 0},
187         .arb_recovery = arb_lost_recovery,
188 };
189
190 static struct tegra_i2c_platform_data roth_i2c3_platform_data = {
191         .adapter_nr     = 2,
192         .bus_count      = 1,
193         .bus_clk_rate   = { 100000, 0 },
194         .scl_gpio               = {TEGRA_GPIO_I2C3_SCL, 0},
195         .sda_gpio               = {TEGRA_GPIO_I2C3_SDA, 0},
196         .arb_recovery = arb_lost_recovery,
197 };
198
199 static struct tegra_i2c_platform_data roth_i2c4_platform_data = {
200         .adapter_nr     = 3,
201         .bus_count      = 1,
202         .bus_clk_rate   = { 10000, 0 },
203         .scl_gpio               = {TEGRA_GPIO_I2C4_SCL, 0},
204         .sda_gpio               = {TEGRA_GPIO_I2C4_SDA, 0},
205         .arb_recovery = arb_lost_recovery,
206 };
207
208 static struct tegra_i2c_platform_data roth_i2c5_platform_data = {
209         .adapter_nr     = 4,
210         .bus_count      = 1,
211         .bus_clk_rate   = { 400000, 0 },
212         .scl_gpio               = {TEGRA_GPIO_I2C5_SCL, 0},
213         .sda_gpio               = {TEGRA_GPIO_I2C5_SDA, 0},
214         .arb_recovery = arb_lost_recovery,
215 };
216
217 #if defined(CONFIG_ARCH_TEGRA_3x_SOC) || defined(CONFIG_ARCH_TEGRA_11x_SOC)
218 static struct i2c_board_info __initdata rt5640_board_info = {
219         I2C_BOARD_INFO("rt5640", 0x1c),
220 };
221 #endif
222
223 static struct pn544_i2c_platform_data nfc_pdata = {
224         .irq_gpio = TEGRA_GPIO_PW2,
225         .ven_gpio = TEGRA_GPIO_PQ3,
226         .firm_gpio = TEGRA_GPIO_PH0,
227 };
228
229 static struct i2c_board_info __initdata nfc_board_info = {
230         I2C_BOARD_INFO("pn544", 0x28),
231         .platform_data = &nfc_pdata,
232 };
233
234 static void roth_i2c_init(void)
235 {
236         tegra11_i2c_device1.dev.platform_data = &roth_i2c1_platform_data;
237         tegra11_i2c_device2.dev.platform_data = &roth_i2c2_platform_data;
238         tegra11_i2c_device3.dev.platform_data = &roth_i2c3_platform_data;
239         tegra11_i2c_device4.dev.platform_data = &roth_i2c4_platform_data;
240         tegra11_i2c_device5.dev.platform_data = &roth_i2c5_platform_data;
241
242         nfc_board_info.irq = gpio_to_irq(TEGRA_GPIO_PW2);
243         i2c_register_board_info(0, &nfc_board_info, 1);
244
245         platform_device_register(&tegra11_i2c_device5);
246         platform_device_register(&tegra11_i2c_device4);
247         platform_device_register(&tegra11_i2c_device3);
248         platform_device_register(&tegra11_i2c_device2);
249         platform_device_register(&tegra11_i2c_device1);
250
251         i2c_register_board_info(0, &rt5640_board_info, 1);
252 }
253
254 static struct platform_device *roth_uart_devices[] __initdata = {
255         &tegra_uarta_device,
256         &tegra_uartb_device,
257         &tegra_uartc_device,
258         &tegra_uartd_device,
259 };
260 static struct uart_clk_parent uart_parent_clk[] = {
261         [0] = {.name = "clk_m"},
262         [1] = {.name = "pll_p"},
263 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
264         [2] = {.name = "pll_m"},
265 #endif
266 };
267
268 static struct tegra_uart_platform_data roth_uart_pdata;
269 static struct tegra_uart_platform_data roth_loopback_uart_pdata;
270
271 static void __init uart_debug_init(void)
272 {
273         int debug_port_id;
274
275         debug_port_id = uart_console_debug_init(3);
276         if (debug_port_id < 0)
277                 return;
278
279         roth_uart_devices[debug_port_id] = uart_console_debug_device;
280 }
281
282 static void __init roth_uart_init(void)
283 {
284         struct clk *c;
285         int i;
286
287         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
288                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
289                 if (IS_ERR_OR_NULL(c)) {
290                         pr_err("Not able to get the clock for %s\n",
291                                                 uart_parent_clk[i].name);
292                         continue;
293                 }
294                 uart_parent_clk[i].parent_clk = c;
295                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
296         }
297         roth_uart_pdata.parent_clk_list = uart_parent_clk;
298         roth_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
299         roth_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
300         roth_loopback_uart_pdata.parent_clk_count =
301                                                 ARRAY_SIZE(uart_parent_clk);
302         roth_loopback_uart_pdata.is_loopback = true;
303         tegra_uarta_device.dev.platform_data = &roth_uart_pdata;
304         tegra_uartb_device.dev.platform_data = &roth_uart_pdata;
305         tegra_uartc_device.dev.platform_data = &roth_uart_pdata;
306         tegra_uartd_device.dev.platform_data = &roth_uart_pdata;
307
308         /* Register low speed only if it is selected */
309         if (!is_tegra_debug_uartport_hs())
310                 uart_debug_init();
311
312         platform_add_devices(roth_uart_devices,
313                                 ARRAY_SIZE(roth_uart_devices));
314 }
315
316 static struct resource tegra_rtc_resources[] = {
317         [0] = {
318                 .start = TEGRA_RTC_BASE,
319                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
320                 .flags = IORESOURCE_MEM,
321         },
322         [1] = {
323                 .start = INT_RTC,
324                 .end = INT_RTC,
325                 .flags = IORESOURCE_IRQ,
326         },
327 };
328
329 static struct platform_device tegra_rtc_device = {
330         .name = "tegra_rtc",
331         .id   = -1,
332         .resource = tegra_rtc_resources,
333         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
334 };
335
336 static struct tegra_asoc_platform_data roth_audio_pdata = {
337         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
338         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
339         .gpio_hp_mute           = -1,
340         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
341         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
342         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
343         .gpio_codec1 = TEGRA_GPIO_CODEC1_EN,
344         .gpio_codec2 = TEGRA_GPIO_CODEC2_EN,
345         .gpio_codec3 = TEGRA_GPIO_CODEC3_EN,
346         .i2s_param[HIFI_CODEC]  = {
347                 .audio_port_id  = 1,
348                 .is_i2s_master  = 1,
349                 .i2s_mode       = TEGRA_DAIFMT_I2S,
350         },
351         .i2s_param[BT_SCO]      = {
352                 .audio_port_id  = 3,
353                 .is_i2s_master  = 1,
354                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
355         },
356 };
357
358 static struct platform_device roth_audio_device = {
359         .name   = "tegra-snd-rt5640",
360         .id     = 0,
361         .dev    = {
362                 .platform_data = &roth_audio_pdata,
363         },
364 };
365
366 static struct platform_device tegra_camera = {
367         .name = "tegra_camera",
368         .id = -1,
369 };
370
371 static struct platform_device *roth_devices[] __initdata = {
372         &tegra_pmu_device,
373         &tegra_rtc_device,
374         &tegra_udc_device,
375 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
376         &tegra_smmu_device,
377 #endif
378 #if defined(CONFIG_TEGRA_AVP)
379         &tegra_avp_device,
380 #endif
381         &tegra_camera,
382 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
383         &tegra11_se_device,
384 #endif
385         &tegra_ahub_device,
386         &tegra_dam_device0,
387         &tegra_dam_device1,
388         &tegra_dam_device2,
389         &tegra_i2s_device1,
390         &tegra_i2s_device3,
391         &tegra_i2s_device4,
392         &tegra_spdif_device,
393         &spdif_dit_device,
394         &bluetooth_dit_device,
395         &roth_audio_device,
396         &tegra_hda_device,
397 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
398         &tegra_aes_device,
399 #endif
400 };
401
402 #ifdef CONFIG_USB_SUPPORT
403 static struct tegra_usb_platform_data tegra_udc_pdata = {
404         .port_otg = true,
405         .has_hostpc = true,
406         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
407         .op_mode = TEGRA_USB_OPMODE_DEVICE,
408         .u_data.dev = {
409                 .vbus_pmu_irq = 0,
410                 .vbus_gpio = -1,
411                 .charging_supported = false,
412                 .remote_wakeup_supported = false,
413         },
414         .u_cfg.utmi = {
415                 .hssync_start_delay = 0,
416                 .elastic_limit = 16,
417                 .idle_wait_delay = 17,
418                 .term_range_adj = 6,
419                 .xcvr_setup = 8,
420                 .xcvr_lsfslew = 2,
421                 .xcvr_lsrslew = 2,
422                 .xcvr_setup_offset = 0,
423                 .xcvr_use_fuses = 1,
424         },
425 };
426
427 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
428         .port_otg = true,
429         .has_hostpc = true,
430         .unaligned_dma_buf_supported = false,
431         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
432         .op_mode = TEGRA_USB_OPMODE_HOST,
433         .u_data.host = {
434                 .vbus_gpio = -1,
435                 .hot_plug = true,
436                 .remote_wakeup_supported = true,
437                 .power_off_on_suspend = true,
438         },
439         .u_cfg.utmi = {
440                 .hssync_start_delay = 0,
441                 .elastic_limit = 16,
442                 .idle_wait_delay = 17,
443                 .term_range_adj = 6,
444                 .xcvr_setup = 15,
445                 .xcvr_lsfslew = 2,
446                 .xcvr_lsrslew = 2,
447                 .xcvr_setup_offset = 0,
448                 .xcvr_use_fuses = 1,
449         },
450 };
451
452 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
453         .port_otg = false,
454         .has_hostpc = true,
455         .unaligned_dma_buf_supported = false,
456         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
457         .op_mode = TEGRA_USB_OPMODE_HOST,
458         .u_data.host = {
459                 .vbus_gpio = -1,
460                 .hot_plug = true,
461                 .remote_wakeup_supported = true,
462                 .power_off_on_suspend = true,
463         },
464         .u_cfg.utmi = {
465         .hssync_start_delay = 0,
466                 .elastic_limit = 16,
467                 .idle_wait_delay = 17,
468                 .term_range_adj = 6,
469                 .xcvr_setup = 8,
470                 .xcvr_lsfslew = 2,
471                 .xcvr_lsrslew = 2,
472                 .xcvr_setup_offset = 0,
473                 .xcvr_use_fuses = 1,
474         },
475 };
476
477 static struct tegra_usb_otg_data tegra_otg_pdata = {
478         .ehci_device = &tegra_ehci1_device,
479         .ehci_pdata = &tegra_ehci1_utmi_pdata,
480 };
481
482 static void roth_usb_init(void)
483 {
484         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
485         platform_device_register(&tegra_otg_device);
486
487         /* Setup the udc platform data */
488         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
489
490         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
491         platform_device_register(&tegra_ehci3_device);
492 }
493
494 #else
495 static void roth_usb_init(void) { }
496 #endif
497
498 static void roth_audio_init(void)
499 {
500         struct board_info board_info;
501
502         tegra_get_board_info(&board_info);
503
504         roth_audio_pdata.codec_name = "rt5640.0-001c";
505         roth_audio_pdata.codec_dai_name = "rt5640-aif1";
506 }
507
508
509 static struct platform_device *roth_spi_devices[] __initdata = {
510         &tegra11_spi_device4,
511 };
512
513 struct spi_clk_parent spi_parent_clk_roth[] = {
514         [0] = {.name = "pll_p"},
515 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
516         [1] = {.name = "pll_m"},
517         [2] = {.name = "clk_m"},
518 #else
519         [1] = {.name = "clk_m"},
520 #endif
521 };
522
523 static struct tegra_spi_platform_data roth_spi_pdata = {
524         .is_dma_based           = false,
525         .max_dma_buffer         = 16 * 1024,
526         .is_clkon_always        = false,
527         .max_rate               = 25000000,
528 };
529
530 static void __init roth_spi_init(void)
531 {
532         int i;
533         struct clk *c;
534         struct board_info board_info, display_board_info;
535
536         tegra_get_board_info(&board_info);
537         tegra_get_display_board_info(&display_board_info);
538
539         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_roth); ++i) {
540                 c = tegra_get_clock_by_name(spi_parent_clk_roth[i].name);
541                 if (IS_ERR_OR_NULL(c)) {
542                         pr_err("Not able to get the clock for %s\n",
543                                                 spi_parent_clk_roth[i].name);
544                         continue;
545                 }
546                 spi_parent_clk_roth[i].parent_clk = c;
547                 spi_parent_clk_roth[i].fixed_clk_rate = clk_get_rate(c);
548         }
549         roth_spi_pdata.parent_clk_list = spi_parent_clk_roth;
550         roth_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_roth);
551         tegra11_spi_device4.dev.platform_data = &roth_spi_pdata;
552         platform_add_devices(roth_spi_devices,
553                                 ARRAY_SIZE(roth_spi_devices));
554 }
555
556 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
557         /* name         parent          rate            enabled */
558         { "extern2",    "pll_p",        41000000,       true},
559         { "clk_out_2",  "extern2",      40800000,       true},
560         { NULL,         NULL,           0,              0},
561 };
562
563 struct rm_spi_ts_platform_data rm31080ts_roth_data = {
564         .gpio_reset = 0,
565         .config = 0,
566 };
567
568 static struct tegra_spi_device_controller_data dev_cdata = {
569         .rx_clk_tap_delay = 0,
570         .tx_clk_tap_delay = 0,
571 };
572
573 struct spi_board_info rm31080a_roth_spi_board[1] = {
574         {
575          .modalias = "rm_ts_spidev",
576          .bus_num = 3,
577          .chip_select = 2,
578          .max_speed_hz = 12 * 1000 * 1000,
579          .mode = SPI_MODE_0,
580          .controller_data = &dev_cdata,
581          .platform_data = &rm31080ts_roth_data,
582          },
583 };
584
585 static int __init roth_touch_init(void)
586 {
587         struct board_info board_info;
588
589         tegra_get_display_board_info(&board_info);
590         tegra_clk_init_from_table(touch_clk_init_table);
591         clk_enable(tegra_get_clock_by_name("clk_out_2"));
592         if (board_info.board_id == BOARD_E1582)
593                 rm31080ts_roth_data.platform_id = RM_PLATFORM_P005;
594         else
595                 rm31080ts_roth_data.platform_id = RM_PLATFORM_D010;
596         rm31080a_roth_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
597         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
598                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
599                                 &rm31080ts_roth_data,
600                                 &rm31080a_roth_spi_board[0],
601                                 ARRAY_SIZE(rm31080a_roth_spi_board));
602         return 0;
603 }
604
605 static void __init tegra_roth_init(void)
606 {
607
608         tegra_battery_edp_init(2500);
609         tegra_clk_init_from_table(roth_clk_init_table);
610         tegra_soc_device_init("roth");
611         tegra_enable_pinmux();
612         roth_pinmux_init();
613         roth_i2c_init();
614         roth_spi_init();
615         roth_usb_init();
616         roth_edp_init();
617         roth_uart_init();
618         roth_audio_init();
619         platform_add_devices(roth_devices, ARRAY_SIZE(roth_devices));
620         //tegra_ram_console_debug_init();
621         tegra_io_dpd_init();
622         roth_regulator_init();
623         roth_sdhci_init();
624         roth_suspend_init();
625         roth_emc_init();
626         roth_touch_init();
627         roth_panel_init();
628         roth_pmon_init();
629         roth_setup_bluesleep();
630         roth_setup_bt_rfkill();
631         tegra_release_bootloader_fb();
632 #ifdef CONFIG_TEGRA_WDT_RECOVERY
633         tegra_wdt_recovery_init();
634 #endif
635         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
636         roth_sensors_init();
637 }
638
639 static void __init roth_ramconsole_reserve(unsigned long size)
640 {
641         tegra_ram_console_debug_reserve(SZ_1M);
642 }
643
644 static void __init tegra_roth_dt_init(void)
645 {
646         tegra_roth_init();
647
648         of_platform_populate(NULL,
649                 of_default_bus_match_table, NULL, NULL);
650 }
651
652 static void __init tegra_roth_reserve(void)
653 {
654 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
655         /* 1920*1200*4*2 = 18432000 bytes */
656         tegra_reserve(0, SZ_16M + SZ_2M, SZ_4M);
657 #else
658         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
659 #endif
660         roth_ramconsole_reserve(SZ_1M);
661 }
662
663 static const char * const roth_dt_board_compat[] = {
664         "nvidia,roth",
665         NULL
666 };
667
668 MACHINE_START(ROTH, "roth")
669         .atag_offset    = 0x100,
670         .smp            = smp_ops(tegra_smp_ops),
671         .map_io         = tegra_map_common_io,
672         .reserve        = tegra_roth_reserve,
673         .init_early     = tegra11x_init_early,
674         .init_irq       = tegra_init_irq,
675         .handle_irq     = gic_handle_irq,
676         .timer          = &tegra_timer,
677         .init_machine   = tegra_roth_dt_init,
678         .restart        = tegra_assert_system_reset,
679         .dt_compat      = roth_dt_board_compat,
680 MACHINE_END