93294bcb0b3b664f82ab35b634f3b05266fbcd65
[linux-3.10.git] / arch / arm / mach-tegra / board-roth.c
1 /*
2  * arch/arm/mach-tegra/board-roth.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/rm31080a_ts.h>
36 #include <linux/spi-tegra.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/rfkill-gpio.h>
40 #include <linux/skbuff.h>
41 #include <linux/ti_wilink_st.h>
42 #include <linux/regulator/consumer.h>
43 #include <linux/max17048_battery.h>
44 #include <linux/leds.h>
45 #include <linux/leds_pwm.h>
46 #include <linux/i2c/at24.h>
47 #include <linux/issp.h>
48 #include <linux/of_platform.h>
49 #include <linux/usb/tegra_usb_phy.h>
50 #include <asm/system_info.h>
51
52 #include <mach/clk.h>
53 #include <mach/irqs.h>
54 #include <mach/pinmux.h>
55 #include <mach/pinmux-t11.h>
56 #include <mach/io_dpd.h>
57 #include <mach/i2s.h>
58 #include <mach/isomgr.h>
59 #include <mach/tegra_asoc_pdata.h>
60 #include <asm/mach-types.h>
61 #include <asm/mach/arch.h>
62 #include <mach/gpio-tegra.h>
63 #include <mach/tegra_fiq_debugger.h>
64 #include <mach/edp.h>
65 #include <mach/hardware.h>
66
67 #include "board.h"
68 #include "board-common.h"
69 #include "clock.h"
70 #include "board-roth.h"
71 #include "devices.h"
72 #include "gpio-names.h"
73 #include "fuse.h"
74 #include "iomap.h"
75 #include "pm.h"
76 #include "common.h"
77 #include "tegra-board-id.h"
78 #include "board-touch-raydium.h"
79
80 #ifdef CONFIG_BT_BLUESLEEP
81 static struct rfkill_gpio_platform_data roth_bt_rfkill_pdata = {
82                 .name           = "bt_rfkill",
83                 .shutdown_gpio  = TEGRA_GPIO_PQ7,
84                 .type           = RFKILL_TYPE_BLUETOOTH,
85 };
86
87 static struct platform_device roth_bt_rfkill_device = {
88         .name = "rfkill_gpio",
89         .id             = -1,
90         .dev = {
91                 .platform_data = &roth_bt_rfkill_pdata,
92         },
93 };
94
95 static struct resource roth_bluesleep_resources[] = {
96         [0] = {
97                 .name = "gpio_host_wake",
98                         .start  = TEGRA_GPIO_PU6,
99                         .end    = TEGRA_GPIO_PU6,
100                         .flags  = IORESOURCE_IO,
101         },
102         [1] = {
103                 .name = "gpio_ext_wake",
104                         .start  = TEGRA_GPIO_PEE1,
105                         .end    = TEGRA_GPIO_PEE1,
106                         .flags  = IORESOURCE_IO,
107         },
108         [2] = {
109                 .name = "host_wake",
110                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
111         },
112 };
113
114 static struct platform_device roth_bluesleep_device = {
115         .name           = "bluesleep",
116         .id             = -1,
117         .num_resources  = ARRAY_SIZE(roth_bluesleep_resources),
118         .resource       = roth_bluesleep_resources,
119 };
120
121 static noinline void __init roth_setup_bt_rfkill(void)
122 {
123                 roth_bt_rfkill_pdata.reset_gpio = TEGRA_GPIO_PQ6;
124         platform_device_register(&roth_bt_rfkill_device);
125 }
126
127 static noinline void __init roth_setup_bluesleep(void)
128 {
129         roth_bluesleep_resources[2].start =
130                 roth_bluesleep_resources[2].end =
131                         gpio_to_irq(TEGRA_GPIO_PU6);
132         platform_device_register(&roth_bluesleep_device);
133         return;
134 }
135 #elif defined CONFIG_BLUEDROID_PM
136 static struct resource roth_bluedroid_pm_resources[] = {
137         [0] = {
138                 .name   = "shutdown_gpio",
139                 .start  = TEGRA_GPIO_PQ7,
140                 .end    = TEGRA_GPIO_PQ7,
141                 .flags  = IORESOURCE_IO,
142         },
143         [1] = {
144                 .name = "host_wake",
145                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
146         },
147         [2] = {
148                 .name = "gpio_ext_wake",
149                 .start  = TEGRA_GPIO_PEE1,
150                 .end    = TEGRA_GPIO_PEE1,
151                 .flags  = IORESOURCE_IO,
152         },
153         [3] = {
154                 .name = "gpio_host_wake",
155                 .start  = TEGRA_GPIO_PU6,
156                 .end    = TEGRA_GPIO_PU6,
157                 .flags  = IORESOURCE_IO,
158         },
159 };
160
161 static struct platform_device roth_bluedroid_pm_device = {
162         .name = "bluedroid_pm",
163         .id             = 0,
164         .num_resources  = ARRAY_SIZE(roth_bluedroid_pm_resources),
165         .resource       = roth_bluedroid_pm_resources,
166 };
167
168 static noinline void __init roth_setup_bluedroid_pm(void)
169 {
170         roth_bluedroid_pm_resources[1].start =
171                 roth_bluedroid_pm_resources[1].end =
172                                 gpio_to_irq(TEGRA_GPIO_PU6);
173         platform_device_register(&roth_bluedroid_pm_device);
174 }
175 #endif
176 static __initdata struct tegra_clk_init_table roth_clk_init_table[] = {
177         /* name         parent          rate            enabled */
178         { "pll_m",      NULL,           0,              false},
179         { "hda",        "pll_p",        108000000,      false},
180         { "hda2codec_2x", "pll_p",      48000000,       false},
181         { "pwm",        "pll_p",        6000000,        false},
182         { "blink",      "clk_32k",      32768,          true},
183         { "i2s1",       "pll_a_out0",   0,              false},
184         { "i2s3",       "pll_a_out0",   0,              false},
185         { "i2s4",       "pll_a_out0",   0,              false},
186         { "spdif_out",  "pll_a_out0",   0,              false},
187         { "d_audio",    "clk_m",        12000000,       false},
188         { "dam0",       "clk_m",        12000000,       false},
189         { "dam1",       "clk_m",        12000000,       false},
190         { "dam2",       "clk_m",        12000000,       false},
191         { "audio1",     "i2s1_sync",    0,              false},
192         { "audio3",     "i2s3_sync",    0,              false},
193         /* Setting vi_sensor-clk to true for validation purpose, will imapact
194          * power, later set to be false.*/
195         { "vi_sensor",  "pll_p",        150000000,      false},
196         { "cilab",      "pll_p",        150000000,      false},
197         { "cilcd",      "pll_p",        150000000,      false},
198         { "cile",       "pll_p",        150000000,      false},
199         { "i2c1",       "pll_p",        3200000,        false},
200         { "i2c2",       "pll_p",        3200000,        false},
201         { "i2c3",       "pll_p",        3200000,        false},
202         { "i2c4",       "pll_p",        3200000,        false},
203         { "i2c5",       "pll_p",        3200000,        false},
204         { NULL,         NULL,           0,              0},
205 };
206
207 static struct tegra_i2c_platform_data roth_i2c1_platform_data = {
208         .bus_clk_rate   = 100000,
209         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
210         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
211 };
212
213 static struct tegra_i2c_platform_data roth_i2c2_platform_data = {
214         .bus_clk_rate   = 100000,
215         .is_clkon_always = true,
216         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
217         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
218 };
219
220 static struct tegra_i2c_platform_data roth_i2c3_platform_data = {
221         .bus_clk_rate   = 100000,
222         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
223         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
224 };
225
226 static struct tegra_i2c_platform_data roth_i2c4_platform_data = {
227         .bus_clk_rate   = 10000,
228         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
229         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
230 };
231
232 static struct tegra_i2c_platform_data roth_i2c5_platform_data = {
233         .bus_clk_rate   = 400000,
234         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
235         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
236         .needs_cl_dvfs_clock = true,
237 };
238
239 #if defined(CONFIG_ARCH_TEGRA_11x_SOC)
240 static struct i2c_board_info __initdata rt5640_board_info = {
241         I2C_BOARD_INFO("rt5640", 0x1c),
242 };
243
244 static struct i2c_board_info __initdata roth_codec_tfa9887R_info = {
245         I2C_BOARD_INFO("tfa9887R", 0x37),
246 };
247
248 static struct i2c_board_info __initdata roth_codec_tfa9887L_info = {
249         I2C_BOARD_INFO("tfa9887L", 0x34),
250 };
251 #endif
252
253 static void roth_i2c_init(void)
254 {
255         tegra11_i2c_device1.dev.platform_data = &roth_i2c1_platform_data;
256         tegra11_i2c_device2.dev.platform_data = &roth_i2c2_platform_data;
257         tegra11_i2c_device3.dev.platform_data = &roth_i2c3_platform_data;
258         tegra11_i2c_device4.dev.platform_data = &roth_i2c4_platform_data;
259         tegra11_i2c_device5.dev.platform_data = &roth_i2c5_platform_data;
260
261         platform_device_register(&tegra11_i2c_device5);
262         platform_device_register(&tegra11_i2c_device4);
263         platform_device_register(&tegra11_i2c_device3);
264         platform_device_register(&tegra11_i2c_device2);
265         platform_device_register(&tegra11_i2c_device1);
266
267         i2c_register_board_info(0, &rt5640_board_info, 1);
268         i2c_register_board_info(0, &roth_codec_tfa9887R_info, 1);
269         i2c_register_board_info(0, &roth_codec_tfa9887L_info, 1);
270 }
271
272 static struct platform_device *roth_uart_devices[] __initdata = {
273         &tegra_uarta_device,
274         &tegra_uartb_device,
275         &tegra_uartc_device,
276         &tegra_uartd_device,
277 };
278 static struct uart_clk_parent uart_parent_clk[] = {
279         [0] = {.name = "clk_m"},
280         [1] = {.name = "pll_p"},
281 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
282         [2] = {.name = "pll_m"},
283 #endif
284 };
285
286 static struct tegra_uart_platform_data roth_uart_pdata;
287 static struct tegra_uart_platform_data roth_loopback_uart_pdata;
288
289 static void __init uart_debug_init(void)
290 {
291         int debug_port_id;
292
293         debug_port_id = uart_console_debug_init(3);
294         if (debug_port_id < 0)
295                 return;
296
297         roth_uart_devices[debug_port_id] = uart_console_debug_device;
298 }
299
300 static void __init roth_uart_init(void)
301 {
302         struct clk *c;
303         int i;
304
305         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
306                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
307                 if (IS_ERR_OR_NULL(c)) {
308                         pr_err("Not able to get the clock for %s\n",
309                                                 uart_parent_clk[i].name);
310                         continue;
311                 }
312                 uart_parent_clk[i].parent_clk = c;
313                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
314         }
315         roth_uart_pdata.parent_clk_list = uart_parent_clk;
316         roth_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
317         roth_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
318         roth_loopback_uart_pdata.parent_clk_count =
319                                                 ARRAY_SIZE(uart_parent_clk);
320         roth_loopback_uart_pdata.is_loopback = true;
321         tegra_uarta_device.dev.platform_data = &roth_uart_pdata;
322         tegra_uartb_device.dev.platform_data = &roth_uart_pdata;
323         tegra_uartc_device.dev.platform_data = &roth_uart_pdata;
324         tegra_uartd_device.dev.platform_data = &roth_uart_pdata;
325
326         /* Register low speed only if it is selected */
327         if (!is_tegra_debug_uartport_hs())
328                 uart_debug_init();
329
330         platform_add_devices(roth_uart_devices,
331                                 ARRAY_SIZE(roth_uart_devices));
332 }
333
334 static struct resource tegra_rtc_resources[] = {
335         [0] = {
336                 .start = TEGRA_RTC_BASE,
337                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
338                 .flags = IORESOURCE_MEM,
339         },
340         [1] = {
341                 .start = INT_RTC,
342                 .end = INT_RTC,
343                 .flags = IORESOURCE_IRQ,
344         },
345 };
346
347 static struct platform_device tegra_rtc_device = {
348         .name = "tegra_rtc",
349         .id   = -1,
350         .resource = tegra_rtc_resources,
351         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
352 };
353
354 static struct tegra_asoc_platform_data roth_audio_pdata = {
355         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
356         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
357         .gpio_hp_mute           = -1,
358         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
359         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
360         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
361         .gpio_codec1 = TEGRA_GPIO_CODEC1_EN,
362         .gpio_codec2 = TEGRA_GPIO_CODEC2_EN,
363         .gpio_codec3 = TEGRA_GPIO_CODEC3_EN,
364         .i2s_param[HIFI_CODEC]  = {
365                 .audio_port_id  = 1,
366                 .is_i2s_master  = 1,
367                 .i2s_mode       = TEGRA_DAIFMT_I2S,
368         },
369         .i2s_param[BT_SCO]      = {
370                 .audio_port_id  = 3,
371                 .is_i2s_master  = 1,
372                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
373         },
374 };
375
376 static struct platform_device roth_audio_device = {
377         .name   = "tegra-snd-rt5640",
378         .id     = 0,
379         .dev    = {
380                 .platform_data = &roth_audio_pdata,
381         },
382 };
383
384 static struct platform_device tegra_camera = {
385         .name = "tegra_camera",
386         .id = -1,
387 };
388
389
390 static struct issp_platform_data roth_issp_pdata = {
391         .reset_gpio     = TEGRA_GPIO_PH4,
392         .data_gpio      = TEGRA_GPIO_PH6,
393         .clk_gpio       = TEGRA_GPIO_PH7,
394         .fw_name        = "p2454-uc.fw",
395         .si_id          = {0x00, 0xA2, 0x52, 0x21}, /* CY7C64345 */
396         .block_size     = 128,
397         .blocks         = 128,
398         .security_size  = 64,
399         .version_addr   = 0x0286,
400 };
401
402 static struct platform_device roth_issp_device = {
403         .name   = "issp",
404         .dev    = {
405                 .platform_data = &roth_issp_pdata,
406         },
407 };
408
409 static struct platform_device *roth_devices[] __initdata = {
410         &tegra_pmu_device,
411         &tegra_rtc_device,
412         &tegra_udc_device,
413 #if defined(CONFIG_TEGRA_AVP)
414         &tegra_avp_device,
415 #endif
416         &tegra_camera,
417 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
418         &tegra11_se_device,
419 #endif
420         &tegra_ahub_device,
421         &tegra_dam_device0,
422         &tegra_dam_device1,
423         &tegra_dam_device2,
424         &tegra_i2s_device1,
425         &tegra_i2s_device3,
426         &tegra_i2s_device4,
427         &tegra_spdif_device,
428         &spdif_dit_device,
429         &bluetooth_dit_device,
430         &roth_audio_device,
431         &tegra_hda_device,
432 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
433         &tegra_aes_device,
434 #endif
435         &roth_issp_device,
436 };
437
438 #ifdef CONFIG_USB_SUPPORT
439 static struct tegra_usb_platform_data tegra_udc_pdata = {
440         .port_otg = true,
441         .has_hostpc = true,
442         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
443         .op_mode = TEGRA_USB_OPMODE_DEVICE,
444         .u_data.dev = {
445                 .vbus_pmu_irq = 0,
446                 .vbus_gpio = -1,
447                 .charging_supported = false,
448                 .remote_wakeup_supported = false,
449         },
450         .u_cfg.utmi = {
451                 .hssync_start_delay = 0,
452                 .elastic_limit = 16,
453                 .idle_wait_delay = 17,
454                 .term_range_adj = 6,
455                 .xcvr_setup = 8,
456                 .xcvr_lsfslew = 2,
457                 .xcvr_lsrslew = 2,
458                 .xcvr_setup_offset = 0,
459                 .xcvr_use_fuses = 1,
460         },
461 };
462
463 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
464         .port_otg = true,
465         .has_hostpc = true,
466         .unaligned_dma_buf_supported = false,
467         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
468         .op_mode = TEGRA_USB_OPMODE_HOST,
469         .u_data.host = {
470                 .vbus_gpio = -1,
471                 .hot_plug = true,
472                 .remote_wakeup_supported = true,
473                 .power_off_on_suspend = false,
474         },
475         .u_cfg.utmi = {
476                 .hssync_start_delay = 0,
477                 .elastic_limit = 16,
478                 .idle_wait_delay = 17,
479                 .term_range_adj = 6,
480                 .xcvr_setup = 15,
481                 .xcvr_lsfslew = 2,
482                 .xcvr_lsrslew = 2,
483                 .xcvr_setup_offset = 0,
484                 .xcvr_use_fuses = 1,
485                 .vbus_oc_map = 0x4,
486         },
487 };
488
489 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
490         .port_otg = false,
491         .has_hostpc = true,
492         .unaligned_dma_buf_supported = false,
493         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
494         .op_mode = TEGRA_USB_OPMODE_HOST,
495         .u_data.host = {
496                 .vbus_gpio = -1,
497                 .hot_plug = true,
498                 .remote_wakeup_supported = true,
499                 .power_off_on_suspend = false,
500         },
501         .u_cfg.utmi = {
502         .hssync_start_delay = 0,
503                 .elastic_limit = 16,
504                 .idle_wait_delay = 17,
505                 .term_range_adj = 6,
506                 .xcvr_setup = 8,
507                 .xcvr_lsfslew = 2,
508                 .xcvr_lsrslew = 2,
509                 .xcvr_setup_offset = 0,
510                 .xcvr_use_fuses = 1,
511                 .vbus_oc_map = 0x5,
512         },
513 };
514
515 static struct tegra_usb_otg_data tegra_otg_pdata = {
516         .ehci_device = &tegra_ehci1_device,
517         .ehci_pdata = &tegra_ehci1_utmi_pdata,
518 };
519
520 static void roth_usb_init(void)
521 {
522         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
523         platform_device_register(&tegra_otg_device);
524
525         /* Setup the udc platform data */
526         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
527
528         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
529         platform_device_register(&tegra_ehci3_device);
530 }
531
532 #else
533 static void roth_usb_init(void) { }
534 #endif
535
536 static void roth_audio_init(void)
537 {
538         roth_audio_pdata.codec_name = "rt5640.0-001c";
539         roth_audio_pdata.codec_dai_name = "rt5640-aif1";
540 }
541
542
543 static struct platform_device *roth_spi_devices[] __initdata = {
544         &tegra11_spi_device4,
545 };
546
547 struct spi_clk_parent spi_parent_clk_roth[] = {
548         [0] = {.name = "pll_p"},
549 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
550         [1] = {.name = "pll_m"},
551         [2] = {.name = "clk_m"},
552 #else
553         [1] = {.name = "clk_m"},
554 #endif
555 };
556
557 static struct tegra_spi_platform_data roth_spi_pdata = {
558         .is_dma_based           = false,
559         .max_dma_buffer         = 16 * 1024,
560         .is_clkon_always        = false,
561         .max_rate               = 25000000,
562 };
563
564 static void __init roth_spi_init(void)
565 {
566         int i;
567         struct clk *c;
568
569         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_roth); ++i) {
570                 c = tegra_get_clock_by_name(spi_parent_clk_roth[i].name);
571                 if (IS_ERR_OR_NULL(c)) {
572                         pr_err("Not able to get the clock for %s\n",
573                                 spi_parent_clk_roth[i].name);
574                         continue;
575                 }
576                 spi_parent_clk_roth[i].parent_clk = c;
577                 spi_parent_clk_roth[i].fixed_clk_rate = clk_get_rate(c);
578         }
579         roth_spi_pdata.parent_clk_list = spi_parent_clk_roth;
580         roth_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_roth);
581         tegra11_spi_device4.dev.platform_data = &roth_spi_pdata;
582         platform_add_devices(roth_spi_devices,
583                 ARRAY_SIZE(roth_spi_devices));
584 }
585
586 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
587         /* name         parent          rate            enabled */
588         { "extern2",    "pll_p",        41000000,       false},
589         { "clk_out_2",  "extern2",      40800000,       false},
590         { NULL,         NULL,           0,              0},
591 };
592
593 struct rm_spi_ts_platform_data rm31080ts_roth_data = {
594         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
595         .config = 0,
596         .platform_id = RM_PLATFORM_R005,
597         .name_of_clock = "clk_out_2",
598         .name_of_clock_con = "extern2",
599 };
600
601 static struct tegra_spi_device_controller_data dev_cdata = {
602         .rx_clk_tap_delay = 0,
603         .tx_clk_tap_delay = 16,
604 };
605
606 struct spi_board_info rm31080a_roth_spi_board[1] = {
607         {
608          .modalias = "rm_ts_spidev",
609          .bus_num = 3,
610          .chip_select = 2,
611          .max_speed_hz = 12 * 1000 * 1000,
612          .mode = SPI_MODE_0,
613          .controller_data = &dev_cdata,
614          .platform_data = &rm31080ts_roth_data,
615          },
616 };
617
618 static int __init roth_touch_init(void)
619 {
620         struct board_info board_info;
621
622         tegra_get_board_info(&board_info);
623         int touch_panel_id = tegra_get_touch_panel_id();
624         if (touch_panel_id == PANEL_TPK ||
625                         touch_panel_id == PANEL_WINTEK) {
626                 int err;
627                 err = gpio_request(TOUCH_GPIO_CLK, "touch-gpio-clk");
628                 if (err < 0)
629                         pr_err("%s: gpio_request failed %d\n",
630                                 __func__, err);
631                 else {
632                         err = gpio_direction_output(TOUCH_GPIO_CLK, 0);
633                         if (err < 0)
634                                 pr_err("%s: set output failed %d\n",
635                                 __func__, err);
636                         gpio_free(TOUCH_GPIO_CLK);
637                 }
638                 tegra_pinmux_set_pullupdown(TOUCH_GPIO_CLK_PG,
639                                                 TEGRA_PUPD_NORMAL);
640                 tegra_pinmux_set_tristate(TOUCH_GPIO_CLK_PG,
641                                                 TEGRA_TRI_TRISTATE);
642                 rm31080ts_roth_data.name_of_clock = NULL;
643                 rm31080ts_roth_data.name_of_clock_con = NULL;
644         } else
645                 tegra_clk_init_from_table(touch_clk_init_table);
646         rm31080a_roth_spi_board[0].irq =
647                 gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
648         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
649                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
650                                 &rm31080ts_roth_data,
651                                 &rm31080a_roth_spi_board[0],
652                                 ARRAY_SIZE(rm31080a_roth_spi_board));
653         return 0;
654 }
655
656 static void __init tegra_roth_init(void)
657 {
658         tegra_clk_init_from_table(roth_clk_init_table);
659         tegra_clk_verify_parents();
660         tegra_soc_device_init("roth");
661         tegra_enable_pinmux();
662         roth_pinmux_init();
663         roth_i2c_init();
664         roth_spi_init();
665         roth_usb_init();
666         roth_uart_init();
667         roth_led_init();
668         roth_audio_init();
669         platform_add_devices(roth_devices, ARRAY_SIZE(roth_devices));
670         //tegra_ram_console_debug_init();
671         tegra_io_dpd_init();
672         roth_regulator_init();
673         roth_sdhci_init();
674         roth_suspend_init();
675         roth_emc_init();
676         roth_edp_init();
677         isomgr_init();
678         roth_touch_init();
679         /* roth will pass a null board id to panel_init */
680         roth_panel_init(0);
681         roth_kbc_init();
682         roth_pmon_init();
683 #ifdef CONFIG_BT_BLUESLEEP
684         roth_setup_bluesleep();
685         roth_setup_bt_rfkill();
686 #elif defined CONFIG_BLUEDROID_PM
687         roth_setup_bluedroid_pm();
688 #endif
689         tegra_release_bootloader_fb();
690 #ifdef CONFIG_TEGRA_WDT_RECOVERY
691         tegra_wdt_recovery_init();
692 #endif
693         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
694         roth_sensors_init();
695         roth_soctherm_init();
696         roth_fan_init();
697         tegra_register_fuse();
698 }
699
700 static void __init roth_ramconsole_reserve(unsigned long size)
701 {
702         tegra_ram_console_debug_reserve(SZ_1M);
703 }
704
705 #ifdef CONFIG_USE_OF
706 struct of_dev_auxdata roth_auxdata_lookup[] __initdata = {
707         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
708                 NULL),
709         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d", NULL),
710         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d", NULL),
711         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
712                 NULL),
713         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi", NULL),
714         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp", NULL),
715         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
716         {}
717 };
718 #endif
719
720 static void __init tegra_roth_dt_init(void)
721 {
722 #ifdef CONFIG_USE_OF
723         of_platform_populate(NULL,
724                 of_default_bus_match_table, roth_auxdata_lookup,
725                 &platform_bus);
726 #endif
727
728         tegra_roth_init();
729 }
730
731 static void __init tegra_roth_reserve(void)
732 {
733 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
734         /* 1920*1200*4*2 = 18432000 bytes */
735         tegra_reserve(0, SZ_16M + SZ_2M, SZ_4M);
736 #else
737         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
738 #endif
739         roth_ramconsole_reserve(SZ_1M);
740 }
741
742 static const char * const roth_dt_board_compat[] = {
743         "nvidia,roth",
744         NULL
745 };
746
747 MACHINE_START(ROTH, "roth")
748         .atag_offset    = 0x100,
749         .smp            = smp_ops(tegra_smp_ops),
750         .map_io         = tegra_map_common_io,
751         .reserve        = tegra_roth_reserve,
752         .init_early     = tegra11x_init_early,
753         .init_irq       = tegra_dt_init_irq,
754         .init_time      = tegra_init_timer,
755         .init_machine   = tegra_roth_dt_init,
756         .restart        = tegra_assert_system_reset,
757         .dt_compat      = roth_dt_board_compat,
758 MACHINE_END