45f80bbc90b5bd7a0bd1e772b98e4a00184904b4
[linux-3.10.git] / arch / arm / mach-tegra / board-roth.c
1 /*
2  * arch/arm/mach-tegra/board-roth.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/tegra_uart.h>
35 #include <linux/memblock.h>
36 #include <linux/rfkill-gpio.h>
37 #include <linux/skbuff.h>
38 #include <linux/ti_wilink_st.h>
39 #include <linux/regulator/consumer.h>
40 #include <linux/max17048_battery.h>
41 #include <linux/leds.h>
42 #include <linux/leds_pwm.h>
43 #include <linux/i2c/at24.h>
44 #include <linux/of_platform.h>
45 #include <linux/usb/tegra_usb_phy.h>
46 #include <asm/hardware/gic.h>
47
48 #include <mach/clk.h>
49 #include <mach/iomap.h>
50 #include <mach/irqs.h>
51 #include <mach/pinmux.h>
52 #include <mach/pinmux-tegra30.h>
53 #include <mach/iomap.h>
54 #include <mach/io_dpd.h>
55 #include <mach/i2s.h>
56 #include <mach/isomgr.h>
57 #include <mach/tegra_asoc_pdata.h>
58 #include <asm/mach-types.h>
59 #include <asm/mach/arch.h>
60 #include <mach/gpio-tegra.h>
61 #include <mach/tegra_fiq_debugger.h>
62 #include <mach/edp.h>
63
64 #include "board.h"
65 #include "board-common.h"
66 #include "clock.h"
67 #include "board-roth.h"
68 #include "devices.h"
69 #include "gpio-names.h"
70 #include "fuse.h"
71 #include "pm.h"
72 #include "common.h"
73 #include "tegra-board-id.h"
74
75 #ifdef CONFIG_BT_BLUESLEEP
76 static struct rfkill_gpio_platform_data roth_bt_rfkill_pdata = {
77                 .name           = "bt_rfkill",
78                 .shutdown_gpio  = TEGRA_GPIO_PQ7,
79                 .type           = RFKILL_TYPE_BLUETOOTH,
80 };
81
82 static struct platform_device roth_bt_rfkill_device = {
83         .name = "rfkill_gpio",
84         .id             = -1,
85         .dev = {
86                 .platform_data = &roth_bt_rfkill_pdata,
87         },
88 };
89
90 static struct resource roth_bluesleep_resources[] = {
91         [0] = {
92                 .name = "gpio_host_wake",
93                         .start  = TEGRA_GPIO_PU6,
94                         .end    = TEGRA_GPIO_PU6,
95                         .flags  = IORESOURCE_IO,
96         },
97         [1] = {
98                 .name = "gpio_ext_wake",
99                         .start  = TEGRA_GPIO_PEE1,
100                         .end    = TEGRA_GPIO_PEE1,
101                         .flags  = IORESOURCE_IO,
102         },
103         [2] = {
104                 .name = "host_wake",
105                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
106         },
107 };
108
109 static struct platform_device roth_bluesleep_device = {
110         .name           = "bluesleep",
111         .id             = -1,
112         .num_resources  = ARRAY_SIZE(roth_bluesleep_resources),
113         .resource       = roth_bluesleep_resources,
114 };
115
116 static noinline void __init roth_setup_bt_rfkill(void)
117 {
118                 roth_bt_rfkill_pdata.reset_gpio = TEGRA_GPIO_PQ6;
119         platform_device_register(&roth_bt_rfkill_device);
120 }
121
122 static noinline void __init roth_setup_bluesleep(void)
123 {
124         roth_bluesleep_resources[2].start =
125                 roth_bluesleep_resources[2].end =
126                         gpio_to_irq(TEGRA_GPIO_PU6);
127         platform_device_register(&roth_bluesleep_device);
128         return;
129 }
130 #elif defined CONFIG_BLUEDROID_PM
131 static struct resource roth_bluedroid_pm_resources[] = {
132         [0] = {
133                 .name   = "shutdown_gpio",
134                 .start  = TEGRA_GPIO_PQ7,
135                 .end    = TEGRA_GPIO_PQ7,
136                 .flags  = IORESOURCE_IO,
137         },
138         [1] = {
139                 .name = "host_wake",
140                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
141         },
142         [2] = {
143                 .name = "gpio_ext_wake",
144                 .start  = TEGRA_GPIO_PEE1,
145                 .end    = TEGRA_GPIO_PEE1,
146                 .flags  = IORESOURCE_IO,
147         },
148         [3] = {
149                 .name = "gpio_host_wake",
150                 .start  = TEGRA_GPIO_PU6,
151                 .end    = TEGRA_GPIO_PU6,
152                 .flags  = IORESOURCE_IO,
153         },
154 };
155
156 static struct platform_device roth_bluedroid_pm_device = {
157         .name = "bluedroid_pm",
158         .id             = 0,
159         .num_resources  = ARRAY_SIZE(roth_bluedroid_pm_resources),
160         .resource       = roth_bluedroid_pm_resources,
161 };
162
163 static noinline void __init roth_setup_bluedroid_pm(void)
164 {
165         roth_bluedroid_pm_resources[1].start =
166                 roth_bluedroid_pm_resources[1].end =
167                                 gpio_to_irq(TEGRA_GPIO_PU6);
168         platform_device_register(&roth_bluedroid_pm_device);
169 }
170 #endif
171 static __initdata struct tegra_clk_init_table roth_clk_init_table[] = {
172         /* name         parent          rate            enabled */
173         { "pll_m",      NULL,           0,              false},
174         { "hda",        "pll_p",        108000000,      false},
175         { "hda2codec_2x", "pll_p",      48000000,       false},
176         { "pwm",        "pll_p",        37000000,       false},
177         { "blink",      "clk_32k",      32768,          true},
178         { "i2s1",       "pll_a_out0",   0,              false},
179         { "i2s3",       "pll_a_out0",   0,              false},
180         { "i2s4",       "pll_a_out0",   0,              false},
181         { "spdif_out",  "pll_a_out0",   0,              false},
182         { "d_audio",    "clk_m",        12000000,       false},
183         { "dam0",       "clk_m",        12000000,       false},
184         { "dam1",       "clk_m",        12000000,       false},
185         { "dam2",       "clk_m",        12000000,       false},
186         { "audio1",     "i2s1_sync",    0,              false},
187         { "audio3",     "i2s3_sync",    0,              false},
188         /* Setting vi_sensor-clk to true for validation purpose, will imapact
189          * power, later set to be false.*/
190         { "vi_sensor",  "pll_p",        150000000,      false},
191         { "cilab",      "pll_p",        150000000,      false},
192         { "cilcd",      "pll_p",        150000000,      false},
193         { "cile",       "pll_p",        150000000,      false},
194         { "i2c1",       "pll_p",        3200000,        false},
195         { "i2c2",       "pll_p",        3200000,        false},
196         { "i2c3",       "pll_p",        3200000,        false},
197         { "i2c4",       "pll_p",        3200000,        false},
198         { "i2c5",       "pll_p",        3200000,        false},
199         { NULL,         NULL,           0,              0},
200 };
201
202 static struct tegra_i2c_platform_data roth_i2c1_platform_data = {
203         .bus_clk_rate   = 100000,
204         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
205         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
206 };
207
208 static struct tegra_i2c_platform_data roth_i2c2_platform_data = {
209         .bus_clk_rate   = 100000,
210         .is_clkon_always = true,
211         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
212         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
213 };
214
215 static struct tegra_i2c_platform_data roth_i2c3_platform_data = {
216         .bus_clk_rate   = 100000,
217         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
218         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
219 };
220
221 static struct tegra_i2c_platform_data roth_i2c4_platform_data = {
222         .bus_clk_rate   = 10000,
223         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
224         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
225 };
226
227 static struct tegra_i2c_platform_data roth_i2c5_platform_data = {
228         .bus_clk_rate   = 400000,
229         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
230         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
231 };
232
233 #if defined(CONFIG_ARCH_TEGRA_11x_SOC)
234 static struct i2c_board_info __initdata rt5640_board_info = {
235         I2C_BOARD_INFO("rt5640", 0x1c),
236 };
237
238 static struct i2c_board_info __initdata roth_codec_tfa9887R_info = {
239         I2C_BOARD_INFO("tfa9887R", 0x37),
240 };
241
242 static struct i2c_board_info __initdata roth_codec_tfa9887L_info = {
243         I2C_BOARD_INFO("tfa9887L", 0x34),
244 };
245
246 /* On A01, Left Speaker is moved to 0x34 */
247 static struct i2c_board_info __initdata roth_codec_tfa9887L_info_a01 = {
248         I2C_BOARD_INFO("tfa9887L", 0x34),
249 };
250 #endif
251
252 static void roth_i2c_init(void)
253 {
254         struct board_info board_info;
255
256         tegra_get_board_info(&board_info);
257
258         tegra11_i2c_device1.dev.platform_data = &roth_i2c1_platform_data;
259         tegra11_i2c_device2.dev.platform_data = &roth_i2c2_platform_data;
260         tegra11_i2c_device3.dev.platform_data = &roth_i2c3_platform_data;
261         tegra11_i2c_device4.dev.platform_data = &roth_i2c4_platform_data;
262         tegra11_i2c_device5.dev.platform_data = &roth_i2c5_platform_data;
263
264         platform_device_register(&tegra11_i2c_device5);
265         platform_device_register(&tegra11_i2c_device4);
266         platform_device_register(&tegra11_i2c_device3);
267         platform_device_register(&tegra11_i2c_device2);
268         platform_device_register(&tegra11_i2c_device1);
269
270         i2c_register_board_info(0, &rt5640_board_info, 1);
271         i2c_register_board_info(0, &roth_codec_tfa9887R_info, 1);
272
273         if (board_info.fab >= BOARD_FAB_A01)
274                 i2c_register_board_info(0, &roth_codec_tfa9887L_info_a01, 1);
275         else
276                 i2c_register_board_info(0, &roth_codec_tfa9887L_info, 1);
277 }
278
279 static struct platform_device *roth_uart_devices[] __initdata = {
280         &tegra_uarta_device,
281         &tegra_uartb_device,
282         &tegra_uartc_device,
283         &tegra_uartd_device,
284 };
285 static struct uart_clk_parent uart_parent_clk[] = {
286         [0] = {.name = "clk_m"},
287         [1] = {.name = "pll_p"},
288 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
289         [2] = {.name = "pll_m"},
290 #endif
291 };
292
293 static struct tegra_uart_platform_data roth_uart_pdata;
294 static struct tegra_uart_platform_data roth_loopback_uart_pdata;
295
296 static void __init uart_debug_init(void)
297 {
298         int debug_port_id;
299
300         debug_port_id = uart_console_debug_init(3);
301         if (debug_port_id < 0)
302                 return;
303
304         roth_uart_devices[debug_port_id] = uart_console_debug_device;
305 }
306
307 static void __init roth_uart_init(void)
308 {
309         struct clk *c;
310         int i;
311
312         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
313                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
314                 if (IS_ERR_OR_NULL(c)) {
315                         pr_err("Not able to get the clock for %s\n",
316                                                 uart_parent_clk[i].name);
317                         continue;
318                 }
319                 uart_parent_clk[i].parent_clk = c;
320                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
321         }
322         roth_uart_pdata.parent_clk_list = uart_parent_clk;
323         roth_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
324         roth_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
325         roth_loopback_uart_pdata.parent_clk_count =
326                                                 ARRAY_SIZE(uart_parent_clk);
327         roth_loopback_uart_pdata.is_loopback = true;
328         tegra_uarta_device.dev.platform_data = &roth_uart_pdata;
329         tegra_uartb_device.dev.platform_data = &roth_uart_pdata;
330         tegra_uartc_device.dev.platform_data = &roth_uart_pdata;
331         tegra_uartd_device.dev.platform_data = &roth_uart_pdata;
332
333         /* Register low speed only if it is selected */
334         if (!is_tegra_debug_uartport_hs())
335                 uart_debug_init();
336
337         platform_add_devices(roth_uart_devices,
338                                 ARRAY_SIZE(roth_uart_devices));
339 }
340
341 static struct resource tegra_rtc_resources[] = {
342         [0] = {
343                 .start = TEGRA_RTC_BASE,
344                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
345                 .flags = IORESOURCE_MEM,
346         },
347         [1] = {
348                 .start = INT_RTC,
349                 .end = INT_RTC,
350                 .flags = IORESOURCE_IRQ,
351         },
352 };
353
354 static struct platform_device tegra_rtc_device = {
355         .name = "tegra_rtc",
356         .id   = -1,
357         .resource = tegra_rtc_resources,
358         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
359 };
360
361 static struct tegra_asoc_platform_data roth_audio_pdata = {
362         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
363         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
364         .gpio_hp_mute           = -1,
365         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
366         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
367         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
368         .gpio_codec1 = TEGRA_GPIO_CODEC1_EN,
369         .gpio_codec2 = TEGRA_GPIO_CODEC2_EN,
370         .gpio_codec3 = TEGRA_GPIO_CODEC3_EN,
371         .i2s_param[HIFI_CODEC]  = {
372                 .audio_port_id  = 1,
373                 .is_i2s_master  = 1,
374                 .i2s_mode       = TEGRA_DAIFMT_I2S,
375         },
376         .i2s_param[BT_SCO]      = {
377                 .audio_port_id  = 3,
378                 .is_i2s_master  = 1,
379                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
380         },
381 };
382
383 static struct platform_device roth_audio_device = {
384         .name   = "tegra-snd-rt5640",
385         .id     = 0,
386         .dev    = {
387                 .platform_data = &roth_audio_pdata,
388         },
389 };
390
391 static struct platform_device tegra_camera = {
392         .name = "tegra_camera",
393         .id = -1,
394 };
395
396 static struct led_pwm roth_led_info[] = {
397         {
398                 .name                   = "roth-led",
399                 .default_trigger        = "none",
400                 .pwm_id                 = 2,
401                 .active_low             = 0,
402                 .max_brightness         = 255,
403                 .pwm_period_ns          = 10000000,
404         },
405 };
406
407 static struct led_pwm_platform_data roth_leds_pdata = {
408         .leds           = roth_led_info,
409         .num_leds       = ARRAY_SIZE(roth_led_info),
410 };
411
412 static struct platform_device roth_leds_pwm_device = {
413         .name   = "leds_pwm",
414         .id     = -1,
415         .dev    = {
416                 .platform_data = &roth_leds_pdata,
417         },
418 };
419
420
421 static struct platform_device *roth_devices[] __initdata = {
422         &tegra_pmu_device,
423         &tegra_rtc_device,
424         &tegra_udc_device,
425 #if defined(CONFIG_TEGRA_AVP)
426         &tegra_avp_device,
427 #endif
428         &tegra_camera,
429 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
430         &tegra11_se_device,
431 #endif
432         &tegra_ahub_device,
433         &tegra_dam_device0,
434         &tegra_dam_device1,
435         &tegra_dam_device2,
436         &tegra_i2s_device1,
437         &tegra_i2s_device3,
438         &tegra_i2s_device4,
439         &tegra_spdif_device,
440         &spdif_dit_device,
441         &bluetooth_dit_device,
442         &roth_audio_device,
443         &tegra_hda_device,
444 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
445         &tegra_aes_device,
446 #endif
447
448         &tegra_pwfm_device,
449         &roth_leds_pwm_device,
450 };
451
452 #ifdef CONFIG_USB_SUPPORT
453 static struct tegra_usb_platform_data tegra_udc_pdata = {
454         .port_otg = true,
455         .has_hostpc = true,
456         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
457         .op_mode = TEGRA_USB_OPMODE_DEVICE,
458         .u_data.dev = {
459                 .vbus_pmu_irq = 0,
460                 .vbus_gpio = -1,
461                 .charging_supported = false,
462                 .remote_wakeup_supported = false,
463         },
464         .u_cfg.utmi = {
465                 .hssync_start_delay = 0,
466                 .elastic_limit = 16,
467                 .idle_wait_delay = 17,
468                 .term_range_adj = 6,
469                 .xcvr_setup = 8,
470                 .xcvr_lsfslew = 2,
471                 .xcvr_lsrslew = 2,
472                 .xcvr_setup_offset = 0,
473                 .xcvr_use_fuses = 1,
474         },
475 };
476
477 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
478         .port_otg = true,
479         .has_hostpc = true,
480         .unaligned_dma_buf_supported = false,
481         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
482         .op_mode = TEGRA_USB_OPMODE_HOST,
483         .u_data.host = {
484                 .vbus_gpio = -1,
485                 .hot_plug = true,
486                 .remote_wakeup_supported = true,
487                 .power_off_on_suspend = false,
488         },
489         .u_cfg.utmi = {
490                 .hssync_start_delay = 0,
491                 .elastic_limit = 16,
492                 .idle_wait_delay = 17,
493                 .term_range_adj = 6,
494                 .xcvr_setup = 15,
495                 .xcvr_lsfslew = 2,
496                 .xcvr_lsrslew = 2,
497                 .xcvr_setup_offset = 0,
498                 .xcvr_use_fuses = 1,
499                 .vbus_oc_map = 0x4,
500         },
501 };
502
503 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
504         .port_otg = false,
505         .has_hostpc = true,
506         .unaligned_dma_buf_supported = false,
507         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
508         .op_mode = TEGRA_USB_OPMODE_HOST,
509         .u_data.host = {
510                 .vbus_gpio = -1,
511                 .hot_plug = true,
512                 .remote_wakeup_supported = true,
513                 .power_off_on_suspend = false,
514         },
515         .u_cfg.utmi = {
516         .hssync_start_delay = 0,
517                 .elastic_limit = 16,
518                 .idle_wait_delay = 17,
519                 .term_range_adj = 6,
520                 .xcvr_setup = 8,
521                 .xcvr_lsfslew = 2,
522                 .xcvr_lsrslew = 2,
523                 .xcvr_setup_offset = 0,
524                 .xcvr_use_fuses = 1,
525                 .vbus_oc_map = 0x5,
526         },
527 };
528
529 static struct tegra_usb_otg_data tegra_otg_pdata = {
530         .ehci_device = &tegra_ehci1_device,
531         .ehci_pdata = &tegra_ehci1_utmi_pdata,
532 };
533
534 static void roth_usb_init(void)
535 {
536         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
537         platform_device_register(&tegra_otg_device);
538
539         /* Setup the udc platform data */
540         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
541
542         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
543         platform_device_register(&tegra_ehci3_device);
544 }
545
546 #else
547 static void roth_usb_init(void) { }
548 #endif
549
550 static void roth_audio_init(void)
551 {
552         struct board_info board_info;
553
554         tegra_get_board_info(&board_info);
555
556         roth_audio_pdata.codec_name = "rt5640.0-001c";
557         roth_audio_pdata.codec_dai_name = "rt5640-aif1";
558 }
559
560
561 static void __init tegra_roth_init(void)
562 {
563         tegra_clk_init_from_table(roth_clk_init_table);
564         tegra_clk_vefify_parents();
565         tegra_smmu_init();
566         tegra_soc_device_init("roth");
567         tegra_enable_pinmux();
568         roth_pinmux_init();
569         roth_i2c_init();
570         roth_usb_init();
571         roth_uart_init();
572         roth_audio_init();
573         platform_add_devices(roth_devices, ARRAY_SIZE(roth_devices));
574         //tegra_ram_console_debug_init();
575         tegra_io_dpd_init();
576         roth_regulator_init();
577         roth_sdhci_init();
578         roth_suspend_init();
579         roth_emc_init();
580         roth_edp_init();
581         isomgr_init();
582         roth_panel_init();
583         roth_kbc_init();
584         roth_pmon_init();
585 #ifdef CONFIG_BT_BLUESLEEP
586         roth_setup_bluesleep();
587         roth_setup_bt_rfkill();
588 #elif defined CONFIG_BLUEDROID_PM
589         roth_setup_bluedroid_pm();
590 #endif
591         tegra_release_bootloader_fb();
592 #ifdef CONFIG_TEGRA_WDT_RECOVERY
593         tegra_wdt_recovery_init();
594 #endif
595         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
596         roth_sensors_init();
597         roth_soctherm_init();
598         roth_fan_init();
599         tegra_register_fuse();
600 }
601
602 static void __init roth_ramconsole_reserve(unsigned long size)
603 {
604         tegra_ram_console_debug_reserve(SZ_1M);
605 }
606
607 #ifdef CONFIG_USE_OF
608 struct of_dev_auxdata roth_auxdata_lookup[] __initdata = {
609         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
610                 NULL),
611         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d", NULL),
612         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d", NULL),
613         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
614                 NULL),
615         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi", NULL),
616         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp", NULL),
617         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
618         {}
619 };
620 #endif
621
622 static void __init tegra_roth_dt_init(void)
623 {
624 #ifdef CONFIG_USE_OF
625         of_platform_populate(NULL,
626                 of_default_bus_match_table, roth_auxdata_lookup,
627                 &platform_bus);
628 #endif
629
630         tegra_roth_init();
631 }
632
633 static void __init tegra_roth_reserve(void)
634 {
635 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
636         /* 1920*1200*4*2 = 18432000 bytes */
637         tegra_reserve(0, SZ_16M + SZ_2M, SZ_4M);
638 #else
639         tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_4M);
640 #endif
641         roth_ramconsole_reserve(SZ_1M);
642 }
643
644 static const char * const roth_dt_board_compat[] = {
645         "nvidia,roth",
646         NULL
647 };
648
649 MACHINE_START(ROTH, "roth")
650         .atag_offset    = 0x100,
651         .smp            = smp_ops(tegra_smp_ops),
652         .map_io         = tegra_map_common_io,
653         .reserve        = tegra_roth_reserve,
654         .init_early     = tegra11x_init_early,
655         .init_irq       = tegra_dt_init_irq,
656         .handle_irq     = gic_handle_irq,
657         .timer          = &tegra_sys_timer,
658         .init_machine   = tegra_roth_dt_init,
659         .restart        = tegra_assert_system_reset,
660         .dt_compat      = roth_dt_board_compat,
661 MACHINE_END