ARM: tegra: dalmore/pluto: initialize parent clock of spi to PLLP.
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/edp.h>
54 #include <linux/mfd/tlv320aic3262-registers.h>
55 #include <linux/mfd/tlv320aic3xxx-core.h>
56 #include <linux/usb/tegra_usb_phy.h>
57
58 #include <asm/hardware/gic.h>
59
60 #include <mach/clk.h>
61 #include <mach/iomap.h>
62 #include <mach/irqs.h>
63 #include <mach/pinmux.h>
64 #include <mach/pinmux-t11.h>
65 #include <mach/iomap.h>
66 #include <mach/io_dpd.h>
67 #include <mach/i2s.h>
68 #include <mach/isomgr.h>
69 #include <mach/tegra_asoc_pdata.h>
70 #include <asm/mach-types.h>
71 #include <asm/mach/arch.h>
72 #include <mach/gpio-tegra.h>
73 #include <mach/tegra_fiq_debugger.h>
74 #include <mach/tegra-bb-power.h>
75 #include <mach/tegra_usb_modem_power.h>
76 #include <mach/tegra_wakeup_monitor.h>
77
78 #include "board.h"
79 #include "board-common.h"
80 #include "board-touch-raydium.h"
81 #include "clock.h"
82 #include "board-pluto.h"
83 #include "baseband-xmm-power.h"
84 #include "tegra-board-id.h"
85 #include "devices.h"
86 #include "gpio-names.h"
87 #include "fuse.h"
88 #include "pm.h"
89 #include "common.h"
90
91 #ifdef CONFIG_BT_BLUESLEEP
92 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
93         .name           = "bt_rfkill",
94         .shutdown_gpio  = TEGRA_GPIO_PQ7,
95         .reset_gpio     = TEGRA_GPIO_PQ6,
96         .type           = RFKILL_TYPE_BLUETOOTH,
97 };
98
99 static struct platform_device pluto_bt_rfkill_device = {
100         .name = "rfkill_gpio",
101         .id             = -1,
102         .dev = {
103                 .platform_data = &pluto_bt_rfkill_pdata,
104         },
105 };
106
107 static noinline void __init pluto_setup_bt_rfkill(void)
108 {
109         platform_device_register(&pluto_bt_rfkill_device);
110 }
111
112 static struct resource pluto_bluesleep_resources[] = {
113         [0] = {
114                 .name = "gpio_host_wake",
115                         .start  = TEGRA_GPIO_PU6,
116                         .end    = TEGRA_GPIO_PU6,
117                         .flags  = IORESOURCE_IO,
118         },
119         [1] = {
120                 .name = "gpio_ext_wake",
121                         .start  = TEGRA_GPIO_PEE1,
122                         .end    = TEGRA_GPIO_PEE1,
123                         .flags  = IORESOURCE_IO,
124         },
125         [2] = {
126                 .name = "host_wake",
127                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
128         },
129 };
130
131 static struct platform_device pluto_bluesleep_device = {
132         .name           = "bluesleep",
133         .id             = -1,
134         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
135         .resource       = pluto_bluesleep_resources,
136 };
137
138 static noinline void __init pluto_setup_bluesleep(void)
139 {
140         pluto_bluesleep_resources[2].start =
141                 pluto_bluesleep_resources[2].end =
142                         gpio_to_irq(TEGRA_GPIO_PU6);
143         platform_device_register(&pluto_bluesleep_device);
144         return;
145 }
146 #elif defined CONFIG_BLUEDROID_PM
147 static struct resource pluto_bluedroid_pm_resources[] = {
148         [0] = {
149                 .name   = "shutdown_gpio",
150                 .start  = TEGRA_GPIO_PQ7,
151                 .end    = TEGRA_GPIO_PQ7,
152                 .flags  = IORESOURCE_IO,
153         },
154         [1] = {
155                 .name = "host_wake",
156                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
157         },
158         [2] = {
159                 .name = "gpio_ext_wake",
160                 .start  = TEGRA_GPIO_PEE1,
161                 .end    = TEGRA_GPIO_PEE1,
162                 .flags  = IORESOURCE_IO,
163         },
164         [3] = {
165                 .name = "gpio_host_wake",
166                 .start  = TEGRA_GPIO_PU6,
167                 .end    = TEGRA_GPIO_PU6,
168                 .flags  = IORESOURCE_IO,
169         },
170         [4] = {
171                 .name = "reset_gpio",
172                 .start  = TEGRA_GPIO_PQ6,
173                 .end    = TEGRA_GPIO_PQ6,
174                 .flags  = IORESOURCE_IO,
175         },
176 };
177
178 static struct platform_device pluto_bluedroid_pm_device = {
179         .name = "bluedroid_pm",
180         .id             = 0,
181         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
182         .resource       = pluto_bluedroid_pm_resources,
183 };
184
185 static noinline void __init pluto_setup_bluedroid_pm(void)
186 {
187         pluto_bluedroid_pm_resources[1].start =
188                 pluto_bluedroid_pm_resources[1].end =
189                                         gpio_to_irq(TEGRA_GPIO_PU6);
190         platform_device_register(&pluto_bluedroid_pm_device);
191 }
192 #endif
193
194 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
195         /* name         parent          rate            enabled */
196         { "pll_m",      NULL,           0,              false},
197         { "hda",        "pll_p",        108000000,      false},
198         { "hda2codec_2x", "pll_p",      48000000,       false},
199         { "pwm",        "pll_p",        3187500,        false},
200         { "i2s1",       "pll_a_out0",   0,              false},
201         { "i2s2",       "pll_a_out0",   0,              false},
202         { "i2s3",       "pll_a_out0",   0,              false},
203         { "i2s4",       "pll_a_out0",   0,              false},
204         { "spdif_out",  "pll_a_out0",   0,              false},
205         { "d_audio",    "clk_m",        12000000,       false},
206         { "dam0",       "clk_m",        12000000,       false},
207         { "dam1",       "clk_m",        12000000,       false},
208         { "dam2",       "clk_m",        12000000,       false},
209         { "audio0",     "i2s0_sync",    0,              false},
210         { "audio1",     "i2s1_sync",    0,              false},
211         { "audio2",     "i2s2_sync",    0,              false},
212         { "audio3",     "i2s3_sync",    0,              false},
213         { "audio4",     "i2s4_sync",    0,              false},
214         { "vi_sensor",  "pll_p",        150000000,      false},
215         { "cilab",      "pll_p",        150000000,      false},
216         { "cilcd",      "pll_p",        150000000,      false},
217         { "cile",       "pll_p",        150000000,      false},
218         { "i2c1",       "pll_p",        3200000,        false},
219         { "i2c2",       "pll_p",        3200000,        false},
220         { "i2c3",       "pll_p",        3200000,        false},
221         { "i2c4",       "pll_p",        3200000,        false},
222         { "i2c5",       "pll_p",        3200000,        false},
223         { "sbc1",       "pll_p",        25000000,       false},
224         { "sbc2",       "pll_p",        25000000,       false},
225         { "sbc3",       "pll_p",        25000000,       false},
226         { "sbc4",       "pll_p",        25000000,       false},
227         { "sbc5",       "pll_p",        25000000,       false},
228         { "sbc6",       "pll_p",        25000000,       false},
229         { "extern3",    "clk_m",        12000000,       false},
230         { NULL,         NULL,           0,              0},
231 };
232
233 static struct bcm2079x_platform_data nfc_pdata = {
234         .irq_gpio = TEGRA_GPIO_PW2,
235         .en_gpio = TEGRA_GPIO_PU4,
236         .wake_gpio = TEGRA_GPIO_PX7,
237         };
238
239 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
240         {
241                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
242                 .platform_data = &nfc_pdata,
243         },
244 };
245
246 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
247         .bus_clk_rate   = 100000,
248         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
249         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
250 };
251
252 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
253         .bus_clk_rate   = 100000,
254         .is_clkon_always = true,
255         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
256         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
257 };
258
259 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
260         .bus_clk_rate   = 100000,
261         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
262         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
263 };
264
265 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
266         .bus_clk_rate   = 10000,
267         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
268         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
269 };
270
271 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
272         .bus_clk_rate   = 400000,
273         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
274         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
275 };
276
277 static struct aic3262_gpio_setup aic3262_gpio[] = {
278         /* GPIO 1*/
279         {
280                 .used = 1,
281                 .in = 0,
282                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
283         },
284         /* GPIO 2*/
285         {
286                 .used = 1,
287                 .in = 0,
288                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
289         },
290         /* GPIO 1 */
291         {
292                 .used = 0,
293         },
294         /* GPI2 */
295         {
296                 .used = 1,
297                 .in = 1,
298                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
299                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
300                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
301                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
302         },
303         /* GPO1 */
304         {
305                 .used = 0,
306                 .value = AIC3262_GPO1_FUNC_DISABLED,
307         },
308 };
309 static struct aic3xxx_pdata aic3262_codec_pdata = {
310         .gpio_irq       = 0,
311         .gpio           = aic3262_gpio,
312         .naudint_irq    = 0,
313         .irq_base       = AIC3262_CODEC_IRQ_BASE,
314 };
315
316 static struct i2c_board_info __initdata cs42l73_board_info = {
317         I2C_BOARD_INFO("cs42l73", 0x4a),
318 };
319
320 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
321         I2C_BOARD_INFO("audience_a2220", 0x3E),
322 };
323
324 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
325         I2C_BOARD_INFO("tlv320aic3262", 0x18),
326         .platform_data = &aic3262_codec_pdata,
327 };
328
329 static void pluto_i2c_init(void)
330 {
331         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
332         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
333         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
334         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
335         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
336
337         platform_device_register(&tegra11_i2c_device5);
338         platform_device_register(&tegra11_i2c_device4);
339         platform_device_register(&tegra11_i2c_device3);
340         platform_device_register(&tegra11_i2c_device2);
341         platform_device_register(&tegra11_i2c_device1);
342
343         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
344         i2c_register_board_info(0, &cs42l73_board_info, 1);
345         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
346         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
347         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
348 }
349
350 static struct platform_device *pluto_uart_devices[] __initdata = {
351         &tegra_uarta_device,
352         &tegra_uartb_device,
353         &tegra_uartc_device,
354         &tegra_uartd_device,
355 };
356 static struct uart_clk_parent uart_parent_clk[] = {
357         [0] = {.name = "clk_m"},
358         [1] = {.name = "pll_p"},
359 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
360         [2] = {.name = "pll_m"},
361 #endif
362 };
363
364 static struct tegra_uart_platform_data pluto_uart_pdata;
365 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
366
367 static void __init uart_debug_init(void)
368 {
369         int debug_port_id;
370
371         debug_port_id = uart_console_debug_init(3);
372         if (debug_port_id < 0)
373                 return;
374         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
375 }
376
377 static void __init pluto_uart_init(void)
378 {
379         struct clk *c;
380         int i;
381
382         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
383                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
384                 if (IS_ERR_OR_NULL(c)) {
385                         pr_err("Not able to get the clock for %s\n",
386                                                 uart_parent_clk[i].name);
387                         continue;
388                 }
389                 uart_parent_clk[i].parent_clk = c;
390                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
391         }
392         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
393         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
394         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
395         pluto_loopback_uart_pdata.parent_clk_count =
396                                                 ARRAY_SIZE(uart_parent_clk);
397         pluto_loopback_uart_pdata.is_loopback = true;
398         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
399         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
400         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
401         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
402
403         /* Register low speed only if it is selected */
404         if (!is_tegra_debug_uartport_hs())
405                 uart_debug_init();
406
407         platform_add_devices(pluto_uart_devices,
408                                 ARRAY_SIZE(pluto_uart_devices));
409 }
410
411 static struct resource tegra_rtc_resources[] = {
412         [0] = {
413                 .start = TEGRA_RTC_BASE,
414                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
415                 .flags = IORESOURCE_MEM,
416         },
417         [1] = {
418                 .start = INT_RTC,
419                 .end = INT_RTC,
420                 .flags = IORESOURCE_IRQ,
421         },
422 };
423
424 static struct platform_device tegra_rtc_device = {
425         .name = "tegra_rtc",
426         .id   = -1,
427         .resource = tegra_rtc_resources,
428         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
429 };
430
431 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
432 static struct tegra_wakeup_monitor_platform_data
433                         pluto_tegra_wakeup_monitor_pdata = {
434         .wifi_wakeup_source     = 6,
435 };
436
437 static struct platform_device pluto_tegra_wakeup_monitor_device = {
438         .name = "tegra_wakeup_monitor",
439         .id   = -1,
440         .dev  = {
441                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
442         },
443 };
444 #endif
445
446 static struct tegra_asoc_platform_data pluto_audio_pdata = {
447         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
448         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
449         .gpio_hp_mute           = -1,
450         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
451         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
452         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
453         .i2s_param[HIFI_CODEC]  = {
454                 .audio_port_id  = 1,
455                 .is_i2s_master  = 0,
456                 .i2s_mode       = TEGRA_DAIFMT_I2S,
457                 .sample_size    = 16,
458                 .channels       = 2,
459         },
460         .i2s_param[BASEBAND]    = {
461                 .audio_port_id  = 2,
462                 .is_i2s_master  = 1,
463                 .i2s_mode       = TEGRA_DAIFMT_I2S,
464                 .sample_size    = 16,
465                 .rate           = 16000,
466                 .channels       = 2,
467                 .bit_clk        = 1024000,
468         },
469         .i2s_param[BT_SCO]      = {
470                 .audio_port_id  = 3,
471                 .is_i2s_master  = 1,
472                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
473                 .sample_size    = 16,
474                 .channels       = 1,
475                 .bit_clk        = 512000,
476         },
477         .i2s_param[VOICE_CODEC] = {
478                 .audio_port_id  = 0,
479                 .is_i2s_master  = 1,
480                 .i2s_mode       = TEGRA_DAIFMT_I2S,
481                 .sample_size    = 16,
482                 .rate           = 16000,
483                 .channels       = 2,
484         },
485 };
486
487 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
488         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
489         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
490         .gpio_hp_mute           = -1,
491         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
492         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
493         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
494         .i2s_param[HIFI_CODEC]  = {
495                 .audio_port_id  = 1,
496                 .is_i2s_master  = 1,
497                 .i2s_mode       = TEGRA_DAIFMT_I2S,
498                 .sample_size    = 16,
499                 .channels       = 2,
500         },
501         .i2s_param[BASEBAND]    = {
502                 .audio_port_id  = 2,
503                 .is_i2s_master  = 1,
504                 .i2s_mode       = TEGRA_DAIFMT_I2S,
505                 .sample_size    = 16,
506                 .rate           = 16000,
507                 .channels       = 2,
508                 .bit_clk        = 1024000,
509         },
510         .i2s_param[BT_SCO]      = {
511                 .audio_port_id  = 3,
512                 .is_i2s_master  = 1,
513                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
514                 .sample_size    = 16,
515                 .channels       = 1,
516                 .bit_clk        = 512000,
517         },
518         .i2s_param[VOICE_CODEC] = {
519                 .audio_port_id  = 0,
520                 .is_i2s_master  = 1,
521                 .i2s_mode       = TEGRA_DAIFMT_I2S,
522                 .sample_size    = 16,
523                 .rate           = 16000,
524                 .channels       = 2,
525         },
526 };
527
528 static struct platform_device pluto_audio_device = {
529         .name   = "tegra-snd-cs42l73",
530         .id     = 2,
531         .dev    = {
532                 .platform_data = &pluto_audio_pdata,
533         },
534 };
535
536 static struct platform_device pluto_audio_aic326x_device = {
537         .name   = "tegra-snd-aic326x",
538         .id     = 2,
539         .dev    = {
540                 .platform_data  = &pluto_aic3262_pdata,
541         },
542 };
543
544 #ifndef CONFIG_USE_OF
545 static struct platform_device tegra_camera = {
546         .name = "tegra_camera",
547         .id = -1,
548 };
549 #endif
550
551 #ifdef CONFIG_MHI_NETDEV
552 struct platform_device mhi_netdevice0 = {
553         .name = "mhi_net_device",
554         .id = 0,
555 };
556 #endif /* CONFIG_MHI_NETDEV */
557
558 static struct platform_device *pluto_devices[] __initdata = {
559         &tegra_pmu_device,
560         &tegra_rtc_device,
561         &tegra_udc_device,
562 #if defined(CONFIG_TEGRA_AVP)
563         &tegra_avp_device,
564 #endif
565 #ifndef CONFIG_USE_OF
566         &tegra_camera,
567 #endif
568 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
569         &tegra11_se_device,
570 #endif
571         &tegra_ahub_device,
572         &tegra_dam_device0,
573         &tegra_dam_device1,
574         &tegra_dam_device2,
575         &tegra_i2s_device0,
576         &tegra_i2s_device1,
577         &tegra_i2s_device2,
578         &tegra_i2s_device3,
579         &tegra_i2s_device4,
580         &tegra_spdif_device,
581         &spdif_dit_device,
582         &bluetooth_dit_device,
583         &baseband_dit_device,
584 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
585         &pluto_tegra_wakeup_monitor_device,
586 #endif
587         &pluto_audio_device,
588         &pluto_audio_aic326x_device,
589         &tegra_hda_device,
590 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
591         &tegra_aes_device,
592 #endif
593 #ifdef CONFIG_MHI_NETDEV
594         &mhi_netdevice0,  /* MHI netdevice */
595 #endif /* CONFIG_MHI_NETDEV */
596 };
597
598 #ifdef CONFIG_USB_SUPPORT
599
600 static void pluto_usb_hsic_postsupend(void)
601 {
602         pr_debug("%s\n", __func__);
603 #ifdef CONFIG_TEGRA_BB_XMM_POWER
604         baseband_xmm_set_power_status(BBXMM_PS_L2);
605 #endif
606 }
607
608 static void pluto_usb_hsic_preresume(void)
609 {
610         pr_debug("%s\n", __func__);
611 #ifdef CONFIG_TEGRA_BB_XMM_POWER
612         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
613 #endif
614 }
615
616 static void pluto_usb_hsic_post_resume(void)
617 {
618         pr_debug("%s\n", __func__);
619 #ifdef CONFIG_TEGRA_BB_XMM_POWER
620         baseband_xmm_set_power_status(BBXMM_PS_L0);
621 #endif
622 }
623
624 static void pluto_usb_hsic_phy_power(void)
625 {
626         pr_debug("%s\n", __func__);
627 #ifdef CONFIG_TEGRA_BB_XMM_POWER
628         baseband_xmm_set_power_status(BBXMM_PS_L0);
629 #endif
630 }
631
632 static void pluto_usb_hsic_post_phy_off(void)
633 {
634         pr_debug("%s\n", __func__);
635 #ifdef CONFIG_TEGRA_BB_XMM_POWER
636         baseband_xmm_set_power_status(BBXMM_PS_L2);
637 #endif
638 }
639
640 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
641         .post_suspend = pluto_usb_hsic_postsupend,
642         .pre_resume = pluto_usb_hsic_preresume,
643         .port_power = pluto_usb_hsic_phy_power,
644         .post_resume = pluto_usb_hsic_post_resume,
645         .post_phy_off = pluto_usb_hsic_post_phy_off,
646 };
647
648 static struct tegra_usb_platform_data tegra_ehci3_hsic_xmm_pdata = {
649         .port_otg = false,
650         .has_hostpc = true,
651         .unaligned_dma_buf_supported = false,
652         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
653         .op_mode        = TEGRA_USB_OPMODE_HOST,
654         .u_data.host = {
655                 .vbus_gpio = -1,
656                 .hot_plug = false,
657                 .remote_wakeup_supported = false,
658                 .power_off_on_suspend = false,
659         },
660         .ops = &oem2_plat_ops,
661 };
662
663 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
664         .port_otg = false,
665         .has_hostpc = true,
666         .unaligned_dma_buf_supported = false,
667         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
668         .op_mode        = TEGRA_USB_OPMODE_HOST,
669         .u_data.host = {
670                 .vbus_gpio = -1,
671                 .hot_plug = false,
672                 .remote_wakeup_supported = true,
673                 .power_off_on_suspend = true,
674         },
675 };
676
677 static struct tegra_usb_platform_data tegra_udc_pdata = {
678         .port_otg = true,
679         .has_hostpc = true,
680         .builtin_host_disabled = true,
681         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
682         .op_mode = TEGRA_USB_OPMODE_DEVICE,
683         .u_data.dev = {
684                 .vbus_pmu_irq = 0,
685                 .vbus_gpio = -1,
686                 .charging_supported = false,
687                 .remote_wakeup_supported = false,
688         },
689         .u_cfg.utmi = {
690                 .hssync_start_delay = 0,
691                 .elastic_limit = 16,
692                 .idle_wait_delay = 17,
693                 .term_range_adj = 6,
694                 .xcvr_setup = 8,
695                 .xcvr_lsfslew = 2,
696                 .xcvr_lsrslew = 2,
697                 .xcvr_setup_offset = 0,
698                 .xcvr_use_fuses = 1,
699         },
700 };
701
702 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
703         .port_otg = true,
704         .has_hostpc = true,
705         .builtin_host_disabled = true,
706         .unaligned_dma_buf_supported = false,
707         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
708         .op_mode = TEGRA_USB_OPMODE_HOST,
709         .u_data.host = {
710                 .vbus_gpio = -1,
711                 .hot_plug = false,
712                 .remote_wakeup_supported = true,
713                 .power_off_on_suspend = true,
714         },
715         .u_cfg.utmi = {
716                 .hssync_start_delay = 0,
717                 .elastic_limit = 16,
718                 .idle_wait_delay = 17,
719                 .term_range_adj = 6,
720                 .xcvr_setup = 15,
721                 .xcvr_lsfslew = 2,
722                 .xcvr_lsrslew = 2,
723                 .xcvr_setup_offset = 0,
724                 .xcvr_use_fuses = 1,
725                 .vbus_oc_map = 0x7,
726         },
727 };
728
729 static struct tegra_usb_otg_data tegra_otg_pdata = {
730         .ehci_device = &tegra_ehci1_device,
731         .ehci_pdata = &tegra_ehci1_utmi_pdata,
732 };
733
734 static struct regulator *baseband_reg;
735 static struct gpio modem_gpios[] = { /* i500 modem */
736         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
737 };
738
739 static struct gpio modem2_gpios[] = {
740         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
741         {MDM2_RST, GPIOF_DIR_OUT, "MODEM2 RESET"},
742         {MDM2_ACK2, GPIOF_OUT_INIT_HIGH, "MODEM2 ACK2"},
743         {MDM2_ACK1, GPIOF_OUT_INIT_LOW, "MODEM2 ACK1"},
744 };
745
746 static void baseband2_post_phy_on(void);
747 static void baseband2_pre_phy_off(void);
748
749 static struct tegra_usb_phy_platform_ops baseband2_plat_ops = {
750         .pre_phy_off = baseband2_pre_phy_off,
751         .post_phy_on = baseband2_post_phy_on,
752 };
753
754 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
755         .port_otg = false,
756         .has_hostpc = true,
757         .unaligned_dma_buf_supported = false,
758         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
759         .op_mode = TEGRA_USB_OPMODE_HOST,
760         .u_data.host = {
761                 .vbus_gpio = -1,
762                 .hot_plug = false,
763                 .remote_wakeup_supported = true,
764                 .power_off_on_suspend = true,
765         },
766 };
767
768 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
769         .port_otg = false,
770         .has_hostpc = true,
771         .unaligned_dma_buf_supported = false,
772         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
773         .op_mode = TEGRA_USB_OPMODE_HOST,
774         .u_data.host = {
775                 .vbus_gpio = -1,
776                 .hot_plug = false,
777                 .remote_wakeup_supported = true,
778                 .power_off_on_suspend = true,
779         },
780         .ops = &baseband2_plat_ops,
781 };
782
783 static struct tegra_usb_platform_data tegra_hsic_pdata = {
784         .port_otg = false,
785         .has_hostpc = true,
786         .unaligned_dma_buf_supported = false,
787         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
788         .op_mode        = TEGRA_USB_OPMODE_HOST,
789         .u_data.host = {
790                 .vbus_gpio = -1,
791                 .hot_plug = false,
792                 .remote_wakeup_supported = true,
793                 .power_off_on_suspend = true,
794         },
795 };
796
797 static struct platform_device *
798 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
799 {
800         struct platform_device *pdev;
801         int val;
802
803         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
804         if (!pdev)
805                 return NULL;
806
807         val = platform_device_add_resources(pdev, ehci_dev->resource,
808                                                 ehci_dev->num_resources);
809         if (val)
810                 goto error;
811
812         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
813         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
814
815         val = platform_device_add_data(pdev, &tegra_ehci3_hsic_xmm_pdata,
816                         sizeof(struct tegra_usb_platform_data));
817         if (val)
818                 goto error;
819
820         val = platform_device_add(pdev);
821         if (val)
822                 goto error;
823
824         return pdev;
825
826 error:
827         pr_err("%s: failed to add the host contoller device\n", __func__);
828         platform_device_put(pdev);
829         return NULL;
830 }
831
832 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
833 {
834         struct platform_device *pdev = *platdev;
835
836         if (pdev && &pdev->dev) {
837                 platform_device_unregister(pdev);
838                 *platdev = NULL;
839         } else
840                 pr_err("%s: no platform device\n", __func__);
841 }
842
843 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
844
845 static union tegra_bb_gpio_id bb_gpio_oem1 = {
846         .oem1 = {
847                 .reset = BB_OEM1_GPIO_RST,
848                 .pwron = BB_OEM1_GPIO_ON,
849                 .awr = BB_OEM1_GPIO_AWR,
850                 .cwr = BB_OEM1_GPIO_CWR,
851                 .spare = BB_OEM1_GPIO_SPARE,
852                 .wdi = BB_OEM1_GPIO_WDI,
853         },
854 };
855
856 static struct tegra_bb_pdata bb_pdata_oem1 = {
857         .id = &bb_gpio_oem1,
858         .device = &tegra_ehci3_device,
859         .ehci_register = tegra_usb_hsic_host_register,
860         .ehci_unregister = tegra_usb_hsic_host_unregister,
861         .bb_id = TEGRA_BB_OEM1,
862 };
863
864 static struct platform_device tegra_bb_oem1 = {
865         .name = "tegra_baseband_power",
866         .id = -1,
867         .dev = {
868                 .platform_data = &bb_pdata_oem1,
869         },
870 };
871
872 static int baseband_init(void)
873 {
874         int ret;
875
876         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
877         if (ret) {
878                 pr_warn("%s:gpio request failed\n", __func__);
879                 return ret;
880         }
881
882         baseband_reg = regulator_get(NULL, "vdd_core_bb");
883         if (IS_ERR_OR_NULL(baseband_reg))
884                 pr_warn("%s: baseband regulator get failed\n", __func__);
885         else
886                 regulator_enable(baseband_reg);
887
888         /* enable pull-down for MDM1_COLD_BOOT */
889         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
890                                     TEGRA_PUPD_PULL_DOWN);
891
892         /* export GPIO for user space access through sysfs */
893         gpio_export(MDM_RST, false);
894
895         return 0;
896 }
897
898 static const struct tegra_modem_operations baseband_operations = {
899         .init = baseband_init,
900 };
901
902 #define MODEM_BOOT_EDP_MAX 0
903 /* FIXME: get accurate boot current value */
904 static unsigned int modem_boot_edp_states[] = { 1900 };
905 static struct edp_client modem_boot_edp_client = {
906         .name = "modem_boot",
907         .states = modem_boot_edp_states,
908         .num_states = ARRAY_SIZE(modem_boot_edp_states),
909         .e0_index = MODEM_BOOT_EDP_MAX,
910         .priority = EDP_MAX_PRIO,
911 };
912
913 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
914         .ops = &baseband_operations,
915         .wake_gpio = -1,
916         .boot_gpio = MDM_COLDBOOT,
917         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
918         .autosuspend_delay = 2000,
919         .short_autosuspend_delay = 50,
920         .tegra_ehci_device = &tegra_ehci2_device,
921         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
922         .modem_boot_edp_client = &modem_boot_edp_client,
923         .edp_manager_name = "battery",
924         .i_breach_ppm = 500000,
925         /* FIXME: get useful adjperiods */
926         .i_thresh_3g_adjperiod = 10000,
927         .i_thresh_lte_adjperiod = 10000,
928 };
929
930 static struct platform_device icera_baseband_device = {
931         .name = "tegra_usb_modem_power",
932         .id = -1,
933         .dev = {
934                 .platform_data = &baseband_pdata,
935         },
936 };
937
938 static void baseband2_post_phy_on(void)
939 {
940         /* set MDM2_ACK2 low */
941         gpio_set_value(MDM2_ACK2, 0);
942 }
943
944 static void baseband2_pre_phy_off(void)
945 {
946         /* set MDM2_ACK2 high */
947         gpio_set_value(MDM2_ACK2, 1);
948 }
949
950 static void baseband2_start(void)
951 {
952         /*
953          *  Leave baseband powered OFF.
954          *  User-space daemons will take care of powering it up.
955          */
956         pr_info("%s\n", __func__);
957         gpio_set_value(MDM2_PWR_ON, 0);
958 }
959
960 static void baseband2_reset(void)
961 {
962         /* Initiate power cycle on baseband sub system */
963         pr_info("%s\n", __func__);
964         gpio_set_value(MDM2_PWR_ON, 0);
965         mdelay(200);
966         gpio_set_value(MDM2_PWR_ON, 1);
967 }
968
969 static int baseband2_init(void)
970 {
971         int ret;
972
973         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
974         if (ret)
975                 return ret;
976
977         /* enable pull-up for MDM2_REQ2 */
978         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PV1,
979                                     TEGRA_PUPD_PULL_UP);
980
981         /* export GPIO for user space access through sysfs */
982         gpio_export(MDM2_PWR_ON, false);
983
984         return 0;
985 }
986
987 static const struct tegra_modem_operations baseband2_operations = {
988         .init = baseband2_init,
989         .start = baseband2_start,
990         .reset = baseband2_reset,
991 };
992
993 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
994         .ops = &baseband2_operations,
995         .wake_gpio = MDM2_REQ2,
996         .wake_irq_flags = IRQF_TRIGGER_FALLING,
997         .boot_gpio = MDM2_COLDBOOT,
998         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
999         .autosuspend_delay = 2000,
1000         .short_autosuspend_delay = 50,
1001         .tegra_ehci_device = &tegra_ehci3_device,
1002         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
1003 };
1004
1005 static struct platform_device icera_baseband2_device = {
1006         .name = "tegra_usb_modem_power",
1007         .id = -1,
1008         .dev = {
1009                 .platform_data = &baseband2_pdata,
1010         },
1011 };
1012
1013 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
1014         .baseband_type = BASEBAND_XMM,
1015         .modem = {
1016                 .xmm = {
1017                         .bb_rst = XMM_GPIO_BB_RST,
1018                         .bb_on = XMM_GPIO_BB_ON,
1019                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1020                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1021                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1022                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1023                 },
1024         },
1025 };
1026
1027 static struct platform_device tegra_baseband_xmm_power_device = {
1028         .name = "baseband_xmm_power",
1029         .id = -1,
1030         .dev = {
1031                 .platform_data = &tegra_baseband_xmm_power_data,
1032         },
1033 };
1034
1035 static struct platform_device tegra_baseband_xmm_power2_device = {
1036         .name = "baseband_xmm_power2",
1037         .id = -1,
1038         .dev = {
1039                 .platform_data = &tegra_baseband_xmm_power_data,
1040         },
1041 };
1042
1043 static void pluto_usb_init(void)
1044 {
1045         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1046
1047         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1048                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1049                 platform_device_register(&tegra_otg_device);
1050
1051                 /* Setup the udc platform data */
1052                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1053         }
1054 }
1055
1056 static void pluto_modem_init(void)
1057 {
1058         int modem_id = tegra_get_modem_id();
1059         struct board_info board_info;
1060         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1061
1062         tegra_get_board_info(&board_info);
1063         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1064
1065         switch (modem_id) {
1066         case TEGRA_BB_I500: /* on board i500 HSIC */
1067                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
1068                         platform_device_register(&icera_baseband_device);
1069                 break;
1070         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1071                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
1072                         platform_device_register(&icera_baseband2_device);
1073                 break;
1074         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1075                 if ((board_info.board_id == BOARD_E1575) ||
1076                         ((board_info.board_id == BOARD_E1580) &&
1077                                 (board_info.fab >= BOARD_FAB_A03))) {
1078                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1079                                                         TEGRA_TRI_NORMAL);
1080                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1081                 }
1082                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1083                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1084                         tegra_ehci3_device.dev.platform_data
1085                                 = &tegra_hsic_pdata;
1086                         platform_device_register(&tegra_bb_oem1);
1087                 }
1088                 break;
1089         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1090                 /* fix wrong wiring in Pluto A02 */
1091                 if ((board_info.board_id == BOARD_E1580) &&
1092                         (board_info.fab == BOARD_FAB_A02)) {
1093                         pr_info(
1094 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1095                                 __func__);
1096                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1097                                 != MDM2_PWR_ON)
1098                                 pr_err(
1099 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1100                                         __func__);
1101                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1102                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1103                 }
1104                 /* baseband-power.ko will register ehci3 device */
1105                 tegra_ehci3_device.dev.platform_data =
1106                                         &tegra_ehci3_hsic_xmm_pdata;
1107                 tegra_baseband_xmm_power_data.hsic_register =
1108                                                 &tegra_usb_hsic_host_register;
1109                 tegra_baseband_xmm_power_data.hsic_unregister =
1110                                                 &tegra_usb_hsic_host_unregister;
1111                 tegra_baseband_xmm_power_data.ehci_device =
1112                                         &tegra_ehci3_device;
1113                 platform_device_register(&tegra_baseband_xmm_power_device);
1114                 platform_device_register(&tegra_baseband_xmm_power2_device);
1115                 /* override audio settings - use 8kHz */
1116                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1117                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1118                         = 2;
1119                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1120                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1121                         = 1;
1122                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1123                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1124                         = TEGRA_DAIFMT_I2S;
1125                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1126                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1127                         = 16;
1128                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1129                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1130                         = 8000;
1131                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1132                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1133                         = 2;
1134                 break;
1135         case TEGRA_BB_HSIC_HUB: /* i500 SWD HSIC */
1136                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1137                         tegra_ehci3_device.dev.platform_data =
1138                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1139                         platform_device_register(&tegra_ehci3_device);
1140                 }
1141                 break;
1142         default:
1143                 return;
1144         }
1145 }
1146
1147 static struct tegra_xusb_pad_data xusb_padctl_data = {
1148         .pad_mux = 0x1,
1149         .port_cap = 0x1,
1150         .snps_oc_map = 0x1ff,
1151         .usb2_oc_map = 0x3c,
1152         .ss_port_map = 0x2,
1153         .oc_det = 0,
1154         .rx_wander = 0xf0,
1155         .otg_pad0_ctl0 = 0xffc7ffff,
1156         .otg_pad0_ctl1 = 0x7,
1157         .otg_pad1_ctl0 = 0xffffffff,
1158         .otg_pad1_ctl1 = 0,
1159         .bias_pad_ctl0 = 0,
1160         .hsic_pad0_ctl0 = 0xffff00ff,
1161         .hsic_pad0_ctl1 = 0xffff00ff,
1162         .pmc_value = 0xfffffff0,
1163 };
1164
1165 static void pluto_xusb_init(void)
1166 {
1167         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1168
1169         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1170                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1171
1172                 /*
1173                  * read from usb_calib0 and pass to driver
1174                  * set HS_CURR_LEVEL = usb_calib0[5:0]
1175                  * set TERM_RANGE_ADJ = usb_calib0[10:7]
1176                  * set HS_IREF_CAP = usb_calib0[14:13]
1177                  * set HS_SQUELCH_LEVEL = usb_calib0[12:11]
1178                  */
1179
1180                 xusb_padctl_data.hs_curr_level = (usb_calib0 >> 0) & 0x3f;
1181                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1182                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1183                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1184
1185                 tegra_xhci_device.dev.platform_data = &xusb_padctl_data;
1186                 platform_device_register(&tegra_xhci_device);
1187         }
1188 }
1189 #else
1190 static void pluto_usb_init(void) { }
1191 static void pluto_modem_init(void) { }
1192 static void pluto_xusb_init(void) { }
1193 #endif
1194
1195 static void pluto_audio_init(void)
1196 {
1197         struct board_info board_info;
1198
1199         tegra_get_board_info(&board_info);
1200
1201 }
1202
1203 static struct platform_device *pluto_spi_devices[] __initdata = {
1204         &tegra11_spi_device4,
1205 };
1206
1207 struct spi_clk_parent spi_parent_clk_pluto[] = {
1208         [0] = {.name = "pll_p"},
1209 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
1210         [1] = {.name = "pll_m"},
1211         [2] = {.name = "clk_m"},
1212 #else
1213         [1] = {.name = "clk_m"},
1214 #endif
1215 };
1216
1217 static struct tegra_spi_platform_data pluto_spi_pdata = {
1218         .is_dma_based           = false,
1219         .max_dma_buffer         = 16 * 1024,
1220         .is_clkon_always        = false,
1221         .max_rate               = 25000000,
1222 };
1223
1224 static void __init pluto_spi_init(void)
1225 {
1226         int i;
1227         struct clk *c;
1228         struct board_info board_info, display_board_info;
1229
1230         tegra_get_board_info(&board_info);
1231         tegra_get_display_board_info(&display_board_info);
1232
1233         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_pluto); ++i) {
1234                 c = tegra_get_clock_by_name(spi_parent_clk_pluto[i].name);
1235                 if (IS_ERR_OR_NULL(c)) {
1236                         pr_err("Not able to get the clock for %s\n",
1237                                                 spi_parent_clk_pluto[i].name);
1238                         continue;
1239                 }
1240                 spi_parent_clk_pluto[i].parent_clk = c;
1241                 spi_parent_clk_pluto[i].fixed_clk_rate = clk_get_rate(c);
1242         }
1243         pluto_spi_pdata.parent_clk_list = spi_parent_clk_pluto;
1244         pluto_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_pluto);
1245         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1246         platform_add_devices(pluto_spi_devices,
1247                                 ARRAY_SIZE(pluto_spi_devices));
1248 }
1249
1250 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1251         /* name         parent          rate            enabled */
1252         { "extern2",    "pll_p",        41000000,       false},
1253         { "clk_out_2",  "extern2",      40800000,       false},
1254         { NULL,         NULL,           0,              0},
1255 };
1256
1257 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1258         .gpio_reset = 0,
1259         .config = 0,
1260         .platform_id = RM_PLATFORM_P005,
1261         .name_of_clock = "clk_out_2",
1262 };
1263
1264 static struct tegra_spi_device_controller_data dev_cdata = {
1265         .rx_clk_tap_delay = 0,
1266         .tx_clk_tap_delay = 0,
1267 };
1268
1269 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1270         {
1271          .modalias = "rm_ts_spidev",
1272          .bus_num = 3,
1273          .chip_select = 2,
1274          .max_speed_hz = 12 * 1000 * 1000,
1275          .mode = SPI_MODE_0,
1276          .controller_data = &dev_cdata,
1277          .platform_data = &rm31080ts_pluto_data,
1278          },
1279 };
1280
1281 static int __init pluto_touch_init(void)
1282 {
1283         tegra_clk_init_from_table(touch_clk_init_table);
1284         clk_enable(tegra_get_clock_by_name("clk_out_2"));
1285         mdelay(20);
1286         rm31080a_pluto_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1287         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1288                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
1289                                 &rm31080ts_pluto_data,
1290                                 &rm31080a_pluto_spi_board[0],
1291                                 ARRAY_SIZE(rm31080a_pluto_spi_board));
1292         return 0;
1293 }
1294
1295 #ifdef CONFIG_EDP_FRAMEWORK
1296 static struct edp_manager battery_edp_manager = {
1297         .name = "battery",
1298         .max = 12350
1299 };
1300
1301 static void __init pluto_battery_edp_init(void)
1302 {
1303         struct edp_governor *g;
1304         int r;
1305
1306         r = edp_register_manager(&battery_edp_manager);
1307         if (r)
1308                 goto err_ret;
1309
1310         /* start with priority governor */
1311         g = edp_get_governor("priority");
1312         if (!g) {
1313                 r = -EFAULT;
1314                 goto err_ret;
1315         }
1316
1317         r = edp_set_governor(&battery_edp_manager, g);
1318         if (r)
1319                 goto err_ret;
1320
1321         return;
1322
1323 err_ret:
1324         pr_err("Battery EDP init failed with error %d\n", r);
1325         WARN_ON(1);
1326 }
1327 #else
1328 static inline void pluto_battery_edp_init(void) {}
1329 #endif
1330
1331 #ifdef CONFIG_USE_OF
1332 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1333         OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-dma", NULL),
1334         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1335                                 NULL),
1336         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1337                                 NULL),
1338         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1339                                 &pluto_tegra_sdhci_platform_data0),
1340         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1341                                 NULL),
1342         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
1343                                 NULL),
1344         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
1345                                 NULL),
1346         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
1347                                 NULL),
1348         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
1349                                 NULL),
1350         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
1351                                 NULL),
1352         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
1353                                 NULL),
1354         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
1355                                 NULL),
1356         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
1357                                 NULL),
1358         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
1359                                 NULL),
1360         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
1361                                 NULL),
1362         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
1363                                 NULL),
1364         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
1365                                 NULL),
1366         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
1367                                 NULL),
1368         {}
1369 };
1370 #endif
1371
1372 static void __init tegra_pluto_early_init(void)
1373 {
1374         pluto_battery_edp_init();
1375         tegra_clk_init_from_table(pluto_clk_init_table);
1376         tegra_clk_vefify_parents();
1377         tegra_smmu_init();
1378         tegra_soc_device_init("tegra_pluto");
1379 }
1380
1381 static void __init tegra_pluto_late_init(void)
1382 {
1383         platform_device_register(&tegra_pinmux_device);
1384         pluto_pinmux_init();
1385         pluto_i2c_init();
1386         pluto_spi_init();
1387         pluto_usb_init();
1388         pluto_xusb_init();
1389         pluto_uart_init();
1390         pluto_audio_init();
1391         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1392         //tegra_ram_console_debug_init();
1393         tegra_io_dpd_init();
1394         pluto_sdhci_init();
1395         pluto_regulator_init();
1396         pluto_suspend_init();
1397         pluto_touch_init();
1398         pluto_emc_init();
1399         pluto_edp_init();
1400         isomgr_init();
1401         pluto_panel_init();
1402         pluto_pmon_init();
1403         pluto_kbc_init();
1404 #ifdef CONFIG_BT_BLUESLEEP
1405         pluto_setup_bluesleep();
1406         pluto_setup_bt_rfkill();
1407 #elif defined CONFIG_BLUEDROID_PM
1408         pluto_setup_bluedroid_pm();
1409 #endif
1410         tegra_release_bootloader_fb();
1411         pluto_modem_init();
1412 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1413         tegra_wdt_recovery_init();
1414 #endif
1415         pluto_sensors_init();
1416         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1417         pluto_soctherm_init();
1418         tegra_register_fuse();
1419 }
1420
1421 static void __init pluto_ramconsole_reserve(unsigned long size)
1422 {
1423         tegra_ram_console_debug_reserve(SZ_1M);
1424 }
1425
1426 static void __init tegra_pluto_dt_init(void)
1427 {
1428         tegra_pluto_early_init();
1429
1430         of_platform_populate(NULL,
1431                 of_default_bus_match_table, pluto_auxdata_lookup,
1432                 &platform_bus);
1433
1434         tegra_pluto_late_init();
1435 }
1436
1437 static void __init tegra_pluto_reserve(void)
1438 {
1439 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1440         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1441         tegra_reserve(0, SZ_16M, SZ_4M);
1442 #else
1443         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1444 #endif
1445         pluto_ramconsole_reserve(SZ_1M);
1446 }
1447
1448 static const char * const pluto_dt_board_compat[] = {
1449         "nvidia,pluto",
1450         NULL
1451 };
1452
1453 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1454         .atag_offset    = 0x100,
1455         .smp            = smp_ops(tegra_smp_ops),
1456         .map_io         = tegra_map_common_io,
1457         .reserve        = tegra_pluto_reserve,
1458         .init_early     = tegra11x_init_early,
1459         .init_irq       = tegra_dt_init_irq,
1460         .handle_irq     = gic_handle_irq,
1461         .timer          = &tegra_timer,
1462         .init_machine   = tegra_pluto_dt_init,
1463         .restart        = tegra_assert_system_reset,
1464         .dt_compat      = pluto_dt_board_compat,
1465 MACHINE_END