ARM: tegra: pluto: updating regulators sources for xusb
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/edp.h>
54 #include <linux/mfd/tlv320aic3262-registers.h>
55 #include <linux/mfd/tlv320aic3xxx-core.h>
56
57 #include <asm/hardware/gic.h>
58
59 #include <mach/clk.h>
60 #include <mach/iomap.h>
61 #include <mach/irqs.h>
62 #include <mach/pinmux.h>
63 #include <mach/pinmux-t11.h>
64 #include <mach/iomap.h>
65 #include <mach/io.h>
66 #include <mach/io_dpd.h>
67 #include <mach/i2s.h>
68 #include <mach/isomgr.h>
69 #include <mach/tegra_asoc_pdata.h>
70 #include <asm/mach-types.h>
71 #include <asm/mach/arch.h>
72 #include <mach/usb_phy.h>
73 #include <mach/gpio-tegra.h>
74 #include <mach/tegra_fiq_debugger.h>
75 #include <mach/tegra-bb-power.h>
76 #include <mach/tegra_usb_modem_power.h>
77 #include <mach/tegra_wakeup_monitor.h>
78
79 #include "board.h"
80 #include "board-common.h"
81 #include "board-touch-raydium.h"
82 #include "clock.h"
83 #include "board-pluto.h"
84 #include "baseband-xmm-power.h"
85 #include "tegra-board-id.h"
86 #include "devices.h"
87 #include "gpio-names.h"
88 #include "fuse.h"
89 #include "pm.h"
90 #include "common.h"
91
92 #ifdef CONFIG_BT_BLUESLEEP
93 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
94         .name           = "bt_rfkill",
95         .shutdown_gpio  = TEGRA_GPIO_PQ7,
96         .reset_gpio     = TEGRA_GPIO_PQ6,
97         .type           = RFKILL_TYPE_BLUETOOTH,
98 };
99
100 static struct platform_device pluto_bt_rfkill_device = {
101         .name = "rfkill_gpio",
102         .id             = -1,
103         .dev = {
104                 .platform_data = &pluto_bt_rfkill_pdata,
105         },
106 };
107
108 static noinline void __init pluto_setup_bt_rfkill(void)
109 {
110         platform_device_register(&pluto_bt_rfkill_device);
111 }
112
113 static struct resource pluto_bluesleep_resources[] = {
114         [0] = {
115                 .name = "gpio_host_wake",
116                         .start  = TEGRA_GPIO_PU6,
117                         .end    = TEGRA_GPIO_PU6,
118                         .flags  = IORESOURCE_IO,
119         },
120         [1] = {
121                 .name = "gpio_ext_wake",
122                         .start  = TEGRA_GPIO_PEE1,
123                         .end    = TEGRA_GPIO_PEE1,
124                         .flags  = IORESOURCE_IO,
125         },
126         [2] = {
127                 .name = "host_wake",
128                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
129         },
130 };
131
132 static struct platform_device pluto_bluesleep_device = {
133         .name           = "bluesleep",
134         .id             = -1,
135         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
136         .resource       = pluto_bluesleep_resources,
137 };
138
139 static noinline void __init pluto_setup_bluesleep(void)
140 {
141         pluto_bluesleep_resources[2].start =
142                 pluto_bluesleep_resources[2].end =
143                         gpio_to_irq(TEGRA_GPIO_PU6);
144         platform_device_register(&pluto_bluesleep_device);
145         return;
146 }
147 #elif defined CONFIG_BLUEDROID_PM
148 static struct resource pluto_bluedroid_pm_resources[] = {
149         [0] = {
150                 .name   = "shutdown_gpio",
151                 .start  = TEGRA_GPIO_PQ7,
152                 .end    = TEGRA_GPIO_PQ7,
153                 .flags  = IORESOURCE_IO,
154         },
155         [1] = {
156                 .name = "host_wake",
157                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
158         },
159         [2] = {
160                 .name = "gpio_ext_wake",
161                 .start  = TEGRA_GPIO_PEE1,
162                 .end    = TEGRA_GPIO_PEE1,
163                 .flags  = IORESOURCE_IO,
164         },
165         [3] = {
166                 .name = "gpio_host_wake",
167                 .start  = TEGRA_GPIO_PU6,
168                 .end    = TEGRA_GPIO_PU6,
169                 .flags  = IORESOURCE_IO,
170         },
171         [4] = {
172                 .name = "reset_gpio",
173                 .start  = TEGRA_GPIO_PQ6,
174                 .end    = TEGRA_GPIO_PQ6,
175                 .flags  = IORESOURCE_IO,
176         },
177 };
178
179 static struct platform_device pluto_bluedroid_pm_device = {
180         .name = "bluedroid_pm",
181         .id             = 0,
182         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
183         .resource       = pluto_bluedroid_pm_resources,
184 };
185
186 static noinline void __init pluto_setup_bluedroid_pm(void)
187 {
188         pluto_bluedroid_pm_resources[1].start =
189                 pluto_bluedroid_pm_resources[1].end =
190                                         gpio_to_irq(TEGRA_GPIO_PU6);
191         platform_device_register(&pluto_bluedroid_pm_device);
192 }
193 #endif
194
195 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
196         /* name         parent          rate            enabled */
197         { "pll_m",      NULL,           0,              false},
198         { "hda",        "pll_p",        108000000,      false},
199         { "hda2codec_2x", "pll_p",      48000000,       false},
200         { "pwm",        "pll_p",        3187500,        false},
201         { "i2s1",       "pll_a_out0",   0,              false},
202         { "i2s2",       "pll_a_out0",   0,              false},
203         { "i2s3",       "pll_a_out0",   0,              false},
204         { "i2s4",       "pll_a_out0",   0,              false},
205         { "spdif_out",  "pll_a_out0",   0,              false},
206         { "d_audio",    "clk_m",        12000000,       false},
207         { "dam0",       "clk_m",        12000000,       false},
208         { "dam1",       "clk_m",        12000000,       false},
209         { "dam2",       "clk_m",        12000000,       false},
210         { "audio0",     "i2s0_sync",    0,              false},
211         { "audio1",     "i2s1_sync",    0,              false},
212         { "audio2",     "i2s2_sync",    0,              false},
213         { "audio3",     "i2s3_sync",    0,              false},
214         { "audio4",     "i2s4_sync",    0,              false},
215         { "vi_sensor",  "pll_p",        150000000,      false},
216         { "cilab",      "pll_p",        150000000,      false},
217         { "cilcd",      "pll_p",        150000000,      false},
218         { "cile",       "pll_p",        150000000,      false},
219         { "i2c1",       "pll_p",        3200000,        false},
220         { "i2c2",       "pll_p",        3200000,        false},
221         { "i2c3",       "pll_p",        3200000,        false},
222         { "i2c4",       "pll_p",        3200000,        false},
223         { "i2c5",       "pll_p",        3200000,        false},
224         { "extern3",    "clk_m",        12000000,       false},
225         { NULL,         NULL,           0,              0},
226 };
227
228 static struct bcm2079x_platform_data nfc_pdata = {
229         .irq_gpio = TEGRA_GPIO_PW2,
230         .en_gpio = TEGRA_GPIO_PU4,
231         .wake_gpio = TEGRA_GPIO_PX7,
232         };
233
234 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
235         {
236                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
237                 .platform_data = &nfc_pdata,
238         },
239 };
240
241 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
242         .adapter_nr     = 0,
243         .bus_count      = 1,
244         .bus_clk_rate   = { 100000, 0 },
245         .scl_gpio               = {TEGRA_GPIO_I2C1_SCL, 0},
246         .sda_gpio               = {TEGRA_GPIO_I2C1_SDA, 0},
247 };
248
249 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
250         .adapter_nr     = 1,
251         .bus_count      = 1,
252         .bus_clk_rate   = { 100000, 0 },
253         .is_clkon_always = true,
254         .scl_gpio               = {TEGRA_GPIO_I2C2_SCL, 0},
255         .sda_gpio               = {TEGRA_GPIO_I2C2_SDA, 0},
256 };
257
258 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
259         .adapter_nr     = 2,
260         .bus_count      = 1,
261         .bus_clk_rate   = { 100000, 0 },
262         .scl_gpio               = {TEGRA_GPIO_I2C3_SCL, 0},
263         .sda_gpio               = {TEGRA_GPIO_I2C3_SDA, 0},
264 };
265
266 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
267         .adapter_nr     = 3,
268         .bus_count      = 1,
269         .bus_clk_rate   = { 10000, 0 },
270         .scl_gpio               = {TEGRA_GPIO_I2C4_SCL, 0},
271         .sda_gpio               = {TEGRA_GPIO_I2C4_SDA, 0},
272 };
273
274 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
275         .adapter_nr     = 4,
276         .bus_count      = 1,
277         .bus_clk_rate   = { 400000, 0 },
278         .scl_gpio               = {TEGRA_GPIO_I2C5_SCL, 0},
279         .sda_gpio               = {TEGRA_GPIO_I2C5_SDA, 0},
280 };
281
282 static struct aic3262_gpio_setup aic3262_gpio[] = {
283         /* GPIO 1*/
284         {
285                 .used = 1,
286                 .in = 0,
287                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
288         },
289         /* GPIO 2*/
290         {
291                 .used = 1,
292                 .in = 0,
293                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
294         },
295         /* GPIO 1 */
296         {
297                 .used = 0,
298         },
299         /* GPI2 */
300         {
301                 .used = 1,
302                 .in = 1,
303                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
304                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
305                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
306                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
307         },
308         /* GPO1 */
309         {
310                 .used = 0,
311                 .value = AIC3262_GPO1_FUNC_DISABLED,
312         },
313 };
314 static struct aic3xxx_pdata aic3262_codec_pdata = {
315         .gpio_irq       = 0,
316         .gpio           = aic3262_gpio,
317         .naudint_irq    = 0,
318         .irq_base       = AIC3262_CODEC_IRQ_BASE,
319 };
320
321 static struct i2c_board_info __initdata cs42l73_board_info = {
322         I2C_BOARD_INFO("cs42l73", 0x4a),
323 };
324
325 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
326         I2C_BOARD_INFO("audience_a2220", 0x3E),
327 };
328
329 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
330         I2C_BOARD_INFO("tlv320aic3262", 0x18),
331         .platform_data = &aic3262_codec_pdata,
332 };
333
334 static void pluto_i2c_init(void)
335 {
336         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
337         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
338         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
339         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
340         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
341
342         platform_device_register(&tegra11_i2c_device5);
343         platform_device_register(&tegra11_i2c_device4);
344         platform_device_register(&tegra11_i2c_device3);
345         platform_device_register(&tegra11_i2c_device2);
346         platform_device_register(&tegra11_i2c_device1);
347
348         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
349         i2c_register_board_info(0, &cs42l73_board_info, 1);
350         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
351         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
352         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
353 }
354
355 static struct platform_device *pluto_uart_devices[] __initdata = {
356         &tegra_uarta_device,
357         &tegra_uartb_device,
358         &tegra_uartc_device,
359         &tegra_uartd_device,
360 };
361 static struct uart_clk_parent uart_parent_clk[] = {
362         [0] = {.name = "clk_m"},
363         [1] = {.name = "pll_p"},
364 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
365         [2] = {.name = "pll_m"},
366 #endif
367 };
368
369 static struct tegra_uart_platform_data pluto_uart_pdata;
370 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
371
372 static void __init uart_debug_init(void)
373 {
374         int debug_port_id;
375
376         debug_port_id = uart_console_debug_init(3);
377         if (debug_port_id < 0)
378                 return;
379         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
380 }
381
382 static void __init pluto_uart_init(void)
383 {
384         struct clk *c;
385         int i;
386
387         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
388                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
389                 if (IS_ERR_OR_NULL(c)) {
390                         pr_err("Not able to get the clock for %s\n",
391                                                 uart_parent_clk[i].name);
392                         continue;
393                 }
394                 uart_parent_clk[i].parent_clk = c;
395                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
396         }
397         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
398         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
399         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
400         pluto_loopback_uart_pdata.parent_clk_count =
401                                                 ARRAY_SIZE(uart_parent_clk);
402         pluto_loopback_uart_pdata.is_loopback = true;
403         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
404         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
405         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
406         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
407
408         /* Register low speed only if it is selected */
409         if (!is_tegra_debug_uartport_hs())
410                 uart_debug_init();
411
412         platform_add_devices(pluto_uart_devices,
413                                 ARRAY_SIZE(pluto_uart_devices));
414 }
415
416 static struct resource tegra_rtc_resources[] = {
417         [0] = {
418                 .start = TEGRA_RTC_BASE,
419                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
420                 .flags = IORESOURCE_MEM,
421         },
422         [1] = {
423                 .start = INT_RTC,
424                 .end = INT_RTC,
425                 .flags = IORESOURCE_IRQ,
426         },
427 };
428
429 static struct platform_device tegra_rtc_device = {
430         .name = "tegra_rtc",
431         .id   = -1,
432         .resource = tegra_rtc_resources,
433         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
434 };
435
436 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
437 static struct tegra_wakeup_monitor_platform_data
438                         pluto_tegra_wakeup_monitor_pdata = {
439         .wifi_wakeup_source     = 6,
440 };
441
442 static struct platform_device pluto_tegra_wakeup_monitor_device = {
443         .name = "tegra_wakeup_monitor",
444         .id   = -1,
445         .dev  = {
446                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
447         },
448 };
449 #endif
450
451 static struct tegra_asoc_platform_data pluto_audio_pdata = {
452         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
453         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
454         .gpio_hp_mute           = -1,
455         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
456         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
457         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
458         .i2s_param[HIFI_CODEC]  = {
459                 .audio_port_id  = 1,
460                 .is_i2s_master  = 0,
461                 .i2s_mode       = TEGRA_DAIFMT_I2S,
462                 .sample_size    = 16,
463                 .channels       = 2,
464         },
465         .i2s_param[BASEBAND]    = {
466                 .audio_port_id  = 2,
467                 .is_i2s_master  = 1,
468                 .i2s_mode       = TEGRA_DAIFMT_I2S,
469                 .sample_size    = 16,
470                 .rate           = 16000,
471                 .channels       = 2,
472                 .bit_clk        = 1024000,
473         },
474         .i2s_param[BT_SCO]      = {
475                 .audio_port_id  = 3,
476                 .is_i2s_master  = 1,
477                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
478                 .sample_size    = 16,
479                 .channels       = 1,
480                 .bit_clk        = 512000,
481         },
482         .i2s_param[VOICE_CODEC] = {
483                 .audio_port_id  = 0,
484                 .is_i2s_master  = 1,
485                 .i2s_mode       = TEGRA_DAIFMT_I2S,
486                 .sample_size    = 16,
487                 .rate           = 16000,
488                 .channels       = 2,
489         },
490 };
491
492 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
493         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
494         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
495         .gpio_hp_mute           = -1,
496         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
497         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
498         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
499         .i2s_param[HIFI_CODEC]  = {
500                 .audio_port_id  = 1,
501                 .is_i2s_master  = 1,
502                 .i2s_mode       = TEGRA_DAIFMT_I2S,
503                 .sample_size    = 16,
504                 .channels       = 2,
505         },
506         .i2s_param[BASEBAND]    = {
507                 .audio_port_id  = 2,
508                 .is_i2s_master  = 1,
509                 .i2s_mode       = TEGRA_DAIFMT_I2S,
510                 .sample_size    = 16,
511                 .rate           = 16000,
512                 .channels       = 2,
513                 .bit_clk        = 1024000,
514         },
515         .i2s_param[BT_SCO]      = {
516                 .audio_port_id  = 3,
517                 .is_i2s_master  = 1,
518                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
519                 .sample_size    = 16,
520                 .channels       = 1,
521                 .bit_clk        = 512000,
522         },
523         .i2s_param[VOICE_CODEC] = {
524                 .audio_port_id  = 0,
525                 .is_i2s_master  = 1,
526                 .i2s_mode       = TEGRA_DAIFMT_I2S,
527                 .sample_size    = 16,
528                 .rate           = 16000,
529                 .channels       = 2,
530         },
531 };
532
533 static struct platform_device pluto_audio_device = {
534         .name   = "tegra-snd-cs42l73",
535         .id     = 2,
536         .dev    = {
537                 .platform_data = &pluto_audio_pdata,
538         },
539 };
540
541 static struct platform_device pluto_audio_aic326x_device = {
542         .name   = "tegra-snd-aic326x",
543         .id     = 2,
544         .dev    = {
545                 .platform_data  = &pluto_aic3262_pdata,
546         },
547 };
548
549 #ifndef CONFIG_USE_OF
550 static struct platform_device tegra_camera = {
551         .name = "tegra_camera",
552         .id = -1,
553 };
554 #endif
555
556 #ifdef CONFIG_MHI_NETDEV
557 struct platform_device mhi_netdevice0 = {
558         .name = "mhi_net_device",
559         .id = 0,
560 };
561 #endif /* CONFIG_MHI_NETDEV */
562
563 static struct platform_device *pluto_devices[] __initdata = {
564         &tegra_pmu_device,
565         &tegra_rtc_device,
566         &tegra_udc_device,
567 #if defined(CONFIG_TEGRA_AVP)
568         &tegra_avp_device,
569 #endif
570 #ifndef CONFIG_USE_OF
571         &tegra_camera,
572 #endif
573 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
574         &tegra11_se_device,
575 #endif
576         &tegra_ahub_device,
577         &tegra_dam_device0,
578         &tegra_dam_device1,
579         &tegra_dam_device2,
580         &tegra_i2s_device0,
581         &tegra_i2s_device1,
582         &tegra_i2s_device2,
583         &tegra_i2s_device3,
584         &tegra_i2s_device4,
585         &tegra_spdif_device,
586         &spdif_dit_device,
587         &bluetooth_dit_device,
588         &baseband_dit_device,
589 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
590         &pluto_tegra_wakeup_monitor_device,
591 #endif
592         &pluto_audio_device,
593         &pluto_audio_aic326x_device,
594         &tegra_hda_device,
595 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
596         &tegra_aes_device,
597 #endif
598 #ifdef CONFIG_MHI_NETDEV
599         &mhi_netdevice0,  /* MHI netdevice */
600 #endif /* CONFIG_MHI_NETDEV */
601 };
602
603 #ifdef CONFIG_USB_SUPPORT
604 static struct tegra_usb_platform_data tegra_ehci3_hsic_xmm_pdata = {
605         .port_otg = false,
606         .has_hostpc = true,
607         .unaligned_dma_buf_supported = false,
608         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
609         .op_mode        = TEGRA_USB_OPMODE_HOST,
610         .u_data.host = {
611                 .vbus_gpio = -1,
612                 .hot_plug = false,
613                 .remote_wakeup_supported = true,
614                 .power_off_on_suspend = true,
615         },
616 };
617
618 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
619         .port_otg = false,
620         .has_hostpc = true,
621         .unaligned_dma_buf_supported = false,
622         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
623         .op_mode        = TEGRA_USB_OPMODE_HOST,
624         .u_data.host = {
625                 .vbus_gpio = -1,
626                 .hot_plug = false,
627                 .remote_wakeup_supported = true,
628                 .power_off_on_suspend = true,
629         },
630 };
631
632 static struct tegra_usb_platform_data tegra_udc_pdata = {
633         .port_otg = true,
634         .has_hostpc = true,
635         .builtin_host_disabled = true,
636         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
637         .op_mode = TEGRA_USB_OPMODE_DEVICE,
638         .u_data.dev = {
639                 .vbus_pmu_irq = 0,
640                 .vbus_gpio = -1,
641                 .charging_supported = false,
642                 .remote_wakeup_supported = false,
643         },
644         .u_cfg.utmi = {
645                 .hssync_start_delay = 0,
646                 .elastic_limit = 16,
647                 .idle_wait_delay = 17,
648                 .term_range_adj = 6,
649                 .xcvr_setup = 8,
650                 .xcvr_lsfslew = 2,
651                 .xcvr_lsrslew = 2,
652                 .xcvr_setup_offset = 0,
653                 .xcvr_use_fuses = 1,
654         },
655 };
656
657 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
658         .port_otg = true,
659         .has_hostpc = true,
660         .builtin_host_disabled = true,
661         .unaligned_dma_buf_supported = false,
662         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
663         .op_mode = TEGRA_USB_OPMODE_HOST,
664         .u_data.host = {
665                 .vbus_gpio = -1,
666                 .hot_plug = false,
667                 .remote_wakeup_supported = true,
668                 .power_off_on_suspend = true,
669         },
670         .u_cfg.utmi = {
671                 .hssync_start_delay = 0,
672                 .elastic_limit = 16,
673                 .idle_wait_delay = 17,
674                 .term_range_adj = 6,
675                 .xcvr_setup = 15,
676                 .xcvr_lsfslew = 2,
677                 .xcvr_lsrslew = 2,
678                 .xcvr_setup_offset = 0,
679                 .xcvr_use_fuses = 1,
680                 .vbus_oc_map = 0x7,
681         },
682 };
683
684 static struct tegra_usb_otg_data tegra_otg_pdata = {
685         .ehci_device = &tegra_ehci1_device,
686         .ehci_pdata = &tegra_ehci1_utmi_pdata,
687 };
688
689 static struct regulator *baseband_reg;
690 static struct gpio modem_gpios[] = { /* i500 modem */
691         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
692 };
693
694 static struct gpio modem2_gpios[] = {
695         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
696         {MDM2_RST, GPIOF_DIR_OUT, "MODEM2 RESET"},
697         {MDM2_ACK2, GPIOF_OUT_INIT_HIGH, "MODEM2 ACK2"},
698         {MDM2_ACK1, GPIOF_OUT_INIT_LOW, "MODEM2 ACK1"},
699 };
700
701 static void baseband2_post_phy_on(void);
702 static void baseband2_pre_phy_off(void);
703
704 static struct tegra_usb_phy_platform_ops baseband2_plat_ops = {
705         .pre_phy_off = baseband2_pre_phy_off,
706         .post_phy_on = baseband2_post_phy_on,
707 };
708
709 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
710         .port_otg = false,
711         .has_hostpc = true,
712         .unaligned_dma_buf_supported = false,
713         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
714         .op_mode = TEGRA_USB_OPMODE_HOST,
715         .u_data.host = {
716                 .vbus_gpio = -1,
717                 .hot_plug = false,
718                 .remote_wakeup_supported = false,
719                 .power_off_on_suspend = false,
720         },
721 };
722
723 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
724         .port_otg = false,
725         .has_hostpc = true,
726         .unaligned_dma_buf_supported = false,
727         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
728         .op_mode = TEGRA_USB_OPMODE_HOST,
729         .u_data.host = {
730                 .vbus_gpio = -1,
731                 .hot_plug = false,
732                 .remote_wakeup_supported = false,
733                 .power_off_on_suspend = false,
734         },
735         .ops = &baseband2_plat_ops,
736 };
737
738 static struct tegra_usb_platform_data tegra_hsic_pdata = {
739         .port_otg = false,
740         .has_hostpc = true,
741         .unaligned_dma_buf_supported = false,
742         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
743         .op_mode        = TEGRA_USB_OPMODE_HOST,
744         .u_data.host = {
745                 .vbus_gpio = -1,
746                 .hot_plug = false,
747                 .remote_wakeup_supported = true,
748                 .power_off_on_suspend = true,
749         },
750 };
751
752 static struct platform_device *
753 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
754 {
755         struct platform_device *pdev;
756         int val;
757
758         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
759         if (!pdev)
760                 return NULL;
761
762         val = platform_device_add_resources(pdev, ehci_dev->resource,
763                                                 ehci_dev->num_resources);
764         if (val)
765                 goto error;
766
767         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
768         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
769
770         val = platform_device_add_data(pdev, &tegra_hsic_pdata,
771                         sizeof(struct tegra_usb_platform_data));
772         if (val)
773                 goto error;
774
775         val = platform_device_add(pdev);
776         if (val)
777                 goto error;
778
779         return pdev;
780
781 error:
782         pr_err("%s: failed to add the host contoller device\n", __func__);
783         platform_device_put(pdev);
784         return NULL;
785 }
786
787 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
788 {
789         struct platform_device *pdev = *platdev;
790
791         if (pdev && &pdev->dev) {
792                 platform_device_unregister(pdev);
793                 *platdev = NULL;
794         } else
795                 pr_err("%s: no platform device\n", __func__);
796 }
797
798 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
799
800 static union tegra_bb_gpio_id bb_gpio_oem1 = {
801         .oem1 = {
802                 .reset = BB_OEM1_GPIO_RST,
803                 .pwron = BB_OEM1_GPIO_ON,
804                 .awr = BB_OEM1_GPIO_AWR,
805                 .cwr = BB_OEM1_GPIO_CWR,
806                 .spare = BB_OEM1_GPIO_SPARE,
807                 .wdi = BB_OEM1_GPIO_WDI,
808         },
809 };
810
811 static struct tegra_bb_pdata bb_pdata_oem1 = {
812         .id = &bb_gpio_oem1,
813         .device = &tegra_ehci3_device,
814         .ehci_register = tegra_usb_hsic_host_register,
815         .ehci_unregister = tegra_usb_hsic_host_unregister,
816         .bb_id = TEGRA_BB_OEM1,
817 };
818
819 static struct platform_device tegra_bb_oem1 = {
820         .name = "tegra_baseband_power",
821         .id = -1,
822         .dev = {
823                 .platform_data = &bb_pdata_oem1,
824         },
825 };
826
827 static int baseband_init(void)
828 {
829         int ret;
830
831         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
832         if (ret) {
833                 pr_warn("%s:gpio request failed\n", __func__);
834                 return ret;
835         }
836
837         baseband_reg = regulator_get(NULL, "vdd_core_bb");
838         if (IS_ERR_OR_NULL(baseband_reg))
839                 pr_warn("%s: baseband regulator get failed\n", __func__);
840         else
841                 regulator_enable(baseband_reg);
842
843         /* enable pull-down for MDM1_COLD_BOOT */
844         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
845                                     TEGRA_PUPD_PULL_DOWN);
846
847         /* export GPIO for user space access through sysfs */
848         gpio_export(MDM_RST, false);
849
850         return 0;
851 }
852
853 static const struct tegra_modem_operations baseband_operations = {
854         .init = baseband_init,
855 };
856
857 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
858         .ops = &baseband_operations,
859         .wake_gpio = -1,
860         .boot_gpio = MDM_COLDBOOT,
861         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
862         .autosuspend_delay = 2000,
863         .short_autosuspend_delay = 50,
864         .tegra_ehci_device = &tegra_ehci2_device,
865         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
866 };
867
868 static struct platform_device icera_baseband_device = {
869         .name = "tegra_usb_modem_power",
870         .id = -1,
871         .dev = {
872                 .platform_data = &baseband_pdata,
873         },
874 };
875
876 static void baseband2_post_phy_on(void)
877 {
878         /* set MDM2_ACK2 low */
879         gpio_set_value(MDM2_ACK2, 0);
880 }
881
882 static void baseband2_pre_phy_off(void)
883 {
884         /* set MDM2_ACK2 high */
885         gpio_set_value(MDM2_ACK2, 1);
886 }
887
888 static void baseband2_start(void)
889 {
890         /*
891          *  Leave baseband powered OFF.
892          *  User-space daemons will take care of powering it up.
893          */
894         pr_info("%s\n", __func__);
895         gpio_set_value(MDM2_PWR_ON, 0);
896 }
897
898 static void baseband2_reset(void)
899 {
900         /* Initiate power cycle on baseband sub system */
901         pr_info("%s\n", __func__);
902         gpio_set_value(MDM2_PWR_ON, 0);
903         mdelay(200);
904         gpio_set_value(MDM2_PWR_ON, 1);
905 }
906
907 static int baseband2_init(void)
908 {
909         int ret;
910
911         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
912         if (ret)
913                 return ret;
914
915         /* enable pull-up for MDM2_REQ2 */
916         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PV1,
917                                     TEGRA_PUPD_PULL_UP);
918
919         /* export GPIO for user space access through sysfs */
920         gpio_export(MDM2_PWR_ON, false);
921
922         return 0;
923 }
924
925 static const struct tegra_modem_operations baseband2_operations = {
926         .init = baseband2_init,
927         .start = baseband2_start,
928         .reset = baseband2_reset,
929 };
930
931 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
932         .ops = &baseband2_operations,
933         .wake_gpio = MDM2_REQ2,
934         .wake_irq_flags = IRQF_TRIGGER_FALLING,
935         .boot_gpio = MDM2_COLDBOOT,
936         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
937         .autosuspend_delay = 2000,
938         .short_autosuspend_delay = 50,
939         .tegra_ehci_device = &tegra_ehci3_device,
940         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
941 };
942
943 static struct platform_device icera_baseband2_device = {
944         .name = "tegra_usb_modem_power",
945         .id = -1,
946         .dev = {
947                 .platform_data = &baseband2_pdata,
948         },
949 };
950
951 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
952         .baseband_type = BASEBAND_XMM,
953         .modem = {
954                 .xmm = {
955                         .bb_rst = XMM_GPIO_BB_RST,
956                         .bb_on = XMM_GPIO_BB_ON,
957                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
958                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
959                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
960                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
961                 },
962         },
963 };
964
965 static struct platform_device tegra_baseband_xmm_power_device = {
966         .name = "baseband_xmm_power",
967         .id = -1,
968         .dev = {
969                 .platform_data = &tegra_baseband_xmm_power_data,
970         },
971 };
972
973 static struct platform_device tegra_baseband_xmm_power2_device = {
974         .name = "baseband_xmm_power2",
975         .id = -1,
976         .dev = {
977                 .platform_data = &tegra_baseband_xmm_power_data,
978         },
979 };
980
981 static void pluto_usb_init(void)
982 {
983         int usb_port_owner_info = tegra_get_usb_port_owner_info();
984
985         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
986                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
987                 platform_device_register(&tegra_otg_device);
988
989                 /* Setup the udc platform data */
990                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
991         }
992 }
993
994 static void pluto_modem_init(void)
995 {
996         int modem_id = tegra_get_modem_id();
997         struct board_info board_info;
998         int usb_port_owner_info = tegra_get_usb_port_owner_info();
999
1000         tegra_get_board_info(&board_info);
1001         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1002
1003         switch (modem_id) {
1004         case TEGRA_BB_I500: /* on board i500 HSIC */
1005                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
1006                         platform_device_register(&icera_baseband_device);
1007                 break;
1008         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1009                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
1010                         platform_device_register(&icera_baseband2_device);
1011                 break;
1012         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1013                 if ((board_info.board_id == BOARD_E1575) ||
1014                         ((board_info.board_id == BOARD_E1580) &&
1015                                 (board_info.fab >= BOARD_FAB_A03))) {
1016                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1017                                                         TEGRA_TRI_NORMAL);
1018                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1019                 }
1020                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1021                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1022                         tegra_ehci3_device.dev.platform_data
1023                                 = &tegra_hsic_pdata;
1024                         platform_device_register(&tegra_bb_oem1);
1025                 }
1026                 break;
1027         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1028                 /* fix wrong wiring in Pluto A02 */
1029                 if ((board_info.board_id == BOARD_E1580) &&
1030                         (board_info.fab == BOARD_FAB_A02)) {
1031                         pr_info(
1032 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1033                                 __func__);
1034                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1035                                 != MDM2_PWR_ON)
1036                                 pr_err(
1037 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1038                                         __func__);
1039                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1040                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1041                 }
1042                 /* baseband-power.ko will register ehci3 device */
1043                 tegra_ehci3_device.dev.platform_data =
1044                                         &tegra_ehci3_hsic_xmm_pdata;
1045                 tegra_baseband_xmm_power_data.hsic_register =
1046                                                 &tegra_usb_hsic_host_register;
1047                 tegra_baseband_xmm_power_data.hsic_unregister =
1048                                                 &tegra_usb_hsic_host_unregister;
1049                 tegra_baseband_xmm_power_data.ehci_device =
1050                                         &tegra_ehci3_device;
1051                 platform_device_register(&tegra_baseband_xmm_power_device);
1052                 platform_device_register(&tegra_baseband_xmm_power2_device);
1053                 /* override audio settings - use 8kHz */
1054                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1055                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1056                         = 2;
1057                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1058                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1059                         = 1;
1060                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1061                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1062                         = TEGRA_DAIFMT_I2S;
1063                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1064                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1065                         = 16;
1066                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1067                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1068                         = 8000;
1069                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1070                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1071                         = 2;
1072                 break;
1073         case TEGRA_BB_HSIC_HUB: /* i500 SWD HSIC */
1074                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1075                         tegra_ehci3_device.dev.platform_data =
1076                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1077                         platform_device_register(&tegra_ehci3_device);
1078                 }
1079                 break;
1080         default:
1081                 return;
1082         }
1083 }
1084
1085 static struct tegra_xusb_pad_data xusb_padctl_data = {
1086         .pad_mux = 0x1,
1087         .port_cap = 0x1,
1088         .snps_oc_map = 0x1ff,
1089         .usb2_oc_map = 0x3c,
1090         .ss_port_map = 0x2,
1091         .oc_det = 0,
1092         .rx_wander = 0xf0,
1093         .otg_pad0_ctl0 = 0xffc7ffff,
1094         .otg_pad0_ctl1 = 0x7,
1095         .otg_pad1_ctl0 = 0xffffffff,
1096         .otg_pad1_ctl1 = 0,
1097         .bias_pad_ctl0 = 0,
1098         .hsic_pad0_ctl0 = 0xffff00ff,
1099         .hsic_pad0_ctl1 = 0xffff00ff,
1100         .pmc_value = 0xfffffff0,
1101 };
1102
1103 static void pluto_xusb_init(void)
1104 {
1105         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1106
1107         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1108                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1109
1110                 /*
1111                  * read from usb_calib0 and pass to driver
1112                  * set HS_CURR_LEVEL = usb_calib0[5:0]
1113                  * set TERM_RANGE_ADJ = usb_calib0[10:7]
1114                  * set HS_IREF_CAP = usb_calib0[14:13]
1115                  * set HS_SQUELCH_LEVEL = usb_calib0[12:11]
1116                  */
1117
1118                 xusb_padctl_data.hs_curr_level = (usb_calib0 >> 0) & 0x3f;
1119                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1120                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1121                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1122
1123                 tegra_xhci_device.dev.platform_data = &xusb_padctl_data;
1124                 platform_device_register(&tegra_xhci_device);
1125         }
1126 }
1127 #else
1128 static void pluto_usb_init(void) { }
1129 static void pluto_modem_init(void) { }
1130 static void pluto_xusb_init(void) { }
1131 #endif
1132
1133 static void pluto_audio_init(void)
1134 {
1135         struct board_info board_info;
1136
1137         tegra_get_board_info(&board_info);
1138
1139 }
1140
1141 static struct platform_device *pluto_spi_devices[] __initdata = {
1142         &tegra11_spi_device4,
1143 };
1144
1145 struct spi_clk_parent spi_parent_clk_pluto[] = {
1146         [0] = {.name = "pll_p"},
1147 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
1148         [1] = {.name = "pll_m"},
1149         [2] = {.name = "clk_m"},
1150 #else
1151         [1] = {.name = "clk_m"},
1152 #endif
1153 };
1154
1155 static struct tegra_spi_platform_data pluto_spi_pdata = {
1156         .is_dma_based           = false,
1157         .max_dma_buffer         = 16 * 1024,
1158         .is_clkon_always        = false,
1159         .max_rate               = 25000000,
1160 };
1161
1162 static void __init pluto_spi_init(void)
1163 {
1164         int i;
1165         struct clk *c;
1166         struct board_info board_info, display_board_info;
1167
1168         tegra_get_board_info(&board_info);
1169         tegra_get_display_board_info(&display_board_info);
1170
1171         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_pluto); ++i) {
1172                 c = tegra_get_clock_by_name(spi_parent_clk_pluto[i].name);
1173                 if (IS_ERR_OR_NULL(c)) {
1174                         pr_err("Not able to get the clock for %s\n",
1175                                                 spi_parent_clk_pluto[i].name);
1176                         continue;
1177                 }
1178                 spi_parent_clk_pluto[i].parent_clk = c;
1179                 spi_parent_clk_pluto[i].fixed_clk_rate = clk_get_rate(c);
1180         }
1181         pluto_spi_pdata.parent_clk_list = spi_parent_clk_pluto;
1182         pluto_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_pluto);
1183         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1184         platform_add_devices(pluto_spi_devices,
1185                                 ARRAY_SIZE(pluto_spi_devices));
1186 }
1187
1188 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1189         /* name         parent          rate            enabled */
1190         { "extern2",    "pll_p",        41000000,       false},
1191         { "clk_out_2",  "extern2",      40800000,       false},
1192         { NULL,         NULL,           0,              0},
1193 };
1194
1195 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1196         .gpio_reset = 0,
1197         .config = 0,
1198         .platform_id = RM_PLATFORM_P005,
1199         .name_of_clock = "clk_out_2",
1200 };
1201
1202 static struct tegra_spi_device_controller_data dev_cdata = {
1203         .rx_clk_tap_delay = 0,
1204         .tx_clk_tap_delay = 0,
1205 };
1206
1207 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1208         {
1209          .modalias = "rm_ts_spidev",
1210          .bus_num = 3,
1211          .chip_select = 2,
1212          .max_speed_hz = 12 * 1000 * 1000,
1213          .mode = SPI_MODE_0,
1214          .controller_data = &dev_cdata,
1215          .platform_data = &rm31080ts_pluto_data,
1216          },
1217 };
1218
1219 static int __init pluto_touch_init(void)
1220 {
1221         tegra_clk_init_from_table(touch_clk_init_table);
1222         clk_enable(tegra_get_clock_by_name("clk_out_2"));
1223         mdelay(20);
1224         rm31080a_pluto_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1225         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1226                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
1227                                 &rm31080ts_pluto_data,
1228                                 &rm31080a_pluto_spi_board[0],
1229                                 ARRAY_SIZE(rm31080a_pluto_spi_board));
1230         return 0;
1231 }
1232
1233 #ifdef CONFIG_EDP_FRAMEWORK
1234 static struct edp_manager battery_edp_manager = {
1235         .name = "battery",
1236         .imax = 3250
1237 };
1238
1239 static void __init pluto_battery_edp_init(void)
1240 {
1241         struct edp_governor *g;
1242         int r;
1243
1244         r = edp_register_manager(&battery_edp_manager);
1245         if (r)
1246                 goto err_ret;
1247
1248         /* start with priority governor */
1249         g = edp_get_governor("priority");
1250         if (!g) {
1251                 r = -EFAULT;
1252                 goto err_ret;
1253         }
1254
1255         r = edp_set_governor(&battery_edp_manager, g);
1256         if (r)
1257                 goto err_ret;
1258
1259         return;
1260
1261 err_ret:
1262         pr_err("Battery EDP init failed with error %d\n", r);
1263         WARN_ON(1);
1264 }
1265 #else
1266 static inline void pluto_battery_edp_init(void) {}
1267 #endif
1268
1269 #ifdef CONFIG_USE_OF
1270 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1271         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1272                                 NULL),
1273         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1274                                 NULL),
1275         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1276                                 &pluto_tegra_sdhci_platform_data0),
1277         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1278                                 NULL),
1279         {}
1280 };
1281 #endif
1282
1283 static void __init tegra_pluto_early_init(void)
1284 {
1285         pluto_battery_edp_init();
1286         tegra_clk_init_from_table(pluto_clk_init_table);
1287         tegra_clk_vefify_parents();
1288         tegra_smmu_init();
1289         tegra_soc_device_init("tegra_pluto");
1290 }
1291
1292 static void __init tegra_pluto_late_init(void)
1293 {
1294         platform_device_register(&tegra_pinmux_device);
1295         pluto_pinmux_init();
1296         pluto_i2c_init();
1297         pluto_spi_init();
1298         pluto_usb_init();
1299         pluto_xusb_init();
1300         pluto_uart_init();
1301         pluto_audio_init();
1302         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1303         //tegra_ram_console_debug_init();
1304         tegra_io_dpd_init();
1305         pluto_sdhci_init();
1306         pluto_regulator_init();
1307         pluto_suspend_init();
1308         pluto_touch_init();
1309         pluto_emc_init();
1310         pluto_edp_init();
1311         isomgr_init();
1312         pluto_panel_init();
1313         pluto_pmon_init();
1314         pluto_kbc_init();
1315 #ifdef CONFIG_BT_BLUESLEEP
1316         pluto_setup_bluesleep();
1317         pluto_setup_bt_rfkill();
1318 #elif defined CONFIG_BLUEDROID_PM
1319         pluto_setup_bluedroid_pm();
1320 #endif
1321         tegra_release_bootloader_fb();
1322         pluto_modem_init();
1323 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1324         tegra_wdt_recovery_init();
1325 #endif
1326         pluto_sensors_init();
1327         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1328         pluto_soctherm_init();
1329         tegra_register_fuse();
1330 }
1331
1332 static void __init pluto_ramconsole_reserve(unsigned long size)
1333 {
1334         tegra_ram_console_debug_reserve(SZ_1M);
1335 }
1336
1337 static void __init tegra_pluto_dt_init(void)
1338 {
1339         tegra_pluto_early_init();
1340
1341         of_platform_populate(NULL,
1342                 of_default_bus_match_table, pluto_auxdata_lookup, NULL);
1343
1344         tegra_pluto_late_init();
1345 }
1346
1347 static void __init tegra_pluto_reserve(void)
1348 {
1349 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1350         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1351         tegra_reserve(0, SZ_16M, SZ_4M);
1352 #else
1353         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1354 #endif
1355         pluto_ramconsole_reserve(SZ_1M);
1356 }
1357
1358 static const char * const pluto_dt_board_compat[] = {
1359         "nvidia,pluto",
1360         NULL
1361 };
1362
1363 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1364         .atag_offset    = 0x100,
1365         .smp            = smp_ops(tegra_smp_ops),
1366         .map_io         = tegra_map_common_io,
1367         .reserve        = tegra_pluto_reserve,
1368         .init_early     = tegra11x_init_early,
1369         .init_irq       = tegra_dt_init_irq,
1370         .handle_irq     = gic_handle_irq,
1371         .timer          = &tegra_timer,
1372         .init_machine   = tegra_pluto_dt_init,
1373         .restart        = tegra_assert_system_reset,
1374         .dt_compat      = pluto_dt_board_compat,
1375 MACHINE_END