ARM: tegra: TMR8/TMR9 not to be used for watchdog
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/edp.h>
54 #include <linux/mfd/tlv320aic3262-registers.h>
55 #include <linux/mfd/tlv320aic3xxx-core.h>
56 #include <linux/usb/tegra_usb_phy.h>
57
58 #include <asm/hardware/gic.h>
59
60 #include <mach/clk.h>
61 #include <mach/irqs.h>
62 #include <mach/pinmux.h>
63 #include <mach/pinmux-t11.h>
64 #include <mach/io_dpd.h>
65 #include <mach/i2s.h>
66 #include <mach/isomgr.h>
67 #include <mach/tegra_asoc_pdata.h>
68 #include <asm/mach-types.h>
69 #include <asm/mach/arch.h>
70 #include <mach/gpio-tegra.h>
71 #include <mach/tegra_fiq_debugger.h>
72 #include <mach/tegra-bb-power.h>
73 #include <mach/tegra_wakeup_monitor.h>
74 #include <linux/platform_data/tegra_usb_modem_power.h>
75
76 #include "board.h"
77 #include "board-common.h"
78 #include "board-touch-raydium.h"
79 #include "clock.h"
80 #include "board-pluto.h"
81 #include "baseband-xmm-power.h"
82 #include "tegra-board-id.h"
83 #include "devices.h"
84 #include "gpio-names.h"
85 #include "fuse.h"
86 #include "pm.h"
87 #include "common.h"
88 #include "iomap.h"
89
90
91 #ifdef CONFIG_BT_BLUESLEEP
92 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
93         .name           = "bt_rfkill",
94         .shutdown_gpio  = TEGRA_GPIO_PQ7,
95         .reset_gpio     = TEGRA_GPIO_PQ6,
96         .type           = RFKILL_TYPE_BLUETOOTH,
97 };
98
99 static struct platform_device pluto_bt_rfkill_device = {
100         .name = "rfkill_gpio",
101         .id             = -1,
102         .dev = {
103                 .platform_data = &pluto_bt_rfkill_pdata,
104         },
105 };
106
107 static noinline void __init pluto_setup_bt_rfkill(void)
108 {
109         platform_device_register(&pluto_bt_rfkill_device);
110 }
111
112 static struct resource pluto_bluesleep_resources[] = {
113         [0] = {
114                 .name = "gpio_host_wake",
115                         .start  = TEGRA_GPIO_PU6,
116                         .end    = TEGRA_GPIO_PU6,
117                         .flags  = IORESOURCE_IO,
118         },
119         [1] = {
120                 .name = "gpio_ext_wake",
121                         .start  = TEGRA_GPIO_PEE1,
122                         .end    = TEGRA_GPIO_PEE1,
123                         .flags  = IORESOURCE_IO,
124         },
125         [2] = {
126                 .name = "host_wake",
127                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
128         },
129 };
130
131 static struct platform_device pluto_bluesleep_device = {
132         .name           = "bluesleep",
133         .id             = -1,
134         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
135         .resource       = pluto_bluesleep_resources,
136 };
137
138 static noinline void __init pluto_setup_bluesleep(void)
139 {
140         pluto_bluesleep_resources[2].start =
141                 pluto_bluesleep_resources[2].end =
142                         gpio_to_irq(TEGRA_GPIO_PU6);
143         platform_device_register(&pluto_bluesleep_device);
144         return;
145 }
146 #elif defined CONFIG_BLUEDROID_PM
147 static struct resource pluto_bluedroid_pm_resources[] = {
148         [0] = {
149                 .name   = "shutdown_gpio",
150                 .start  = TEGRA_GPIO_PQ7,
151                 .end    = TEGRA_GPIO_PQ7,
152                 .flags  = IORESOURCE_IO,
153         },
154         [1] = {
155                 .name = "host_wake",
156                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
157         },
158         [2] = {
159                 .name = "gpio_ext_wake",
160                 .start  = TEGRA_GPIO_PEE1,
161                 .end    = TEGRA_GPIO_PEE1,
162                 .flags  = IORESOURCE_IO,
163         },
164         [3] = {
165                 .name = "gpio_host_wake",
166                 .start  = TEGRA_GPIO_PU6,
167                 .end    = TEGRA_GPIO_PU6,
168                 .flags  = IORESOURCE_IO,
169         },
170         [4] = {
171                 .name = "reset_gpio",
172                 .start  = TEGRA_GPIO_PQ6,
173                 .end    = TEGRA_GPIO_PQ6,
174                 .flags  = IORESOURCE_IO,
175         },
176 };
177
178 static struct platform_device pluto_bluedroid_pm_device = {
179         .name = "bluedroid_pm",
180         .id             = 0,
181         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
182         .resource       = pluto_bluedroid_pm_resources,
183 };
184
185 static noinline void __init pluto_setup_bluedroid_pm(void)
186 {
187         pluto_bluedroid_pm_resources[1].start =
188                 pluto_bluedroid_pm_resources[1].end =
189                                         gpio_to_irq(TEGRA_GPIO_PU6);
190         platform_device_register(&pluto_bluedroid_pm_device);
191 }
192 #endif
193
194 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
195         /* name         parent          rate            enabled */
196         { "pll_m",      NULL,           0,              false},
197         { "hda",        "pll_p",        108000000,      false},
198         { "hda2codec_2x", "pll_p",      48000000,       false},
199         { "pwm",        "pll_p",        3187500,        false},
200         { "i2s1",       "pll_a_out0",   0,              false},
201         { "i2s2",       "pll_a_out0",   0,              false},
202         { "i2s3",       "pll_a_out0",   0,              false},
203         { "i2s4",       "pll_a_out0",   0,              false},
204         { "spdif_out",  "pll_a_out0",   0,              false},
205         { "d_audio",    "clk_m",        12000000,       false},
206         { "dam0",       "clk_m",        12000000,       false},
207         { "dam1",       "clk_m",        12000000,       false},
208         { "dam2",       "clk_m",        12000000,       false},
209         { "audio0",     "i2s0_sync",    0,              false},
210         { "audio1",     "i2s1_sync",    0,              false},
211         { "audio2",     "i2s2_sync",    0,              false},
212         { "audio3",     "i2s3_sync",    0,              false},
213         { "audio4",     "i2s4_sync",    0,              false},
214         { "vi_sensor",  "pll_p",        150000000,      false},
215         { "cilab",      "pll_p",        150000000,      false},
216         { "cilcd",      "pll_p",        150000000,      false},
217         { "cile",       "pll_p",        150000000,      false},
218         { "i2c1",       "pll_p",        3200000,        false},
219         { "i2c2",       "pll_p",        3200000,        false},
220         { "i2c3",       "pll_p",        3200000,        false},
221         { "i2c4",       "pll_p",        3200000,        false},
222         { "i2c5",       "pll_p",        3200000,        false},
223         { "sbc1",       "pll_p",        25000000,       false},
224         { "sbc2",       "pll_p",        25000000,       false},
225         { "sbc3",       "pll_p",        25000000,       false},
226         { "sbc4",       "pll_p",        25000000,       false},
227         { "sbc5",       "pll_p",        25000000,       false},
228         { "sbc6",       "pll_p",        25000000,       false},
229         { "extern3",    "clk_m",        12000000,       false},
230         { NULL,         NULL,           0,              0},
231 };
232
233 static struct bcm2079x_platform_data nfc_pdata = {
234         .irq_gpio = TEGRA_GPIO_PW2,
235         .en_gpio = TEGRA_GPIO_PU4,
236         .wake_gpio = TEGRA_GPIO_PX7,
237         };
238
239 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
240         {
241                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
242                 .platform_data = &nfc_pdata,
243         },
244 };
245
246 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
247         .bus_clk_rate   = 100000,
248         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
249         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
250 };
251
252 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
253         .bus_clk_rate   = 100000,
254         .is_clkon_always = true,
255         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
256         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
257 };
258
259 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
260         .bus_clk_rate   = 400000,
261         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
262         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
263 };
264
265 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
266         .bus_clk_rate   = 10000,
267         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
268         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
269 };
270
271 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
272         .bus_clk_rate   = 400000,
273         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
274         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
275         .needs_cl_dvfs_clock = true,
276 };
277
278 static struct aic3262_gpio_setup aic3262_gpio[] = {
279         /* GPIO 1*/
280         {
281                 .used = 1,
282                 .in = 0,
283                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
284         },
285         /* GPIO 2*/
286         {
287                 .used = 1,
288                 .in = 0,
289                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
290         },
291         /* GPI1 */
292         {
293                 .used = 1,
294                 .in = 1,
295         },
296         /* GPI2 */
297         {
298                 .used = 1,
299                 .in = 1,
300                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
301                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
302                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
303                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
304         },
305         /* GPO1 */
306         {
307                 .used = 1,
308                 .in = 0,
309                 .value = AIC3262_GPO1_FUNC_MSO_OUTPUT_FOR_SPI,
310         },
311 };
312 static struct aic3xxx_pdata aic3262_codec_pdata = {
313         .gpio_irq       = 0,
314         .gpio           = aic3262_gpio,
315         .naudint_irq    = 0,
316         .irq_base       = AIC3262_CODEC_IRQ_BASE,
317 };
318
319 static struct i2c_board_info __initdata cs42l73_board_info = {
320         I2C_BOARD_INFO("cs42l73", 0x4a),
321 };
322
323 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
324         I2C_BOARD_INFO("audience_a2220", 0x3E),
325 };
326
327 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
328         I2C_BOARD_INFO("tlv320aic3262", 0x18),
329         .platform_data = &aic3262_codec_pdata,
330 };
331
332 static void pluto_i2c_init(void)
333 {
334         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
335         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
336         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
337         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
338         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
339
340         platform_device_register(&tegra11_i2c_device5);
341         platform_device_register(&tegra11_i2c_device4);
342         platform_device_register(&tegra11_i2c_device3);
343         platform_device_register(&tegra11_i2c_device2);
344         platform_device_register(&tegra11_i2c_device1);
345
346         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
347         i2c_register_board_info(0, &cs42l73_board_info, 1);
348         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
349         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
350         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
351         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
352 }
353
354 static struct platform_device *pluto_uart_devices[] __initdata = {
355         &tegra_uarta_device,
356         &tegra_uartb_device,
357         &tegra_uartc_device,
358         &tegra_uartd_device,
359 };
360 static struct uart_clk_parent uart_parent_clk[] = {
361         [0] = {.name = "clk_m"},
362         [1] = {.name = "pll_p"},
363 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
364         [2] = {.name = "pll_m"},
365 #endif
366 };
367
368 static struct tegra_uart_platform_data pluto_uart_pdata;
369 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
370
371 static void __init uart_debug_init(void)
372 {
373         int debug_port_id;
374
375         debug_port_id = uart_console_debug_init(3);
376         if (debug_port_id < 0)
377                 return;
378         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
379 }
380
381 static void __init pluto_uart_init(void)
382 {
383         struct clk *c;
384         int i;
385
386         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
387                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
388                 if (IS_ERR_OR_NULL(c)) {
389                         pr_err("Not able to get the clock for %s\n",
390                                                 uart_parent_clk[i].name);
391                         continue;
392                 }
393                 uart_parent_clk[i].parent_clk = c;
394                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
395         }
396         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
397         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
398         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
399         pluto_loopback_uart_pdata.parent_clk_count =
400                                                 ARRAY_SIZE(uart_parent_clk);
401         pluto_loopback_uart_pdata.is_loopback = true;
402         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
403         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
404         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
405         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
406
407         /* Register low speed only if it is selected */
408         if (!is_tegra_debug_uartport_hs())
409                 uart_debug_init();
410
411         platform_add_devices(pluto_uart_devices,
412                                 ARRAY_SIZE(pluto_uart_devices));
413 }
414
415 static struct resource tegra_rtc_resources[] = {
416         [0] = {
417                 .start = TEGRA_RTC_BASE,
418                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
419                 .flags = IORESOURCE_MEM,
420         },
421         [1] = {
422                 .start = INT_RTC,
423                 .end = INT_RTC,
424                 .flags = IORESOURCE_IRQ,
425         },
426 };
427
428 static struct platform_device tegra_rtc_device = {
429         .name = "tegra_rtc",
430         .id   = -1,
431         .resource = tegra_rtc_resources,
432         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
433 };
434
435 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
436 static struct tegra_wakeup_monitor_platform_data
437                         pluto_tegra_wakeup_monitor_pdata = {
438         .wifi_wakeup_source     = 6,
439 };
440
441 static struct platform_device pluto_tegra_wakeup_monitor_device = {
442         .name = "tegra_wakeup_monitor",
443         .id   = -1,
444         .dev  = {
445                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
446         },
447 };
448 #endif
449
450 static struct tegra_asoc_platform_data pluto_audio_pdata = {
451         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
452         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
453         .gpio_hp_mute           = -1,
454         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
455         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
456         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
457         .edp_support            =  true,
458         .edp_states             = {1776, 888, 0},
459         .i2s_param[HIFI_CODEC]  = {
460                 .audio_port_id  = 1,
461                 .is_i2s_master  = 0,
462                 .i2s_mode       = TEGRA_DAIFMT_I2S,
463                 .sample_size    = 16,
464                 .channels       = 2,
465         },
466         .i2s_param[BASEBAND]    = {
467                 .audio_port_id  = 2,
468                 .is_i2s_master  = 1,
469                 .i2s_mode       = TEGRA_DAIFMT_I2S,
470                 .sample_size    = 16,
471                 .rate           = 16000,
472                 .channels       = 2,
473                 .bit_clk        = 1024000,
474         },
475         .i2s_param[BT_SCO]      = {
476                 .audio_port_id  = 3,
477                 .is_i2s_master  = 1,
478                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
479                 .sample_size    = 16,
480                 .channels       = 1,
481                 .bit_clk        = 512000,
482         },
483         .i2s_param[VOICE_CODEC] = {
484                 .audio_port_id  = 0,
485                 .is_i2s_master  = 1,
486                 .i2s_mode       = TEGRA_DAIFMT_I2S,
487                 .sample_size    = 16,
488                 .rate           = 16000,
489                 .channels       = 2,
490         },
491 };
492
493 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
494         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
495         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
496         .gpio_hp_mute           = -1,
497         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
498         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
499         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
500         .edp_support            = true,
501         .edp_states             = {1776, 888, 0},
502         .i2s_param[HIFI_CODEC]  = {
503                 .audio_port_id  = 1,
504                 .is_i2s_master  = 1,
505                 .i2s_mode       = TEGRA_DAIFMT_I2S,
506                 .sample_size    = 16,
507                 .rate           = 48000,
508                 .channels       = 2,
509         },
510         .i2s_param[BASEBAND]    = {
511                 .audio_port_id  = 2,
512                 .is_i2s_master  = 1,
513                 .i2s_mode       = TEGRA_DAIFMT_I2S,
514                 .sample_size    = 16,
515                 .rate           = 16000,
516                 .channels       = 2,
517                 .bit_clk        = 1024000,
518         },
519         .i2s_param[BT_SCO]      = {
520                 .audio_port_id  = 3,
521                 .is_i2s_master  = 1,
522                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
523                 .sample_size    = 16,
524                 .channels       = 1,
525                 .bit_clk        = 512000,
526         },
527         .i2s_param[VOICE_CODEC] = {
528                 .audio_port_id  = 0,
529                 .is_i2s_master  = 1,
530                 .i2s_mode       = TEGRA_DAIFMT_I2S,
531                 .sample_size    = 16,
532                 .rate           = 16000,
533                 .channels       = 2,
534         },
535 };
536
537 static struct platform_device pluto_audio_device = {
538         .name   = "tegra-snd-cs42l73",
539         .id     = 2,
540         .dev    = {
541                 .platform_data = &pluto_audio_pdata,
542         },
543 };
544
545 static struct platform_device pluto_audio_aic326x_device = {
546         .name   = "tegra-snd-aic326x",
547         .id     = 2,
548         .dev    = {
549                 .platform_data  = &pluto_aic3262_pdata,
550         },
551 };
552
553 static struct tegra_spi_device_controller_data dev_bdata = {
554         .rx_clk_tap_delay = 0,
555         .tx_clk_tap_delay = 0,
556 };
557 static struct spi_board_info aic326x_spi_board_info[] = {
558         {
559                 .modalias = "tlv320aic3xxx",
560                 .bus_num = 3,
561                 .chip_select = 0,
562                 .max_speed_hz = 4*1000*1000,
563                 .mode = SPI_MODE_1,
564                 .controller_data = &dev_bdata,
565                 .platform_data = &aic3262_codec_pdata,
566         },
567 };
568
569 #ifdef CONFIG_MHI_NETDEV
570 struct platform_device mhi_netdevice0 = {
571         .name = "mhi_net_device",
572         .id = 0,
573 };
574 #endif /* CONFIG_MHI_NETDEV */
575
576 static struct platform_device *pluto_devices[] __initdata = {
577         &tegra_pmu_device,
578         &tegra_rtc_device,
579         &tegra_udc_device,
580 #if defined(CONFIG_TEGRA_WATCHDOG)
581         &tegra_wdt0_device,
582 #endif
583 #if defined(CONFIG_TEGRA_AVP)
584         &tegra_avp_device,
585 #endif
586 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
587         &tegra11_se_device,
588 #endif
589         &tegra_ahub_device,
590         &tegra_dam_device0,
591         &tegra_dam_device1,
592         &tegra_dam_device2,
593         &tegra_i2s_device0,
594         &tegra_i2s_device1,
595         &tegra_i2s_device2,
596         &tegra_i2s_device3,
597         &tegra_i2s_device4,
598         &tegra_spdif_device,
599         &spdif_dit_device,
600         &bluetooth_dit_device,
601         &baseband_dit_device,
602 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
603         &pluto_tegra_wakeup_monitor_device,
604 #endif
605         &pluto_audio_device,
606         &pluto_audio_aic326x_device,
607         &tegra_hda_device,
608 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
609         &tegra_aes_device,
610 #endif
611 #ifdef CONFIG_MHI_NETDEV
612         &mhi_netdevice0,  /* MHI netdevice */
613 #endif /* CONFIG_MHI_NETDEV */
614 };
615
616 #ifdef CONFIG_USB_SUPPORT
617
618 static void pluto_usb_hsic_postsupend(void)
619 {
620         pr_debug("%s\n", __func__);
621 #ifdef CONFIG_TEGRA_BB_XMM_POWER
622         baseband_xmm_set_power_status(BBXMM_PS_L2);
623 #endif
624 }
625
626 static void pluto_usb_hsic_preresume(void)
627 {
628         pr_debug("%s\n", __func__);
629 #ifdef CONFIG_TEGRA_BB_XMM_POWER
630         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
631 #endif
632 }
633
634 static void pluto_usb_hsic_post_resume(void)
635 {
636         pr_debug("%s\n", __func__);
637 #ifdef CONFIG_TEGRA_BB_XMM_POWER
638         baseband_xmm_set_power_status(BBXMM_PS_L0);
639 #endif
640 }
641
642 static void pluto_usb_hsic_phy_power(void)
643 {
644         pr_debug("%s\n", __func__);
645 #ifdef CONFIG_TEGRA_BB_XMM_POWER
646         baseband_xmm_set_power_status(BBXMM_PS_L0);
647 #endif
648 }
649
650 static void pluto_usb_hsic_post_phy_off(void)
651 {
652         pr_debug("%s\n", __func__);
653 #ifdef CONFIG_TEGRA_BB_XMM_POWER
654         baseband_xmm_set_power_status(BBXMM_PS_L2);
655 #endif
656 }
657
658 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
659         .post_suspend = pluto_usb_hsic_postsupend,
660         .pre_resume = pluto_usb_hsic_preresume,
661         .port_power = pluto_usb_hsic_phy_power,
662         .post_resume = pluto_usb_hsic_post_resume,
663         .post_phy_off = pluto_usb_hsic_post_phy_off,
664 };
665
666 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
667         .port_otg = false,
668         .has_hostpc = true,
669         .unaligned_dma_buf_supported = false,
670         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
671         .op_mode        = TEGRA_USB_OPMODE_HOST,
672         .u_data.host = {
673                 .vbus_gpio = -1,
674                 .hot_plug = false,
675                 .remote_wakeup_supported = true,
676                 .power_off_on_suspend = true,
677         },
678 };
679
680 static struct tegra_usb_platform_data tegra_udc_pdata = {
681         .port_otg = true,
682         .has_hostpc = true,
683         .builtin_host_disabled = true,
684         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
685         .op_mode = TEGRA_USB_OPMODE_DEVICE,
686         .u_data.dev = {
687                 .vbus_pmu_irq = 0,
688                 .vbus_gpio = -1,
689                 .charging_supported = false,
690                 .remote_wakeup_supported = false,
691         },
692         .u_cfg.utmi = {
693                 .hssync_start_delay = 0,
694                 .elastic_limit = 16,
695                 .idle_wait_delay = 17,
696                 .term_range_adj = 6,
697                 .xcvr_setup = 8,
698                 .xcvr_lsfslew = 2,
699                 .xcvr_lsrslew = 2,
700                 .xcvr_setup_offset = 0,
701                 .xcvr_use_fuses = 1,
702         },
703 };
704
705 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
706         .port_otg = true,
707         .has_hostpc = true,
708         .builtin_host_disabled = true,
709         .unaligned_dma_buf_supported = false,
710         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
711         .op_mode = TEGRA_USB_OPMODE_HOST,
712         .u_data.host = {
713                 .vbus_gpio = -1,
714                 .hot_plug = false,
715                 .remote_wakeup_supported = true,
716                 .power_off_on_suspend = true,
717         },
718         .u_cfg.utmi = {
719                 .hssync_start_delay = 0,
720                 .elastic_limit = 16,
721                 .idle_wait_delay = 17,
722                 .term_range_adj = 6,
723                 .xcvr_setup = 15,
724                 .xcvr_lsfslew = 2,
725                 .xcvr_lsrslew = 2,
726                 .xcvr_setup_offset = 0,
727                 .xcvr_use_fuses = 1,
728                 .vbus_oc_map = 0x7,
729         },
730 };
731
732 static struct tegra_usb_otg_data tegra_otg_pdata = {
733         .ehci_device = &tegra_ehci1_device,
734         .ehci_pdata = &tegra_ehci1_utmi_pdata,
735 };
736
737 static struct regulator *baseband_reg;
738 static struct gpio modem_gpios[] = { /* i500 modem */
739         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
740 };
741
742 static struct gpio modem2_gpios[] = {
743         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
744         {MDM2_RST, GPIOF_DIR_OUT, "MODEM2 RESET"},
745         {MDM2_ACK2, GPIOF_OUT_INIT_HIGH, "MODEM2 ACK2"},
746         {MDM2_ACK1, GPIOF_OUT_INIT_LOW, "MODEM2 ACK1"},
747 };
748
749 static void baseband2_post_phy_on(void);
750 static void baseband2_pre_phy_off(void);
751
752 static struct tegra_usb_phy_platform_ops baseband2_plat_ops = {
753         .pre_phy_off = baseband2_pre_phy_off,
754         .post_phy_on = baseband2_post_phy_on,
755 };
756
757 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
758         .port_otg = false,
759         .has_hostpc = true,
760         .unaligned_dma_buf_supported = false,
761         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
762         .op_mode = TEGRA_USB_OPMODE_HOST,
763         .u_data.host = {
764                 .vbus_gpio = -1,
765                 .hot_plug = false,
766                 .remote_wakeup_supported = true,
767                 .power_off_on_suspend = true,
768         },
769 };
770
771 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
772         .port_otg = false,
773         .has_hostpc = true,
774         .unaligned_dma_buf_supported = false,
775         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
776         .op_mode = TEGRA_USB_OPMODE_HOST,
777         .u_data.host = {
778                 .vbus_gpio = -1,
779                 .hot_plug = false,
780                 .remote_wakeup_supported = true,
781                 .power_off_on_suspend = true,
782         },
783         .ops = &baseband2_plat_ops,
784 };
785
786 static struct tegra_usb_platform_data tegra_hsic_pdata = {
787         .port_otg = false,
788         .has_hostpc = true,
789         .unaligned_dma_buf_supported = false,
790         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
791         .op_mode        = TEGRA_USB_OPMODE_HOST,
792         .u_data.host = {
793                 .vbus_gpio = -1,
794                 .hot_plug = false,
795                 .remote_wakeup_supported = true,
796                 .power_off_on_suspend = true,
797         },
798 };
799
800 static struct platform_device *
801 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
802 {
803         struct platform_device *pdev;
804         int val;
805
806         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
807         if (!pdev)
808                 return NULL;
809
810         val = platform_device_add_resources(pdev, ehci_dev->resource,
811                                                 ehci_dev->num_resources);
812         if (val)
813                 goto error;
814
815         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
816         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
817
818         val = platform_device_add_data(pdev, &tegra_hsic_pdata,
819                         sizeof(struct tegra_usb_platform_data));
820         if (val)
821                 goto error;
822
823         val = platform_device_add(pdev);
824         if (val)
825                 goto error;
826
827         return pdev;
828
829 error:
830         pr_err("%s: failed to add the host contoller device\n", __func__);
831         platform_device_put(pdev);
832         return NULL;
833 }
834
835 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
836 {
837         struct platform_device *pdev = *platdev;
838
839         if (pdev && &pdev->dev) {
840                 platform_device_unregister(pdev);
841                 *platdev = NULL;
842         } else
843                 pr_err("%s: no platform device\n", __func__);
844 }
845
846 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
847
848 static union tegra_bb_gpio_id bb_gpio_oem1 = {
849         .oem1 = {
850                 .reset = BB_OEM1_GPIO_RST,
851                 .pwron = BB_OEM1_GPIO_ON,
852                 .awr = BB_OEM1_GPIO_AWR,
853                 .cwr = BB_OEM1_GPIO_CWR,
854                 .spare = BB_OEM1_GPIO_SPARE,
855                 .wdi = BB_OEM1_GPIO_WDI,
856         },
857 };
858
859 static struct tegra_bb_pdata bb_pdata_oem1 = {
860         .id = &bb_gpio_oem1,
861         .device = &tegra_ehci3_device,
862         .ehci_register = tegra_usb_hsic_host_register,
863         .ehci_unregister = tegra_usb_hsic_host_unregister,
864         .bb_id = TEGRA_BB_OEM1,
865 };
866
867 static struct platform_device tegra_bb_oem1 = {
868         .name = "tegra_baseband_power",
869         .id = -1,
870         .dev = {
871                 .platform_data = &bb_pdata_oem1,
872         },
873 };
874
875 static int baseband_init(void)
876 {
877         int ret;
878
879         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
880         if (ret) {
881                 pr_warn("%s:gpio request failed\n", __func__);
882                 return ret;
883         }
884
885         baseband_reg = regulator_get(NULL, "vdd_core_bb");
886         if (IS_ERR_OR_NULL(baseband_reg))
887                 pr_warn("%s: baseband regulator get failed\n", __func__);
888         else
889                 regulator_enable(baseband_reg);
890
891         /* enable pull-up for MDM1 UART RX */
892         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PU1,
893                                     TEGRA_PUPD_PULL_UP);
894
895         /* enable pull-down for MDM1_COLD_BOOT */
896         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
897                                     TEGRA_PUPD_PULL_DOWN);
898
899         /* export GPIO for user space access through sysfs */
900         gpio_export(MDM_RST, false);
901
902         return 0;
903 }
904
905 static const struct tegra_modem_operations baseband_operations = {
906         .init = baseband_init,
907 };
908
909 #define MODEM_BOOT_EDP_MAX 0
910 /* FIXME: get accurate boot current value */
911 static unsigned int modem_boot_edp_states[] = { 1900, 0 };
912 static struct edp_client modem_boot_edp_client = {
913         .name = "modem_boot",
914         .states = modem_boot_edp_states,
915         .num_states = ARRAY_SIZE(modem_boot_edp_states),
916         .e0_index = MODEM_BOOT_EDP_MAX,
917         .priority = EDP_MAX_PRIO,
918 };
919
920 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
921         .ops = &baseband_operations,
922         .wake_gpio = -1,
923         .boot_gpio = MDM_COLDBOOT,
924         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
925         .autosuspend_delay = 2000,
926         .short_autosuspend_delay = 50,
927         .tegra_ehci_device = &tegra_ehci2_device,
928         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
929         .modem_boot_edp_client = &modem_boot_edp_client,
930         .edp_manager_name = "battery",
931         .i_breach_ppm = 500000,
932         /* FIXME: get useful adjperiods */
933         .i_thresh_3g_adjperiod = 10000,
934         .i_thresh_lte_adjperiod = 10000,
935 };
936
937 static struct platform_device icera_baseband_device = {
938         .name = "tegra_usb_modem_power",
939         .id = -1,
940         .dev = {
941                 .platform_data = &baseband_pdata,
942         },
943 };
944
945 static void baseband2_post_phy_on(void)
946 {
947         /* set MDM2_ACK2 low */
948         gpio_set_value(MDM2_ACK2, 0);
949 }
950
951 static void baseband2_pre_phy_off(void)
952 {
953         /* set MDM2_ACK2 high */
954         gpio_set_value(MDM2_ACK2, 1);
955 }
956
957 static void baseband2_start(void)
958 {
959         /*
960          *  Leave baseband powered OFF.
961          *  User-space daemons will take care of powering it up.
962          */
963         pr_info("%s\n", __func__);
964         gpio_set_value(MDM2_PWR_ON, 0);
965 }
966
967 static void baseband2_reset(void)
968 {
969         /* Initiate power cycle on baseband sub system */
970         pr_info("%s\n", __func__);
971         gpio_set_value(MDM2_PWR_ON, 0);
972         mdelay(200);
973         gpio_set_value(MDM2_PWR_ON, 1);
974 }
975
976 static int baseband2_init(void)
977 {
978         int ret;
979
980         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
981         if (ret)
982                 return ret;
983
984         /* enable pull-up for MDM2_REQ2 */
985         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PV1,
986                                     TEGRA_PUPD_PULL_UP);
987
988         /* export GPIO for user space access through sysfs */
989         gpio_export(MDM2_PWR_ON, false);
990
991         return 0;
992 }
993
994 static const struct tegra_modem_operations baseband2_operations = {
995         .init = baseband2_init,
996         .start = baseband2_start,
997         .reset = baseband2_reset,
998 };
999
1000 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
1001         .ops = &baseband2_operations,
1002         .wake_gpio = MDM2_REQ2,
1003         .wake_irq_flags = IRQF_TRIGGER_FALLING,
1004         .boot_gpio = MDM2_COLDBOOT,
1005         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1006         .autosuspend_delay = 2000,
1007         .short_autosuspend_delay = 50,
1008         .tegra_ehci_device = &tegra_ehci3_device,
1009         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
1010 };
1011
1012 static struct platform_device icera_baseband2_device = {
1013         .name = "tegra_usb_modem_power",
1014         .id = -1,
1015         .dev = {
1016                 .platform_data = &baseband2_pdata,
1017         },
1018 };
1019
1020 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
1021         .baseband_type = BASEBAND_XMM,
1022         .modem = {
1023                 .xmm = {
1024                         .bb_rst = XMM_GPIO_BB_RST,
1025                         .bb_on = XMM_GPIO_BB_ON,
1026                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1027                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1028                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1029                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1030                 },
1031         },
1032 };
1033
1034 static struct platform_device tegra_baseband_xmm_power_device = {
1035         .name = "baseband_xmm_power",
1036         .id = -1,
1037         .dev = {
1038                 .platform_data = &tegra_baseband_xmm_power_data,
1039         },
1040 };
1041
1042 static struct platform_device tegra_baseband_xmm_power2_device = {
1043         .name = "baseband_xmm_power2",
1044         .id = -1,
1045         .dev = {
1046                 .platform_data = &tegra_baseband_xmm_power_data,
1047         },
1048 };
1049
1050 static void pluto_usb_init(void)
1051 {
1052         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1053
1054         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1055                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1056                 platform_device_register(&tegra_otg_device);
1057
1058                 /* Setup the udc platform data */
1059                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1060         }
1061 }
1062
1063 static void pluto_modem_init(void)
1064 {
1065         int modem_id = tegra_get_modem_id();
1066         struct board_info board_info;
1067         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1068
1069         tegra_get_board_info(&board_info);
1070         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1071
1072         switch (modem_id) {
1073         case TEGRA_BB_I500: /* on board i500 HSIC */
1074                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
1075                         platform_device_register(&icera_baseband_device);
1076                 break;
1077         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1078                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
1079                         platform_device_register(&icera_baseband2_device);
1080                 break;
1081         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1082                 if ((board_info.board_id == BOARD_E1575) ||
1083                         ((board_info.board_id == BOARD_E1580) &&
1084                                 (board_info.fab >= BOARD_FAB_A03))) {
1085                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1086                                                         TEGRA_TRI_NORMAL);
1087                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1088                 }
1089                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1090                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1091                         tegra_ehci3_device.dev.platform_data
1092                                 = &tegra_hsic_pdata;
1093                         platform_device_register(&tegra_bb_oem1);
1094                 }
1095                 break;
1096         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1097                 /* fix wrong wiring in Pluto A02 */
1098                 if ((board_info.board_id == BOARD_E1580) &&
1099                         (board_info.fab == BOARD_FAB_A02)) {
1100                         pr_info(
1101 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1102                                 __func__);
1103                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1104                                 != MDM2_PWR_ON)
1105                                 pr_err(
1106 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1107                                         __func__);
1108                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1109                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1110                 }
1111                 /* baseband-power.ko will register ehci3 device */
1112                 tegra_hsic_pdata.ops = &oem2_plat_ops;
1113                 tegra_hsic_pdata.u_data.host.remote_wakeup_supported = false;
1114                 tegra_hsic_pdata.u_data.host.power_off_on_suspend = false;
1115                 tegra_ehci3_device.dev.platform_data =
1116                                         &tegra_hsic_pdata;
1117                 tegra_baseband_xmm_power_data.hsic_register =
1118                                                 &tegra_usb_hsic_host_register;
1119                 tegra_baseband_xmm_power_data.hsic_unregister =
1120                                                 &tegra_usb_hsic_host_unregister;
1121                 tegra_baseband_xmm_power_data.ehci_device =
1122                                         &tegra_ehci3_device;
1123                 platform_device_register(&tegra_baseband_xmm_power_device);
1124                 platform_device_register(&tegra_baseband_xmm_power2_device);
1125                 /* override audio settings - use 8kHz */
1126                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1127                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1128                         = 2;
1129                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1130                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1131                         = 1;
1132                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1133                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1134                         = TEGRA_DAIFMT_I2S;
1135                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1136                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1137                         = 16;
1138                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1139                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1140                         = 8000;
1141                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1142                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1143                         = 2;
1144                 break;
1145         case TEGRA_BB_HSIC_HUB: /* HSIC hub */
1146                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1147                         tegra_ehci3_device.dev.platform_data =
1148                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1149                         platform_device_register(&tegra_ehci3_device);
1150                 }
1151                 break;
1152         default:
1153                 return;
1154         }
1155 }
1156
1157 static struct tegra_xusb_pad_data xusb_padctl_data = {
1158         .pad_mux = (0x1 << 0),
1159         .port_cap = (0x1 << 0),
1160         .snps_oc_map = (0x1ff << 0),
1161         .usb2_oc_map = (0x3c << 0),
1162         .ss_port_map = (0x1 << 0),
1163         .oc_det = (0x3f << 10),
1164         .rx_wander = (0xf << 4),
1165         .rx_eq = (0x3070 << 8),
1166         .cdr_cntl = (0x26 << 24),
1167         .dfe_cntl = 0x002008EE,
1168         .hs_slew = (0x3 << 6),
1169         .otg_pad0_ctl0 = (0x0 << 19),
1170         .otg_pad1_ctl0 = (0x7 << 19),
1171         .otg_pad0_ctl1 = (0x3 << 0),
1172         .otg_pad1_ctl1 = (0x4 << 0),
1173         .hs_disc_lvl = (0x5 << 2),
1174         .hsic_pad0_ctl0 = (0x00 << 8),
1175         .hsic_pad0_ctl1 = (0x00 << 8),
1176 };
1177
1178 static void pluto_xusb_init(void)
1179 {
1180         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1181
1182         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1183                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1184
1185                 pr_info("dalmore_xusb_init: usb_calib0 = 0x%08x\n", usb_calib0);
1186                 /*
1187                  * read from usb_calib0 and pass to driver
1188                  * set HS_CURR_LEVEL (PAD0)     = usb_calib0[5:0]
1189                  * set TERM_RANGE_ADJ           = usb_calib0[10:7]
1190                  * set HS_SQUELCH_LEVEL         = usb_calib0[12:11]
1191                  * set HS_IREF_CAP              = usb_calib0[14:13]
1192                  * set HS_CURR_LEVEL (PAD1)     = usb_calib0[20:15]
1193                  */
1194
1195                 xusb_padctl_data.hs_curr_level_pad0 = (usb_calib0 >> 0) & 0x3f;
1196                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1197                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1198                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1199                 xusb_padctl_data.hs_curr_level_pad1 = (usb_calib0 >> 15) & 0x3f;
1200
1201                 tegra_xhci_device.dev.platform_data = &xusb_padctl_data;
1202                 platform_device_register(&tegra_xhci_device);
1203         }
1204 }
1205 #else
1206 static void pluto_usb_init(void) { }
1207 static void pluto_modem_init(void) { }
1208 static void pluto_xusb_init(void) { }
1209 #endif
1210
1211 static void pluto_audio_init(void)
1212 {
1213         struct board_info board_info;
1214
1215         tegra_get_board_info(&board_info);
1216
1217         spi_register_board_info(aic326x_spi_board_info,
1218                                         ARRAY_SIZE(aic326x_spi_board_info));
1219 }
1220
1221 #ifndef CONFIG_USE_OF
1222 static struct platform_device *pluto_spi_devices[] __initdata = {
1223         &tegra11_spi_device4,
1224 };
1225
1226 static struct tegra_spi_platform_data pluto_spi_pdata = {
1227         .dma_req_sel            = 0,
1228         .spi_max_frequency      = 25000000,
1229         .clock_always_on        = false,
1230 };
1231
1232 static void __init pluto_spi_init(void)
1233 {
1234         struct board_info board_info, display_board_info;
1235
1236         tegra_get_board_info(&board_info);
1237         tegra_get_display_board_info(&display_board_info);
1238
1239         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1240         platform_add_devices(pluto_spi_devices,
1241                                 ARRAY_SIZE(pluto_spi_devices));
1242 }
1243 #else
1244 static void __init pluto_spi_init(void)
1245 {
1246 }
1247 #endif
1248
1249 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1250         /* name         parent          rate            enabled */
1251         { "extern2",    "pll_p",        41000000,       false},
1252         { "clk_out_2",  "extern2",      40800000,       false},
1253         { NULL,         NULL,           0,              0},
1254 };
1255
1256 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1257         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
1258         .config = 0,
1259         .platform_id = RM_PLATFORM_P005,
1260         .name_of_clock = "clk_out_2",
1261         .name_of_clock_con = "extern2",
1262 };
1263
1264 static struct tegra_spi_device_controller_data dev_cdata = {
1265         .rx_clk_tap_delay = 0,
1266         .tx_clk_tap_delay = 0,
1267 };
1268
1269 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1270         {
1271          .modalias = "rm_ts_spidev",
1272          .bus_num = 3,
1273          .chip_select = 2,
1274          .max_speed_hz = 12 * 1000 * 1000,
1275          .mode = SPI_MODE_0,
1276          .controller_data = &dev_cdata,
1277          .platform_data = &rm31080ts_pluto_data,
1278          },
1279 };
1280
1281 static int __init pluto_touch_init(void)
1282 {
1283         tegra_clk_init_from_table(touch_clk_init_table);
1284         rm31080a_pluto_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1285         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1286                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
1287                                 &rm31080ts_pluto_data,
1288                                 &rm31080a_pluto_spi_board[0],
1289                                 ARRAY_SIZE(rm31080a_pluto_spi_board));
1290         return 0;
1291 }
1292
1293 #ifdef CONFIG_EDP_FRAMEWORK
1294 static struct edp_manager battery_edp_manager = {
1295         .name = "battery",
1296         .max = 20000
1297 };
1298
1299 static void __init pluto_battery_edp_init(void)
1300 {
1301         struct edp_governor *g;
1302         int r;
1303
1304         r = edp_register_manager(&battery_edp_manager);
1305         if (r)
1306                 goto err_ret;
1307
1308         /* start with priority governor */
1309         g = edp_get_governor("priority");
1310         if (!g) {
1311                 r = -EFAULT;
1312                 goto err_ret;
1313         }
1314
1315         r = edp_set_governor(&battery_edp_manager, g);
1316         if (r)
1317                 goto err_ret;
1318
1319         return;
1320
1321 err_ret:
1322         pr_err("Battery EDP init failed with error %d\n", r);
1323         WARN_ON(1);
1324 }
1325 #else
1326 static inline void pluto_battery_edp_init(void) {}
1327 #endif
1328
1329 #ifdef CONFIG_USE_OF
1330 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1331         OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-dma", NULL),
1332         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1333                                 NULL),
1334         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1335                                 NULL),
1336         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1337                                 &pluto_tegra_sdhci_platform_data0),
1338         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1339                                 NULL),
1340         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
1341                                 NULL),
1342         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
1343                                 NULL),
1344         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
1345                                 NULL),
1346         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
1347                                 NULL),
1348         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
1349                                 NULL),
1350         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
1351                                 NULL),
1352         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
1353                                 NULL),
1354         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c500, "tegra11-i2c.2",
1355                                 NULL),
1356         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
1357                                 NULL),
1358         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
1359                                 NULL),
1360         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
1361                                 NULL),
1362         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
1363                                 NULL),
1364         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
1365                                 NULL),
1366         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
1367                                 NULL),
1368         {}
1369 };
1370 #endif
1371
1372 static void __init tegra_pluto_early_init(void)
1373 {
1374         pluto_battery_edp_init();
1375         tegra_clk_init_from_table(pluto_clk_init_table);
1376         tegra_clk_vefify_parents();
1377         tegra_smmu_init();
1378         tegra_soc_device_init("tegra_pluto");
1379 }
1380
1381 static void __init tegra_pluto_late_init(void)
1382 {
1383         platform_device_register(&tegra_pinmux_device);
1384         pluto_pinmux_init();
1385         pluto_i2c_init();
1386         pluto_spi_init();
1387         pluto_usb_init();
1388         pluto_xusb_init();
1389         pluto_uart_init();
1390         pluto_audio_init();
1391         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1392         //tegra_ram_console_debug_init();
1393         tegra_io_dpd_init();
1394         pluto_sdhci_init();
1395         pluto_regulator_init();
1396         pluto_suspend_init();
1397         pluto_touch_init();
1398         pluto_emc_init();
1399         pluto_edp_init();
1400         isomgr_init();
1401         pluto_panel_init();
1402         pluto_pmon_init();
1403         pluto_kbc_init();
1404 #ifdef CONFIG_BT_BLUESLEEP
1405         pluto_setup_bluesleep();
1406         pluto_setup_bt_rfkill();
1407 #elif defined CONFIG_BLUEDROID_PM
1408         pluto_setup_bluedroid_pm();
1409 #endif
1410         tegra_release_bootloader_fb();
1411         pluto_modem_init();
1412 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1413         tegra_wdt_recovery_init();
1414 #endif
1415         pluto_sensors_init();
1416         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1417         pluto_soctherm_init();
1418         tegra_register_fuse();
1419 }
1420
1421 static void __init pluto_ramconsole_reserve(unsigned long size)
1422 {
1423         tegra_ram_console_debug_reserve(SZ_1M);
1424 }
1425
1426 static void __init tegra_pluto_dt_init(void)
1427 {
1428         tegra_pluto_early_init();
1429
1430         of_platform_populate(NULL,
1431                 of_default_bus_match_table, pluto_auxdata_lookup,
1432                 &platform_bus);
1433
1434         tegra_pluto_late_init();
1435 }
1436
1437 static void __init tegra_pluto_reserve(void)
1438 {
1439 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1440         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1441         tegra_reserve(0, SZ_16M, SZ_4M);
1442 #else
1443         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1444 #endif
1445         pluto_ramconsole_reserve(SZ_1M);
1446 }
1447
1448 static const char * const pluto_dt_board_compat[] = {
1449         "nvidia,pluto",
1450         NULL
1451 };
1452
1453 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1454         .atag_offset    = 0x100,
1455         .smp            = smp_ops(tegra_smp_ops),
1456         .map_io         = tegra_map_common_io,
1457         .reserve        = tegra_pluto_reserve,
1458         .init_early     = tegra11x_init_early,
1459         .init_irq       = tegra_dt_init_irq,
1460         .handle_irq     = gic_handle_irq,
1461         .timer          = &tegra_sys_timer,
1462         .init_machine   = tegra_pluto_dt_init,
1463         .restart        = tegra_assert_system_reset,
1464         .dt_compat      = pluto_dt_board_compat,
1465 MACHINE_END