ARM: tegra: xusb: fix ss port mapping
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/edp.h>
54 #include <linux/mfd/tlv320aic3262-registers.h>
55 #include <linux/mfd/tlv320aic3xxx-core.h>
56 #include <linux/usb/tegra_usb_phy.h>
57
58 #include <asm/hardware/gic.h>
59
60 #include <mach/clk.h>
61 #include <mach/irqs.h>
62 #include <mach/pinmux.h>
63 #include <mach/pinmux-t11.h>
64 #include <mach/io_dpd.h>
65 #include <mach/i2s.h>
66 #include <mach/isomgr.h>
67 #include <mach/tegra_asoc_pdata.h>
68 #include <asm/mach-types.h>
69 #include <asm/mach/arch.h>
70 #include <mach/gpio-tegra.h>
71 #include <mach/tegra_fiq_debugger.h>
72 #include <mach/tegra-bb-power.h>
73 #include <mach/tegra_wakeup_monitor.h>
74 #include <linux/platform_data/tegra_usb_modem_power.h>
75
76 #include "board.h"
77 #include "board-common.h"
78 #include "board-touch.h"
79 #include "board-touch-raydium.h"
80 #include "clock.h"
81 #include "board-pluto.h"
82 #include "baseband-xmm-power.h"
83 #include "tegra-board-id.h"
84 #include "devices.h"
85 #include "gpio-names.h"
86 #include "fuse.h"
87 #include "pm.h"
88 #include "common.h"
89 #include "iomap.h"
90
91
92 #ifdef CONFIG_BT_BLUESLEEP
93 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
94         .name           = "bt_rfkill",
95         .shutdown_gpio  = TEGRA_GPIO_PQ7,
96         .reset_gpio     = TEGRA_GPIO_PQ6,
97         .type           = RFKILL_TYPE_BLUETOOTH,
98 };
99
100 static struct platform_device pluto_bt_rfkill_device = {
101         .name = "rfkill_gpio",
102         .id             = -1,
103         .dev = {
104                 .platform_data = &pluto_bt_rfkill_pdata,
105         },
106 };
107
108 static noinline void __init pluto_setup_bt_rfkill(void)
109 {
110         platform_device_register(&pluto_bt_rfkill_device);
111 }
112
113 static struct resource pluto_bluesleep_resources[] = {
114         [0] = {
115                 .name = "gpio_host_wake",
116                         .start  = TEGRA_GPIO_PU6,
117                         .end    = TEGRA_GPIO_PU6,
118                         .flags  = IORESOURCE_IO,
119         },
120         [1] = {
121                 .name = "gpio_ext_wake",
122                         .start  = TEGRA_GPIO_PEE1,
123                         .end    = TEGRA_GPIO_PEE1,
124                         .flags  = IORESOURCE_IO,
125         },
126         [2] = {
127                 .name = "host_wake",
128                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
129         },
130 };
131
132 static struct platform_device pluto_bluesleep_device = {
133         .name           = "bluesleep",
134         .id             = -1,
135         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
136         .resource       = pluto_bluesleep_resources,
137 };
138
139 static noinline void __init pluto_setup_bluesleep(void)
140 {
141         pluto_bluesleep_resources[2].start =
142                 pluto_bluesleep_resources[2].end =
143                         gpio_to_irq(TEGRA_GPIO_PU6);
144         platform_device_register(&pluto_bluesleep_device);
145         return;
146 }
147 #elif defined CONFIG_BLUEDROID_PM
148 static struct resource pluto_bluedroid_pm_resources[] = {
149         [0] = {
150                 .name   = "shutdown_gpio",
151                 .start  = TEGRA_GPIO_PQ7,
152                 .end    = TEGRA_GPIO_PQ7,
153                 .flags  = IORESOURCE_IO,
154         },
155         [1] = {
156                 .name = "host_wake",
157                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
158         },
159         [2] = {
160                 .name = "gpio_ext_wake",
161                 .start  = TEGRA_GPIO_PEE1,
162                 .end    = TEGRA_GPIO_PEE1,
163                 .flags  = IORESOURCE_IO,
164         },
165         [3] = {
166                 .name = "gpio_host_wake",
167                 .start  = TEGRA_GPIO_PU6,
168                 .end    = TEGRA_GPIO_PU6,
169                 .flags  = IORESOURCE_IO,
170         },
171         [4] = {
172                 .name = "reset_gpio",
173                 .start  = TEGRA_GPIO_PQ6,
174                 .end    = TEGRA_GPIO_PQ6,
175                 .flags  = IORESOURCE_IO,
176         },
177 };
178
179 static struct platform_device pluto_bluedroid_pm_device = {
180         .name = "bluedroid_pm",
181         .id             = 0,
182         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
183         .resource       = pluto_bluedroid_pm_resources,
184 };
185
186 static noinline void __init pluto_setup_bluedroid_pm(void)
187 {
188         pluto_bluedroid_pm_resources[1].start =
189                 pluto_bluedroid_pm_resources[1].end =
190                                         gpio_to_irq(TEGRA_GPIO_PU6);
191         platform_device_register(&pluto_bluedroid_pm_device);
192 }
193 #endif
194
195 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
196         /* name         parent          rate            enabled */
197         { "pll_m",      NULL,           0,              false},
198         { "hda",        "pll_p",        108000000,      false},
199         { "hda2codec_2x", "pll_p",      48000000,       false},
200         { "pwm",        "pll_p",        3187500,        false},
201         { "i2s1",       "pll_a_out0",   0,              false},
202         { "i2s2",       "pll_a_out0",   0,              false},
203         { "i2s3",       "pll_a_out0",   0,              false},
204         { "i2s4",       "pll_a_out0",   0,              false},
205         { "spdif_out",  "pll_a_out0",   0,              false},
206         { "d_audio",    "clk_m",        12000000,       false},
207         { "dam0",       "clk_m",        12000000,       false},
208         { "dam1",       "clk_m",        12000000,       false},
209         { "dam2",       "clk_m",        12000000,       false},
210         { "audio0",     "i2s0_sync",    0,              false},
211         { "audio1",     "i2s1_sync",    0,              false},
212         { "audio2",     "i2s2_sync",    0,              false},
213         { "audio3",     "i2s3_sync",    0,              false},
214         { "audio4",     "i2s4_sync",    0,              false},
215         { "vi_sensor",  "pll_p",        150000000,      false},
216         { "cilab",      "pll_p",        150000000,      false},
217         { "cilcd",      "pll_p",        150000000,      false},
218         { "cile",       "pll_p",        150000000,      false},
219         { "i2c1",       "pll_p",        3200000,        false},
220         { "i2c2",       "pll_p",        3200000,        false},
221         { "i2c3",       "pll_p",        3200000,        false},
222         { "i2c4",       "pll_p",        3200000,        false},
223         { "i2c5",       "pll_p",        3200000,        false},
224         { "sbc1",       "pll_p",        25000000,       false},
225         { "sbc2",       "pll_p",        25000000,       false},
226         { "sbc3",       "pll_p",        25000000,       false},
227         { "sbc4",       "pll_p",        25000000,       false},
228         { "sbc5",       "pll_p",        25000000,       false},
229         { "sbc6",       "pll_p",        25000000,       false},
230         { "extern3",    "clk_m",        12000000,       false},
231         { "dsia",       "pll_d2_out0",  0,              false},
232         { NULL,         NULL,           0,              0},
233 };
234
235 static struct bcm2079x_platform_data nfc_pdata = {
236         .irq_gpio = TEGRA_GPIO_PW2,
237         .en_gpio = TEGRA_GPIO_PU4,
238         .wake_gpio = TEGRA_GPIO_PX7,
239         };
240
241 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
242         {
243                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
244                 .platform_data = &nfc_pdata,
245         },
246 };
247
248 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
249         .bus_clk_rate   = 100000,
250         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
251         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
252 };
253
254 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
255         .bus_clk_rate   = 100000,
256         .is_clkon_always = true,
257         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
258         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
259 };
260
261 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
262         .bus_clk_rate   = 400000,
263         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
264         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
265 };
266
267 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
268         .bus_clk_rate   = 10000,
269         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
270         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
271 };
272
273 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
274         .bus_clk_rate   = 400000,
275         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
276         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
277         .needs_cl_dvfs_clock = true,
278 };
279
280 static struct aic3262_gpio_setup aic3262_gpio[] = {
281         /* GPIO 1*/
282         {
283                 .used = 1,
284                 .in = 0,
285                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
286         },
287         /* GPIO 2*/
288         {
289                 .used = 1,
290                 .in = 0,
291                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
292         },
293         /* GPI1 */
294         {
295                 .used = 1,
296                 .in = 1,
297         },
298         /* GPI2 */
299         {
300                 .used = 1,
301                 .in = 1,
302                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
303                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
304                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
305                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
306         },
307         /* GPO1 */
308         {
309                 .used = 1,
310                 .in = 0,
311                 .value = AIC3262_GPO1_FUNC_MSO_OUTPUT_FOR_SPI,
312         },
313 };
314 static struct aic3xxx_pdata aic3262_codec_pdata = {
315         .gpio_irq       = 0,
316         .gpio           = aic3262_gpio,
317         .naudint_irq    = 0,
318         .irq_base       = AIC3262_CODEC_IRQ_BASE,
319 };
320
321 static struct i2c_board_info __initdata cs42l73_board_info = {
322         I2C_BOARD_INFO("cs42l73", 0x4a),
323 };
324
325 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
326         I2C_BOARD_INFO("audience_a2220", 0x3E),
327 };
328
329 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
330         I2C_BOARD_INFO("tlv320aic3262", 0x18),
331         .platform_data = &aic3262_codec_pdata,
332 };
333
334 static void pluto_i2c_init(void)
335 {
336         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
337         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
338         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
339         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
340         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
341
342         platform_device_register(&tegra11_i2c_device5);
343         platform_device_register(&tegra11_i2c_device4);
344         platform_device_register(&tegra11_i2c_device3);
345         platform_device_register(&tegra11_i2c_device2);
346         platform_device_register(&tegra11_i2c_device1);
347
348         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
349         i2c_register_board_info(0, &cs42l73_board_info, 1);
350         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
351         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
352         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
353         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
354 }
355
356 static struct platform_device *pluto_uart_devices[] __initdata = {
357         &tegra_uarta_device,
358         &tegra_uartb_device,
359         &tegra_uartc_device,
360         &tegra_uartd_device,
361 };
362 static struct uart_clk_parent uart_parent_clk[] = {
363         [0] = {.name = "clk_m"},
364         [1] = {.name = "pll_p"},
365 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
366         [2] = {.name = "pll_m"},
367 #endif
368 };
369
370 static struct tegra_uart_platform_data pluto_uart_pdata;
371 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
372
373 static void __init uart_debug_init(void)
374 {
375         int debug_port_id;
376
377         debug_port_id = uart_console_debug_init(3);
378         if (debug_port_id < 0)
379                 return;
380         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
381 }
382
383 static void __init pluto_uart_init(void)
384 {
385         struct clk *c;
386         int i;
387
388         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
389                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
390                 if (IS_ERR_OR_NULL(c)) {
391                         pr_err("Not able to get the clock for %s\n",
392                                                 uart_parent_clk[i].name);
393                         continue;
394                 }
395                 uart_parent_clk[i].parent_clk = c;
396                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
397         }
398         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
399         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
400         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
401         pluto_loopback_uart_pdata.parent_clk_count =
402                                                 ARRAY_SIZE(uart_parent_clk);
403         pluto_loopback_uart_pdata.is_loopback = true;
404         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
405         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
406         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
407         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
408
409         /* Register low speed only if it is selected */
410         if (!is_tegra_debug_uartport_hs())
411                 uart_debug_init();
412
413         platform_add_devices(pluto_uart_devices,
414                                 ARRAY_SIZE(pluto_uart_devices));
415 }
416
417 static struct resource tegra_rtc_resources[] = {
418         [0] = {
419                 .start = TEGRA_RTC_BASE,
420                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
421                 .flags = IORESOURCE_MEM,
422         },
423         [1] = {
424                 .start = INT_RTC,
425                 .end = INT_RTC,
426                 .flags = IORESOURCE_IRQ,
427         },
428 };
429
430 static struct platform_device tegra_rtc_device = {
431         .name = "tegra_rtc",
432         .id   = -1,
433         .resource = tegra_rtc_resources,
434         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
435 };
436
437 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
438 static struct tegra_wakeup_monitor_platform_data
439                         pluto_tegra_wakeup_monitor_pdata = {
440         .wifi_wakeup_source     = 6,
441         .rtc_wakeup_source      = 18,
442 };
443
444 static struct platform_device pluto_tegra_wakeup_monitor_device = {
445         .name = "tegra_wakeup_monitor",
446         .id   = -1,
447         .dev  = {
448                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
449         },
450 };
451 #endif
452
453 static struct tegra_asoc_platform_data pluto_audio_pdata = {
454         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
455         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
456         .gpio_hp_mute           = -1,
457         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
458         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
459         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
460         .edp_support            =  true,
461         .edp_states             = {1776, 888, 0},
462         .i2s_param[HIFI_CODEC]  = {
463                 .audio_port_id  = 1,
464                 .is_i2s_master  = 0,
465                 .i2s_mode       = TEGRA_DAIFMT_I2S,
466                 .sample_size    = 16,
467                 .channels       = 2,
468         },
469         .i2s_param[BASEBAND]    = {
470                 .audio_port_id  = 2,
471                 .is_i2s_master  = 1,
472                 .i2s_mode       = TEGRA_DAIFMT_I2S,
473                 .sample_size    = 16,
474                 .rate           = 16000,
475                 .channels       = 2,
476                 .bit_clk        = 1024000,
477         },
478         .i2s_param[BT_SCO]      = {
479                 .audio_port_id  = 3,
480                 .is_i2s_master  = 1,
481                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
482                 .sample_size    = 16,
483                 .channels       = 1,
484                 .bit_clk        = 512000,
485         },
486         .i2s_param[VOICE_CODEC] = {
487                 .audio_port_id  = 0,
488                 .is_i2s_master  = 1,
489                 .i2s_mode       = TEGRA_DAIFMT_I2S,
490                 .sample_size    = 16,
491                 .rate           = 16000,
492                 .channels       = 2,
493         },
494 };
495
496 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
497         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
498         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
499         .gpio_hp_mute           = -1,
500         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
501         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
502         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
503         .edp_support            = true,
504         .edp_states             = {1776, 888, 0},
505         .i2s_param[HIFI_CODEC]  = {
506                 .audio_port_id  = 1,
507                 .is_i2s_master  = 0,
508                 .i2s_mode       = TEGRA_DAIFMT_I2S,
509                 .sample_size    = 16,
510                 .rate           = 48000,
511                 .channels       = 2,
512         },
513         .i2s_param[BASEBAND]    = {
514                 .audio_port_id  = 2,
515                 .is_i2s_master  = 1,
516                 .i2s_mode       = TEGRA_DAIFMT_I2S,
517                 .sample_size    = 16,
518                 .rate           = 16000,
519                 .channels       = 2,
520                 .bit_clk        = 1024000,
521         },
522         .i2s_param[BT_SCO]      = {
523                 .audio_port_id  = 3,
524                 .is_i2s_master  = 1,
525                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
526                 .sample_size    = 16,
527                 .channels       = 1,
528                 .bit_clk        = 512000,
529         },
530         .i2s_param[VOICE_CODEC] = {
531                 .audio_port_id  = 0,
532                 .is_i2s_master  = 1,
533                 .i2s_mode       = TEGRA_DAIFMT_I2S,
534                 .sample_size    = 16,
535                 .rate           = 16000,
536                 .channels       = 2,
537         },
538 };
539
540 static struct platform_device pluto_audio_device = {
541         .name   = "tegra-snd-cs42l73",
542         .id     = 2,
543         .dev    = {
544                 .platform_data = &pluto_audio_pdata,
545         },
546 };
547
548 static struct platform_device pluto_audio_aic326x_device = {
549         .name   = "tegra-snd-aic326x",
550         .id     = 2,
551         .dev    = {
552                 .platform_data  = &pluto_aic3262_pdata,
553         },
554 };
555
556 static struct tegra_spi_device_controller_data dev_bdata = {
557         .rx_clk_tap_delay = 0,
558         .tx_clk_tap_delay = 0,
559 };
560 static struct spi_board_info aic326x_spi_board_info[] = {
561         {
562                 .modalias = "tlv320aic3xxx",
563                 .bus_num = 3,
564                 .chip_select = 0,
565                 .max_speed_hz = 4*1000*1000,
566                 .mode = SPI_MODE_1,
567                 .controller_data = &dev_bdata,
568                 .platform_data = &aic3262_codec_pdata,
569         },
570 };
571
572 #ifdef CONFIG_MHI_NETDEV
573 struct platform_device mhi_netdevice0 = {
574         .name = "mhi_net_device",
575         .id = 0,
576 };
577 #endif /* CONFIG_MHI_NETDEV */
578
579 static struct platform_device *pluto_devices[] __initdata = {
580         &tegra_pmu_device,
581         &tegra_rtc_device,
582         &tegra_udc_device,
583 #if defined(CONFIG_TEGRA_WATCHDOG)
584         &tegra_wdt0_device,
585 #endif
586 #if defined(CONFIG_TEGRA_AVP)
587         &tegra_avp_device,
588 #endif
589 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
590         &tegra11_se_device,
591 #endif
592         &tegra_ahub_device,
593         &tegra_dam_device0,
594         &tegra_dam_device1,
595         &tegra_dam_device2,
596         &tegra_i2s_device0,
597         &tegra_i2s_device1,
598         &tegra_i2s_device2,
599         &tegra_i2s_device3,
600         &tegra_i2s_device4,
601         &tegra_spdif_device,
602         &spdif_dit_device,
603         &bluetooth_dit_device,
604         &baseband_dit_device,
605 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
606         &pluto_tegra_wakeup_monitor_device,
607 #endif
608         &pluto_audio_device,
609         &pluto_audio_aic326x_device,
610         &tegra_hda_device,
611 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
612         &tegra_aes_device,
613 #endif
614 #ifdef CONFIG_MHI_NETDEV
615         &mhi_netdevice0,  /* MHI netdevice */
616 #endif /* CONFIG_MHI_NETDEV */
617 };
618
619 #ifdef CONFIG_USB_SUPPORT
620
621 static void pluto_usb_hsic_postsupend(void)
622 {
623         pr_debug("%s\n", __func__);
624 #ifdef CONFIG_TEGRA_BB_XMM_POWER
625         baseband_xmm_set_power_status(BBXMM_PS_L2);
626 #endif
627 }
628
629 static void pluto_usb_hsic_preresume(void)
630 {
631         pr_debug("%s\n", __func__);
632 #ifdef CONFIG_TEGRA_BB_XMM_POWER
633         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
634 #endif
635 }
636
637 static void pluto_usb_hsic_post_resume(void)
638 {
639         pr_debug("%s\n", __func__);
640 #ifdef CONFIG_TEGRA_BB_XMM_POWER
641         baseband_xmm_set_power_status(BBXMM_PS_L0);
642 #endif
643 }
644
645 static void pluto_usb_hsic_phy_power(void)
646 {
647         pr_debug("%s\n", __func__);
648 #ifdef CONFIG_TEGRA_BB_XMM_POWER
649         baseband_xmm_set_power_status(BBXMM_PS_L0);
650 #endif
651 }
652
653 static void pluto_usb_hsic_post_phy_off(void)
654 {
655         pr_debug("%s\n", __func__);
656 #ifdef CONFIG_TEGRA_BB_XMM_POWER
657         baseband_xmm_set_power_status(BBXMM_PS_L2);
658 #endif
659 }
660
661 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
662         .post_suspend = pluto_usb_hsic_postsupend,
663         .pre_resume = pluto_usb_hsic_preresume,
664         .port_power = pluto_usb_hsic_phy_power,
665         .post_resume = pluto_usb_hsic_post_resume,
666         .post_phy_off = pluto_usb_hsic_post_phy_off,
667 };
668
669 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
670         .port_otg = false,
671         .has_hostpc = true,
672         .unaligned_dma_buf_supported = false,
673         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
674         .op_mode        = TEGRA_USB_OPMODE_HOST,
675         .u_data.host = {
676                 .vbus_gpio = -1,
677                 .hot_plug = false,
678                 .remote_wakeup_supported = true,
679                 .power_off_on_suspend = true,
680         },
681 };
682
683 static struct tegra_usb_platform_data tegra_udc_pdata = {
684         .port_otg = true,
685         .has_hostpc = true,
686         .id_det_type = TEGRA_USB_PMU_ID,
687         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
688         .op_mode = TEGRA_USB_OPMODE_DEVICE,
689         .u_data.dev = {
690                 .vbus_pmu_irq = 0,
691                 .vbus_gpio = -1,
692                 .charging_supported = false,
693                 .remote_wakeup_supported = false,
694         },
695         .u_cfg.utmi = {
696                 .hssync_start_delay = 0,
697                 .elastic_limit = 16,
698                 .idle_wait_delay = 17,
699                 .term_range_adj = 6,
700                 .xcvr_setup = 8,
701                 .xcvr_lsfslew = 2,
702                 .xcvr_lsrslew = 2,
703                 .xcvr_setup_offset = 0,
704                 .xcvr_use_fuses = 1,
705         },
706 };
707
708 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
709         .port_otg = true,
710         .has_hostpc = true,
711         .id_det_type = TEGRA_USB_PMU_ID,
712         .unaligned_dma_buf_supported = false,
713         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
714         .op_mode = TEGRA_USB_OPMODE_HOST,
715         .u_data.host = {
716                 .vbus_gpio = -1,
717                 .hot_plug = false,
718                 .remote_wakeup_supported = true,
719                 .power_off_on_suspend = true,
720         },
721         .u_cfg.utmi = {
722                 .hssync_start_delay = 0,
723                 .elastic_limit = 16,
724                 .idle_wait_delay = 17,
725                 .term_range_adj = 6,
726                 .xcvr_setup = 15,
727                 .xcvr_lsfslew = 2,
728                 .xcvr_lsrslew = 2,
729                 .xcvr_setup_offset = 0,
730                 .xcvr_use_fuses = 1,
731                 .vbus_oc_map = 0x7,
732         },
733 };
734
735 static struct tegra_usb_otg_data tegra_otg_pdata = {
736         .ehci_device = &tegra_ehci1_device,
737         .ehci_pdata = &tegra_ehci1_utmi_pdata,
738         .id_extcon_dev_name = "MAX77665_MUIC_ID",
739 };
740
741 static struct regulator *baseband_reg;
742 static struct gpio modem_gpios[] = { /* i500 modem */
743         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
744 };
745
746 static struct gpio modem2_gpios[] = {
747         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
748         {MDM2_RST, GPIOF_OUT_INIT_LOW, "MODEM2 RESET"},
749 };
750
751 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
752         .port_otg = false,
753         .has_hostpc = true,
754         .unaligned_dma_buf_supported = false,
755         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
756         .op_mode = TEGRA_USB_OPMODE_HOST,
757         .u_data.host = {
758                 .vbus_gpio = -1,
759                 .hot_plug = false,
760                 .remote_wakeup_supported = true,
761                 .power_off_on_suspend = true,
762         },
763 };
764
765 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
766         .port_otg = false,
767         .has_hostpc = true,
768         .unaligned_dma_buf_supported = false,
769         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
770         .op_mode = TEGRA_USB_OPMODE_HOST,
771         .u_data.host = {
772                 .vbus_gpio = -1,
773                 .hot_plug = false,
774                 .remote_wakeup_supported = true,
775                 .power_off_on_suspend = true,
776         },
777 };
778
779 static struct tegra_usb_platform_data tegra_hsic_pdata = {
780         .port_otg = false,
781         .has_hostpc = true,
782         .unaligned_dma_buf_supported = false,
783         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
784         .op_mode        = TEGRA_USB_OPMODE_HOST,
785         .u_data.host = {
786                 .vbus_gpio = -1,
787                 .hot_plug = false,
788                 .remote_wakeup_supported = true,
789                 .power_off_on_suspend = true,
790         },
791 };
792
793 static struct platform_device *
794 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
795 {
796         struct platform_device *pdev;
797         int val;
798
799         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
800         if (!pdev)
801                 return NULL;
802
803         val = platform_device_add_resources(pdev, ehci_dev->resource,
804                                                 ehci_dev->num_resources);
805         if (val)
806                 goto error;
807
808         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
809         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
810
811         val = platform_device_add_data(pdev, &tegra_hsic_pdata,
812                         sizeof(struct tegra_usb_platform_data));
813         if (val)
814                 goto error;
815
816         val = platform_device_add(pdev);
817         if (val)
818                 goto error;
819
820         return pdev;
821
822 error:
823         pr_err("%s: failed to add the host contoller device\n", __func__);
824         platform_device_put(pdev);
825         return NULL;
826 }
827
828 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
829 {
830         struct platform_device *pdev = *platdev;
831
832         if (pdev && &pdev->dev) {
833                 platform_device_unregister(pdev);
834                 *platdev = NULL;
835         } else
836                 pr_err("%s: no platform device\n", __func__);
837 }
838
839 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
840
841 static union tegra_bb_gpio_id bb_gpio_oem1 = {
842         .oem1 = {
843                 .reset = BB_OEM1_GPIO_RST,
844                 .pwron = BB_OEM1_GPIO_ON,
845                 .awr = BB_OEM1_GPIO_AWR,
846                 .cwr = BB_OEM1_GPIO_CWR,
847                 .spare = BB_OEM1_GPIO_SPARE,
848                 .wdi = BB_OEM1_GPIO_WDI,
849         },
850 };
851
852 static struct tegra_bb_pdata bb_pdata_oem1 = {
853         .id = &bb_gpio_oem1,
854         .device = &tegra_ehci3_device,
855         .ehci_register = tegra_usb_hsic_host_register,
856         .ehci_unregister = tegra_usb_hsic_host_unregister,
857         .bb_id = TEGRA_BB_OEM1,
858 };
859
860 static struct platform_device tegra_bb_oem1 = {
861         .name = "tegra_baseband_power",
862         .id = -1,
863         .dev = {
864                 .platform_data = &bb_pdata_oem1,
865         },
866 };
867
868 static int baseband_init(void)
869 {
870         int ret;
871
872         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
873         if (ret) {
874                 pr_warn("%s:gpio request failed\n", __func__);
875                 return ret;
876         }
877
878         baseband_reg = regulator_get(NULL, "vdd_core_bb");
879         if (IS_ERR_OR_NULL(baseband_reg))
880                 pr_warn("%s: baseband regulator get failed\n", __func__);
881         else
882                 regulator_enable(baseband_reg);
883
884         /* enable pull-up for MDM1 UART RX */
885         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PU1,
886                                     TEGRA_PUPD_PULL_UP);
887
888         /* enable pull-down for MDM1_COLD_BOOT */
889         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
890                                     TEGRA_PUPD_PULL_DOWN);
891
892         /* export GPIO for user space access through sysfs */
893         gpio_export(MDM_RST, false);
894
895         return 0;
896 }
897
898 static const struct tegra_modem_operations baseband_operations = {
899         .init = baseband_init,
900 };
901
902 #define MODEM_BOOT_EDP_MAX 0
903 /* FIXME: get accurate boot current value */
904 static unsigned int modem_boot_edp_states[] = { 1900, 0 };
905 static struct edp_client modem_boot_edp_client = {
906         .name = "modem_boot",
907         .states = modem_boot_edp_states,
908         .num_states = ARRAY_SIZE(modem_boot_edp_states),
909         .e0_index = MODEM_BOOT_EDP_MAX,
910         .priority = EDP_MAX_PRIO,
911 };
912
913 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
914         .ops = &baseband_operations,
915         .wake_gpio = -1,
916         .boot_gpio = MDM_COLDBOOT,
917         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
918         .autosuspend_delay = 2000,
919         .short_autosuspend_delay = 50,
920         .tegra_ehci_device = &tegra_ehci2_device,
921         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
922         .modem_boot_edp_client = &modem_boot_edp_client,
923         .edp_manager_name = "battery",
924         .i_breach_ppm = 500000,
925         /* FIXME: get useful adjperiods */
926         .i_thresh_3g_adjperiod = 10000,
927         .i_thresh_lte_adjperiod = 10000,
928 };
929
930 static struct platform_device icera_baseband_device = {
931         .name = "tegra_usb_modem_power",
932         .id = -1,
933         .dev = {
934                 .platform_data = &baseband_pdata,
935         },
936 };
937
938 static void baseband2_start(void)
939 {
940         pr_info("%s\n", __func__);
941         gpio_set_value(MDM2_PWR_ON, 1);
942 }
943
944 static void baseband2_reset(void)
945 {
946         /* Initiate power cycle on baseband sub system */
947         pr_info("%s\n", __func__);
948         gpio_set_value(MDM2_RST, 0);
949         mdelay(200);
950         gpio_set_value(MDM2_RST, 1);
951 }
952
953 static int baseband2_init(void)
954 {
955         int ret;
956
957         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD, TEGRA_TRI_NORMAL);
958
959         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
960         if (ret)
961                 return ret;
962
963         /* enable pull-down for MDM2_COLD_BOOT */
964         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_KB_ROW4,
965                                     TEGRA_PUPD_PULL_DOWN);
966
967         /* export GPIO for user space access through sysfs */
968         gpio_export(MDM2_RST, false);
969
970         return 0;
971 }
972
973 static const struct tegra_modem_operations baseband2_operations = {
974         .init = baseband2_init,
975         .start = baseband2_start,
976         .reset = baseband2_reset,
977 };
978
979 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
980         .ops = &baseband2_operations,
981         .wake_gpio = -1,
982         .boot_gpio = MDM2_COLDBOOT,
983         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
984         .autosuspend_delay = 2000,
985         .short_autosuspend_delay = 50,
986         .tegra_ehci_device = &tegra_ehci3_device,
987         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
988 };
989
990 static struct platform_device icera_baseband2_device = {
991         .name = "tegra_usb_modem_power",
992         .id = -1,
993         .dev = {
994                 .platform_data = &baseband2_pdata,
995         },
996 };
997
998 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
999         .baseband_type = BASEBAND_XMM,
1000         .modem = {
1001                 .xmm = {
1002                         .bb_rst = XMM_GPIO_BB_RST,
1003                         .bb_on = XMM_GPIO_BB_ON,
1004                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1005                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1006                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1007                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1008                 },
1009         },
1010 };
1011
1012 static struct platform_device tegra_baseband_xmm_power_device = {
1013         .name = "baseband_xmm_power",
1014         .id = -1,
1015         .dev = {
1016                 .platform_data = &tegra_baseband_xmm_power_data,
1017         },
1018 };
1019
1020 static struct platform_device tegra_baseband_xmm_power2_device = {
1021         .name = "baseband_xmm_power2",
1022         .id = -1,
1023         .dev = {
1024                 .platform_data = &tegra_baseband_xmm_power_data,
1025         },
1026 };
1027
1028 static void pluto_usb_init(void)
1029 {
1030         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1031
1032         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1033                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1034                 platform_device_register(&tegra_otg_device);
1035
1036                 /* Setup the udc platform data */
1037                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1038         }
1039 }
1040
1041 static void pluto_modem_init(void)
1042 {
1043         int modem_id = tegra_get_modem_id();
1044         struct board_info board_info;
1045         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1046
1047         tegra_get_board_info(&board_info);
1048         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1049
1050         switch (modem_id) {
1051         case TEGRA_BB_I500: /* on board i500 HSIC */
1052                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
1053                         platform_device_register(&icera_baseband_device);
1054                 break;
1055         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1056                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
1057                         platform_device_register(&icera_baseband2_device);
1058                 break;
1059         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1060                 if ((board_info.board_id == BOARD_E1575) ||
1061                         ((board_info.board_id == BOARD_E1580) &&
1062                                 (board_info.fab >= BOARD_FAB_A03))) {
1063                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1064                                                         TEGRA_TRI_NORMAL);
1065                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1066                 }
1067                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1068                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1069                         tegra_ehci3_device.dev.platform_data
1070                                 = &tegra_hsic_pdata;
1071                         platform_device_register(&tegra_bb_oem1);
1072                 }
1073                 break;
1074         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1075                 /* fix wrong wiring in Pluto A02 */
1076                 if ((board_info.board_id == BOARD_E1580) &&
1077                         (board_info.fab == BOARD_FAB_A02)) {
1078                         pr_info(
1079 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1080                                 __func__);
1081                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1082                                 != MDM2_PWR_ON)
1083                                 pr_err(
1084 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1085                                         __func__);
1086                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1087                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1088                 }
1089                 /* baseband-power.ko will register ehci3 device */
1090                 tegra_hsic_pdata.ops = &oem2_plat_ops;
1091                 tegra_hsic_pdata.u_data.host.remote_wakeup_supported = false;
1092                 tegra_hsic_pdata.u_data.host.power_off_on_suspend = false;
1093                 tegra_ehci3_device.dev.platform_data =
1094                                         &tegra_hsic_pdata;
1095                 tegra_baseband_xmm_power_data.hsic_register =
1096                                                 &tegra_usb_hsic_host_register;
1097                 tegra_baseband_xmm_power_data.hsic_unregister =
1098                                                 &tegra_usb_hsic_host_unregister;
1099                 tegra_baseband_xmm_power_data.ehci_device =
1100                                         &tegra_ehci3_device;
1101                 platform_device_register(&tegra_baseband_xmm_power_device);
1102                 platform_device_register(&tegra_baseband_xmm_power2_device);
1103                 /* override audio settings - use 8kHz */
1104                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1105                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1106                         = 2;
1107                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1108                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1109                         = 1;
1110                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1111                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1112                         = TEGRA_DAIFMT_I2S;
1113                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1114                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1115                         = 16;
1116                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1117                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1118                         = 8000;
1119                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1120                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1121                         = 2;
1122                 break;
1123         case TEGRA_BB_HSIC_HUB: /* HSIC hub */
1124                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1125                         tegra_ehci3_device.dev.platform_data =
1126                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1127                         platform_device_register(&tegra_ehci3_device);
1128                 }
1129                 break;
1130         default:
1131                 return;
1132         }
1133 }
1134
1135 static struct tegra_xusb_pad_data xusb_padctl_data = {
1136         .pad_mux = (0x1 << 0),
1137         .port_cap = (0x1 << 0),
1138         .snps_oc_map = (0x1ff << 0),
1139         .usb2_oc_map = (0x3c << 0),
1140         .ss_port_map = (0x0 << 0),
1141         .oc_det = (0x3f << 10),
1142         .rx_wander = (0xf << 4),
1143         .rx_eq = (0x3070 << 8),
1144         .cdr_cntl = (0x26 << 24),
1145         .dfe_cntl = 0x002008EE,
1146         .hs_slew = (0xE << 6),
1147         .ls_rslew = (0x3 << 14),
1148         .otg_pad0_ctl0 = (0x0 << 19),
1149         .otg_pad1_ctl0 = (0x7 << 19),
1150         .otg_pad0_ctl1 = (0x3 << 0),
1151         .otg_pad1_ctl1 = (0x4 << 0),
1152         .hs_disc_lvl = (0x5 << 2),
1153         .hsic_pad0_ctl0 = (0x00 << 8),
1154         .hsic_pad0_ctl1 = (0x00 << 8),
1155 };
1156
1157 static void pluto_xusb_init(void)
1158 {
1159         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1160
1161         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1162                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1163
1164                 pr_info("dalmore_xusb_init: usb_calib0 = 0x%08x\n", usb_calib0);
1165                 /*
1166                  * read from usb_calib0 and pass to driver
1167                  * set HS_CURR_LEVEL (PAD0)     = usb_calib0[5:0]
1168                  * set TERM_RANGE_ADJ           = usb_calib0[10:7]
1169                  * set HS_SQUELCH_LEVEL         = usb_calib0[12:11]
1170                  * set HS_IREF_CAP              = usb_calib0[14:13]
1171                  * set HS_CURR_LEVEL (PAD1)     = usb_calib0[20:15]
1172                  */
1173
1174                 xusb_padctl_data.hs_curr_level_pad0 = (usb_calib0 >> 0) & 0x3f;
1175                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1176                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1177                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1178                 xusb_padctl_data.hs_curr_level_pad1 = (usb_calib0 >> 15) & 0x3f;
1179
1180                 tegra_xhci_device.dev.platform_data = &xusb_padctl_data;
1181                 platform_device_register(&tegra_xhci_device);
1182         }
1183 }
1184 #else
1185 static void pluto_usb_init(void) { }
1186 static void pluto_modem_init(void) { }
1187 static void pluto_xusb_init(void) { }
1188 #endif
1189
1190 static void pluto_audio_init(void)
1191 {
1192         struct board_info board_info;
1193
1194         tegra_get_board_info(&board_info);
1195
1196         spi_register_board_info(aic326x_spi_board_info,
1197                                         ARRAY_SIZE(aic326x_spi_board_info));
1198 }
1199
1200 #ifndef CONFIG_USE_OF
1201 static struct platform_device *pluto_spi_devices[] __initdata = {
1202         &tegra11_spi_device4,
1203 };
1204
1205 static struct tegra_spi_platform_data pluto_spi_pdata = {
1206         .dma_req_sel            = 0,
1207         .spi_max_frequency      = 25000000,
1208         .clock_always_on        = false,
1209 };
1210
1211 static void __init pluto_spi_init(void)
1212 {
1213         struct board_info board_info, display_board_info;
1214
1215         tegra_get_board_info(&board_info);
1216         tegra_get_display_board_info(&display_board_info);
1217
1218         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1219         platform_add_devices(pluto_spi_devices,
1220                                 ARRAY_SIZE(pluto_spi_devices));
1221 }
1222 #else
1223 static void __init pluto_spi_init(void)
1224 {
1225 }
1226 #endif
1227
1228 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1229         /* name         parent          rate            enabled */
1230         { "extern2",    "pll_p",        41000000,       false},
1231         { "clk_out_2",  "extern2",      40800000,       false},
1232         { NULL,         NULL,           0,              0},
1233 };
1234
1235 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1236         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
1237         .config = 0,
1238         .platform_id = RM_PLATFORM_P005,
1239         .name_of_clock = "clk_out_2",
1240         .name_of_clock_con = "extern2",
1241 };
1242
1243 static struct tegra_spi_device_controller_data dev_cdata = {
1244         .rx_clk_tap_delay = 0,
1245         .tx_clk_tap_delay = 0,
1246 };
1247
1248 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1249         {
1250          .modalias = "rm_ts_spidev",
1251          .bus_num = 3,
1252          .chip_select = 2,
1253          .max_speed_hz = 12 * 1000 * 1000,
1254          .mode = SPI_MODE_0,
1255          .controller_data = &dev_cdata,
1256          .platform_data = &rm31080ts_pluto_data,
1257          },
1258 };
1259
1260 static struct synaptics_gpio_data synaptics_gpio_pluto_data = {
1261         .attn_gpio = SYNAPTICS_ATTN_GPIO,
1262         .attn_polarity = RMI_ATTN_ACTIVE_LOW,
1263         .reset_gpio = SYNAPTICS_RESET_GPIO,
1264 };
1265
1266 static struct rmi_device_platform_data synaptics_pluto_platformdata = {
1267         .sensor_name   = "TM9999",
1268         .attn_gpio     = SYNAPTICS_ATTN_GPIO,
1269         .attn_polarity = RMI_ATTN_ACTIVE_LOW,
1270         .gpio_data     = &synaptics_gpio_pluto_data,
1271         .gpio_config   = synaptics_touchpad_gpio_setup,
1272         .spi_data = {
1273                 .block_delay_us = 100,
1274                 .read_delay_us = 100,
1275                 .write_delay_us = 20,
1276         },
1277         .power_management = {
1278                 .nosleep = RMI_F01_NOSLEEP_OFF,
1279         },
1280         .f19_button_map = &synaptics_button_map,
1281         .f54_direct_touch_report_size = 944,
1282 };
1283
1284 static struct spi_board_info synaptics_9999_spi_board_pluto[] = {
1285         {
1286                 .modalias = "rmi_spi",
1287                 .bus_num = 3,
1288                 .chip_select = 2,
1289                 .max_speed_hz = 8*1000*1000,
1290                 .mode = SPI_MODE_3,
1291                 .platform_data = &synaptics_pluto_platformdata,
1292         },
1293 };
1294
1295 static int __init pluto_touch_init(void)
1296 {
1297         tegra_clk_init_from_table(touch_clk_init_table);
1298         if (tegra_get_touch_id() == RAYDIUM_TOUCH) {
1299                 pr_info("%s: initializing raydium\n", __func__);
1300                 rm31080a_pluto_spi_board[0].irq =
1301                         gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1302                 touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1303                                         TOUCH_GPIO_RST_RAYDIUM_SPI,
1304                                         &rm31080ts_pluto_data,
1305                                         &rm31080a_pluto_spi_board[0],
1306                                         ARRAY_SIZE(rm31080a_pluto_spi_board));
1307         } else {
1308                 pr_info("%s: initializing synaptics\n", __func__);
1309                 touch_init_synaptics(synaptics_9999_spi_board_pluto,
1310                                 ARRAY_SIZE(synaptics_9999_spi_board_pluto));
1311         }
1312         return 0;
1313 }
1314
1315 #ifdef CONFIG_EDP_FRAMEWORK
1316 static struct edp_manager battery_edp_manager = {
1317         .name = "battery",
1318         .max = 20000
1319 };
1320
1321 static void __init pluto_battery_edp_init(void)
1322 {
1323         struct edp_governor *g;
1324         int r;
1325
1326         r = edp_register_manager(&battery_edp_manager);
1327         if (r)
1328                 goto err_ret;
1329
1330         /* start with priority governor */
1331         g = edp_get_governor("priority");
1332         if (!g) {
1333                 r = -EFAULT;
1334                 goto err_ret;
1335         }
1336
1337         r = edp_set_governor(&battery_edp_manager, g);
1338         if (r)
1339                 goto err_ret;
1340
1341         return;
1342
1343 err_ret:
1344         pr_err("Battery EDP init failed with error %d\n", r);
1345         WARN_ON(1);
1346 }
1347 #else
1348 static inline void pluto_battery_edp_init(void) {}
1349 #endif
1350
1351 #ifdef CONFIG_USE_OF
1352 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1353         OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-dma", NULL),
1354         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1355                                 NULL),
1356         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1357                                 NULL),
1358         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1359                                 &pluto_tegra_sdhci_platform_data0),
1360         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1361                                 NULL),
1362         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
1363                                 NULL),
1364         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
1365                                 NULL),
1366         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
1367                                 NULL),
1368         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
1369                                 NULL),
1370         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
1371                                 NULL),
1372         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
1373                                 NULL),
1374         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
1375                                 NULL),
1376         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c500, "tegra11-i2c.2",
1377                                 NULL),
1378         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
1379                                 NULL),
1380         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
1381                                 NULL),
1382         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
1383                                 NULL),
1384         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
1385                                 NULL),
1386         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
1387                                 NULL),
1388         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
1389                                 NULL),
1390         {}
1391 };
1392 #endif
1393
1394 static void __init tegra_pluto_early_init(void)
1395 {
1396         pluto_battery_edp_init();
1397         tegra_clk_init_from_table(pluto_clk_init_table);
1398         tegra_clk_verify_parents();
1399         tegra_soc_device_init("tegra_pluto");
1400 }
1401
1402 static void __init tegra_pluto_late_init(void)
1403 {
1404         platform_device_register(&tegra_pinmux_device);
1405         pluto_pinmux_init();
1406         pluto_i2c_init();
1407         pluto_spi_init();
1408         pluto_usb_init();
1409         pluto_xusb_init();
1410         pluto_uart_init();
1411         pluto_audio_init();
1412         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1413         //tegra_ram_console_debug_init();
1414         tegra_io_dpd_init();
1415         pluto_sdhci_init();
1416         pluto_regulator_init();
1417         pluto_suspend_init();
1418         pluto_touch_init();
1419         pluto_emc_init();
1420         pluto_edp_init();
1421         isomgr_init();
1422         pluto_panel_init();
1423         pluto_pmon_init();
1424         pluto_kbc_init();
1425 #ifdef CONFIG_BT_BLUESLEEP
1426         pluto_setup_bluesleep();
1427         pluto_setup_bt_rfkill();
1428 #elif defined CONFIG_BLUEDROID_PM
1429         pluto_setup_bluedroid_pm();
1430 #endif
1431         tegra_release_bootloader_fb();
1432         pluto_modem_init();
1433 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1434         tegra_wdt_recovery_init();
1435 #endif
1436         pluto_sensors_init();
1437         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1438         pluto_soctherm_init();
1439         tegra_register_fuse();
1440 }
1441
1442 static void __init pluto_ramconsole_reserve(unsigned long size)
1443 {
1444         tegra_ram_console_debug_reserve(SZ_1M);
1445 }
1446
1447 static void __init tegra_pluto_dt_init(void)
1448 {
1449         tegra_pluto_early_init();
1450
1451         of_platform_populate(NULL,
1452                 of_default_bus_match_table, pluto_auxdata_lookup,
1453                 &platform_bus);
1454
1455         tegra_pluto_late_init();
1456 }
1457
1458 static void __init tegra_pluto_reserve(void)
1459 {
1460 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1461         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1462         tegra_reserve(0, SZ_16M, SZ_4M);
1463 #else
1464         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1465 #endif
1466         pluto_ramconsole_reserve(SZ_1M);
1467 }
1468
1469 static const char * const pluto_dt_board_compat[] = {
1470         "nvidia,pluto",
1471         NULL
1472 };
1473
1474 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1475         .atag_offset    = 0x100,
1476         .smp            = smp_ops(tegra_smp_ops),
1477         .map_io         = tegra_map_common_io,
1478         .reserve        = tegra_pluto_reserve,
1479         .init_early     = tegra11x_init_early,
1480         .init_irq       = tegra_dt_init_irq,
1481         .handle_irq     = gic_handle_irq,
1482         .timer          = &tegra_sys_timer,
1483         .init_machine   = tegra_pluto_dt_init,
1484         .restart        = tegra_assert_system_reset,
1485         .dt_compat      = pluto_dt_board_compat,
1486 MACHINE_END