ARM: tegra: board: disable the alignement fix
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/mfd/tlv320aic3262-registers.h>
54 #include <linux/mfd/tlv320aic3xxx-core.h>
55 #include <linux/usb/tegra_usb_phy.h>
56
57 #include <asm/hardware/gic.h>
58
59 #include <mach/clk.h>
60 #include <mach/irqs.h>
61 #include <mach/pinmux.h>
62 #include <mach/pinmux-t11.h>
63 #include <mach/io_dpd.h>
64 #include <mach/i2s.h>
65 #include <mach/isomgr.h>
66 #include <mach/tegra_asoc_pdata.h>
67 #include <asm/mach-types.h>
68 #include <asm/mach/arch.h>
69 #include <mach/gpio-tegra.h>
70 #include <mach/tegra_fiq_debugger.h>
71 #include <mach/tegra-bb-power.h>
72 #include <mach/tegra_wakeup_monitor.h>
73 #include <linux/platform_data/tegra_usb_modem_power.h>
74
75 #include "board.h"
76 #include "board-common.h"
77 #include "board-touch.h"
78 #include "board-touch-raydium.h"
79 #include "clock.h"
80 #include "board-pluto.h"
81 #include "baseband-xmm-power.h"
82 #include "tegra-board-id.h"
83 #include "devices.h"
84 #include "gpio-names.h"
85 #include "fuse.h"
86 #include "pm.h"
87 #include "common.h"
88 #include "iomap.h"
89
90
91 #ifdef CONFIG_BT_BLUESLEEP
92 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
93         .name           = "bt_rfkill",
94         .shutdown_gpio  = TEGRA_GPIO_PQ7,
95         .reset_gpio     = TEGRA_GPIO_PQ6,
96         .type           = RFKILL_TYPE_BLUETOOTH,
97 };
98
99 static struct platform_device pluto_bt_rfkill_device = {
100         .name = "rfkill_gpio",
101         .id             = -1,
102         .dev = {
103                 .platform_data = &pluto_bt_rfkill_pdata,
104         },
105 };
106
107 static noinline void __init pluto_setup_bt_rfkill(void)
108 {
109         platform_device_register(&pluto_bt_rfkill_device);
110 }
111
112 static struct resource pluto_bluesleep_resources[] = {
113         [0] = {
114                 .name = "gpio_host_wake",
115                         .start  = TEGRA_GPIO_PU6,
116                         .end    = TEGRA_GPIO_PU6,
117                         .flags  = IORESOURCE_IO,
118         },
119         [1] = {
120                 .name = "gpio_ext_wake",
121                         .start  = TEGRA_GPIO_PEE1,
122                         .end    = TEGRA_GPIO_PEE1,
123                         .flags  = IORESOURCE_IO,
124         },
125         [2] = {
126                 .name = "host_wake",
127                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
128         },
129 };
130
131 static struct platform_device pluto_bluesleep_device = {
132         .name           = "bluesleep",
133         .id             = -1,
134         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
135         .resource       = pluto_bluesleep_resources,
136 };
137
138 static noinline void __init pluto_setup_bluesleep(void)
139 {
140         pluto_bluesleep_resources[2].start =
141                 pluto_bluesleep_resources[2].end =
142                         gpio_to_irq(TEGRA_GPIO_PU6);
143         platform_device_register(&pluto_bluesleep_device);
144         return;
145 }
146 #elif defined CONFIG_BLUEDROID_PM
147 static struct resource pluto_bluedroid_pm_resources[] = {
148         [0] = {
149                 .name   = "shutdown_gpio",
150                 .start  = TEGRA_GPIO_PQ7,
151                 .end    = TEGRA_GPIO_PQ7,
152                 .flags  = IORESOURCE_IO,
153         },
154         [1] = {
155                 .name = "host_wake",
156                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
157         },
158         [2] = {
159                 .name = "gpio_ext_wake",
160                 .start  = TEGRA_GPIO_PEE1,
161                 .end    = TEGRA_GPIO_PEE1,
162                 .flags  = IORESOURCE_IO,
163         },
164         [3] = {
165                 .name = "gpio_host_wake",
166                 .start  = TEGRA_GPIO_PU6,
167                 .end    = TEGRA_GPIO_PU6,
168                 .flags  = IORESOURCE_IO,
169         },
170         [4] = {
171                 .name = "reset_gpio",
172                 .start  = TEGRA_GPIO_PQ6,
173                 .end    = TEGRA_GPIO_PQ6,
174                 .flags  = IORESOURCE_IO,
175         },
176 };
177
178 static struct platform_device pluto_bluedroid_pm_device = {
179         .name = "bluedroid_pm",
180         .id             = 0,
181         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
182         .resource       = pluto_bluedroid_pm_resources,
183 };
184
185 static noinline void __init pluto_setup_bluedroid_pm(void)
186 {
187         pluto_bluedroid_pm_resources[1].start =
188                 pluto_bluedroid_pm_resources[1].end =
189                                         gpio_to_irq(TEGRA_GPIO_PU6);
190         platform_device_register(&pluto_bluedroid_pm_device);
191 }
192 #endif
193
194 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
195         /* name         parent          rate            enabled */
196         { "pll_m",      NULL,           0,              false},
197         { "hda",        "pll_p",        108000000,      false},
198         { "hda2codec_2x", "pll_p",      48000000,       false},
199         { "pwm",        "pll_p",        3187500,        false},
200         { "i2s1",       "pll_a_out0",   0,              false},
201         { "i2s2",       "pll_a_out0",   0,              false},
202         { "i2s3",       "pll_a_out0",   0,              false},
203         { "i2s4",       "pll_a_out0",   0,              false},
204         { "spdif_out",  "pll_a_out0",   0,              false},
205         { "d_audio",    "clk_m",        12000000,       false},
206         { "dam0",       "clk_m",        12000000,       false},
207         { "dam1",       "clk_m",        12000000,       false},
208         { "dam2",       "clk_m",        12000000,       false},
209         { "audio0",     "i2s0_sync",    0,              false},
210         { "audio1",     "i2s1_sync",    0,              false},
211         { "audio2",     "i2s2_sync",    0,              false},
212         { "audio3",     "i2s3_sync",    0,              false},
213         { "audio4",     "i2s4_sync",    0,              false},
214         { "vi_sensor",  "pll_p",        150000000,      false},
215         { "cilab",      "pll_p",        150000000,      false},
216         { "cilcd",      "pll_p",        150000000,      false},
217         { "cile",       "pll_p",        150000000,      false},
218         { "i2c1",       "pll_p",        3200000,        false},
219         { "i2c2",       "pll_p",        3200000,        false},
220         { "i2c3",       "pll_p",        3200000,        false},
221         { "i2c4",       "pll_p",        3200000,        false},
222         { "i2c5",       "pll_p",        3200000,        false},
223         { "sbc1",       "pll_p",        25000000,       false},
224         { "sbc2",       "pll_p",        25000000,       false},
225         { "sbc3",       "pll_p",        25000000,       false},
226         { "sbc4",       "pll_p",        25000000,       false},
227         { "sbc5",       "pll_p",        25000000,       false},
228         { "sbc6",       "pll_p",        25000000,       false},
229         { "extern3",    "clk_m",        12000000,       false},
230         { "dsia",       "pll_d2_out0",  0,              false},
231         { NULL,         NULL,           0,              0},
232 };
233
234 static struct bcm2079x_platform_data nfc_pdata = {
235         .irq_gpio = TEGRA_GPIO_PW2,
236         .en_gpio = TEGRA_GPIO_PU4,
237         .wake_gpio = TEGRA_GPIO_PX7,
238         };
239
240 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
241         {
242                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
243                 .platform_data = &nfc_pdata,
244         },
245 };
246
247 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
248         .bus_clk_rate   = 100000,
249         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
250         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
251 };
252
253 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
254         .bus_clk_rate   = 100000,
255         .is_clkon_always = true,
256         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
257         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
258 };
259
260 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
261         .bus_clk_rate   = 400000,
262         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
263         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
264 };
265
266 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
267         .bus_clk_rate   = 10000,
268         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
269         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
270 };
271
272 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
273         .bus_clk_rate   = 400000,
274         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
275         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
276         .needs_cl_dvfs_clock = true,
277 };
278
279 static struct aic3262_gpio_setup aic3262_gpio[] = {
280         /* GPIO 1*/
281         {
282                 .used = 1,
283                 .in = 0,
284                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
285         },
286         /* GPIO 2*/
287         {
288                 .used = 1,
289                 .in = 0,
290                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
291         },
292         /* GPI1 */
293         {
294                 .used = 1,
295                 .in = 1,
296         },
297         /* GPI2 */
298         {
299                 .used = 1,
300                 .in = 1,
301                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
302                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
303                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
304                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
305         },
306         /* GPO1 */
307         {
308                 .used = 1,
309                 .in = 0,
310                 .value = AIC3262_GPO1_FUNC_MSO_OUTPUT_FOR_SPI,
311         },
312 };
313 static struct aic3xxx_pdata aic3262_codec_pdata = {
314         .gpio_irq       = 0,
315         .gpio           = aic3262_gpio,
316         .naudint_irq    = 0,
317         .irq_base       = AIC3262_CODEC_IRQ_BASE,
318 };
319
320 static struct i2c_board_info __initdata cs42l73_board_info = {
321         I2C_BOARD_INFO("cs42l73", 0x4a),
322 };
323
324 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
325         I2C_BOARD_INFO("audience_a2220", 0x3E),
326 };
327
328 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
329         I2C_BOARD_INFO("tlv320aic3262", 0x18),
330         .platform_data = &aic3262_codec_pdata,
331 };
332
333 static void pluto_i2c_init(void)
334 {
335         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
336         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
337         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
338         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
339         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
340
341         platform_device_register(&tegra11_i2c_device5);
342         platform_device_register(&tegra11_i2c_device4);
343 #ifndef CONFIG_OF
344         platform_device_register(&tegra11_i2c_device3);
345 #endif
346         platform_device_register(&tegra11_i2c_device2);
347         platform_device_register(&tegra11_i2c_device1);
348
349         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
350         i2c_register_board_info(0, &cs42l73_board_info, 1);
351         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
352         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
353         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
354         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
355 }
356
357 static struct platform_device *pluto_uart_devices[] __initdata = {
358         &tegra_uarta_device,
359         &tegra_uartb_device,
360         &tegra_uartc_device,
361         &tegra_uartd_device,
362 };
363 static struct uart_clk_parent uart_parent_clk[] = {
364         [0] = {.name = "clk_m"},
365         [1] = {.name = "pll_p"},
366 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
367         [2] = {.name = "pll_m"},
368 #endif
369 };
370
371 static struct tegra_uart_platform_data pluto_uart_pdata;
372 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
373
374 static void __init uart_debug_init(void)
375 {
376         int debug_port_id;
377
378         debug_port_id = uart_console_debug_init(3);
379         if (debug_port_id < 0)
380                 return;
381         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
382 }
383
384 static void __init pluto_uart_init(void)
385 {
386         struct clk *c;
387         int i;
388
389         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
390                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
391                 if (IS_ERR_OR_NULL(c)) {
392                         pr_err("Not able to get the clock for %s\n",
393                                                 uart_parent_clk[i].name);
394                         continue;
395                 }
396                 uart_parent_clk[i].parent_clk = c;
397                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
398         }
399         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
400         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
401         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
402         pluto_loopback_uart_pdata.parent_clk_count =
403                                                 ARRAY_SIZE(uart_parent_clk);
404         pluto_loopback_uart_pdata.is_loopback = true;
405         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
406         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
407         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
408         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
409
410         /* Register low speed only if it is selected */
411         if (!is_tegra_debug_uartport_hs())
412                 uart_debug_init();
413
414         platform_add_devices(pluto_uart_devices,
415                                 ARRAY_SIZE(pluto_uart_devices));
416 }
417
418 static struct resource tegra_rtc_resources[] = {
419         [0] = {
420                 .start = TEGRA_RTC_BASE,
421                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
422                 .flags = IORESOURCE_MEM,
423         },
424         [1] = {
425                 .start = INT_RTC,
426                 .end = INT_RTC,
427                 .flags = IORESOURCE_IRQ,
428         },
429 };
430
431 static struct platform_device tegra_rtc_device = {
432         .name = "tegra_rtc",
433         .id   = -1,
434         .resource = tegra_rtc_resources,
435         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
436 };
437
438 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
439 static struct tegra_wakeup_monitor_platform_data
440                         pluto_tegra_wakeup_monitor_pdata = {
441         .wifi_wakeup_source     = 6,
442         .rtc_wakeup_source      = 18,
443 };
444
445 static struct platform_device pluto_tegra_wakeup_monitor_device = {
446         .name = "tegra_wakeup_monitor",
447         .id   = -1,
448         .dev  = {
449                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
450         },
451 };
452 #endif
453
454 static struct tegra_asoc_platform_data pluto_audio_pdata = {
455         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
456         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
457         .gpio_hp_mute           = -1,
458         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
459         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
460         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
461         .edp_support            =  true,
462         .edp_states             = {1776, 888, 0},
463         .i2s_param[HIFI_CODEC]  = {
464                 .audio_port_id  = 1,
465                 .is_i2s_master  = 0,
466                 .i2s_mode       = TEGRA_DAIFMT_I2S,
467                 .sample_size    = 16,
468                 .channels       = 2,
469         },
470         .i2s_param[BASEBAND]    = {
471                 .audio_port_id  = 2,
472                 .is_i2s_master  = 1,
473                 .i2s_mode       = TEGRA_DAIFMT_I2S,
474                 .sample_size    = 16,
475                 .rate           = 16000,
476                 .channels       = 2,
477                 .bit_clk        = 1024000,
478         },
479         .i2s_param[BT_SCO]      = {
480                 .audio_port_id  = 3,
481                 .is_i2s_master  = 1,
482                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
483                 .sample_size    = 16,
484                 .channels       = 1,
485                 .bit_clk        = 512000,
486         },
487         .i2s_param[VOICE_CODEC] = {
488                 .audio_port_id  = 0,
489                 .is_i2s_master  = 1,
490                 .i2s_mode       = TEGRA_DAIFMT_I2S,
491                 .sample_size    = 16,
492                 .rate           = 16000,
493                 .channels       = 2,
494         },
495 };
496
497 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
498         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
499         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
500         .gpio_hp_mute           = -1,
501         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
502         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
503         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
504         .edp_support            = true,
505         .edp_states             = {1776, 888, 0},
506         .i2s_param[HIFI_CODEC]  = {
507                 .audio_port_id  = 1,
508                 .is_i2s_master  = 0,
509                 .i2s_mode       = TEGRA_DAIFMT_I2S,
510                 .sample_size    = 16,
511                 .rate           = 48000,
512                 .channels       = 2,
513         },
514         .i2s_param[BASEBAND]    = {
515                 .audio_port_id  = 2,
516                 .is_i2s_master  = 1,
517                 .i2s_mode       = TEGRA_DAIFMT_I2S,
518                 .sample_size    = 16,
519                 .rate           = 16000,
520                 .channels       = 2,
521                 .bit_clk        = 1024000,
522         },
523         .i2s_param[BT_SCO]      = {
524                 .audio_port_id  = 3,
525                 .is_i2s_master  = 1,
526                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
527                 .sample_size    = 16,
528                 .channels       = 1,
529                 .bit_clk        = 512000,
530         },
531         .i2s_param[VOICE_CODEC] = {
532                 .audio_port_id  = 0,
533                 .is_i2s_master  = 1,
534                 .i2s_mode       = TEGRA_DAIFMT_I2S,
535                 .sample_size    = 16,
536                 .rate           = 16000,
537                 .channels       = 2,
538         },
539 };
540
541 static struct platform_device pluto_audio_device = {
542         .name   = "tegra-snd-cs42l73",
543         .id     = 2,
544         .dev    = {
545                 .platform_data = &pluto_audio_pdata,
546         },
547 };
548
549 static struct platform_device pluto_audio_aic326x_device = {
550         .name   = "tegra-snd-aic326x",
551         .id     = 2,
552         .dev    = {
553                 .platform_data  = &pluto_aic3262_pdata,
554         },
555 };
556
557 static struct tegra_spi_device_controller_data dev_bdata = {
558         .rx_clk_tap_delay = 0,
559         .tx_clk_tap_delay = 0,
560 };
561 static struct spi_board_info aic326x_spi_board_info[] = {
562         {
563                 .modalias = "tlv320aic3xxx",
564                 .bus_num = 3,
565                 .chip_select = 0,
566                 .max_speed_hz = 4*1000*1000,
567                 .mode = SPI_MODE_1,
568                 .controller_data = &dev_bdata,
569                 .platform_data = &aic3262_codec_pdata,
570         },
571 };
572
573 #ifdef CONFIG_MHI_NETDEV
574 struct platform_device mhi_netdevice0 = {
575         .name = "mhi_net_device",
576         .id = 0,
577 };
578 #endif /* CONFIG_MHI_NETDEV */
579
580 static struct platform_device *pluto_devices[] __initdata = {
581         &tegra_pmu_device,
582         &tegra_rtc_device,
583         &tegra_udc_device,
584 #if defined(CONFIG_TEGRA_WATCHDOG)
585         &tegra_wdt0_device,
586 #endif
587 #if defined(CONFIG_TEGRA_AVP)
588         &tegra_avp_device,
589 #endif
590 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
591         &tegra11_se_device,
592 #endif
593         &tegra_ahub_device,
594         &tegra_dam_device0,
595         &tegra_dam_device1,
596         &tegra_dam_device2,
597         &tegra_i2s_device0,
598         &tegra_i2s_device1,
599         &tegra_i2s_device2,
600         &tegra_i2s_device3,
601         &tegra_i2s_device4,
602         &tegra_spdif_device,
603         &spdif_dit_device,
604         &bluetooth_dit_device,
605         &baseband_dit_device,
606 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
607         &pluto_tegra_wakeup_monitor_device,
608 #endif
609         &pluto_audio_device,
610         &pluto_audio_aic326x_device,
611         &tegra_hda_device,
612 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
613         &tegra_aes_device,
614 #endif
615 #ifdef CONFIG_MHI_NETDEV
616         &mhi_netdevice0,  /* MHI netdevice */
617 #endif /* CONFIG_MHI_NETDEV */
618 };
619
620 #ifdef CONFIG_USB_SUPPORT
621
622 static void pluto_usb_hsic_postsupend(void)
623 {
624         pr_debug("%s\n", __func__);
625 #ifdef CONFIG_TEGRA_BB_XMM_POWER
626         baseband_xmm_set_power_status(BBXMM_PS_L2);
627 #endif
628 }
629
630 static void pluto_usb_hsic_preresume(void)
631 {
632         pr_debug("%s\n", __func__);
633 #ifdef CONFIG_TEGRA_BB_XMM_POWER
634         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
635 #endif
636 }
637
638 static void pluto_usb_hsic_post_resume(void)
639 {
640         pr_debug("%s\n", __func__);
641 #ifdef CONFIG_TEGRA_BB_XMM_POWER
642         baseband_xmm_set_power_status(BBXMM_PS_L0);
643 #endif
644 }
645
646 static void pluto_usb_hsic_phy_power(void)
647 {
648         pr_debug("%s\n", __func__);
649 #ifdef CONFIG_TEGRA_BB_XMM_POWER
650         baseband_xmm_set_power_status(BBXMM_PS_L0);
651 #endif
652 }
653
654 static void pluto_usb_hsic_post_phy_off(void)
655 {
656         pr_debug("%s\n", __func__);
657 #ifdef CONFIG_TEGRA_BB_XMM_POWER
658         baseband_xmm_set_power_status(BBXMM_PS_L2);
659 #endif
660 }
661
662 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
663         .post_suspend = pluto_usb_hsic_postsupend,
664         .pre_resume = pluto_usb_hsic_preresume,
665         .port_power = pluto_usb_hsic_phy_power,
666         .post_resume = pluto_usb_hsic_post_resume,
667         .post_phy_off = pluto_usb_hsic_post_phy_off,
668 };
669
670 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
671         .port_otg = false,
672         .has_hostpc = true,
673         .unaligned_dma_buf_supported = false,
674         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
675         .op_mode        = TEGRA_USB_OPMODE_HOST,
676         .u_data.host = {
677                 .vbus_gpio = -1,
678                 .hot_plug = false,
679                 .remote_wakeup_supported = true,
680                 .power_off_on_suspend = true,
681         },
682 };
683
684 static struct tegra_usb_platform_data tegra_udc_pdata = {
685         .port_otg = true,
686         .has_hostpc = true,
687         .id_det_type = TEGRA_USB_PMU_ID,
688         .unaligned_dma_buf_supported = false,
689         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
690         .op_mode = TEGRA_USB_OPMODE_DEVICE,
691         .u_data.dev = {
692                 .vbus_pmu_irq = 0,
693                 .vbus_gpio = -1,
694                 .charging_supported = false,
695                 .remote_wakeup_supported = false,
696         },
697         .u_cfg.utmi = {
698                 .hssync_start_delay = 0,
699                 .elastic_limit = 16,
700                 .idle_wait_delay = 17,
701                 .term_range_adj = 6,
702                 .xcvr_setup = 8,
703                 .xcvr_lsfslew = 0,
704                 .xcvr_lsrslew = 3,
705                 .xcvr_setup_offset = 0,
706                 .xcvr_use_fuses = 1,
707         },
708 };
709
710 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
711         .port_otg = true,
712         .has_hostpc = true,
713         .id_det_type = TEGRA_USB_PMU_ID,
714         .unaligned_dma_buf_supported = false,
715         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
716         .op_mode = TEGRA_USB_OPMODE_HOST,
717         .u_data.host = {
718                 .vbus_gpio = -1,
719                 .hot_plug = false,
720                 .remote_wakeup_supported = true,
721                 .power_off_on_suspend = true,
722         },
723         .u_cfg.utmi = {
724                 .hssync_start_delay = 0,
725                 .elastic_limit = 16,
726                 .idle_wait_delay = 17,
727                 .term_range_adj = 6,
728                 .xcvr_setup = 15,
729                 .xcvr_lsfslew = 0,
730                 .xcvr_lsrslew = 3,
731                 .xcvr_setup_offset = 0,
732                 .xcvr_use_fuses = 1,
733                 .vbus_oc_map = 0x7,
734         },
735 };
736
737 static struct tegra_usb_otg_data tegra_otg_pdata = {
738         .ehci_device = &tegra_ehci1_device,
739         .ehci_pdata = &tegra_ehci1_utmi_pdata,
740         .id_extcon_dev_name = "MAX77665_MUIC_ID",
741 };
742
743 static struct regulator *baseband_reg;
744 static struct gpio modem_gpios[] = { /* i500 modem */
745         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
746 };
747
748 static struct gpio modem2_gpios[] = {
749         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
750         {MDM2_RST, GPIOF_OUT_INIT_LOW, "MODEM2 RESET"},
751 };
752
753 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
754         .port_otg = false,
755         .has_hostpc = true,
756         .unaligned_dma_buf_supported = false,
757         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
758         .op_mode = TEGRA_USB_OPMODE_HOST,
759         .u_data.host = {
760                 .vbus_gpio = -1,
761                 .hot_plug = false,
762                 .remote_wakeup_supported = true,
763                 .power_off_on_suspend = true,
764         },
765 };
766
767 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
768         .port_otg = false,
769         .has_hostpc = true,
770         .unaligned_dma_buf_supported = false,
771         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
772         .op_mode = TEGRA_USB_OPMODE_HOST,
773         .u_data.host = {
774                 .vbus_gpio = -1,
775                 .hot_plug = false,
776                 .remote_wakeup_supported = true,
777                 .power_off_on_suspend = true,
778         },
779 };
780
781 static struct tegra_usb_platform_data tegra_hsic_pdata = {
782         .port_otg = false,
783         .has_hostpc = true,
784         .unaligned_dma_buf_supported = false,
785         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
786         .op_mode        = TEGRA_USB_OPMODE_HOST,
787         .u_data.host = {
788                 .vbus_gpio = -1,
789                 .hot_plug = false,
790                 .remote_wakeup_supported = true,
791                 .power_off_on_suspend = true,
792         },
793 };
794
795 static struct platform_device *
796 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
797 {
798         struct platform_device *pdev;
799         int val;
800
801         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
802         if (!pdev)
803                 return NULL;
804
805         val = platform_device_add_resources(pdev, ehci_dev->resource,
806                                                 ehci_dev->num_resources);
807         if (val)
808                 goto error;
809
810         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
811         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
812
813         val = platform_device_add_data(pdev, &tegra_hsic_pdata,
814                         sizeof(struct tegra_usb_platform_data));
815         if (val)
816                 goto error;
817
818         val = platform_device_add(pdev);
819         if (val)
820                 goto error;
821
822         return pdev;
823
824 error:
825         pr_err("%s: failed to add the host contoller device\n", __func__);
826         platform_device_put(pdev);
827         return NULL;
828 }
829
830 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
831 {
832         struct platform_device *pdev = *platdev;
833
834         if (pdev && &pdev->dev) {
835                 platform_device_unregister(pdev);
836                 *platdev = NULL;
837         } else
838                 pr_err("%s: no platform device\n", __func__);
839 }
840
841 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
842
843 static union tegra_bb_gpio_id bb_gpio_oem1 = {
844         .oem1 = {
845                 .reset = BB_OEM1_GPIO_RST,
846                 .pwron = BB_OEM1_GPIO_ON,
847                 .awr = BB_OEM1_GPIO_AWR,
848                 .cwr = BB_OEM1_GPIO_CWR,
849                 .spare = BB_OEM1_GPIO_SPARE,
850                 .wdi = BB_OEM1_GPIO_WDI,
851         },
852 };
853
854 static struct tegra_bb_pdata bb_pdata_oem1 = {
855         .id = &bb_gpio_oem1,
856         .device = &tegra_ehci3_device,
857         .ehci_register = tegra_usb_hsic_host_register,
858         .ehci_unregister = tegra_usb_hsic_host_unregister,
859         .bb_id = TEGRA_BB_OEM1,
860 };
861
862 static struct platform_device tegra_bb_oem1 = {
863         .name = "tegra_baseband_power",
864         .id = -1,
865         .dev = {
866                 .platform_data = &bb_pdata_oem1,
867         },
868 };
869
870 static int baseband_init(void)
871 {
872         int ret;
873
874         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
875         if (ret) {
876                 pr_warn("%s:gpio request failed\n", __func__);
877                 return ret;
878         }
879
880         baseband_reg = regulator_get(NULL, "vdd_core_bb");
881         if (IS_ERR_OR_NULL(baseband_reg))
882                 pr_warn("%s: baseband regulator get failed\n", __func__);
883         else
884                 regulator_enable(baseband_reg);
885
886         /* enable pull-up for MDM1 UART RX */
887         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PU1,
888                                     TEGRA_PUPD_PULL_UP);
889
890         /* enable pull-down for MDM1_COLD_BOOT */
891         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
892                                     TEGRA_PUPD_PULL_DOWN);
893
894         /* export GPIO for user space access through sysfs */
895         gpio_export(MDM_RST, false);
896
897         return 0;
898 }
899
900 static const struct tegra_modem_operations baseband_operations = {
901         .init = baseband_init,
902 };
903
904 #define MODEM_BOOT_EDP_MAX 0
905 /* FIXME: get accurate boot current value */
906 static unsigned int modem_boot_edp_states[] = { 1900, 0 };
907 static struct edp_client modem_boot_edp_client = {
908         .name = "modem_boot",
909         .states = modem_boot_edp_states,
910         .num_states = ARRAY_SIZE(modem_boot_edp_states),
911         .e0_index = MODEM_BOOT_EDP_MAX,
912         .priority = EDP_MAX_PRIO,
913 };
914
915 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
916         .ops = &baseband_operations,
917         .wake_gpio = -1,
918         .boot_gpio = MDM_COLDBOOT,
919         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
920         .autosuspend_delay = 2000,
921         .short_autosuspend_delay = 50,
922         .tegra_ehci_device = &tegra_ehci2_device,
923         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
924         .modem_boot_edp_client = &modem_boot_edp_client,
925         .edp_manager_name = "battery",
926         .i_breach_ppm = 500000,
927         /* FIXME: get useful adjperiods */
928         .i_thresh_3g_adjperiod = 10000,
929         .i_thresh_lte_adjperiod = 10000,
930 };
931
932 static struct platform_device icera_baseband_device = {
933         .name = "tegra_usb_modem_power",
934         .id = -1,
935         .dev = {
936                 .platform_data = &baseband_pdata,
937         },
938 };
939
940 static void baseband2_start(void)
941 {
942         pr_info("%s\n", __func__);
943         gpio_set_value(MDM2_PWR_ON, 1);
944 }
945
946 static void baseband2_reset(void)
947 {
948         /* Initiate power cycle on baseband sub system */
949         pr_info("%s\n", __func__);
950         gpio_set_value(MDM2_RST, 0);
951         mdelay(200);
952         gpio_set_value(MDM2_RST, 1);
953 }
954
955 static int baseband2_init(void)
956 {
957         int ret;
958
959         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD, TEGRA_TRI_NORMAL);
960
961         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
962         if (ret)
963                 return ret;
964
965         /* enable pull-down for MDM2_COLD_BOOT */
966         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_KB_ROW4,
967                                     TEGRA_PUPD_PULL_DOWN);
968
969         /* export GPIO for user space access through sysfs */
970         gpio_export(MDM2_RST, false);
971
972         return 0;
973 }
974
975 static const struct tegra_modem_operations baseband2_operations = {
976         .init = baseband2_init,
977         .start = baseband2_start,
978         .reset = baseband2_reset,
979 };
980
981 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
982         .ops = &baseband2_operations,
983         .wake_gpio = -1,
984         .boot_gpio = MDM2_COLDBOOT,
985         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
986         .autosuspend_delay = 2000,
987         .short_autosuspend_delay = 50,
988         .tegra_ehci_device = &tegra_ehci3_device,
989         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
990 };
991
992 static struct platform_device icera_baseband2_device = {
993         .name = "tegra_usb_modem_power",
994         .id = -1,
995         .dev = {
996                 .platform_data = &baseband2_pdata,
997         },
998 };
999
1000 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
1001         .baseband_type = BASEBAND_XMM,
1002         .modem = {
1003                 .xmm = {
1004                         .bb_rst = XMM_GPIO_BB_RST,
1005                         .bb_on = XMM_GPIO_BB_ON,
1006                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1007                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1008                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1009                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1010                 },
1011         },
1012 };
1013
1014 static struct platform_device tegra_baseband_xmm_power_device = {
1015         .name = "baseband_xmm_power",
1016         .id = -1,
1017         .dev = {
1018                 .platform_data = &tegra_baseband_xmm_power_data,
1019         },
1020 };
1021
1022 static struct platform_device tegra_baseband_xmm_power2_device = {
1023         .name = "baseband_xmm_power2",
1024         .id = -1,
1025         .dev = {
1026                 .platform_data = &tegra_baseband_xmm_power_data,
1027         },
1028 };
1029
1030 static void pluto_usb_init(void)
1031 {
1032         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1033
1034         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1035                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1036                 platform_device_register(&tegra_otg_device);
1037
1038                 /* Setup the udc platform data */
1039                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1040         }
1041 }
1042
1043 static void pluto_modem_init(void)
1044 {
1045         int modem_id = tegra_get_modem_id();
1046         struct board_info board_info;
1047         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1048
1049         tegra_get_board_info(&board_info);
1050         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1051
1052         switch (modem_id) {
1053         case TEGRA_BB_I500: /* on board i500 HSIC */
1054                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
1055                         platform_device_register(&icera_baseband_device);
1056                 break;
1057         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1058                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
1059                         platform_device_register(&icera_baseband2_device);
1060                 break;
1061         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1062                 if ((board_info.board_id == BOARD_E1575) ||
1063                         ((board_info.board_id == BOARD_E1580) &&
1064                                 (board_info.fab >= BOARD_FAB_A03))) {
1065                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1066                                                         TEGRA_TRI_NORMAL);
1067                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1068                 }
1069                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1070                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1071                         tegra_ehci3_device.dev.platform_data
1072                                 = &tegra_hsic_pdata;
1073                         platform_device_register(&tegra_bb_oem1);
1074                 }
1075                 break;
1076         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1077                 /* fix wrong wiring in Pluto A02 */
1078                 if ((board_info.board_id == BOARD_E1580) &&
1079                         (board_info.fab == BOARD_FAB_A02)) {
1080                         pr_info(
1081 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1082                                 __func__);
1083                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1084                                 != MDM2_PWR_ON)
1085                                 pr_err(
1086 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1087                                         __func__);
1088                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1089                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1090                 }
1091                 /* baseband-power.ko will register ehci3 device */
1092                 tegra_hsic_pdata.ops = &oem2_plat_ops;
1093                 tegra_hsic_pdata.u_data.host.remote_wakeup_supported = false;
1094                 tegra_hsic_pdata.u_data.host.power_off_on_suspend = false;
1095                 tegra_ehci3_device.dev.platform_data =
1096                                         &tegra_hsic_pdata;
1097                 tegra_baseband_xmm_power_data.hsic_register =
1098                                                 &tegra_usb_hsic_host_register;
1099                 tegra_baseband_xmm_power_data.hsic_unregister =
1100                                                 &tegra_usb_hsic_host_unregister;
1101                 tegra_baseband_xmm_power_data.ehci_device =
1102                                         &tegra_ehci3_device;
1103                 platform_device_register(&tegra_baseband_xmm_power_device);
1104                 platform_device_register(&tegra_baseband_xmm_power2_device);
1105                 /* override audio settings - use 8kHz */
1106                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1107                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1108                         = 2;
1109                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1110                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1111                         = 1;
1112                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1113                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1114                         = TEGRA_DAIFMT_I2S;
1115                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1116                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1117                         = 16;
1118                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1119                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1120                         = 8000;
1121                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1122                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1123                         = 2;
1124                 break;
1125         case TEGRA_BB_HSIC_HUB: /* HSIC hub */
1126                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1127                         tegra_ehci3_device.dev.platform_data =
1128                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1129                         platform_device_register(&tegra_ehci3_device);
1130                 }
1131                 break;
1132         default:
1133                 return;
1134         }
1135 }
1136
1137 static struct tegra_xusb_pad_data xusb_padctl_data = {
1138         .pad_mux = (0x1 << 0),
1139         .port_cap = (0x1 << 0),
1140         .snps_oc_map = (0x1ff << 0),
1141         .usb2_oc_map = (0x3c << 0),
1142         .ss_port_map = (0x0 << 0),
1143         .oc_det = (0x3f << 10),
1144         .rx_wander = (0xf << 4),
1145         .rx_eq = (0x3070 << 8),
1146         .cdr_cntl = (0x26 << 24),
1147         .dfe_cntl = 0x002008EE,
1148         .hs_slew = (0xE << 6),
1149         .ls_rslew = (0x3 << 14),
1150         .otg_pad0_ctl0 = (0x0 << 19),
1151         .otg_pad1_ctl0 = (0x7 << 19),
1152         .otg_pad0_ctl1 = (0x3 << 0),
1153         .otg_pad1_ctl1 = (0x4 << 0),
1154         .hs_disc_lvl = (0x5 << 2),
1155         .hsic_pad0_ctl0 = (0x00 << 8),
1156         .hsic_pad0_ctl1 = (0x00 << 8),
1157 };
1158
1159 static void pluto_xusb_init(void)
1160 {
1161         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1162
1163         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1164                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1165
1166                 pr_info("dalmore_xusb_init: usb_calib0 = 0x%08x\n", usb_calib0);
1167                 /*
1168                  * read from usb_calib0 and pass to driver
1169                  * set HS_CURR_LEVEL (PAD0)     = usb_calib0[5:0]
1170                  * set TERM_RANGE_ADJ           = usb_calib0[10:7]
1171                  * set HS_SQUELCH_LEVEL         = usb_calib0[12:11]
1172                  * set HS_IREF_CAP              = usb_calib0[14:13]
1173                  * set HS_CURR_LEVEL (PAD1)     = usb_calib0[20:15]
1174                  */
1175
1176                 xusb_padctl_data.hs_curr_level_pad0 = (usb_calib0 >> 0) & 0x3f;
1177                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1178                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1179                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1180                 xusb_padctl_data.hs_curr_level_pad1 = (usb_calib0 >> 15) & 0x3f;
1181
1182                 tegra_xhci_device.dev.platform_data = &xusb_padctl_data;
1183                 platform_device_register(&tegra_xhci_device);
1184         }
1185 }
1186 #else
1187 static void pluto_usb_init(void) { }
1188 static void pluto_modem_init(void) { }
1189 static void pluto_xusb_init(void) { }
1190 #endif
1191
1192 static void pluto_audio_init(void)
1193 {
1194         struct board_info board_info;
1195
1196         tegra_get_board_info(&board_info);
1197
1198         spi_register_board_info(aic326x_spi_board_info,
1199                                         ARRAY_SIZE(aic326x_spi_board_info));
1200 }
1201
1202 #ifndef CONFIG_USE_OF
1203 static struct platform_device *pluto_spi_devices[] __initdata = {
1204         &tegra11_spi_device4,
1205 };
1206
1207 static struct tegra_spi_platform_data pluto_spi_pdata = {
1208         .dma_req_sel            = 0,
1209         .spi_max_frequency      = 25000000,
1210         .clock_always_on        = false,
1211 };
1212
1213 static void __init pluto_spi_init(void)
1214 {
1215         struct board_info board_info, display_board_info;
1216
1217         tegra_get_board_info(&board_info);
1218         tegra_get_display_board_info(&display_board_info);
1219
1220         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1221         platform_add_devices(pluto_spi_devices,
1222                                 ARRAY_SIZE(pluto_spi_devices));
1223 }
1224 #else
1225 static void __init pluto_spi_init(void)
1226 {
1227 }
1228 #endif
1229
1230 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1231         /* name         parent          rate            enabled */
1232         { "extern2",    "pll_p",        41000000,       false},
1233         { "clk_out_2",  "extern2",      40800000,       false},
1234         { NULL,         NULL,           0,              0},
1235 };
1236
1237 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1238         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
1239         .config = 0,
1240         .platform_id = RM_PLATFORM_P005,
1241         .name_of_clock = "clk_out_2",
1242         .name_of_clock_con = "extern2",
1243 };
1244
1245 static struct tegra_spi_device_controller_data dev_cdata = {
1246         .rx_clk_tap_delay = 0,
1247         .tx_clk_tap_delay = 0,
1248 };
1249
1250 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1251         {
1252          .modalias = "rm_ts_spidev",
1253          .bus_num = 3,
1254          .chip_select = 2,
1255          .max_speed_hz = 12 * 1000 * 1000,
1256          .mode = SPI_MODE_0,
1257          .controller_data = &dev_cdata,
1258          .platform_data = &rm31080ts_pluto_data,
1259          },
1260 };
1261
1262 static struct synaptics_gpio_data synaptics_gpio_pluto_data = {
1263         .attn_gpio = SYNAPTICS_ATTN_GPIO,
1264         .attn_polarity = RMI_ATTN_ACTIVE_LOW,
1265         .reset_gpio = SYNAPTICS_RESET_GPIO,
1266 };
1267
1268 static struct rmi_device_platform_data synaptics_pluto_platformdata = {
1269         .sensor_name   = "TM9999",
1270         .attn_gpio     = SYNAPTICS_ATTN_GPIO,
1271         .attn_polarity = RMI_ATTN_ACTIVE_LOW,
1272         .gpio_data     = &synaptics_gpio_pluto_data,
1273         .gpio_config   = synaptics_touchpad_gpio_setup,
1274         .spi_data = {
1275                 .block_delay_us = 100,
1276                 .read_delay_us = 100,
1277                 .write_delay_us = 20,
1278         },
1279         .power_management = {
1280                 .nosleep = RMI_F01_NOSLEEP_OFF,
1281         },
1282         .f19_button_map = &synaptics_button_map,
1283         .f54_direct_touch_report_size = 944,
1284 };
1285
1286 static struct spi_board_info synaptics_9999_spi_board_pluto[] = {
1287         {
1288                 .modalias = "rmi_spi",
1289                 .bus_num = 3,
1290                 .chip_select = 2,
1291                 .max_speed_hz = 8*1000*1000,
1292                 .mode = SPI_MODE_3,
1293                 .platform_data = &synaptics_pluto_platformdata,
1294         },
1295 };
1296
1297 static int __init pluto_touch_init(void)
1298 {
1299         tegra_clk_init_from_table(touch_clk_init_table);
1300         if (tegra_get_touch_id() == RAYDIUM_TOUCH) {
1301                 pr_info("%s: initializing raydium\n", __func__);
1302                 rm31080a_pluto_spi_board[0].irq =
1303                         gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1304                 touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1305                                         TOUCH_GPIO_RST_RAYDIUM_SPI,
1306                                         &rm31080ts_pluto_data,
1307                                         &rm31080a_pluto_spi_board[0],
1308                                         ARRAY_SIZE(rm31080a_pluto_spi_board));
1309         } else {
1310                 pr_info("%s: initializing synaptics\n", __func__);
1311                 touch_init_synaptics(synaptics_9999_spi_board_pluto,
1312                                 ARRAY_SIZE(synaptics_9999_spi_board_pluto));
1313         }
1314         return 0;
1315 }
1316
1317 #ifdef CONFIG_USE_OF
1318 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1319         OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-dma", NULL),
1320         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1321                                 NULL),
1322         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1323                                 NULL),
1324         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1325                                 &pluto_tegra_sdhci_platform_data0),
1326         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1327                                 NULL),
1328         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
1329                                 NULL),
1330         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
1331                                 NULL),
1332         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
1333                                 NULL),
1334         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
1335                                 NULL),
1336         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
1337                                 NULL),
1338         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
1339                                 NULL),
1340         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
1341                                 NULL),
1342         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c500, "tegra11-i2c.2",
1343                                 NULL),
1344         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
1345                                 NULL),
1346         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
1347                                 NULL),
1348         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
1349                                 NULL),
1350         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
1351                                 NULL),
1352         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
1353                                 NULL),
1354         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
1355                                 NULL),
1356         {}
1357 };
1358 #endif
1359
1360 static void __init pluto_dtv_init(void)
1361 {
1362         platform_device_register(&tegra_dtv_device);
1363 }
1364
1365 static void __init tegra_pluto_early_init(void)
1366 {
1367         pluto_sysedp_init();
1368         tegra_clk_init_from_table(pluto_clk_init_table);
1369         tegra_clk_verify_parents();
1370         tegra_soc_device_init("tegra_pluto");
1371 }
1372
1373 static void __init tegra_pluto_late_init(void)
1374 {
1375         platform_device_register(&tegra_pinmux_device);
1376         pluto_pinmux_init();
1377         pluto_i2c_init();
1378         pluto_spi_init();
1379         pluto_usb_init();
1380         pluto_xusb_init();
1381         pluto_uart_init();
1382         pluto_audio_init();
1383         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1384         //tegra_ram_console_debug_init();
1385         tegra_io_dpd_init();
1386         pluto_sdhci_init();
1387         pluto_regulator_init();
1388         pluto_dtv_init();
1389         pluto_suspend_init();
1390         pluto_touch_init();
1391         pluto_emc_init();
1392         pluto_edp_init();
1393         isomgr_init();
1394         pluto_panel_init();
1395         pluto_pmon_init();
1396         pluto_kbc_init();
1397 #ifdef CONFIG_BT_BLUESLEEP
1398         pluto_setup_bluesleep();
1399         pluto_setup_bt_rfkill();
1400 #elif defined CONFIG_BLUEDROID_PM
1401         pluto_setup_bluedroid_pm();
1402 #endif
1403         tegra_release_bootloader_fb();
1404         pluto_modem_init();
1405 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1406         tegra_wdt_recovery_init();
1407 #endif
1408         pluto_sensors_init();
1409         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1410         pluto_soctherm_init();
1411         tegra_register_fuse();
1412         pluto_sysedp_core_init();
1413         pluto_sysedp_psydepl_init();
1414 }
1415
1416 static void __init pluto_ramconsole_reserve(unsigned long size)
1417 {
1418         tegra_ram_console_debug_reserve(SZ_1M);
1419 }
1420
1421 static void __init tegra_pluto_dt_init(void)
1422 {
1423         tegra_pluto_early_init();
1424
1425         of_platform_populate(NULL,
1426                 of_default_bus_match_table, pluto_auxdata_lookup,
1427                 &platform_bus);
1428
1429         tegra_pluto_late_init();
1430 }
1431
1432 static void __init tegra_pluto_reserve(void)
1433 {
1434 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1435         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1436         tegra_reserve(0, SZ_16M, SZ_4M);
1437 #else
1438         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1439 #endif
1440         pluto_ramconsole_reserve(SZ_1M);
1441 }
1442
1443 static const char * const pluto_dt_board_compat[] = {
1444         "nvidia,pluto",
1445         NULL
1446 };
1447
1448 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1449         .atag_offset    = 0x100,
1450         .smp            = smp_ops(tegra_smp_ops),
1451         .map_io         = tegra_map_common_io,
1452         .reserve        = tegra_pluto_reserve,
1453         .init_early     = tegra11x_init_early,
1454         .init_irq       = tegra_dt_init_irq,
1455         .handle_irq     = gic_handle_irq,
1456         .timer          = &tegra_sys_timer,
1457         .init_machine   = tegra_pluto_dt_init,
1458         .restart        = tegra_assert_system_reset,
1459         .dt_compat      = pluto_dt_board_compat,
1460 MACHINE_END