ARM: tegra: increase pluto battery edp capacity
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/edp.h>
54 #include <linux/mfd/tlv320aic3262-registers.h>
55 #include <linux/mfd/tlv320aic3xxx-core.h>
56 #include <linux/usb/tegra_usb_phy.h>
57
58 #include <asm/hardware/gic.h>
59
60 #include <mach/clk.h>
61 #include <mach/irqs.h>
62 #include <mach/pinmux.h>
63 #include <mach/pinmux-t11.h>
64 #include <mach/io_dpd.h>
65 #include <mach/i2s.h>
66 #include <mach/isomgr.h>
67 #include <mach/tegra_asoc_pdata.h>
68 #include <asm/mach-types.h>
69 #include <asm/mach/arch.h>
70 #include <mach/gpio-tegra.h>
71 #include <mach/tegra_fiq_debugger.h>
72 #include <mach/tegra-bb-power.h>
73 #include <mach/tegra_usb_modem_power.h>
74 #include <mach/tegra_wakeup_monitor.h>
75
76 #include "board.h"
77 #include "board-common.h"
78 #include "board-touch-raydium.h"
79 #include "clock.h"
80 #include "board-pluto.h"
81 #include "baseband-xmm-power.h"
82 #include "tegra-board-id.h"
83 #include "devices.h"
84 #include "gpio-names.h"
85 #include "fuse.h"
86 #include "pm.h"
87 #include "common.h"
88 #include "iomap.h"
89
90
91 #ifdef CONFIG_BT_BLUESLEEP
92 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
93         .name           = "bt_rfkill",
94         .shutdown_gpio  = TEGRA_GPIO_PQ7,
95         .reset_gpio     = TEGRA_GPIO_PQ6,
96         .type           = RFKILL_TYPE_BLUETOOTH,
97 };
98
99 static struct platform_device pluto_bt_rfkill_device = {
100         .name = "rfkill_gpio",
101         .id             = -1,
102         .dev = {
103                 .platform_data = &pluto_bt_rfkill_pdata,
104         },
105 };
106
107 static noinline void __init pluto_setup_bt_rfkill(void)
108 {
109         platform_device_register(&pluto_bt_rfkill_device);
110 }
111
112 static struct resource pluto_bluesleep_resources[] = {
113         [0] = {
114                 .name = "gpio_host_wake",
115                         .start  = TEGRA_GPIO_PU6,
116                         .end    = TEGRA_GPIO_PU6,
117                         .flags  = IORESOURCE_IO,
118         },
119         [1] = {
120                 .name = "gpio_ext_wake",
121                         .start  = TEGRA_GPIO_PEE1,
122                         .end    = TEGRA_GPIO_PEE1,
123                         .flags  = IORESOURCE_IO,
124         },
125         [2] = {
126                 .name = "host_wake",
127                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
128         },
129 };
130
131 static struct platform_device pluto_bluesleep_device = {
132         .name           = "bluesleep",
133         .id             = -1,
134         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
135         .resource       = pluto_bluesleep_resources,
136 };
137
138 static noinline void __init pluto_setup_bluesleep(void)
139 {
140         pluto_bluesleep_resources[2].start =
141                 pluto_bluesleep_resources[2].end =
142                         gpio_to_irq(TEGRA_GPIO_PU6);
143         platform_device_register(&pluto_bluesleep_device);
144         return;
145 }
146 #elif defined CONFIG_BLUEDROID_PM
147 static struct resource pluto_bluedroid_pm_resources[] = {
148         [0] = {
149                 .name   = "shutdown_gpio",
150                 .start  = TEGRA_GPIO_PQ7,
151                 .end    = TEGRA_GPIO_PQ7,
152                 .flags  = IORESOURCE_IO,
153         },
154         [1] = {
155                 .name = "host_wake",
156                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
157         },
158         [2] = {
159                 .name = "gpio_ext_wake",
160                 .start  = TEGRA_GPIO_PEE1,
161                 .end    = TEGRA_GPIO_PEE1,
162                 .flags  = IORESOURCE_IO,
163         },
164         [3] = {
165                 .name = "gpio_host_wake",
166                 .start  = TEGRA_GPIO_PU6,
167                 .end    = TEGRA_GPIO_PU6,
168                 .flags  = IORESOURCE_IO,
169         },
170         [4] = {
171                 .name = "reset_gpio",
172                 .start  = TEGRA_GPIO_PQ6,
173                 .end    = TEGRA_GPIO_PQ6,
174                 .flags  = IORESOURCE_IO,
175         },
176 };
177
178 static struct platform_device pluto_bluedroid_pm_device = {
179         .name = "bluedroid_pm",
180         .id             = 0,
181         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
182         .resource       = pluto_bluedroid_pm_resources,
183 };
184
185 static noinline void __init pluto_setup_bluedroid_pm(void)
186 {
187         pluto_bluedroid_pm_resources[1].start =
188                 pluto_bluedroid_pm_resources[1].end =
189                                         gpio_to_irq(TEGRA_GPIO_PU6);
190         platform_device_register(&pluto_bluedroid_pm_device);
191 }
192 #endif
193
194 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
195         /* name         parent          rate            enabled */
196         { "pll_m",      NULL,           0,              false},
197         { "hda",        "pll_p",        108000000,      false},
198         { "hda2codec_2x", "pll_p",      48000000,       false},
199         { "pwm",        "pll_p",        3187500,        false},
200         { "i2s1",       "pll_a_out0",   0,              false},
201         { "i2s2",       "pll_a_out0",   0,              false},
202         { "i2s3",       "pll_a_out0",   0,              false},
203         { "i2s4",       "pll_a_out0",   0,              false},
204         { "spdif_out",  "pll_a_out0",   0,              false},
205         { "d_audio",    "clk_m",        12000000,       false},
206         { "dam0",       "clk_m",        12000000,       false},
207         { "dam1",       "clk_m",        12000000,       false},
208         { "dam2",       "clk_m",        12000000,       false},
209         { "audio0",     "i2s0_sync",    0,              false},
210         { "audio1",     "i2s1_sync",    0,              false},
211         { "audio2",     "i2s2_sync",    0,              false},
212         { "audio3",     "i2s3_sync",    0,              false},
213         { "audio4",     "i2s4_sync",    0,              false},
214         { "vi_sensor",  "pll_p",        150000000,      false},
215         { "cilab",      "pll_p",        150000000,      false},
216         { "cilcd",      "pll_p",        150000000,      false},
217         { "cile",       "pll_p",        150000000,      false},
218         { "i2c1",       "pll_p",        3200000,        false},
219         { "i2c2",       "pll_p",        3200000,        false},
220         { "i2c3",       "pll_p",        3200000,        false},
221         { "i2c4",       "pll_p",        3200000,        false},
222         { "i2c5",       "pll_p",        3200000,        false},
223         { "sbc1",       "pll_p",        25000000,       false},
224         { "sbc2",       "pll_p",        25000000,       false},
225         { "sbc3",       "pll_p",        25000000,       false},
226         { "sbc4",       "pll_p",        25000000,       false},
227         { "sbc5",       "pll_p",        25000000,       false},
228         { "sbc6",       "pll_p",        25000000,       false},
229         { "extern3",    "clk_m",        12000000,       false},
230         { NULL,         NULL,           0,              0},
231 };
232
233 static struct bcm2079x_platform_data nfc_pdata = {
234         .irq_gpio = TEGRA_GPIO_PW2,
235         .en_gpio = TEGRA_GPIO_PU4,
236         .wake_gpio = TEGRA_GPIO_PX7,
237         };
238
239 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
240         {
241                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
242                 .platform_data = &nfc_pdata,
243         },
244 };
245
246 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
247         .bus_clk_rate   = 100000,
248         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
249         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
250 };
251
252 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
253         .bus_clk_rate   = 100000,
254         .is_clkon_always = true,
255         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
256         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
257 };
258
259 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
260         .bus_clk_rate   = 100000,
261         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
262         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
263 };
264
265 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
266         .bus_clk_rate   = 10000,
267         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
268         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
269 };
270
271 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
272         .bus_clk_rate   = 400000,
273         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
274         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
275 };
276
277 static struct aic3262_gpio_setup aic3262_gpio[] = {
278         /* GPIO 1*/
279         {
280                 .used = 1,
281                 .in = 0,
282                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
283         },
284         /* GPIO 2*/
285         {
286                 .used = 1,
287                 .in = 0,
288                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
289         },
290         /* GPI1 */
291         {
292                 .used = 1,
293                 .in = 1,
294         },
295         /* GPI2 */
296         {
297                 .used = 1,
298                 .in = 1,
299                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
300                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
301                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
302                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
303         },
304         /* GPO1 */
305         {
306                 .used = 1,
307                 .in = 0,
308                 .value = AIC3262_GPO1_FUNC_MSO_OUTPUT_FOR_SPI,
309         },
310 };
311 static struct aic3xxx_pdata aic3262_codec_pdata = {
312         .gpio_irq       = 0,
313         .gpio           = aic3262_gpio,
314         .naudint_irq    = 0,
315         .irq_base       = AIC3262_CODEC_IRQ_BASE,
316 };
317
318 static struct i2c_board_info __initdata cs42l73_board_info = {
319         I2C_BOARD_INFO("cs42l73", 0x4a),
320 };
321
322 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
323         I2C_BOARD_INFO("audience_a2220", 0x3E),
324 };
325
326 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
327         I2C_BOARD_INFO("tlv320aic3262", 0x18),
328         .platform_data = &aic3262_codec_pdata,
329 };
330
331 static void pluto_i2c_init(void)
332 {
333         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
334         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
335         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
336         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
337         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
338
339         platform_device_register(&tegra11_i2c_device5);
340         platform_device_register(&tegra11_i2c_device4);
341         platform_device_register(&tegra11_i2c_device3);
342         platform_device_register(&tegra11_i2c_device2);
343         platform_device_register(&tegra11_i2c_device1);
344
345         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
346         i2c_register_board_info(0, &cs42l73_board_info, 1);
347         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
348         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
349         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
350         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
351 }
352
353 static struct platform_device *pluto_uart_devices[] __initdata = {
354         &tegra_uarta_device,
355         &tegra_uartb_device,
356         &tegra_uartc_device,
357         &tegra_uartd_device,
358 };
359 static struct uart_clk_parent uart_parent_clk[] = {
360         [0] = {.name = "clk_m"},
361         [1] = {.name = "pll_p"},
362 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
363         [2] = {.name = "pll_m"},
364 #endif
365 };
366
367 static struct tegra_uart_platform_data pluto_uart_pdata;
368 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
369
370 static void __init uart_debug_init(void)
371 {
372         int debug_port_id;
373
374         debug_port_id = uart_console_debug_init(3);
375         if (debug_port_id < 0)
376                 return;
377         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
378 }
379
380 static void __init pluto_uart_init(void)
381 {
382         struct clk *c;
383         int i;
384
385         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
386                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
387                 if (IS_ERR_OR_NULL(c)) {
388                         pr_err("Not able to get the clock for %s\n",
389                                                 uart_parent_clk[i].name);
390                         continue;
391                 }
392                 uart_parent_clk[i].parent_clk = c;
393                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
394         }
395         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
396         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
397         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
398         pluto_loopback_uart_pdata.parent_clk_count =
399                                                 ARRAY_SIZE(uart_parent_clk);
400         pluto_loopback_uart_pdata.is_loopback = true;
401         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
402         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
403         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
404         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
405
406         /* Register low speed only if it is selected */
407         if (!is_tegra_debug_uartport_hs())
408                 uart_debug_init();
409
410         platform_add_devices(pluto_uart_devices,
411                                 ARRAY_SIZE(pluto_uart_devices));
412 }
413
414 static struct resource tegra_rtc_resources[] = {
415         [0] = {
416                 .start = TEGRA_RTC_BASE,
417                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
418                 .flags = IORESOURCE_MEM,
419         },
420         [1] = {
421                 .start = INT_RTC,
422                 .end = INT_RTC,
423                 .flags = IORESOURCE_IRQ,
424         },
425 };
426
427 static struct platform_device tegra_rtc_device = {
428         .name = "tegra_rtc",
429         .id   = -1,
430         .resource = tegra_rtc_resources,
431         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
432 };
433
434 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
435 static struct tegra_wakeup_monitor_platform_data
436                         pluto_tegra_wakeup_monitor_pdata = {
437         .wifi_wakeup_source     = 6,
438 };
439
440 static struct platform_device pluto_tegra_wakeup_monitor_device = {
441         .name = "tegra_wakeup_monitor",
442         .id   = -1,
443         .dev  = {
444                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
445         },
446 };
447 #endif
448
449 static struct tegra_asoc_platform_data pluto_audio_pdata = {
450         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
451         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
452         .gpio_hp_mute           = -1,
453         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
454         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
455         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
456         .edp_states             = {1776, 888, 0},
457         .i2s_param[HIFI_CODEC]  = {
458                 .audio_port_id  = 1,
459                 .is_i2s_master  = 0,
460                 .i2s_mode       = TEGRA_DAIFMT_I2S,
461                 .sample_size    = 16,
462                 .channels       = 2,
463         },
464         .i2s_param[BASEBAND]    = {
465                 .audio_port_id  = 2,
466                 .is_i2s_master  = 1,
467                 .i2s_mode       = TEGRA_DAIFMT_I2S,
468                 .sample_size    = 16,
469                 .rate           = 16000,
470                 .channels       = 2,
471                 .bit_clk        = 1024000,
472         },
473         .i2s_param[BT_SCO]      = {
474                 .audio_port_id  = 3,
475                 .is_i2s_master  = 1,
476                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
477                 .sample_size    = 16,
478                 .channels       = 1,
479                 .bit_clk        = 512000,
480         },
481         .i2s_param[VOICE_CODEC] = {
482                 .audio_port_id  = 0,
483                 .is_i2s_master  = 1,
484                 .i2s_mode       = TEGRA_DAIFMT_I2S,
485                 .sample_size    = 16,
486                 .rate           = 16000,
487                 .channels       = 2,
488         },
489 };
490
491 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
492         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
493         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
494         .gpio_hp_mute           = -1,
495         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
496         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
497         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
498         .edp_states             = {1776, 888, 0},
499         .i2s_param[HIFI_CODEC]  = {
500                 .audio_port_id  = 1,
501                 .is_i2s_master  = 1,
502                 .i2s_mode       = TEGRA_DAIFMT_I2S,
503                 .sample_size    = 16,
504                 .rate           = 48000,
505                 .channels       = 2,
506         },
507         .i2s_param[BASEBAND]    = {
508                 .audio_port_id  = 2,
509                 .is_i2s_master  = 1,
510                 .i2s_mode       = TEGRA_DAIFMT_I2S,
511                 .sample_size    = 16,
512                 .rate           = 16000,
513                 .channels       = 2,
514                 .bit_clk        = 1024000,
515         },
516         .i2s_param[BT_SCO]      = {
517                 .audio_port_id  = 3,
518                 .is_i2s_master  = 1,
519                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
520                 .sample_size    = 16,
521                 .channels       = 1,
522                 .bit_clk        = 512000,
523         },
524         .i2s_param[VOICE_CODEC] = {
525                 .audio_port_id  = 0,
526                 .is_i2s_master  = 1,
527                 .i2s_mode       = TEGRA_DAIFMT_I2S,
528                 .sample_size    = 16,
529                 .rate           = 16000,
530                 .channels       = 2,
531         },
532 };
533
534 static struct platform_device pluto_audio_device = {
535         .name   = "tegra-snd-cs42l73",
536         .id     = 2,
537         .dev    = {
538                 .platform_data = &pluto_audio_pdata,
539         },
540 };
541
542 static struct platform_device pluto_audio_aic326x_device = {
543         .name   = "tegra-snd-aic326x",
544         .id     = 2,
545         .dev    = {
546                 .platform_data  = &pluto_aic3262_pdata,
547         },
548 };
549
550 static struct tegra_spi_device_controller_data dev_bdata = {
551         .rx_clk_tap_delay = 0,
552         .tx_clk_tap_delay = 0,
553 };
554 static struct spi_board_info aic326x_spi_board_info[] = {
555         {
556                 .modalias = "tlv320aic3xxx",
557                 .bus_num = 3,
558                 .chip_select = 0,
559                 .max_speed_hz = 4*1000*1000,
560                 .mode = SPI_MODE_1,
561                 .controller_data = &dev_bdata,
562                 .platform_data = &aic3262_codec_pdata,
563         },
564 };
565
566 #ifdef CONFIG_MHI_NETDEV
567 struct platform_device mhi_netdevice0 = {
568         .name = "mhi_net_device",
569         .id = 0,
570 };
571 #endif /* CONFIG_MHI_NETDEV */
572
573 static struct platform_device *pluto_devices[] __initdata = {
574         &tegra_pmu_device,
575         &tegra_rtc_device,
576         &tegra_udc_device,
577 #if defined(CONFIG_TEGRA_WATCHDOG)
578         /* three CPU watchdog timers, user space */
579         &tegra_wdt0_device,
580         &tegra_wdt1_device,
581         &tegra_wdt2_device,
582         /* 4th used for the suspend/resume only */
583 #endif
584 #if defined(CONFIG_TEGRA_AVP)
585         &tegra_avp_device,
586 #endif
587 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
588         &tegra11_se_device,
589 #endif
590         &tegra_ahub_device,
591         &tegra_dam_device0,
592         &tegra_dam_device1,
593         &tegra_dam_device2,
594         &tegra_i2s_device0,
595         &tegra_i2s_device1,
596         &tegra_i2s_device2,
597         &tegra_i2s_device3,
598         &tegra_i2s_device4,
599         &tegra_spdif_device,
600         &spdif_dit_device,
601         &bluetooth_dit_device,
602         &baseband_dit_device,
603 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
604         &pluto_tegra_wakeup_monitor_device,
605 #endif
606         &pluto_audio_device,
607         &pluto_audio_aic326x_device,
608         &tegra_hda_device,
609 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
610         &tegra_aes_device,
611 #endif
612 #ifdef CONFIG_MHI_NETDEV
613         &mhi_netdevice0,  /* MHI netdevice */
614 #endif /* CONFIG_MHI_NETDEV */
615 };
616
617 #ifdef CONFIG_USB_SUPPORT
618
619 static void pluto_usb_hsic_postsupend(void)
620 {
621         pr_debug("%s\n", __func__);
622 #ifdef CONFIG_TEGRA_BB_XMM_POWER
623         baseband_xmm_set_power_status(BBXMM_PS_L2);
624 #endif
625 }
626
627 static void pluto_usb_hsic_preresume(void)
628 {
629         pr_debug("%s\n", __func__);
630 #ifdef CONFIG_TEGRA_BB_XMM_POWER
631         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
632 #endif
633 }
634
635 static void pluto_usb_hsic_post_resume(void)
636 {
637         pr_debug("%s\n", __func__);
638 #ifdef CONFIG_TEGRA_BB_XMM_POWER
639         baseband_xmm_set_power_status(BBXMM_PS_L0);
640 #endif
641 }
642
643 static void pluto_usb_hsic_phy_power(void)
644 {
645         pr_debug("%s\n", __func__);
646 #ifdef CONFIG_TEGRA_BB_XMM_POWER
647         baseband_xmm_set_power_status(BBXMM_PS_L0);
648 #endif
649 }
650
651 static void pluto_usb_hsic_post_phy_off(void)
652 {
653         pr_debug("%s\n", __func__);
654 #ifdef CONFIG_TEGRA_BB_XMM_POWER
655         baseband_xmm_set_power_status(BBXMM_PS_L2);
656 #endif
657 }
658
659 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
660         .post_suspend = pluto_usb_hsic_postsupend,
661         .pre_resume = pluto_usb_hsic_preresume,
662         .port_power = pluto_usb_hsic_phy_power,
663         .post_resume = pluto_usb_hsic_post_resume,
664         .post_phy_off = pluto_usb_hsic_post_phy_off,
665 };
666
667 static struct tegra_usb_platform_data tegra_ehci3_hsic_xmm_pdata = {
668         .port_otg = false,
669         .has_hostpc = true,
670         .unaligned_dma_buf_supported = false,
671         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
672         .op_mode        = TEGRA_USB_OPMODE_HOST,
673         .u_data.host = {
674                 .vbus_gpio = -1,
675                 .hot_plug = false,
676                 .remote_wakeup_supported = false,
677                 .power_off_on_suspend = false,
678         },
679         .ops = &oem2_plat_ops,
680 };
681
682 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
683         .port_otg = false,
684         .has_hostpc = true,
685         .unaligned_dma_buf_supported = false,
686         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
687         .op_mode        = TEGRA_USB_OPMODE_HOST,
688         .u_data.host = {
689                 .vbus_gpio = -1,
690                 .hot_plug = false,
691                 .remote_wakeup_supported = true,
692                 .power_off_on_suspend = true,
693         },
694 };
695
696 static struct tegra_usb_platform_data tegra_udc_pdata = {
697         .port_otg = true,
698         .has_hostpc = true,
699         .builtin_host_disabled = true,
700         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
701         .op_mode = TEGRA_USB_OPMODE_DEVICE,
702         .u_data.dev = {
703                 .vbus_pmu_irq = 0,
704                 .vbus_gpio = -1,
705                 .charging_supported = false,
706                 .remote_wakeup_supported = false,
707         },
708         .u_cfg.utmi = {
709                 .hssync_start_delay = 0,
710                 .elastic_limit = 16,
711                 .idle_wait_delay = 17,
712                 .term_range_adj = 6,
713                 .xcvr_setup = 8,
714                 .xcvr_lsfslew = 2,
715                 .xcvr_lsrslew = 2,
716                 .xcvr_setup_offset = 0,
717                 .xcvr_use_fuses = 1,
718         },
719 };
720
721 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
722         .port_otg = true,
723         .has_hostpc = true,
724         .builtin_host_disabled = true,
725         .unaligned_dma_buf_supported = false,
726         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
727         .op_mode = TEGRA_USB_OPMODE_HOST,
728         .u_data.host = {
729                 .vbus_gpio = -1,
730                 .hot_plug = false,
731                 .remote_wakeup_supported = true,
732                 .power_off_on_suspend = true,
733         },
734         .u_cfg.utmi = {
735                 .hssync_start_delay = 0,
736                 .elastic_limit = 16,
737                 .idle_wait_delay = 17,
738                 .term_range_adj = 6,
739                 .xcvr_setup = 15,
740                 .xcvr_lsfslew = 2,
741                 .xcvr_lsrslew = 2,
742                 .xcvr_setup_offset = 0,
743                 .xcvr_use_fuses = 1,
744                 .vbus_oc_map = 0x7,
745         },
746 };
747
748 static struct tegra_usb_otg_data tegra_otg_pdata = {
749         .ehci_device = &tegra_ehci1_device,
750         .ehci_pdata = &tegra_ehci1_utmi_pdata,
751 };
752
753 static struct regulator *baseband_reg;
754 static struct gpio modem_gpios[] = { /* i500 modem */
755         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
756 };
757
758 static struct gpio modem2_gpios[] = {
759         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
760         {MDM2_RST, GPIOF_DIR_OUT, "MODEM2 RESET"},
761         {MDM2_ACK2, GPIOF_OUT_INIT_HIGH, "MODEM2 ACK2"},
762         {MDM2_ACK1, GPIOF_OUT_INIT_LOW, "MODEM2 ACK1"},
763 };
764
765 static void baseband2_post_phy_on(void);
766 static void baseband2_pre_phy_off(void);
767
768 static struct tegra_usb_phy_platform_ops baseband2_plat_ops = {
769         .pre_phy_off = baseband2_pre_phy_off,
770         .post_phy_on = baseband2_post_phy_on,
771 };
772
773 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
774         .port_otg = false,
775         .has_hostpc = true,
776         .unaligned_dma_buf_supported = false,
777         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
778         .op_mode = TEGRA_USB_OPMODE_HOST,
779         .u_data.host = {
780                 .vbus_gpio = -1,
781                 .hot_plug = false,
782                 .remote_wakeup_supported = true,
783                 .power_off_on_suspend = true,
784         },
785 };
786
787 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
788         .port_otg = false,
789         .has_hostpc = true,
790         .unaligned_dma_buf_supported = false,
791         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
792         .op_mode = TEGRA_USB_OPMODE_HOST,
793         .u_data.host = {
794                 .vbus_gpio = -1,
795                 .hot_plug = false,
796                 .remote_wakeup_supported = true,
797                 .power_off_on_suspend = true,
798         },
799         .ops = &baseband2_plat_ops,
800 };
801
802 static struct tegra_usb_platform_data tegra_hsic_pdata = {
803         .port_otg = false,
804         .has_hostpc = true,
805         .unaligned_dma_buf_supported = false,
806         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
807         .op_mode        = TEGRA_USB_OPMODE_HOST,
808         .u_data.host = {
809                 .vbus_gpio = -1,
810                 .hot_plug = false,
811                 .remote_wakeup_supported = true,
812                 .power_off_on_suspend = true,
813         },
814 };
815
816 static struct platform_device *
817 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
818 {
819         struct platform_device *pdev;
820         int val;
821
822         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
823         if (!pdev)
824                 return NULL;
825
826         val = platform_device_add_resources(pdev, ehci_dev->resource,
827                                                 ehci_dev->num_resources);
828         if (val)
829                 goto error;
830
831         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
832         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
833
834         val = platform_device_add_data(pdev, &tegra_ehci3_hsic_xmm_pdata,
835                         sizeof(struct tegra_usb_platform_data));
836         if (val)
837                 goto error;
838
839         val = platform_device_add(pdev);
840         if (val)
841                 goto error;
842
843         return pdev;
844
845 error:
846         pr_err("%s: failed to add the host contoller device\n", __func__);
847         platform_device_put(pdev);
848         return NULL;
849 }
850
851 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
852 {
853         struct platform_device *pdev = *platdev;
854
855         if (pdev && &pdev->dev) {
856                 platform_device_unregister(pdev);
857                 *platdev = NULL;
858         } else
859                 pr_err("%s: no platform device\n", __func__);
860 }
861
862 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
863
864 static union tegra_bb_gpio_id bb_gpio_oem1 = {
865         .oem1 = {
866                 .reset = BB_OEM1_GPIO_RST,
867                 .pwron = BB_OEM1_GPIO_ON,
868                 .awr = BB_OEM1_GPIO_AWR,
869                 .cwr = BB_OEM1_GPIO_CWR,
870                 .spare = BB_OEM1_GPIO_SPARE,
871                 .wdi = BB_OEM1_GPIO_WDI,
872         },
873 };
874
875 static struct tegra_bb_pdata bb_pdata_oem1 = {
876         .id = &bb_gpio_oem1,
877         .device = &tegra_ehci3_device,
878         .ehci_register = tegra_usb_hsic_host_register,
879         .ehci_unregister = tegra_usb_hsic_host_unregister,
880         .bb_id = TEGRA_BB_OEM1,
881 };
882
883 static struct platform_device tegra_bb_oem1 = {
884         .name = "tegra_baseband_power",
885         .id = -1,
886         .dev = {
887                 .platform_data = &bb_pdata_oem1,
888         },
889 };
890
891 static int baseband_init(void)
892 {
893         int ret;
894
895         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
896         if (ret) {
897                 pr_warn("%s:gpio request failed\n", __func__);
898                 return ret;
899         }
900
901         baseband_reg = regulator_get(NULL, "vdd_core_bb");
902         if (IS_ERR_OR_NULL(baseband_reg))
903                 pr_warn("%s: baseband regulator get failed\n", __func__);
904         else
905                 regulator_enable(baseband_reg);
906
907         /* enable pull-up for MDM1 UART RX */
908         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PU1,
909                                     TEGRA_PUPD_PULL_UP);
910
911         /* enable pull-down for MDM1_COLD_BOOT */
912         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
913                                     TEGRA_PUPD_PULL_DOWN);
914
915         /* export GPIO for user space access through sysfs */
916         gpio_export(MDM_RST, false);
917
918         return 0;
919 }
920
921 static const struct tegra_modem_operations baseband_operations = {
922         .init = baseband_init,
923 };
924
925 #define MODEM_BOOT_EDP_MAX 0
926 /* FIXME: get accurate boot current value */
927 static unsigned int modem_boot_edp_states[] = { 1900 };
928 static struct edp_client modem_boot_edp_client = {
929         .name = "modem_boot",
930         .states = modem_boot_edp_states,
931         .num_states = ARRAY_SIZE(modem_boot_edp_states),
932         .e0_index = MODEM_BOOT_EDP_MAX,
933         .priority = EDP_MAX_PRIO,
934 };
935
936 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
937         .ops = &baseband_operations,
938         .wake_gpio = -1,
939         .boot_gpio = MDM_COLDBOOT,
940         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
941         .autosuspend_delay = 2000,
942         .short_autosuspend_delay = 50,
943         .tegra_ehci_device = &tegra_ehci2_device,
944         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
945         .modem_boot_edp_client = &modem_boot_edp_client,
946         .edp_manager_name = "battery",
947         .i_breach_ppm = 500000,
948         /* FIXME: get useful adjperiods */
949         .i_thresh_3g_adjperiod = 10000,
950         .i_thresh_lte_adjperiod = 10000,
951 };
952
953 static struct platform_device icera_baseband_device = {
954         .name = "tegra_usb_modem_power",
955         .id = -1,
956         .dev = {
957                 .platform_data = &baseband_pdata,
958         },
959 };
960
961 static void baseband2_post_phy_on(void)
962 {
963         /* set MDM2_ACK2 low */
964         gpio_set_value(MDM2_ACK2, 0);
965 }
966
967 static void baseband2_pre_phy_off(void)
968 {
969         /* set MDM2_ACK2 high */
970         gpio_set_value(MDM2_ACK2, 1);
971 }
972
973 static void baseband2_start(void)
974 {
975         /*
976          *  Leave baseband powered OFF.
977          *  User-space daemons will take care of powering it up.
978          */
979         pr_info("%s\n", __func__);
980         gpio_set_value(MDM2_PWR_ON, 0);
981 }
982
983 static void baseband2_reset(void)
984 {
985         /* Initiate power cycle on baseband sub system */
986         pr_info("%s\n", __func__);
987         gpio_set_value(MDM2_PWR_ON, 0);
988         mdelay(200);
989         gpio_set_value(MDM2_PWR_ON, 1);
990 }
991
992 static int baseband2_init(void)
993 {
994         int ret;
995
996         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
997         if (ret)
998                 return ret;
999
1000         /* enable pull-up for MDM2_REQ2 */
1001         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PV1,
1002                                     TEGRA_PUPD_PULL_UP);
1003
1004         /* export GPIO for user space access through sysfs */
1005         gpio_export(MDM2_PWR_ON, false);
1006
1007         return 0;
1008 }
1009
1010 static const struct tegra_modem_operations baseband2_operations = {
1011         .init = baseband2_init,
1012         .start = baseband2_start,
1013         .reset = baseband2_reset,
1014 };
1015
1016 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
1017         .ops = &baseband2_operations,
1018         .wake_gpio = MDM2_REQ2,
1019         .wake_irq_flags = IRQF_TRIGGER_FALLING,
1020         .boot_gpio = MDM2_COLDBOOT,
1021         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1022         .autosuspend_delay = 2000,
1023         .short_autosuspend_delay = 50,
1024         .tegra_ehci_device = &tegra_ehci3_device,
1025         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
1026 };
1027
1028 static struct platform_device icera_baseband2_device = {
1029         .name = "tegra_usb_modem_power",
1030         .id = -1,
1031         .dev = {
1032                 .platform_data = &baseband2_pdata,
1033         },
1034 };
1035
1036 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
1037         .baseband_type = BASEBAND_XMM,
1038         .modem = {
1039                 .xmm = {
1040                         .bb_rst = XMM_GPIO_BB_RST,
1041                         .bb_on = XMM_GPIO_BB_ON,
1042                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1043                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1044                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1045                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1046                 },
1047         },
1048 };
1049
1050 static struct platform_device tegra_baseband_xmm_power_device = {
1051         .name = "baseband_xmm_power",
1052         .id = -1,
1053         .dev = {
1054                 .platform_data = &tegra_baseband_xmm_power_data,
1055         },
1056 };
1057
1058 static struct platform_device tegra_baseband_xmm_power2_device = {
1059         .name = "baseband_xmm_power2",
1060         .id = -1,
1061         .dev = {
1062                 .platform_data = &tegra_baseband_xmm_power_data,
1063         },
1064 };
1065
1066 static void pluto_usb_init(void)
1067 {
1068         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1069
1070         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1071                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1072                 platform_device_register(&tegra_otg_device);
1073
1074                 /* Setup the udc platform data */
1075                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1076         }
1077 }
1078
1079 static void pluto_modem_init(void)
1080 {
1081         int modem_id = tegra_get_modem_id();
1082         struct board_info board_info;
1083         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1084
1085         tegra_get_board_info(&board_info);
1086         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1087
1088         switch (modem_id) {
1089         case TEGRA_BB_I500: /* on board i500 HSIC */
1090                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
1091                         platform_device_register(&icera_baseband_device);
1092                 break;
1093         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1094                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
1095                         platform_device_register(&icera_baseband2_device);
1096                 break;
1097         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1098                 if ((board_info.board_id == BOARD_E1575) ||
1099                         ((board_info.board_id == BOARD_E1580) &&
1100                                 (board_info.fab >= BOARD_FAB_A03))) {
1101                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1102                                                         TEGRA_TRI_NORMAL);
1103                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1104                 }
1105                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1106                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1107                         tegra_ehci3_device.dev.platform_data
1108                                 = &tegra_hsic_pdata;
1109                         platform_device_register(&tegra_bb_oem1);
1110                 }
1111                 break;
1112         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1113                 /* fix wrong wiring in Pluto A02 */
1114                 if ((board_info.board_id == BOARD_E1580) &&
1115                         (board_info.fab == BOARD_FAB_A02)) {
1116                         pr_info(
1117 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1118                                 __func__);
1119                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1120                                 != MDM2_PWR_ON)
1121                                 pr_err(
1122 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1123                                         __func__);
1124                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1125                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1126                 }
1127                 /* baseband-power.ko will register ehci3 device */
1128                 tegra_ehci3_device.dev.platform_data =
1129                                         &tegra_ehci3_hsic_xmm_pdata;
1130                 tegra_baseband_xmm_power_data.hsic_register =
1131                                                 &tegra_usb_hsic_host_register;
1132                 tegra_baseband_xmm_power_data.hsic_unregister =
1133                                                 &tegra_usb_hsic_host_unregister;
1134                 tegra_baseband_xmm_power_data.ehci_device =
1135                                         &tegra_ehci3_device;
1136                 platform_device_register(&tegra_baseband_xmm_power_device);
1137                 platform_device_register(&tegra_baseband_xmm_power2_device);
1138                 /* override audio settings - use 8kHz */
1139                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1140                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1141                         = 2;
1142                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1143                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1144                         = 1;
1145                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1146                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1147                         = TEGRA_DAIFMT_I2S;
1148                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1149                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1150                         = 16;
1151                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1152                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1153                         = 8000;
1154                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1155                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1156                         = 2;
1157                 break;
1158         case TEGRA_BB_HSIC_HUB: /* i500 SWD HSIC */
1159                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1160                         tegra_ehci3_device.dev.platform_data =
1161                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1162                         platform_device_register(&tegra_ehci3_device);
1163                 }
1164                 break;
1165         default:
1166                 return;
1167         }
1168 }
1169
1170 static struct tegra_xusb_pad_data xusb_padctl_data = {
1171         .pad_mux = 0x1,
1172         .port_cap = 0x1,
1173         .snps_oc_map = 0x1ff,
1174         .usb2_oc_map = 0x3c,
1175         .ss_port_map = 0x2,
1176         .oc_det = 0,
1177         .rx_wander = 0xf0,
1178         .otg_pad0_ctl0 = 0xffc7ffff,
1179         .otg_pad0_ctl1 = 0x7,
1180         .otg_pad1_ctl0 = 0xffffffff,
1181         .otg_pad1_ctl1 = 0,
1182         .bias_pad_ctl0 = 0,
1183         .hsic_pad0_ctl0 = 0xffff00ff,
1184         .hsic_pad0_ctl1 = 0xffff00ff,
1185         .pmc_value = 0xfffffff0,
1186 };
1187
1188 static void pluto_xusb_init(void)
1189 {
1190         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1191
1192         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1193                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1194
1195                 /*
1196                  * read from usb_calib0 and pass to driver
1197                  * set HS_CURR_LEVEL = usb_calib0[5:0]
1198                  * set TERM_RANGE_ADJ = usb_calib0[10:7]
1199                  * set HS_IREF_CAP = usb_calib0[14:13]
1200                  * set HS_SQUELCH_LEVEL = usb_calib0[12:11]
1201                  */
1202
1203                 xusb_padctl_data.hs_curr_level = (usb_calib0 >> 0) & 0x3f;
1204                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1205                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1206                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1207
1208                 tegra_xhci_device.dev.platform_data = &xusb_padctl_data;
1209                 platform_device_register(&tegra_xhci_device);
1210         }
1211 }
1212 #else
1213 static void pluto_usb_init(void) { }
1214 static void pluto_modem_init(void) { }
1215 static void pluto_xusb_init(void) { }
1216 #endif
1217
1218 static void pluto_audio_init(void)
1219 {
1220         struct board_info board_info;
1221
1222         tegra_get_board_info(&board_info);
1223
1224         spi_register_board_info(aic326x_spi_board_info,
1225                                         ARRAY_SIZE(aic326x_spi_board_info));
1226 }
1227
1228 #ifndef CONFIG_USE_OF
1229 static struct platform_device *pluto_spi_devices[] __initdata = {
1230         &tegra11_spi_device4,
1231 };
1232
1233 static struct tegra_spi_platform_data pluto_spi_pdata = {
1234         .dma_req_sel            = 0,
1235         .spi_max_frequency      = 25000000,
1236         .clock_always_on        = false,
1237 };
1238
1239 static void __init pluto_spi_init(void)
1240 {
1241         struct board_info board_info, display_board_info;
1242
1243         tegra_get_board_info(&board_info);
1244         tegra_get_display_board_info(&display_board_info);
1245
1246         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1247         platform_add_devices(pluto_spi_devices,
1248                                 ARRAY_SIZE(pluto_spi_devices));
1249 }
1250 #else
1251 static void __init pluto_spi_init(void)
1252 {
1253 }
1254 #endif
1255
1256 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1257         /* name         parent          rate            enabled */
1258         { "extern2",    "pll_p",        41000000,       false},
1259         { "clk_out_2",  "extern2",      40800000,       false},
1260         { NULL,         NULL,           0,              0},
1261 };
1262
1263 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1264         .gpio_reset = 0,
1265         .config = 0,
1266         .platform_id = RM_PLATFORM_P005,
1267         .name_of_clock = "clk_out_2",
1268         .name_of_clock_con = "extern2",
1269 };
1270
1271 static struct tegra_spi_device_controller_data dev_cdata = {
1272         .rx_clk_tap_delay = 0,
1273         .tx_clk_tap_delay = 0,
1274 };
1275
1276 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1277         {
1278          .modalias = "rm_ts_spidev",
1279          .bus_num = 3,
1280          .chip_select = 2,
1281          .max_speed_hz = 12 * 1000 * 1000,
1282          .mode = SPI_MODE_0,
1283          .controller_data = &dev_cdata,
1284          .platform_data = &rm31080ts_pluto_data,
1285          },
1286 };
1287
1288 static int __init pluto_touch_init(void)
1289 {
1290         tegra_clk_init_from_table(touch_clk_init_table);
1291         rm31080a_pluto_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1292         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1293                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
1294                                 &rm31080ts_pluto_data,
1295                                 &rm31080a_pluto_spi_board[0],
1296                                 ARRAY_SIZE(rm31080a_pluto_spi_board));
1297         return 0;
1298 }
1299
1300 #ifdef CONFIG_EDP_FRAMEWORK
1301 static struct edp_manager battery_edp_manager = {
1302         .name = "battery",
1303         .max = 20000
1304 };
1305
1306 static void __init pluto_battery_edp_init(void)
1307 {
1308         struct edp_governor *g;
1309         int r;
1310
1311         r = edp_register_manager(&battery_edp_manager);
1312         if (r)
1313                 goto err_ret;
1314
1315         /* start with priority governor */
1316         g = edp_get_governor("priority");
1317         if (!g) {
1318                 r = -EFAULT;
1319                 goto err_ret;
1320         }
1321
1322         r = edp_set_governor(&battery_edp_manager, g);
1323         if (r)
1324                 goto err_ret;
1325
1326         return;
1327
1328 err_ret:
1329         pr_err("Battery EDP init failed with error %d\n", r);
1330         WARN_ON(1);
1331 }
1332 #else
1333 static inline void pluto_battery_edp_init(void) {}
1334 #endif
1335
1336 #ifdef CONFIG_USE_OF
1337 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1338         OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-dma", NULL),
1339         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1340                                 NULL),
1341         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1342                                 NULL),
1343         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1344                                 &pluto_tegra_sdhci_platform_data0),
1345         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1346                                 NULL),
1347         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
1348                                 NULL),
1349         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
1350                                 NULL),
1351         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
1352                                 NULL),
1353         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
1354                                 NULL),
1355         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
1356                                 NULL),
1357         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
1358                                 NULL),
1359         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
1360                                 NULL),
1361         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
1362                                 NULL),
1363         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
1364                                 NULL),
1365         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
1366                                 NULL),
1367         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
1368                                 NULL),
1369         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
1370                                 NULL),
1371         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
1372                                 NULL),
1373         {}
1374 };
1375 #endif
1376
1377 static void __init tegra_pluto_early_init(void)
1378 {
1379         pluto_battery_edp_init();
1380         tegra_clk_init_from_table(pluto_clk_init_table);
1381         tegra_clk_vefify_parents();
1382         tegra_smmu_init();
1383         tegra_soc_device_init("tegra_pluto");
1384 }
1385
1386 static void __init tegra_pluto_late_init(void)
1387 {
1388         platform_device_register(&tegra_pinmux_device);
1389         pluto_pinmux_init();
1390         pluto_i2c_init();
1391         pluto_spi_init();
1392         pluto_usb_init();
1393         pluto_xusb_init();
1394         pluto_uart_init();
1395         pluto_audio_init();
1396         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1397         //tegra_ram_console_debug_init();
1398         tegra_io_dpd_init();
1399         pluto_sdhci_init();
1400         pluto_regulator_init();
1401         pluto_suspend_init();
1402         pluto_touch_init();
1403         pluto_emc_init();
1404         pluto_edp_init();
1405         isomgr_init();
1406         pluto_panel_init();
1407         pluto_pmon_init();
1408         pluto_kbc_init();
1409 #ifdef CONFIG_BT_BLUESLEEP
1410         pluto_setup_bluesleep();
1411         pluto_setup_bt_rfkill();
1412 #elif defined CONFIG_BLUEDROID_PM
1413         pluto_setup_bluedroid_pm();
1414 #endif
1415         tegra_release_bootloader_fb();
1416         pluto_modem_init();
1417 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1418         tegra_wdt_recovery_init();
1419 #endif
1420         pluto_sensors_init();
1421         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1422         pluto_soctherm_init();
1423         tegra_register_fuse();
1424 }
1425
1426 static void __init pluto_ramconsole_reserve(unsigned long size)
1427 {
1428         tegra_ram_console_debug_reserve(SZ_1M);
1429 }
1430
1431 static void __init tegra_pluto_dt_init(void)
1432 {
1433         tegra_pluto_early_init();
1434
1435         of_platform_populate(NULL,
1436                 of_default_bus_match_table, pluto_auxdata_lookup,
1437                 &platform_bus);
1438
1439         tegra_pluto_late_init();
1440 }
1441
1442 static void __init tegra_pluto_reserve(void)
1443 {
1444 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1445         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1446         tegra_reserve(0, SZ_16M, SZ_4M);
1447 #else
1448         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1449 #endif
1450         pluto_ramconsole_reserve(SZ_1M);
1451 }
1452
1453 static const char * const pluto_dt_board_compat[] = {
1454         "nvidia,pluto",
1455         NULL
1456 };
1457
1458 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1459         .atag_offset    = 0x100,
1460         .smp            = smp_ops(tegra_smp_ops),
1461         .map_io         = tegra_map_common_io,
1462         .reserve        = tegra_pluto_reserve,
1463         .init_early     = tegra11x_init_early,
1464         .init_irq       = tegra_dt_init_irq,
1465         .handle_irq     = gic_handle_irq,
1466         .timer          = &tegra_sys_timer,
1467         .init_machine   = tegra_pluto_dt_init,
1468         .restart        = tegra_assert_system_reset,
1469         .dt_compat      = pluto_dt_board_compat,
1470 MACHINE_END