ARM: tegra11: dalmore/pluto: Add AUXDATA for APB DMA
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/edp.h>
54 #include <linux/mfd/tlv320aic3262-registers.h>
55 #include <linux/mfd/tlv320aic3xxx-core.h>
56 #include <linux/usb/tegra_usb_phy.h>
57
58 #include <asm/hardware/gic.h>
59
60 #include <mach/clk.h>
61 #include <mach/iomap.h>
62 #include <mach/irqs.h>
63 #include <mach/pinmux.h>
64 #include <mach/pinmux-t11.h>
65 #include <mach/iomap.h>
66 #include <mach/io_dpd.h>
67 #include <mach/i2s.h>
68 #include <mach/isomgr.h>
69 #include <mach/tegra_asoc_pdata.h>
70 #include <asm/mach-types.h>
71 #include <asm/mach/arch.h>
72 #include <mach/gpio-tegra.h>
73 #include <mach/tegra_fiq_debugger.h>
74 #include <mach/tegra-bb-power.h>
75 #include <mach/tegra_usb_modem_power.h>
76 #include <mach/tegra_wakeup_monitor.h>
77
78 #include "board.h"
79 #include "board-common.h"
80 #include "board-touch-raydium.h"
81 #include "clock.h"
82 #include "board-pluto.h"
83 #include "baseband-xmm-power.h"
84 #include "tegra-board-id.h"
85 #include "devices.h"
86 #include "gpio-names.h"
87 #include "fuse.h"
88 #include "pm.h"
89 #include "common.h"
90
91 #ifdef CONFIG_BT_BLUESLEEP
92 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
93         .name           = "bt_rfkill",
94         .shutdown_gpio  = TEGRA_GPIO_PQ7,
95         .reset_gpio     = TEGRA_GPIO_PQ6,
96         .type           = RFKILL_TYPE_BLUETOOTH,
97 };
98
99 static struct platform_device pluto_bt_rfkill_device = {
100         .name = "rfkill_gpio",
101         .id             = -1,
102         .dev = {
103                 .platform_data = &pluto_bt_rfkill_pdata,
104         },
105 };
106
107 static noinline void __init pluto_setup_bt_rfkill(void)
108 {
109         platform_device_register(&pluto_bt_rfkill_device);
110 }
111
112 static struct resource pluto_bluesleep_resources[] = {
113         [0] = {
114                 .name = "gpio_host_wake",
115                         .start  = TEGRA_GPIO_PU6,
116                         .end    = TEGRA_GPIO_PU6,
117                         .flags  = IORESOURCE_IO,
118         },
119         [1] = {
120                 .name = "gpio_ext_wake",
121                         .start  = TEGRA_GPIO_PEE1,
122                         .end    = TEGRA_GPIO_PEE1,
123                         .flags  = IORESOURCE_IO,
124         },
125         [2] = {
126                 .name = "host_wake",
127                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
128         },
129 };
130
131 static struct platform_device pluto_bluesleep_device = {
132         .name           = "bluesleep",
133         .id             = -1,
134         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
135         .resource       = pluto_bluesleep_resources,
136 };
137
138 static noinline void __init pluto_setup_bluesleep(void)
139 {
140         pluto_bluesleep_resources[2].start =
141                 pluto_bluesleep_resources[2].end =
142                         gpio_to_irq(TEGRA_GPIO_PU6);
143         platform_device_register(&pluto_bluesleep_device);
144         return;
145 }
146 #elif defined CONFIG_BLUEDROID_PM
147 static struct resource pluto_bluedroid_pm_resources[] = {
148         [0] = {
149                 .name   = "shutdown_gpio",
150                 .start  = TEGRA_GPIO_PQ7,
151                 .end    = TEGRA_GPIO_PQ7,
152                 .flags  = IORESOURCE_IO,
153         },
154         [1] = {
155                 .name = "host_wake",
156                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
157         },
158         [2] = {
159                 .name = "gpio_ext_wake",
160                 .start  = TEGRA_GPIO_PEE1,
161                 .end    = TEGRA_GPIO_PEE1,
162                 .flags  = IORESOURCE_IO,
163         },
164         [3] = {
165                 .name = "gpio_host_wake",
166                 .start  = TEGRA_GPIO_PU6,
167                 .end    = TEGRA_GPIO_PU6,
168                 .flags  = IORESOURCE_IO,
169         },
170         [4] = {
171                 .name = "reset_gpio",
172                 .start  = TEGRA_GPIO_PQ6,
173                 .end    = TEGRA_GPIO_PQ6,
174                 .flags  = IORESOURCE_IO,
175         },
176 };
177
178 static struct platform_device pluto_bluedroid_pm_device = {
179         .name = "bluedroid_pm",
180         .id             = 0,
181         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
182         .resource       = pluto_bluedroid_pm_resources,
183 };
184
185 static noinline void __init pluto_setup_bluedroid_pm(void)
186 {
187         pluto_bluedroid_pm_resources[1].start =
188                 pluto_bluedroid_pm_resources[1].end =
189                                         gpio_to_irq(TEGRA_GPIO_PU6);
190         platform_device_register(&pluto_bluedroid_pm_device);
191 }
192 #endif
193
194 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
195         /* name         parent          rate            enabled */
196         { "pll_m",      NULL,           0,              false},
197         { "hda",        "pll_p",        108000000,      false},
198         { "hda2codec_2x", "pll_p",      48000000,       false},
199         { "pwm",        "pll_p",        3187500,        false},
200         { "i2s1",       "pll_a_out0",   0,              false},
201         { "i2s2",       "pll_a_out0",   0,              false},
202         { "i2s3",       "pll_a_out0",   0,              false},
203         { "i2s4",       "pll_a_out0",   0,              false},
204         { "spdif_out",  "pll_a_out0",   0,              false},
205         { "d_audio",    "clk_m",        12000000,       false},
206         { "dam0",       "clk_m",        12000000,       false},
207         { "dam1",       "clk_m",        12000000,       false},
208         { "dam2",       "clk_m",        12000000,       false},
209         { "audio0",     "i2s0_sync",    0,              false},
210         { "audio1",     "i2s1_sync",    0,              false},
211         { "audio2",     "i2s2_sync",    0,              false},
212         { "audio3",     "i2s3_sync",    0,              false},
213         { "audio4",     "i2s4_sync",    0,              false},
214         { "vi_sensor",  "pll_p",        150000000,      false},
215         { "cilab",      "pll_p",        150000000,      false},
216         { "cilcd",      "pll_p",        150000000,      false},
217         { "cile",       "pll_p",        150000000,      false},
218         { "i2c1",       "pll_p",        3200000,        false},
219         { "i2c2",       "pll_p",        3200000,        false},
220         { "i2c3",       "pll_p",        3200000,        false},
221         { "i2c4",       "pll_p",        3200000,        false},
222         { "i2c5",       "pll_p",        3200000,        false},
223         { "extern3",    "clk_m",        12000000,       false},
224         { NULL,         NULL,           0,              0},
225 };
226
227 static struct bcm2079x_platform_data nfc_pdata = {
228         .irq_gpio = TEGRA_GPIO_PW2,
229         .en_gpio = TEGRA_GPIO_PU4,
230         .wake_gpio = TEGRA_GPIO_PX7,
231         };
232
233 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
234         {
235                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
236                 .platform_data = &nfc_pdata,
237         },
238 };
239
240 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
241         .bus_clk_rate   = 100000,
242         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
243         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
244 };
245
246 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
247         .bus_clk_rate   = 100000,
248         .is_clkon_always = true,
249         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
250         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
251 };
252
253 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
254         .bus_clk_rate   = 100000,
255         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
256         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
257 };
258
259 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
260         .bus_clk_rate   = 10000,
261         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
262         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
263 };
264
265 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
266         .bus_clk_rate   = 400000,
267         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
268         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
269 };
270
271 static struct aic3262_gpio_setup aic3262_gpio[] = {
272         /* GPIO 1*/
273         {
274                 .used = 1,
275                 .in = 0,
276                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
277         },
278         /* GPIO 2*/
279         {
280                 .used = 1,
281                 .in = 0,
282                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
283         },
284         /* GPIO 1 */
285         {
286                 .used = 0,
287         },
288         /* GPI2 */
289         {
290                 .used = 1,
291                 .in = 1,
292                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
293                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
294                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
295                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
296         },
297         /* GPO1 */
298         {
299                 .used = 0,
300                 .value = AIC3262_GPO1_FUNC_DISABLED,
301         },
302 };
303 static struct aic3xxx_pdata aic3262_codec_pdata = {
304         .gpio_irq       = 0,
305         .gpio           = aic3262_gpio,
306         .naudint_irq    = 0,
307         .irq_base       = AIC3262_CODEC_IRQ_BASE,
308 };
309
310 static struct i2c_board_info __initdata cs42l73_board_info = {
311         I2C_BOARD_INFO("cs42l73", 0x4a),
312 };
313
314 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
315         I2C_BOARD_INFO("audience_a2220", 0x3E),
316 };
317
318 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
319         I2C_BOARD_INFO("tlv320aic3262", 0x18),
320         .platform_data = &aic3262_codec_pdata,
321 };
322
323 static void pluto_i2c_init(void)
324 {
325         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
326         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
327         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
328         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
329         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
330
331         platform_device_register(&tegra11_i2c_device5);
332         platform_device_register(&tegra11_i2c_device4);
333         platform_device_register(&tegra11_i2c_device3);
334         platform_device_register(&tegra11_i2c_device2);
335         platform_device_register(&tegra11_i2c_device1);
336
337         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
338         i2c_register_board_info(0, &cs42l73_board_info, 1);
339         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
340         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
341         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
342 }
343
344 static struct platform_device *pluto_uart_devices[] __initdata = {
345         &tegra_uarta_device,
346         &tegra_uartb_device,
347         &tegra_uartc_device,
348         &tegra_uartd_device,
349 };
350 static struct uart_clk_parent uart_parent_clk[] = {
351         [0] = {.name = "clk_m"},
352         [1] = {.name = "pll_p"},
353 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
354         [2] = {.name = "pll_m"},
355 #endif
356 };
357
358 static struct tegra_uart_platform_data pluto_uart_pdata;
359 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
360
361 static void __init uart_debug_init(void)
362 {
363         int debug_port_id;
364
365         debug_port_id = uart_console_debug_init(3);
366         if (debug_port_id < 0)
367                 return;
368         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
369 }
370
371 static void __init pluto_uart_init(void)
372 {
373         struct clk *c;
374         int i;
375
376         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
377                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
378                 if (IS_ERR_OR_NULL(c)) {
379                         pr_err("Not able to get the clock for %s\n",
380                                                 uart_parent_clk[i].name);
381                         continue;
382                 }
383                 uart_parent_clk[i].parent_clk = c;
384                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
385         }
386         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
387         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
388         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
389         pluto_loopback_uart_pdata.parent_clk_count =
390                                                 ARRAY_SIZE(uart_parent_clk);
391         pluto_loopback_uart_pdata.is_loopback = true;
392         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
393         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
394         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
395         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
396
397         /* Register low speed only if it is selected */
398         if (!is_tegra_debug_uartport_hs())
399                 uart_debug_init();
400
401         platform_add_devices(pluto_uart_devices,
402                                 ARRAY_SIZE(pluto_uart_devices));
403 }
404
405 static struct resource tegra_rtc_resources[] = {
406         [0] = {
407                 .start = TEGRA_RTC_BASE,
408                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
409                 .flags = IORESOURCE_MEM,
410         },
411         [1] = {
412                 .start = INT_RTC,
413                 .end = INT_RTC,
414                 .flags = IORESOURCE_IRQ,
415         },
416 };
417
418 static struct platform_device tegra_rtc_device = {
419         .name = "tegra_rtc",
420         .id   = -1,
421         .resource = tegra_rtc_resources,
422         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
423 };
424
425 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
426 static struct tegra_wakeup_monitor_platform_data
427                         pluto_tegra_wakeup_monitor_pdata = {
428         .wifi_wakeup_source     = 6,
429 };
430
431 static struct platform_device pluto_tegra_wakeup_monitor_device = {
432         .name = "tegra_wakeup_monitor",
433         .id   = -1,
434         .dev  = {
435                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
436         },
437 };
438 #endif
439
440 static struct tegra_asoc_platform_data pluto_audio_pdata = {
441         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
442         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
443         .gpio_hp_mute           = -1,
444         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
445         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
446         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
447         .i2s_param[HIFI_CODEC]  = {
448                 .audio_port_id  = 1,
449                 .is_i2s_master  = 0,
450                 .i2s_mode       = TEGRA_DAIFMT_I2S,
451                 .sample_size    = 16,
452                 .channels       = 2,
453         },
454         .i2s_param[BASEBAND]    = {
455                 .audio_port_id  = 2,
456                 .is_i2s_master  = 1,
457                 .i2s_mode       = TEGRA_DAIFMT_I2S,
458                 .sample_size    = 16,
459                 .rate           = 16000,
460                 .channels       = 2,
461                 .bit_clk        = 1024000,
462         },
463         .i2s_param[BT_SCO]      = {
464                 .audio_port_id  = 3,
465                 .is_i2s_master  = 1,
466                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
467                 .sample_size    = 16,
468                 .channels       = 1,
469                 .bit_clk        = 512000,
470         },
471         .i2s_param[VOICE_CODEC] = {
472                 .audio_port_id  = 0,
473                 .is_i2s_master  = 1,
474                 .i2s_mode       = TEGRA_DAIFMT_I2S,
475                 .sample_size    = 16,
476                 .rate           = 16000,
477                 .channels       = 2,
478         },
479 };
480
481 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
482         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
483         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
484         .gpio_hp_mute           = -1,
485         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
486         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
487         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
488         .i2s_param[HIFI_CODEC]  = {
489                 .audio_port_id  = 1,
490                 .is_i2s_master  = 1,
491                 .i2s_mode       = TEGRA_DAIFMT_I2S,
492                 .sample_size    = 16,
493                 .channels       = 2,
494         },
495         .i2s_param[BASEBAND]    = {
496                 .audio_port_id  = 2,
497                 .is_i2s_master  = 1,
498                 .i2s_mode       = TEGRA_DAIFMT_I2S,
499                 .sample_size    = 16,
500                 .rate           = 16000,
501                 .channels       = 2,
502                 .bit_clk        = 1024000,
503         },
504         .i2s_param[BT_SCO]      = {
505                 .audio_port_id  = 3,
506                 .is_i2s_master  = 1,
507                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
508                 .sample_size    = 16,
509                 .channels       = 1,
510                 .bit_clk        = 512000,
511         },
512         .i2s_param[VOICE_CODEC] = {
513                 .audio_port_id  = 0,
514                 .is_i2s_master  = 1,
515                 .i2s_mode       = TEGRA_DAIFMT_I2S,
516                 .sample_size    = 16,
517                 .rate           = 16000,
518                 .channels       = 2,
519         },
520 };
521
522 static struct platform_device pluto_audio_device = {
523         .name   = "tegra-snd-cs42l73",
524         .id     = 2,
525         .dev    = {
526                 .platform_data = &pluto_audio_pdata,
527         },
528 };
529
530 static struct platform_device pluto_audio_aic326x_device = {
531         .name   = "tegra-snd-aic326x",
532         .id     = 2,
533         .dev    = {
534                 .platform_data  = &pluto_aic3262_pdata,
535         },
536 };
537
538 #ifndef CONFIG_USE_OF
539 static struct platform_device tegra_camera = {
540         .name = "tegra_camera",
541         .id = -1,
542 };
543 #endif
544
545 #ifdef CONFIG_MHI_NETDEV
546 struct platform_device mhi_netdevice0 = {
547         .name = "mhi_net_device",
548         .id = 0,
549 };
550 #endif /* CONFIG_MHI_NETDEV */
551
552 static struct platform_device *pluto_devices[] __initdata = {
553         &tegra_pmu_device,
554         &tegra_rtc_device,
555         &tegra_udc_device,
556 #if defined(CONFIG_TEGRA_AVP)
557         &tegra_avp_device,
558 #endif
559 #ifndef CONFIG_USE_OF
560         &tegra_camera,
561 #endif
562 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
563         &tegra11_se_device,
564 #endif
565         &tegra_ahub_device,
566         &tegra_dam_device0,
567         &tegra_dam_device1,
568         &tegra_dam_device2,
569         &tegra_i2s_device0,
570         &tegra_i2s_device1,
571         &tegra_i2s_device2,
572         &tegra_i2s_device3,
573         &tegra_i2s_device4,
574         &tegra_spdif_device,
575         &spdif_dit_device,
576         &bluetooth_dit_device,
577         &baseband_dit_device,
578 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
579         &pluto_tegra_wakeup_monitor_device,
580 #endif
581         &pluto_audio_device,
582         &pluto_audio_aic326x_device,
583         &tegra_hda_device,
584 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
585         &tegra_aes_device,
586 #endif
587 #ifdef CONFIG_MHI_NETDEV
588         &mhi_netdevice0,  /* MHI netdevice */
589 #endif /* CONFIG_MHI_NETDEV */
590 };
591
592 #ifdef CONFIG_USB_SUPPORT
593
594 static void pluto_usb_hsic_postsupend(void)
595 {
596         pr_debug("%s\n", __func__);
597 #ifdef CONFIG_TEGRA_BB_XMM_POWER
598         baseband_xmm_set_power_status(BBXMM_PS_L2);
599 #endif
600 }
601
602 static void pluto_usb_hsic_preresume(void)
603 {
604         pr_debug("%s\n", __func__);
605 #ifdef CONFIG_TEGRA_BB_XMM_POWER
606         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
607 #endif
608 }
609
610 static void pluto_usb_hsic_post_resume(void)
611 {
612         pr_debug("%s\n", __func__);
613 #ifdef CONFIG_TEGRA_BB_XMM_POWER
614         baseband_xmm_set_power_status(BBXMM_PS_L0);
615 #endif
616 }
617
618 static void pluto_usb_hsic_phy_power(void)
619 {
620         pr_debug("%s\n", __func__);
621 #ifdef CONFIG_TEGRA_BB_XMM_POWER
622         baseband_xmm_set_power_status(BBXMM_PS_L0);
623 #endif
624 }
625
626 static void pluto_usb_hsic_post_phy_off(void)
627 {
628         pr_debug("%s\n", __func__);
629 #ifdef CONFIG_TEGRA_BB_XMM_POWER
630         baseband_xmm_set_power_status(BBXMM_PS_L2);
631 #endif
632 }
633
634 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
635         .post_suspend = pluto_usb_hsic_postsupend,
636         .pre_resume = pluto_usb_hsic_preresume,
637         .port_power = pluto_usb_hsic_phy_power,
638         .post_resume = pluto_usb_hsic_post_resume,
639         .post_phy_off = pluto_usb_hsic_post_phy_off,
640 };
641
642 static struct tegra_usb_platform_data tegra_ehci3_hsic_xmm_pdata = {
643         .port_otg = false,
644         .has_hostpc = true,
645         .unaligned_dma_buf_supported = false,
646         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
647         .op_mode        = TEGRA_USB_OPMODE_HOST,
648         .u_data.host = {
649                 .vbus_gpio = -1,
650                 .hot_plug = false,
651                 .remote_wakeup_supported = false,
652                 .power_off_on_suspend = false,
653         },
654         .ops = &oem2_plat_ops,
655 };
656
657 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
658         .port_otg = false,
659         .has_hostpc = true,
660         .unaligned_dma_buf_supported = false,
661         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
662         .op_mode        = TEGRA_USB_OPMODE_HOST,
663         .u_data.host = {
664                 .vbus_gpio = -1,
665                 .hot_plug = false,
666                 .remote_wakeup_supported = true,
667                 .power_off_on_suspend = true,
668         },
669 };
670
671 static struct tegra_usb_platform_data tegra_udc_pdata = {
672         .port_otg = true,
673         .has_hostpc = true,
674         .builtin_host_disabled = true,
675         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
676         .op_mode = TEGRA_USB_OPMODE_DEVICE,
677         .u_data.dev = {
678                 .vbus_pmu_irq = 0,
679                 .vbus_gpio = -1,
680                 .charging_supported = false,
681                 .remote_wakeup_supported = false,
682         },
683         .u_cfg.utmi = {
684                 .hssync_start_delay = 0,
685                 .elastic_limit = 16,
686                 .idle_wait_delay = 17,
687                 .term_range_adj = 6,
688                 .xcvr_setup = 8,
689                 .xcvr_lsfslew = 2,
690                 .xcvr_lsrslew = 2,
691                 .xcvr_setup_offset = 0,
692                 .xcvr_use_fuses = 1,
693         },
694 };
695
696 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
697         .port_otg = true,
698         .has_hostpc = true,
699         .builtin_host_disabled = true,
700         .unaligned_dma_buf_supported = false,
701         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
702         .op_mode = TEGRA_USB_OPMODE_HOST,
703         .u_data.host = {
704                 .vbus_gpio = -1,
705                 .hot_plug = false,
706                 .remote_wakeup_supported = true,
707                 .power_off_on_suspend = true,
708         },
709         .u_cfg.utmi = {
710                 .hssync_start_delay = 0,
711                 .elastic_limit = 16,
712                 .idle_wait_delay = 17,
713                 .term_range_adj = 6,
714                 .xcvr_setup = 15,
715                 .xcvr_lsfslew = 2,
716                 .xcvr_lsrslew = 2,
717                 .xcvr_setup_offset = 0,
718                 .xcvr_use_fuses = 1,
719                 .vbus_oc_map = 0x7,
720         },
721 };
722
723 static struct tegra_usb_otg_data tegra_otg_pdata = {
724         .ehci_device = &tegra_ehci1_device,
725         .ehci_pdata = &tegra_ehci1_utmi_pdata,
726 };
727
728 static struct regulator *baseband_reg;
729 static struct gpio modem_gpios[] = { /* i500 modem */
730         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
731 };
732
733 static struct gpio modem2_gpios[] = {
734         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
735         {MDM2_RST, GPIOF_DIR_OUT, "MODEM2 RESET"},
736         {MDM2_ACK2, GPIOF_OUT_INIT_HIGH, "MODEM2 ACK2"},
737         {MDM2_ACK1, GPIOF_OUT_INIT_LOW, "MODEM2 ACK1"},
738 };
739
740 static void baseband2_post_phy_on(void);
741 static void baseband2_pre_phy_off(void);
742
743 static struct tegra_usb_phy_platform_ops baseband2_plat_ops = {
744         .pre_phy_off = baseband2_pre_phy_off,
745         .post_phy_on = baseband2_post_phy_on,
746 };
747
748 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
749         .port_otg = false,
750         .has_hostpc = true,
751         .unaligned_dma_buf_supported = false,
752         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
753         .op_mode = TEGRA_USB_OPMODE_HOST,
754         .u_data.host = {
755                 .vbus_gpio = -1,
756                 .hot_plug = false,
757                 .remote_wakeup_supported = true,
758                 .power_off_on_suspend = true,
759         },
760 };
761
762 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
763         .port_otg = false,
764         .has_hostpc = true,
765         .unaligned_dma_buf_supported = false,
766         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
767         .op_mode = TEGRA_USB_OPMODE_HOST,
768         .u_data.host = {
769                 .vbus_gpio = -1,
770                 .hot_plug = false,
771                 .remote_wakeup_supported = true,
772                 .power_off_on_suspend = true,
773         },
774         .ops = &baseband2_plat_ops,
775 };
776
777 static struct tegra_usb_platform_data tegra_hsic_pdata = {
778         .port_otg = false,
779         .has_hostpc = true,
780         .unaligned_dma_buf_supported = false,
781         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
782         .op_mode        = TEGRA_USB_OPMODE_HOST,
783         .u_data.host = {
784                 .vbus_gpio = -1,
785                 .hot_plug = false,
786                 .remote_wakeup_supported = true,
787                 .power_off_on_suspend = true,
788         },
789 };
790
791 static struct platform_device *
792 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
793 {
794         struct platform_device *pdev;
795         int val;
796
797         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
798         if (!pdev)
799                 return NULL;
800
801         val = platform_device_add_resources(pdev, ehci_dev->resource,
802                                                 ehci_dev->num_resources);
803         if (val)
804                 goto error;
805
806         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
807         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
808
809         val = platform_device_add_data(pdev, &tegra_ehci3_hsic_xmm_pdata,
810                         sizeof(struct tegra_usb_platform_data));
811         if (val)
812                 goto error;
813
814         val = platform_device_add(pdev);
815         if (val)
816                 goto error;
817
818         return pdev;
819
820 error:
821         pr_err("%s: failed to add the host contoller device\n", __func__);
822         platform_device_put(pdev);
823         return NULL;
824 }
825
826 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
827 {
828         struct platform_device *pdev = *platdev;
829
830         if (pdev && &pdev->dev) {
831                 platform_device_unregister(pdev);
832                 *platdev = NULL;
833         } else
834                 pr_err("%s: no platform device\n", __func__);
835 }
836
837 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
838
839 static union tegra_bb_gpio_id bb_gpio_oem1 = {
840         .oem1 = {
841                 .reset = BB_OEM1_GPIO_RST,
842                 .pwron = BB_OEM1_GPIO_ON,
843                 .awr = BB_OEM1_GPIO_AWR,
844                 .cwr = BB_OEM1_GPIO_CWR,
845                 .spare = BB_OEM1_GPIO_SPARE,
846                 .wdi = BB_OEM1_GPIO_WDI,
847         },
848 };
849
850 static struct tegra_bb_pdata bb_pdata_oem1 = {
851         .id = &bb_gpio_oem1,
852         .device = &tegra_ehci3_device,
853         .ehci_register = tegra_usb_hsic_host_register,
854         .ehci_unregister = tegra_usb_hsic_host_unregister,
855         .bb_id = TEGRA_BB_OEM1,
856 };
857
858 static struct platform_device tegra_bb_oem1 = {
859         .name = "tegra_baseband_power",
860         .id = -1,
861         .dev = {
862                 .platform_data = &bb_pdata_oem1,
863         },
864 };
865
866 static int baseband_init(void)
867 {
868         int ret;
869
870         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
871         if (ret) {
872                 pr_warn("%s:gpio request failed\n", __func__);
873                 return ret;
874         }
875
876         baseband_reg = regulator_get(NULL, "vdd_core_bb");
877         if (IS_ERR_OR_NULL(baseband_reg))
878                 pr_warn("%s: baseband regulator get failed\n", __func__);
879         else
880                 regulator_enable(baseband_reg);
881
882         /* enable pull-down for MDM1_COLD_BOOT */
883         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
884                                     TEGRA_PUPD_PULL_DOWN);
885
886         /* export GPIO for user space access through sysfs */
887         gpio_export(MDM_RST, false);
888
889         return 0;
890 }
891
892 static const struct tegra_modem_operations baseband_operations = {
893         .init = baseband_init,
894 };
895
896 #define MODEM_BOOT_EDP_MAX 0
897 /* FIXME: get accurate boot current value */
898 static unsigned int modem_boot_edp_states[] = { 1900 };
899 static struct edp_client modem_boot_edp_client = {
900         .name = "modem_boot",
901         .states = modem_boot_edp_states,
902         .num_states = ARRAY_SIZE(modem_boot_edp_states),
903         .e0_index = MODEM_BOOT_EDP_MAX,
904         .priority = EDP_MAX_PRIO,
905 };
906
907 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
908         .ops = &baseband_operations,
909         .wake_gpio = -1,
910         .boot_gpio = MDM_COLDBOOT,
911         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
912         .autosuspend_delay = 2000,
913         .short_autosuspend_delay = 50,
914         .tegra_ehci_device = &tegra_ehci2_device,
915         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
916         .modem_boot_edp_client = &modem_boot_edp_client,
917         .edp_manager_name = "battery",
918         .i_breach_ppm = 500000,
919         /* FIXME: get useful adjperiods */
920         .i_thresh_3g_adjperiod = 10000,
921         .i_thresh_lte_adjperiod = 10000,
922 };
923
924 static struct platform_device icera_baseband_device = {
925         .name = "tegra_usb_modem_power",
926         .id = -1,
927         .dev = {
928                 .platform_data = &baseband_pdata,
929         },
930 };
931
932 static void baseband2_post_phy_on(void)
933 {
934         /* set MDM2_ACK2 low */
935         gpio_set_value(MDM2_ACK2, 0);
936 }
937
938 static void baseband2_pre_phy_off(void)
939 {
940         /* set MDM2_ACK2 high */
941         gpio_set_value(MDM2_ACK2, 1);
942 }
943
944 static void baseband2_start(void)
945 {
946         /*
947          *  Leave baseband powered OFF.
948          *  User-space daemons will take care of powering it up.
949          */
950         pr_info("%s\n", __func__);
951         gpio_set_value(MDM2_PWR_ON, 0);
952 }
953
954 static void baseband2_reset(void)
955 {
956         /* Initiate power cycle on baseband sub system */
957         pr_info("%s\n", __func__);
958         gpio_set_value(MDM2_PWR_ON, 0);
959         mdelay(200);
960         gpio_set_value(MDM2_PWR_ON, 1);
961 }
962
963 static int baseband2_init(void)
964 {
965         int ret;
966
967         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
968         if (ret)
969                 return ret;
970
971         /* enable pull-up for MDM2_REQ2 */
972         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PV1,
973                                     TEGRA_PUPD_PULL_UP);
974
975         /* export GPIO for user space access through sysfs */
976         gpio_export(MDM2_PWR_ON, false);
977
978         return 0;
979 }
980
981 static const struct tegra_modem_operations baseband2_operations = {
982         .init = baseband2_init,
983         .start = baseband2_start,
984         .reset = baseband2_reset,
985 };
986
987 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
988         .ops = &baseband2_operations,
989         .wake_gpio = MDM2_REQ2,
990         .wake_irq_flags = IRQF_TRIGGER_FALLING,
991         .boot_gpio = MDM2_COLDBOOT,
992         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
993         .autosuspend_delay = 2000,
994         .short_autosuspend_delay = 50,
995         .tegra_ehci_device = &tegra_ehci3_device,
996         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
997 };
998
999 static struct platform_device icera_baseband2_device = {
1000         .name = "tegra_usb_modem_power",
1001         .id = -1,
1002         .dev = {
1003                 .platform_data = &baseband2_pdata,
1004         },
1005 };
1006
1007 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
1008         .baseband_type = BASEBAND_XMM,
1009         .modem = {
1010                 .xmm = {
1011                         .bb_rst = XMM_GPIO_BB_RST,
1012                         .bb_on = XMM_GPIO_BB_ON,
1013                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1014                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1015                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1016                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1017                 },
1018         },
1019 };
1020
1021 static struct platform_device tegra_baseband_xmm_power_device = {
1022         .name = "baseband_xmm_power",
1023         .id = -1,
1024         .dev = {
1025                 .platform_data = &tegra_baseband_xmm_power_data,
1026         },
1027 };
1028
1029 static struct platform_device tegra_baseband_xmm_power2_device = {
1030         .name = "baseband_xmm_power2",
1031         .id = -1,
1032         .dev = {
1033                 .platform_data = &tegra_baseband_xmm_power_data,
1034         },
1035 };
1036
1037 static void pluto_usb_init(void)
1038 {
1039         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1040
1041         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1042                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1043                 platform_device_register(&tegra_otg_device);
1044
1045                 /* Setup the udc platform data */
1046                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1047         }
1048 }
1049
1050 static void pluto_modem_init(void)
1051 {
1052         int modem_id = tegra_get_modem_id();
1053         struct board_info board_info;
1054         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1055
1056         tegra_get_board_info(&board_info);
1057         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1058
1059         switch (modem_id) {
1060         case TEGRA_BB_I500: /* on board i500 HSIC */
1061                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
1062                         platform_device_register(&icera_baseband_device);
1063                 break;
1064         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1065                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
1066                         platform_device_register(&icera_baseband2_device);
1067                 break;
1068         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1069                 if ((board_info.board_id == BOARD_E1575) ||
1070                         ((board_info.board_id == BOARD_E1580) &&
1071                                 (board_info.fab >= BOARD_FAB_A03))) {
1072                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1073                                                         TEGRA_TRI_NORMAL);
1074                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1075                 }
1076                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1077                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1078                         tegra_ehci3_device.dev.platform_data
1079                                 = &tegra_hsic_pdata;
1080                         platform_device_register(&tegra_bb_oem1);
1081                 }
1082                 break;
1083         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1084                 /* fix wrong wiring in Pluto A02 */
1085                 if ((board_info.board_id == BOARD_E1580) &&
1086                         (board_info.fab == BOARD_FAB_A02)) {
1087                         pr_info(
1088 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1089                                 __func__);
1090                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1091                                 != MDM2_PWR_ON)
1092                                 pr_err(
1093 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1094                                         __func__);
1095                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1096                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1097                 }
1098                 /* baseband-power.ko will register ehci3 device */
1099                 tegra_ehci3_device.dev.platform_data =
1100                                         &tegra_ehci3_hsic_xmm_pdata;
1101                 tegra_baseband_xmm_power_data.hsic_register =
1102                                                 &tegra_usb_hsic_host_register;
1103                 tegra_baseband_xmm_power_data.hsic_unregister =
1104                                                 &tegra_usb_hsic_host_unregister;
1105                 tegra_baseband_xmm_power_data.ehci_device =
1106                                         &tegra_ehci3_device;
1107                 platform_device_register(&tegra_baseband_xmm_power_device);
1108                 platform_device_register(&tegra_baseband_xmm_power2_device);
1109                 /* override audio settings - use 8kHz */
1110                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1111                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1112                         = 2;
1113                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1114                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1115                         = 1;
1116                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1117                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1118                         = TEGRA_DAIFMT_I2S;
1119                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1120                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1121                         = 16;
1122                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1123                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1124                         = 8000;
1125                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1126                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1127                         = 2;
1128                 break;
1129         case TEGRA_BB_HSIC_HUB: /* i500 SWD HSIC */
1130                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1131                         tegra_ehci3_device.dev.platform_data =
1132                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1133                         platform_device_register(&tegra_ehci3_device);
1134                 }
1135                 break;
1136         default:
1137                 return;
1138         }
1139 }
1140
1141 static struct tegra_xusb_pad_data xusb_padctl_data = {
1142         .pad_mux = 0x1,
1143         .port_cap = 0x1,
1144         .snps_oc_map = 0x1ff,
1145         .usb2_oc_map = 0x3c,
1146         .ss_port_map = 0x2,
1147         .oc_det = 0,
1148         .rx_wander = 0xf0,
1149         .otg_pad0_ctl0 = 0xffc7ffff,
1150         .otg_pad0_ctl1 = 0x7,
1151         .otg_pad1_ctl0 = 0xffffffff,
1152         .otg_pad1_ctl1 = 0,
1153         .bias_pad_ctl0 = 0,
1154         .hsic_pad0_ctl0 = 0xffff00ff,
1155         .hsic_pad0_ctl1 = 0xffff00ff,
1156         .pmc_value = 0xfffffff0,
1157 };
1158
1159 static void pluto_xusb_init(void)
1160 {
1161         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1162
1163         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1164                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1165
1166                 /*
1167                  * read from usb_calib0 and pass to driver
1168                  * set HS_CURR_LEVEL = usb_calib0[5:0]
1169                  * set TERM_RANGE_ADJ = usb_calib0[10:7]
1170                  * set HS_IREF_CAP = usb_calib0[14:13]
1171                  * set HS_SQUELCH_LEVEL = usb_calib0[12:11]
1172                  */
1173
1174                 xusb_padctl_data.hs_curr_level = (usb_calib0 >> 0) & 0x3f;
1175                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1176                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1177                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1178
1179                 tegra_xhci_device.dev.platform_data = &xusb_padctl_data;
1180                 platform_device_register(&tegra_xhci_device);
1181         }
1182 }
1183 #else
1184 static void pluto_usb_init(void) { }
1185 static void pluto_modem_init(void) { }
1186 static void pluto_xusb_init(void) { }
1187 #endif
1188
1189 static void pluto_audio_init(void)
1190 {
1191         struct board_info board_info;
1192
1193         tegra_get_board_info(&board_info);
1194
1195 }
1196
1197 static struct platform_device *pluto_spi_devices[] __initdata = {
1198         &tegra11_spi_device4,
1199 };
1200
1201 struct spi_clk_parent spi_parent_clk_pluto[] = {
1202         [0] = {.name = "pll_p"},
1203 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
1204         [1] = {.name = "pll_m"},
1205         [2] = {.name = "clk_m"},
1206 #else
1207         [1] = {.name = "clk_m"},
1208 #endif
1209 };
1210
1211 static struct tegra_spi_platform_data pluto_spi_pdata = {
1212         .is_dma_based           = false,
1213         .max_dma_buffer         = 16 * 1024,
1214         .is_clkon_always        = false,
1215         .max_rate               = 25000000,
1216 };
1217
1218 static void __init pluto_spi_init(void)
1219 {
1220         int i;
1221         struct clk *c;
1222         struct board_info board_info, display_board_info;
1223
1224         tegra_get_board_info(&board_info);
1225         tegra_get_display_board_info(&display_board_info);
1226
1227         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_pluto); ++i) {
1228                 c = tegra_get_clock_by_name(spi_parent_clk_pluto[i].name);
1229                 if (IS_ERR_OR_NULL(c)) {
1230                         pr_err("Not able to get the clock for %s\n",
1231                                                 spi_parent_clk_pluto[i].name);
1232                         continue;
1233                 }
1234                 spi_parent_clk_pluto[i].parent_clk = c;
1235                 spi_parent_clk_pluto[i].fixed_clk_rate = clk_get_rate(c);
1236         }
1237         pluto_spi_pdata.parent_clk_list = spi_parent_clk_pluto;
1238         pluto_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_pluto);
1239         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1240         platform_add_devices(pluto_spi_devices,
1241                                 ARRAY_SIZE(pluto_spi_devices));
1242 }
1243
1244 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1245         /* name         parent          rate            enabled */
1246         { "extern2",    "pll_p",        41000000,       false},
1247         { "clk_out_2",  "extern2",      40800000,       false},
1248         { NULL,         NULL,           0,              0},
1249 };
1250
1251 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1252         .gpio_reset = 0,
1253         .config = 0,
1254         .platform_id = RM_PLATFORM_P005,
1255         .name_of_clock = "clk_out_2",
1256 };
1257
1258 static struct tegra_spi_device_controller_data dev_cdata = {
1259         .rx_clk_tap_delay = 0,
1260         .tx_clk_tap_delay = 0,
1261 };
1262
1263 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1264         {
1265          .modalias = "rm_ts_spidev",
1266          .bus_num = 3,
1267          .chip_select = 2,
1268          .max_speed_hz = 12 * 1000 * 1000,
1269          .mode = SPI_MODE_0,
1270          .controller_data = &dev_cdata,
1271          .platform_data = &rm31080ts_pluto_data,
1272          },
1273 };
1274
1275 static int __init pluto_touch_init(void)
1276 {
1277         tegra_clk_init_from_table(touch_clk_init_table);
1278         clk_enable(tegra_get_clock_by_name("clk_out_2"));
1279         mdelay(20);
1280         rm31080a_pluto_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1281         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1282                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
1283                                 &rm31080ts_pluto_data,
1284                                 &rm31080a_pluto_spi_board[0],
1285                                 ARRAY_SIZE(rm31080a_pluto_spi_board));
1286         return 0;
1287 }
1288
1289 #ifdef CONFIG_EDP_FRAMEWORK
1290 static struct edp_manager battery_edp_manager = {
1291         .name = "battery",
1292         .max = 12350
1293 };
1294
1295 static void __init pluto_battery_edp_init(void)
1296 {
1297         struct edp_governor *g;
1298         int r;
1299
1300         r = edp_register_manager(&battery_edp_manager);
1301         if (r)
1302                 goto err_ret;
1303
1304         /* start with priority governor */
1305         g = edp_get_governor("priority");
1306         if (!g) {
1307                 r = -EFAULT;
1308                 goto err_ret;
1309         }
1310
1311         r = edp_set_governor(&battery_edp_manager, g);
1312         if (r)
1313                 goto err_ret;
1314
1315         return;
1316
1317 err_ret:
1318         pr_err("Battery EDP init failed with error %d\n", r);
1319         WARN_ON(1);
1320 }
1321 #else
1322 static inline void pluto_battery_edp_init(void) {}
1323 #endif
1324
1325 #ifdef CONFIG_USE_OF
1326 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1327         OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-dma", NULL),
1328         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1329                                 NULL),
1330         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1331                                 NULL),
1332         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1333                                 &pluto_tegra_sdhci_platform_data0),
1334         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1335                                 NULL),
1336         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
1337                                 NULL),
1338         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
1339                                 NULL),
1340         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
1341                                 NULL),
1342         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
1343                                 NULL),
1344         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
1345                                 NULL),
1346         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
1347                                 NULL),
1348         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
1349                                 NULL),
1350         {}
1351 };
1352 #endif
1353
1354 static void __init tegra_pluto_early_init(void)
1355 {
1356         pluto_battery_edp_init();
1357         tegra_clk_init_from_table(pluto_clk_init_table);
1358         tegra_clk_vefify_parents();
1359         tegra_smmu_init();
1360         tegra_soc_device_init("tegra_pluto");
1361 }
1362
1363 static void __init tegra_pluto_late_init(void)
1364 {
1365         platform_device_register(&tegra_pinmux_device);
1366         pluto_pinmux_init();
1367         pluto_i2c_init();
1368         pluto_spi_init();
1369         pluto_usb_init();
1370         pluto_xusb_init();
1371         pluto_uart_init();
1372         pluto_audio_init();
1373         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1374         //tegra_ram_console_debug_init();
1375         tegra_io_dpd_init();
1376         pluto_sdhci_init();
1377         pluto_regulator_init();
1378         pluto_suspend_init();
1379         pluto_touch_init();
1380         pluto_emc_init();
1381         pluto_edp_init();
1382         isomgr_init();
1383         pluto_panel_init();
1384         pluto_pmon_init();
1385         pluto_kbc_init();
1386 #ifdef CONFIG_BT_BLUESLEEP
1387         pluto_setup_bluesleep();
1388         pluto_setup_bt_rfkill();
1389 #elif defined CONFIG_BLUEDROID_PM
1390         pluto_setup_bluedroid_pm();
1391 #endif
1392         tegra_release_bootloader_fb();
1393         pluto_modem_init();
1394 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1395         tegra_wdt_recovery_init();
1396 #endif
1397         pluto_sensors_init();
1398         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1399         pluto_soctherm_init();
1400         tegra_register_fuse();
1401 }
1402
1403 static void __init pluto_ramconsole_reserve(unsigned long size)
1404 {
1405         tegra_ram_console_debug_reserve(SZ_1M);
1406 }
1407
1408 static void __init tegra_pluto_dt_init(void)
1409 {
1410         tegra_pluto_early_init();
1411
1412         of_platform_populate(NULL,
1413                 of_default_bus_match_table, pluto_auxdata_lookup,
1414                 &platform_bus);
1415
1416         tegra_pluto_late_init();
1417 }
1418
1419 static void __init tegra_pluto_reserve(void)
1420 {
1421 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1422         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1423         tegra_reserve(0, SZ_16M, SZ_4M);
1424 #else
1425         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1426 #endif
1427         pluto_ramconsole_reserve(SZ_1M);
1428 }
1429
1430 static const char * const pluto_dt_board_compat[] = {
1431         "nvidia,pluto",
1432         NULL
1433 };
1434
1435 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1436         .atag_offset    = 0x100,
1437         .smp            = smp_ops(tegra_smp_ops),
1438         .map_io         = tegra_map_common_io,
1439         .reserve        = tegra_pluto_reserve,
1440         .init_early     = tegra11x_init_early,
1441         .init_irq       = tegra_dt_init_irq,
1442         .handle_irq     = gic_handle_irq,
1443         .timer          = &tegra_timer,
1444         .init_machine   = tegra_pluto_dt_init,
1445         .restart        = tegra_assert_system_reset,
1446         .dt_compat      = pluto_dt_board_compat,
1447 MACHINE_END