abd2694be241a036c219da419259e6919679c139
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/rm31080a_ts.h>
36 #include <linux/platform_data/serial-tegra.h>
37 #include <linux/memblock.h>
38 #include <linux/spi/spi-tegra.h>
39 #include <linux/nfc/pn544.h>
40 #include <linux/nfc/bcm2079x.h>
41 #include <linux/rfkill-gpio.h>
42 #include <linux/skbuff.h>
43 #include <linux/ti_wilink_st.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/smb349-charger.h>
46 #include <linux/max17048_battery.h>
47 #include <linux/leds.h>
48 #include <linux/i2c/at24.h>
49 #include <linux/mfd/max8831.h>
50 #include <linux/of_platform.h>
51 #include <linux/a2220.h>
52 #include <linux/mfd/tlv320aic3262-registers.h>
53 #include <linux/mfd/tlv320aic3xxx-core.h>
54 #include <linux/usb/tegra_usb_phy.h>
55 #include <linux/clk/tegra.h>
56 #include <linux/clocksource.h>
57 #include <linux/irqchip.h>
58
59 #include <mach/irqs.h>
60 #include <mach/pinmux.h>
61 #include <mach/pinmux-t11.h>
62 #include <mach/io_dpd.h>
63 #include <mach/i2s.h>
64 #include <mach/isomgr.h>
65 #include <mach/tegra_asoc_pdata.h>
66 #include <asm/mach-types.h>
67 #include <asm/mach/arch.h>
68 #include <mach/gpio-tegra.h>
69 #include <mach/tegra_fiq_debugger.h>
70 #include <mach/tegra-bb-power.h>
71 #include <mach/tegra_wakeup_monitor.h>
72 #include <linux/platform_data/tegra_usb_modem_power.h>
73 #include <mach/xusb.h>
74
75 #include "board.h"
76 #include "board-common.h"
77 #include "board-touch.h"
78 #include "board-touch-raydium.h"
79 #include "clock.h"
80 #include "board-pluto.h"
81 #include "baseband-xmm-power.h"
82 #include "tegra-board-id.h"
83 #include "devices.h"
84 #include "gpio-names.h"
85 #include "fuse.h"
86 #include "pm.h"
87 #include "common.h"
88 #include "iomap.h"
89
90
91 #ifdef CONFIG_BT_BLUESLEEP
92 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
93         .name           = "bt_rfkill",
94         .shutdown_gpio  = TEGRA_GPIO_PQ7,
95         .reset_gpio     = TEGRA_GPIO_PQ6,
96         .type           = RFKILL_TYPE_BLUETOOTH,
97 };
98
99 static struct platform_device pluto_bt_rfkill_device = {
100         .name = "rfkill_gpio",
101         .id             = -1,
102         .dev = {
103                 .platform_data = &pluto_bt_rfkill_pdata,
104         },
105 };
106
107 static noinline void __init pluto_setup_bt_rfkill(void)
108 {
109         platform_device_register(&pluto_bt_rfkill_device);
110 }
111
112 static struct resource pluto_bluesleep_resources[] = {
113         [0] = {
114                 .name = "gpio_host_wake",
115                         .start  = TEGRA_GPIO_PU6,
116                         .end    = TEGRA_GPIO_PU6,
117                         .flags  = IORESOURCE_IO,
118         },
119         [1] = {
120                 .name = "gpio_ext_wake",
121                         .start  = TEGRA_GPIO_PEE1,
122                         .end    = TEGRA_GPIO_PEE1,
123                         .flags  = IORESOURCE_IO,
124         },
125         [2] = {
126                 .name = "host_wake",
127                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
128         },
129 };
130
131 static struct platform_device pluto_bluesleep_device = {
132         .name           = "bluesleep",
133         .id             = -1,
134         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
135         .resource       = pluto_bluesleep_resources,
136 };
137
138 static noinline void __init pluto_setup_bluesleep(void)
139 {
140         pluto_bluesleep_resources[2].start =
141                 pluto_bluesleep_resources[2].end =
142                         gpio_to_irq(TEGRA_GPIO_PU6);
143         platform_device_register(&pluto_bluesleep_device);
144         return;
145 }
146 #elif defined CONFIG_BLUEDROID_PM
147 static struct resource pluto_bluedroid_pm_resources[] = {
148         [0] = {
149                 .name   = "shutdown_gpio",
150                 .start  = TEGRA_GPIO_PQ7,
151                 .end    = TEGRA_GPIO_PQ7,
152                 .flags  = IORESOURCE_IO,
153         },
154         [1] = {
155                 .name = "host_wake",
156                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
157         },
158         [2] = {
159                 .name = "gpio_ext_wake",
160                 .start  = TEGRA_GPIO_PEE1,
161                 .end    = TEGRA_GPIO_PEE1,
162                 .flags  = IORESOURCE_IO,
163         },
164         [3] = {
165                 .name = "gpio_host_wake",
166                 .start  = TEGRA_GPIO_PU6,
167                 .end    = TEGRA_GPIO_PU6,
168                 .flags  = IORESOURCE_IO,
169         },
170         [4] = {
171                 .name = "reset_gpio",
172                 .start  = TEGRA_GPIO_PQ6,
173                 .end    = TEGRA_GPIO_PQ6,
174                 .flags  = IORESOURCE_IO,
175         },
176 };
177
178 static struct platform_device pluto_bluedroid_pm_device = {
179         .name = "bluedroid_pm",
180         .id             = 0,
181         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
182         .resource       = pluto_bluedroid_pm_resources,
183 };
184
185 static noinline void __init pluto_setup_bluedroid_pm(void)
186 {
187         pluto_bluedroid_pm_resources[1].start =
188                 pluto_bluedroid_pm_resources[1].end =
189                                         gpio_to_irq(TEGRA_GPIO_PU6);
190         platform_device_register(&pluto_bluedroid_pm_device);
191 }
192 #endif
193
194 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
195         /* name         parent          rate            enabled */
196         { "pll_m",      NULL,           0,              false},
197         { "hda",        "pll_p",        108000000,      false},
198         { "hda2codec_2x", "pll_p",      48000000,       false},
199         { "pwm",        "pll_p",        3187500,        false},
200         { "i2s1",       "pll_a_out0",   0,              false},
201         { "i2s2",       "pll_a_out0",   0,              false},
202         { "i2s3",       "pll_a_out0",   0,              false},
203         { "i2s4",       "pll_a_out0",   0,              false},
204         { "spdif_out",  "pll_a_out0",   0,              false},
205         { "d_audio",    "clk_m",        12000000,       false},
206         { "dam0",       "clk_m",        12000000,       false},
207         { "dam1",       "clk_m",        12000000,       false},
208         { "dam2",       "clk_m",        12000000,       false},
209         { "audio0",     "i2s0_sync",    0,              false},
210         { "audio1",     "i2s1_sync",    0,              false},
211         { "audio2",     "i2s2_sync",    0,              false},
212         { "audio3",     "i2s3_sync",    0,              false},
213         { "audio4",     "i2s4_sync",    0,              false},
214         { "vi_sensor",  "pll_p",        150000000,      false},
215         { "cilab",      "pll_p",        150000000,      false},
216         { "cilcd",      "pll_p",        150000000,      false},
217         { "cile",       "pll_p",        150000000,      false},
218         { "i2c1",       "pll_p",        3200000,        false},
219         { "i2c2",       "pll_p",        3200000,        false},
220         { "i2c3",       "pll_p",        3200000,        false},
221         { "i2c4",       "pll_p",        3200000,        false},
222         { "i2c5",       "pll_p",        3200000,        false},
223         { "sbc1",       "pll_p",        25000000,       false},
224         { "sbc2",       "pll_p",        25000000,       false},
225         { "sbc3",       "pll_p",        25000000,       false},
226         { "sbc4",       "pll_p",        25000000,       false},
227         { "sbc5",       "pll_p",        25000000,       false},
228         { "sbc6",       "pll_p",        25000000,       false},
229         { "extern3",    "clk_m",        12000000,       false},
230         { "dsia",       "pll_d2_out0",  0,              false},
231         { "uarta",      "pll_p",        408000000,      false},
232         { "uartb",      "pll_p",        408000000,      false},
233         { "uartc",      "pll_p",        408000000,      false},
234         { "uartd",      "pll_p",        408000000,      false},
235         { NULL,         NULL,           0,              0},
236 };
237
238 static struct bcm2079x_platform_data nfc_pdata = {
239         .irq_gpio = TEGRA_GPIO_PW2,
240         .en_gpio = TEGRA_GPIO_PU4,
241         .wake_gpio = TEGRA_GPIO_PX7,
242         };
243
244 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
245         {
246                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
247                 .platform_data = &nfc_pdata,
248         },
249 };
250
251 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
252         .bus_clk_rate   = 100000,
253         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
254         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
255 };
256
257 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
258         .bus_clk_rate   = 100000,
259         .is_clkon_always = true,
260         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
261         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
262 };
263
264 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
265         .bus_clk_rate   = 400000,
266         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
267         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
268 };
269
270 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
271         .bus_clk_rate   = 10000,
272         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
273         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
274 };
275
276 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
277         .bus_clk_rate   = 400000,
278         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
279         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
280         .needs_cl_dvfs_clock = true,
281 };
282
283 static struct aic3262_gpio_setup aic3262_gpio[] = {
284         /* GPIO 1*/
285         {
286                 .used = 1,
287                 .in = 0,
288                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
289         },
290         /* GPIO 2*/
291         {
292                 .used = 1,
293                 .in = 0,
294                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
295         },
296         /* GPI1 */
297         {
298                 .used = 1,
299                 .in = 1,
300         },
301         /* GPI2 */
302         {
303                 .used = 1,
304                 .in = 1,
305                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
306                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
307                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
308                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
309         },
310         /* GPO1 */
311         {
312                 .used = 1,
313                 .in = 0,
314                 .value = AIC3262_GPO1_FUNC_MSO_OUTPUT_FOR_SPI,
315         },
316 };
317 static struct aic3xxx_pdata aic3262_codec_pdata = {
318         .gpio_irq       = 0,
319         .gpio           = aic3262_gpio,
320         .naudint_irq    = 0,
321         .irq_base       = AIC3262_CODEC_IRQ_BASE,
322 };
323
324 static struct i2c_board_info __initdata cs42l73_board_info = {
325         I2C_BOARD_INFO("cs42l73", 0x4a),
326 };
327
328 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
329         I2C_BOARD_INFO("audience_a2220", 0x3E),
330 };
331
332 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
333         I2C_BOARD_INFO("tlv320aic3262", 0x18),
334         .platform_data = &aic3262_codec_pdata,
335 };
336
337 static void pluto_i2c_init(void)
338 {
339         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
340         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
341         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
342         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
343         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
344
345         platform_device_register(&tegra11_i2c_device5);
346         platform_device_register(&tegra11_i2c_device4);
347 #ifndef CONFIG_OF
348         platform_device_register(&tegra11_i2c_device3);
349 #endif
350         platform_device_register(&tegra11_i2c_device2);
351         platform_device_register(&tegra11_i2c_device1);
352         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
353         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
354         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
355         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
356         i2c_register_board_info(0, &cs42l73_board_info, 1);
357 }
358
359 static struct tegra_serial_platform_data pluto_uartd_pdata = {
360         .dma_req_selector = 19,
361         .modem_interrupt = false,
362 };
363
364 static void __init pluto_uart_init(void)
365 {
366         int debug_port_id;
367
368         /* Register low speed only if it is selected */
369         if (!is_tegra_debug_uartport_hs()) {
370                 debug_port_id = uart_console_debug_init(3);
371                 if (debug_port_id < 0)
372                         return;
373
374                 platform_device_register(uart_console_debug_device);
375
376         } else {
377                 tegra_uartd_device.dev.platform_data = &pluto_uartd_pdata;
378                 platform_device_register(&tegra_uartd_device);
379         }
380
381 }
382
383 static struct resource tegra_rtc_resources[] = {
384         [0] = {
385                 .start = TEGRA_RTC_BASE,
386                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
387                 .flags = IORESOURCE_MEM,
388         },
389         [1] = {
390                 .start = INT_RTC,
391                 .end = INT_RTC,
392                 .flags = IORESOURCE_IRQ,
393         },
394 };
395
396 static struct platform_device tegra_rtc_device = {
397         .name = "tegra_rtc",
398         .id   = -1,
399         .resource = tegra_rtc_resources,
400         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
401 };
402
403 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
404 static struct tegra_wakeup_monitor_platform_data
405                         pluto_tegra_wakeup_monitor_pdata = {
406         .wifi_wakeup_source     = 6,
407         .rtc_wakeup_source      = 18,
408 };
409
410 static struct platform_device pluto_tegra_wakeup_monitor_device = {
411         .name = "tegra_wakeup_monitor",
412         .id   = -1,
413         .dev  = {
414                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
415         },
416 };
417 #endif
418
419 static struct tegra_asoc_platform_data pluto_audio_pdata = {
420         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
421         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
422         .gpio_hp_mute           = -1,
423         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
424         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
425         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
426         .edp_support            =  true,
427         .edp_states             = {1776, 888, 0},
428         .i2s_param[HIFI_CODEC]  = {
429                 .audio_port_id  = 1,
430                 .is_i2s_master  = 0,
431                 .i2s_mode       = TEGRA_DAIFMT_I2S,
432                 .sample_size    = 16,
433                 .channels       = 2,
434         },
435         .i2s_param[BASEBAND]    = {
436                 .audio_port_id  = 2,
437                 .is_i2s_master  = 1,
438                 .i2s_mode       = TEGRA_DAIFMT_I2S,
439                 .sample_size    = 16,
440                 .rate           = 16000,
441                 .channels       = 2,
442                 .bit_clk        = 1024000,
443         },
444         .i2s_param[BT_SCO]      = {
445                 .audio_port_id  = 3,
446                 .is_i2s_master  = 1,
447                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
448                 .sample_size    = 16,
449                 .channels       = 1,
450                 .bit_clk        = 512000,
451         },
452         .i2s_param[VOICE_CODEC] = {
453                 .audio_port_id  = 0,
454                 .is_i2s_master  = 1,
455                 .i2s_mode       = TEGRA_DAIFMT_I2S,
456                 .sample_size    = 16,
457                 .rate           = 16000,
458                 .channels       = 2,
459         },
460 };
461
462 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
463         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
464         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
465         .gpio_hp_mute           = -1,
466         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
467         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
468         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
469         .edp_support            = true,
470         .edp_states             = {1776, 888, 0},
471         .i2s_param[HIFI_CODEC]  = {
472                 .audio_port_id  = 1,
473                 .is_i2s_master  = 0,
474                 .i2s_mode       = TEGRA_DAIFMT_I2S,
475                 .sample_size    = 16,
476                 .rate           = 48000,
477                 .channels       = 2,
478         },
479         .i2s_param[BASEBAND]    = {
480                 .audio_port_id  = 2,
481                 .is_i2s_master  = 1,
482                 .i2s_mode       = TEGRA_DAIFMT_I2S,
483                 .sample_size    = 16,
484                 .rate           = 16000,
485                 .channels       = 2,
486                 .bit_clk        = 1024000,
487         },
488         .i2s_param[BT_SCO]      = {
489                 .audio_port_id  = 3,
490                 .is_i2s_master  = 1,
491                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
492                 .sample_size    = 16,
493                 .channels       = 1,
494                 .bit_clk        = 512000,
495         },
496         .i2s_param[VOICE_CODEC] = {
497                 .audio_port_id  = 0,
498                 .is_i2s_master  = 1,
499                 .i2s_mode       = TEGRA_DAIFMT_I2S,
500                 .sample_size    = 16,
501                 .rate           = 16000,
502                 .channels       = 2,
503         },
504 };
505
506 static struct platform_device pluto_audio_device = {
507         .name   = "tegra-snd-cs42l73",
508         .id     = 2,
509         .dev    = {
510                 .platform_data = &pluto_audio_pdata,
511         },
512 };
513
514 static struct platform_device pluto_audio_aic326x_device = {
515         .name   = "tegra-snd-aic326x",
516         .id     = 2,
517         .dev    = {
518                 .platform_data  = &pluto_aic3262_pdata,
519         },
520 };
521
522 static struct tegra_spi_device_controller_data dev_bdata = {
523         .rx_clk_tap_delay = 0,
524         .tx_clk_tap_delay = 0,
525 };
526 static struct spi_board_info aic326x_spi_board_info[] = {
527         {
528                 .modalias = "tlv320aic3xxx",
529                 .bus_num = 3,
530                 .chip_select = 0,
531                 .max_speed_hz = 4*1000*1000,
532                 .mode = SPI_MODE_1,
533                 .controller_data = &dev_bdata,
534                 .platform_data = &aic3262_codec_pdata,
535         },
536 };
537
538 #ifdef CONFIG_MHI_NETDEV
539 struct platform_device mhi_netdevice0 = {
540         .name = "mhi_net_device",
541         .id = 0,
542 };
543 #endif /* CONFIG_MHI_NETDEV */
544
545 static struct platform_device *pluto_devices[] __initdata = {
546         &tegra_pmu_device,
547         &tegra_rtc_device,
548         &tegra_udc_device,
549 #if defined(CONFIG_TEGRA_WATCHDOG)
550         &tegra_wdt0_device,
551 #endif
552 #if defined(CONFIG_TEGRA_AVP)
553         &tegra_avp_device,
554 #endif
555 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
556         &tegra11_se_device,
557 #endif
558         &tegra_ahub_device,
559         &tegra_dam_device0,
560         &tegra_dam_device1,
561         &tegra_dam_device2,
562         &tegra_i2s_device0,
563         &tegra_i2s_device1,
564         &tegra_i2s_device2,
565         &tegra_i2s_device3,
566         &tegra_i2s_device4,
567         &tegra_spdif_device,
568         &spdif_dit_device,
569         &pluto_audio_aic326x_device,
570         &bluetooth_dit_device,
571         &baseband_dit_device,
572 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
573         &pluto_tegra_wakeup_monitor_device,
574 #endif
575         &pluto_audio_device,
576         &tegra_hda_device,
577 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
578         &tegra_aes_device,
579 #endif
580 #ifdef CONFIG_MHI_NETDEV
581         &mhi_netdevice0,  /* MHI netdevice */
582 #endif /* CONFIG_MHI_NETDEV */
583 };
584
585 #ifdef CONFIG_USB_SUPPORT
586
587 static void pluto_usb_hsic_postsupend(void)
588 {
589         pr_debug("%s\n", __func__);
590 #ifdef CONFIG_TEGRA_BB_XMM_POWER
591         baseband_xmm_set_power_status(BBXMM_PS_L2);
592 #endif
593 }
594
595 static void pluto_usb_hsic_preresume(void)
596 {
597         pr_debug("%s\n", __func__);
598 #ifdef CONFIG_TEGRA_BB_XMM_POWER
599         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
600 #endif
601 }
602
603 static void pluto_usb_hsic_post_resume(void)
604 {
605         pr_debug("%s\n", __func__);
606 #ifdef CONFIG_TEGRA_BB_XMM_POWER
607         baseband_xmm_set_power_status(BBXMM_PS_L0);
608 #endif
609 }
610
611 static void pluto_usb_hsic_phy_power(void)
612 {
613         pr_debug("%s\n", __func__);
614 #ifdef CONFIG_TEGRA_BB_XMM_POWER
615         baseband_xmm_set_power_status(BBXMM_PS_L0);
616 #endif
617 }
618
619 static void pluto_usb_hsic_post_phy_off(void)
620 {
621         pr_debug("%s\n", __func__);
622 #ifdef CONFIG_TEGRA_BB_XMM_POWER
623         baseband_xmm_set_power_status(BBXMM_PS_L2);
624 #endif
625 }
626
627 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
628         .post_suspend = pluto_usb_hsic_postsupend,
629         .pre_resume = pluto_usb_hsic_preresume,
630         .port_power = pluto_usb_hsic_phy_power,
631         .post_resume = pluto_usb_hsic_post_resume,
632         .post_phy_off = pluto_usb_hsic_post_phy_off,
633 };
634
635 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
636         .port_otg = false,
637         .has_hostpc = true,
638         .unaligned_dma_buf_supported = false,
639         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
640         .op_mode        = TEGRA_USB_OPMODE_HOST,
641         .u_data.host = {
642                 .vbus_gpio = -1,
643                 .hot_plug = false,
644                 .remote_wakeup_supported = true,
645                 .power_off_on_suspend = true,
646         },
647 };
648
649 static struct tegra_usb_platform_data tegra_udc_pdata = {
650         .port_otg = true,
651         .has_hostpc = true,
652         .id_det_type = TEGRA_USB_PMU_ID,
653         .unaligned_dma_buf_supported = false,
654         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
655         .op_mode = TEGRA_USB_OPMODE_DEVICE,
656         .u_data.dev = {
657                 .vbus_pmu_irq = 0,
658                 .vbus_gpio = -1,
659                 .charging_supported = false,
660                 .remote_wakeup_supported = false,
661         },
662         .u_cfg.utmi = {
663                 .hssync_start_delay = 0,
664                 .elastic_limit = 16,
665                 .idle_wait_delay = 17,
666                 .term_range_adj = 6,
667                 .xcvr_setup = 8,
668                 .xcvr_lsfslew = 0,
669                 .xcvr_lsrslew = 3,
670                 .xcvr_setup_offset = 0,
671                 .xcvr_use_fuses = 1,
672         },
673 };
674
675 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
676         .port_otg = true,
677         .has_hostpc = true,
678         .id_det_type = TEGRA_USB_PMU_ID,
679         .unaligned_dma_buf_supported = false,
680         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
681         .op_mode = TEGRA_USB_OPMODE_HOST,
682         .u_data.host = {
683                 .vbus_gpio = -1,
684                 .hot_plug = false,
685                 .remote_wakeup_supported = true,
686                 .power_off_on_suspend = true,
687         },
688         .u_cfg.utmi = {
689                 .hssync_start_delay = 0,
690                 .elastic_limit = 16,
691                 .idle_wait_delay = 17,
692                 .term_range_adj = 6,
693                 .xcvr_setup = 15,
694                 .xcvr_lsfslew = 0,
695                 .xcvr_lsrslew = 3,
696                 .xcvr_setup_offset = 0,
697                 .xcvr_use_fuses = 1,
698                 .vbus_oc_map = 0x7,
699         },
700 };
701
702 static struct tegra_usb_otg_data tegra_otg_pdata = {
703         .ehci_device = &tegra_ehci1_device,
704         .ehci_pdata = &tegra_ehci1_utmi_pdata,
705         .id_extcon_dev_name = "MAX77665_MUIC_ID",
706 };
707
708 static struct regulator *baseband_reg;
709 static struct gpio modem_gpios[] = { /* i500 modem */
710         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
711 };
712
713 static struct gpio modem2_gpios[] = {
714         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
715         {MDM2_RST, GPIOF_OUT_INIT_LOW, "MODEM2 RESET"},
716 };
717
718 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
719         .port_otg = false,
720         .has_hostpc = true,
721         .unaligned_dma_buf_supported = false,
722         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
723         .op_mode = TEGRA_USB_OPMODE_HOST,
724         .u_data.host = {
725                 .vbus_gpio = -1,
726                 .hot_plug = false,
727                 .remote_wakeup_supported = true,
728                 .power_off_on_suspend = true,
729         },
730 };
731
732 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
733         .port_otg = false,
734         .has_hostpc = true,
735         .unaligned_dma_buf_supported = false,
736         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
737         .op_mode = TEGRA_USB_OPMODE_HOST,
738         .u_data.host = {
739                 .vbus_gpio = -1,
740                 .hot_plug = false,
741                 .remote_wakeup_supported = true,
742                 .power_off_on_suspend = true,
743         },
744 };
745
746 static struct tegra_usb_platform_data tegra_hsic_pdata = {
747         .port_otg = false,
748         .has_hostpc = true,
749         .unaligned_dma_buf_supported = false,
750         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
751         .op_mode        = TEGRA_USB_OPMODE_HOST,
752         .u_data.host = {
753                 .vbus_gpio = -1,
754                 .hot_plug = false,
755                 .remote_wakeup_supported = true,
756                 .power_off_on_suspend = true,
757         },
758 };
759
760 static struct platform_device *
761 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
762 {
763         struct platform_device *pdev;
764         int val;
765
766         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
767         if (!pdev)
768                 return NULL;
769
770         val = platform_device_add_resources(pdev, ehci_dev->resource,
771                                                 ehci_dev->num_resources);
772         if (val)
773                 goto error;
774
775         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
776         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
777
778         val = platform_device_add_data(pdev, &tegra_hsic_pdata,
779                         sizeof(struct tegra_usb_platform_data));
780         if (val)
781                 goto error;
782
783         val = platform_device_add(pdev);
784         if (val)
785                 goto error;
786
787         return pdev;
788
789 error:
790         pr_err("%s: failed to add the host contoller device\n", __func__);
791         platform_device_put(pdev);
792         return NULL;
793 }
794
795 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
796 {
797         struct platform_device *pdev = *platdev;
798
799         if (pdev && &pdev->dev) {
800                 platform_device_unregister(pdev);
801                 *platdev = NULL;
802         } else
803                 pr_err("%s: no platform device\n", __func__);
804 }
805
806 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
807
808 static union tegra_bb_gpio_id bb_gpio_oem1 = {
809         .oem1 = {
810                 .reset = BB_OEM1_GPIO_RST,
811                 .pwron = BB_OEM1_GPIO_ON,
812                 .awr = BB_OEM1_GPIO_AWR,
813                 .cwr = BB_OEM1_GPIO_CWR,
814                 .spare = BB_OEM1_GPIO_SPARE,
815                 .wdi = BB_OEM1_GPIO_WDI,
816         },
817 };
818
819 static struct tegra_bb_pdata bb_pdata_oem1 = {
820         .id = &bb_gpio_oem1,
821         .device = &tegra_ehci3_device,
822         .ehci_register = tegra_usb_hsic_host_register,
823         .ehci_unregister = tegra_usb_hsic_host_unregister,
824         .bb_id = TEGRA_BB_OEM1,
825 };
826
827 static struct platform_device tegra_bb_oem1 = {
828         .name = "tegra_baseband_power",
829         .id = -1,
830         .dev = {
831                 .platform_data = &bb_pdata_oem1,
832         },
833 };
834
835 static int baseband_init(void)
836 {
837         int ret;
838
839         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
840         if (ret) {
841                 pr_warn("%s:gpio request failed\n", __func__);
842                 return ret;
843         }
844
845         baseband_reg = regulator_get(NULL, "vdd_core_bb");
846         if (IS_ERR(baseband_reg))
847                 pr_warn("%s: baseband regulator get failed\n", __func__);
848         else {
849                 if (regulator_enable(baseband_reg) != 0)
850                         pr_warn("baseband regulator enable failed\n");
851         }
852
853         /* enable pull-up for MDM1 UART RX */
854         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PU1,
855                                     TEGRA_PUPD_PULL_UP);
856
857         /* enable pull-down for MDM1_COLD_BOOT */
858         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
859                                     TEGRA_PUPD_PULL_DOWN);
860
861         /* export GPIO for user space access through sysfs */
862         gpio_export(MDM_RST, false);
863
864         return 0;
865 }
866
867 static const struct tegra_modem_operations baseband_operations = {
868         .init = baseband_init,
869 };
870
871 #define MODEM_BOOT_EDP_MAX 0
872 /* FIXME: get accurate boot current value */
873 static unsigned int modem_boot_edp_states[] = { 1900, 0 };
874 static struct edp_client modem_boot_edp_client = {
875         .name = "modem_boot",
876         .states = modem_boot_edp_states,
877         .num_states = ARRAY_SIZE(modem_boot_edp_states),
878         .e0_index = MODEM_BOOT_EDP_MAX,
879         .priority = EDP_MAX_PRIO,
880 };
881
882 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
883         .ops = &baseband_operations,
884         .wake_gpio = -1,
885         .boot_gpio = MDM_COLDBOOT,
886         .boot_irq_flags = IRQF_TRIGGER_RISING |
887                                     IRQF_TRIGGER_FALLING |
888                                     IRQF_ONESHOT,
889         .autosuspend_delay = 2000,
890         .short_autosuspend_delay = 50,
891         .tegra_ehci_device = &tegra_ehci2_device,
892         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
893         .modem_boot_edp_client = &modem_boot_edp_client,
894         .edp_manager_name = "battery",
895         .i_breach_ppm = 500000,
896         /* FIXME: get useful adjperiods */
897         .i_thresh_3g_adjperiod = 10000,
898         .i_thresh_lte_adjperiod = 10000,
899 };
900
901 static struct platform_device icera_baseband_device = {
902         .name = "tegra_usb_modem_power",
903         .id = -1,
904         .dev = {
905                 .platform_data = &baseband_pdata,
906         },
907 };
908
909 static void baseband2_start(void)
910 {
911         pr_info("%s\n", __func__);
912         gpio_set_value(MDM2_PWR_ON, 1);
913 }
914
915 static void baseband2_reset(void)
916 {
917         /* Initiate power cycle on baseband sub system */
918         pr_info("%s\n", __func__);
919         gpio_set_value(MDM2_RST, 0);
920         mdelay(200);
921         gpio_set_value(MDM2_RST, 1);
922 }
923
924 static int baseband2_init(void)
925 {
926         int ret;
927
928         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD, TEGRA_TRI_NORMAL);
929
930         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
931         if (ret)
932                 return ret;
933
934         /* enable pull-down for MDM2_COLD_BOOT */
935         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_KB_ROW4,
936                                     TEGRA_PUPD_PULL_DOWN);
937
938         /* export GPIO for user space access through sysfs */
939         gpio_export(MDM2_RST, false);
940
941         return 0;
942 }
943
944 static const struct tegra_modem_operations baseband2_operations = {
945         .init = baseband2_init,
946         .start = baseband2_start,
947         .reset = baseband2_reset,
948 };
949
950 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
951         .ops = &baseband2_operations,
952         .wake_gpio = -1,
953         .boot_gpio = MDM2_COLDBOOT,
954         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
955         .autosuspend_delay = 2000,
956         .short_autosuspend_delay = 50,
957         .tegra_ehci_device = &tegra_ehci3_device,
958         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
959 };
960
961 static struct platform_device icera_baseband2_device = {
962         .name = "tegra_usb_modem_power",
963         .id = -1,
964         .dev = {
965                 .platform_data = &baseband2_pdata,
966         },
967 };
968
969 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
970         .baseband_type = BASEBAND_XMM,
971         .modem = {
972                 .xmm = {
973                         .bb_rst = XMM_GPIO_BB_RST,
974                         .bb_on = XMM_GPIO_BB_ON,
975                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
976                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
977                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
978                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
979                 },
980         },
981 };
982
983 static struct platform_device tegra_baseband_xmm_power_device = {
984         .name = "baseband_xmm_power",
985         .id = -1,
986         .dev = {
987                 .platform_data = &tegra_baseband_xmm_power_data,
988         },
989 };
990
991 static struct platform_device tegra_baseband_xmm_power2_device = {
992         .name = "baseband_xmm_power2",
993         .id = -1,
994         .dev = {
995                 .platform_data = &tegra_baseband_xmm_power_data,
996         },
997 };
998
999 static void pluto_usb_init(void)
1000 {
1001         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1002
1003         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1004                 tegra_otg_pdata.is_xhci = false;
1005                 tegra_udc_pdata.u_data.dev.is_xhci = false;
1006         } else {
1007                 tegra_otg_pdata.is_xhci = true;
1008                 tegra_udc_pdata.u_data.dev.is_xhci = true;
1009         }
1010         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1011         platform_device_register(&tegra_otg_device);
1012
1013         /* Setup the udc platform data */
1014         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1015 }
1016
1017 static void pluto_modem_init(void)
1018 {
1019         int modem_id = tegra_get_modem_id();
1020         struct board_info board_info;
1021         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1022
1023         tegra_get_board_info(&board_info);
1024         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1025
1026         switch (modem_id) {
1027         case TEGRA_BB_I500: /* on board i500 HSIC */
1028                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
1029                         platform_device_register(&icera_baseband_device);
1030                 break;
1031         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1032                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
1033                         platform_device_register(&icera_baseband2_device);
1034                 break;
1035         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1036                 if ((board_info.board_id == BOARD_E1575) ||
1037                         ((board_info.board_id == BOARD_E1580) &&
1038                                 (board_info.fab >= BOARD_FAB_A03))) {
1039                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1040                                                         TEGRA_TRI_NORMAL);
1041                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1042                 }
1043                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1044                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1045                         tegra_ehci3_device.dev.platform_data
1046                                 = &tegra_hsic_pdata;
1047                         platform_device_register(&tegra_bb_oem1);
1048                 }
1049                 break;
1050         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1051                 /* fix wrong wiring in Pluto A02 */
1052                 if ((board_info.board_id == BOARD_E1580) &&
1053                         (board_info.fab == BOARD_FAB_A02)) {
1054                         pr_info(
1055 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1056                                 __func__);
1057                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1058                                 != MDM2_PWR_ON)
1059                                 pr_err(
1060 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1061                                         __func__);
1062                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1063                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1064                 }
1065                 /* baseband-power.ko will register ehci3 device */
1066                 tegra_hsic_pdata.ops = &oem2_plat_ops;
1067                 tegra_hsic_pdata.u_data.host.remote_wakeup_supported = false;
1068                 tegra_hsic_pdata.u_data.host.power_off_on_suspend = false;
1069                 tegra_ehci3_device.dev.platform_data =
1070                                         &tegra_hsic_pdata;
1071                 tegra_baseband_xmm_power_data.hsic_register =
1072                                                 &tegra_usb_hsic_host_register;
1073                 tegra_baseband_xmm_power_data.hsic_unregister =
1074                                                 &tegra_usb_hsic_host_unregister;
1075                 tegra_baseband_xmm_power_data.ehci_device =
1076                                         &tegra_ehci3_device;
1077                 platform_device_register(&tegra_baseband_xmm_power_device);
1078                 platform_device_register(&tegra_baseband_xmm_power2_device);
1079                 /* override audio settings - use 8kHz */
1080                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1081                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1082                         = 2;
1083                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1084                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1085                         = 1;
1086                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1087                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1088                         = TEGRA_DAIFMT_I2S;
1089                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1090                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1091                         = 16;
1092                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1093                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1094                         = 8000;
1095                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1096                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1097                         = 2;
1098                 break;
1099         case TEGRA_BB_HSIC_HUB: /* HSIC hub */
1100                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1101                         tegra_ehci3_device.dev.platform_data =
1102                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1103                         platform_device_register(&tegra_ehci3_device);
1104                 }
1105                 break;
1106         default:
1107                 return;
1108         }
1109 }
1110
1111 static struct tegra_xusb_board_data xusb_bdata = {
1112         .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P0,
1113         /* ss_portmap[0:3] = SS0 map, ss_portmap[4:7] = SS1 map */
1114         .ss_portmap = (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0),
1115         .uses_external_pmic = true,
1116         .supply = {
1117                 .utmi_vbuses = {
1118                         NULL, "usb_vbus", NULL
1119                 },
1120                 .s3p3v = "hvdd_usb",
1121                 .s1p8v = "avdd_usb_pll",
1122                 .vddio_hsic = "vddio_hsic",
1123                 .s1p05v = "avddio_usb",
1124         },
1125 };
1126
1127 static void pluto_xusb_init(void)
1128 {
1129         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1130
1131         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)
1132                 tegra_xusb_init(&xusb_bdata);
1133 }
1134 #else
1135 static void pluto_usb_init(void) { }
1136 static void pluto_modem_init(void) { }
1137 static void pluto_xusb_init(void) { }
1138 #endif
1139
1140 static void pluto_audio_init(void)
1141 {
1142         struct board_info board_info;
1143
1144         tegra_get_board_info(&board_info);
1145
1146         spi_register_board_info(aic326x_spi_board_info,
1147                                         ARRAY_SIZE(aic326x_spi_board_info));
1148 }
1149
1150 #ifndef CONFIG_USE_OF
1151 static struct platform_device *pluto_spi_devices[] __initdata = {
1152         &tegra11_spi_device4,
1153 };
1154
1155 static struct tegra_spi_platform_data pluto_spi_pdata = {
1156         .dma_req_sel            = 0,
1157         .spi_max_frequency      = 25000000,
1158         .clock_always_on        = false,
1159 };
1160
1161 static void __init pluto_spi_init(void)
1162 {
1163         struct board_info board_info, display_board_info;
1164
1165         tegra_get_board_info(&board_info);
1166         tegra_get_display_board_info(&display_board_info);
1167
1168         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1169         platform_add_devices(pluto_spi_devices,
1170                                 ARRAY_SIZE(pluto_spi_devices));
1171 }
1172 #else
1173 static void __init pluto_spi_init(void)
1174 {
1175 }
1176 #endif
1177
1178 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1179         /* name         parent          rate            enabled */
1180         { "extern2",    "pll_p",        41000000,       false},
1181         { "clk_out_2",  "extern2",      40800000,       false},
1182         { NULL,         NULL,           0,              0},
1183 };
1184
1185 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1186         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
1187         .config = 0,
1188         .platform_id = RM_PLATFORM_P005,
1189         .name_of_clock = "clk_out_2",
1190         .name_of_clock_con = "extern2",
1191 };
1192
1193 static struct tegra_spi_device_controller_data dev_cdata = {
1194         .rx_clk_tap_delay = 0,
1195         .tx_clk_tap_delay = 0,
1196 };
1197
1198 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1199         {
1200          .modalias = "rm_ts_spidev",
1201          .bus_num = 3,
1202          .chip_select = 2,
1203          .max_speed_hz = 12 * 1000 * 1000,
1204          .mode = SPI_MODE_0,
1205          .controller_data = &dev_cdata,
1206          .platform_data = &rm31080ts_pluto_data,
1207          },
1208 };
1209
1210 static struct synaptics_gpio_data synaptics_gpio_pluto_data = {
1211         .attn_gpio = SYNAPTICS_ATTN_GPIO,
1212         .attn_polarity = RMI_ATTN_ACTIVE_LOW,
1213         .reset_gpio = SYNAPTICS_RESET_GPIO,
1214 };
1215
1216 static struct rmi_device_platform_data synaptics_pluto_platformdata = {
1217         .sensor_name   = "TM9999",
1218         .attn_gpio     = SYNAPTICS_ATTN_GPIO,
1219         .attn_polarity = RMI_ATTN_ACTIVE_LOW,
1220         .gpio_data     = &synaptics_gpio_pluto_data,
1221         .gpio_config   = synaptics_touchpad_gpio_setup,
1222         .spi_data = {
1223                 .block_delay_us = 100,
1224                 .read_delay_us = 100,
1225                 .write_delay_us = 20,
1226         },
1227         .power_management = {
1228                 .nosleep = RMI_F01_NOSLEEP_OFF,
1229         },
1230         .f19_button_map = &synaptics_button_map,
1231         .f54_direct_touch_report_size = 944,
1232 };
1233
1234 static struct spi_board_info synaptics_9999_spi_board_pluto[] = {
1235         {
1236                 .modalias = "rmi_spi",
1237                 .bus_num = 3,
1238                 .chip_select = 2,
1239                 .max_speed_hz = 8*1000*1000,
1240                 .mode = SPI_MODE_3,
1241                 .platform_data = &synaptics_pluto_platformdata,
1242         },
1243 };
1244
1245 static int __init pluto_touch_init(void)
1246 {
1247         tegra_clk_init_from_table(touch_clk_init_table);
1248         if (tegra_get_touch_vendor_id() == RAYDIUM_TOUCH) {
1249                 pr_info("%s: initializing raydium\n", __func__);
1250                 rm31080a_pluto_spi_board[0].irq =
1251                         gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1252                 touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1253                                         TOUCH_GPIO_RST_RAYDIUM_SPI,
1254                                         &rm31080ts_pluto_data,
1255                                         &rm31080a_pluto_spi_board[0],
1256                                         ARRAY_SIZE(rm31080a_pluto_spi_board));
1257         } else {
1258                 pr_info("%s: initializing synaptics\n", __func__);
1259                 touch_init_synaptics(synaptics_9999_spi_board_pluto,
1260                                 ARRAY_SIZE(synaptics_9999_spi_board_pluto));
1261         }
1262         return 0;
1263 }
1264
1265 #ifdef CONFIG_USE_OF
1266 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1267         OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-apbdma",
1268                                 NULL),
1269         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1270                                 NULL),
1271         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1272                                 NULL),
1273         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1274                                 &pluto_tegra_sdhci_platform_data0),
1275         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1276                                 NULL),
1277         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
1278                                 NULL),
1279         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
1280                                 NULL),
1281         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
1282                                 NULL),
1283         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
1284                                 NULL),
1285         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
1286                                 NULL),
1287         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
1288                                 NULL),
1289         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
1290                                 NULL),
1291         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c500, "tegra11-i2c.2",
1292                                 NULL),
1293         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
1294                                 NULL),
1295         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
1296                                 NULL),
1297         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
1298                                 NULL),
1299         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
1300                                 NULL),
1301         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
1302                                 NULL),
1303         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
1304                                 NULL),
1305         OF_DEV_AUXDATA("nvidia,tegra114-kbc", 0x7000e200, "tegra-kbc",
1306                                 NULL),
1307         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006000, "serial-tegra.0",
1308                                 NULL),
1309         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006040, "serial-tegra.1",
1310                                 NULL),
1311         OF_DEV_AUXDATA("nvidia,tegra114-hsuart", 0x70006200, "serial-tegra.2",
1312                                 NULL),
1313         {}
1314 };
1315 #endif
1316
1317 static void __init pluto_dtv_init(void)
1318 {
1319         platform_device_register(&tegra_dtv_device);
1320 }
1321
1322 static void __init tegra_pluto_early_init(void)
1323 {
1324         pluto_sysedp_init();
1325         tegra_clk_init_from_table(pluto_clk_init_table);
1326         tegra_clk_verify_parents();
1327         tegra_soc_device_init("tegra_pluto");
1328 }
1329
1330 static void __init tegra_pluto_late_init(void)
1331 {
1332         platform_device_register(&tegra_pinmux_device);
1333         pluto_pinmux_init();
1334         pluto_i2c_init();
1335         pluto_spi_init();
1336         pluto_usb_init();
1337         pluto_xusb_init();
1338         pluto_uart_init();
1339         pluto_audio_init();
1340         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1341         //tegra_ram_console_debug_init();
1342         tegra_io_dpd_init();
1343         pluto_sdhci_init();
1344         pluto_regulator_init();
1345         pluto_dtv_init();
1346         pluto_suspend_init();
1347         pluto_touch_init();
1348         pluto_emc_init();
1349         pluto_edp_init();
1350         isomgr_init();
1351         pluto_panel_init();
1352         pluto_pmon_init();
1353         pluto_kbc_init();
1354 #ifdef CONFIG_BT_BLUESLEEP
1355         pluto_setup_bluesleep();
1356         pluto_setup_bt_rfkill();
1357 #elif defined CONFIG_BLUEDROID_PM
1358         pluto_setup_bluedroid_pm();
1359 #endif
1360         pluto_modem_init();
1361 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1362         tegra_wdt_recovery_init();
1363 #endif
1364         pluto_sensors_init();
1365         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1366         pluto_soctherm_init();
1367         tegra_register_fuse();
1368         pluto_sysedp_core_init();
1369         pluto_sysedp_psydepl_init();
1370 }
1371
1372 static void __init pluto_ramconsole_reserve(unsigned long size)
1373 {
1374         tegra_ram_console_debug_reserve(SZ_1M);
1375 }
1376
1377 static void __init tegra_pluto_dt_init(void)
1378 {
1379         tegra_pluto_early_init();
1380
1381         of_platform_populate(NULL,
1382                 of_default_bus_match_table, pluto_auxdata_lookup,
1383                 &platform_bus);
1384
1385         tegra_pluto_late_init();
1386 }
1387
1388 static void __init tegra_pluto_reserve(void)
1389 {
1390 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1391         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1392         tegra_reserve(0, SZ_16M, SZ_4M);
1393 #else
1394         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1395 #endif
1396         pluto_ramconsole_reserve(SZ_1M);
1397 }
1398
1399 static const char * const pluto_dt_board_compat[] = {
1400         "nvidia,pluto",
1401         NULL
1402 };
1403
1404 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1405         .atag_offset    = 0x100,
1406         .smp            = smp_ops(tegra_smp_ops),
1407         .map_io         = tegra_map_common_io,
1408         .reserve        = tegra_pluto_reserve,
1409         .init_early     = tegra11x_init_early,
1410         .init_irq       = irqchip_init,
1411         .init_time      = clocksource_of_init,
1412         .init_machine   = tegra_pluto_dt_init,
1413         .restart        = tegra_assert_system_reset,
1414         .dt_compat      = pluto_dt_board_compat,
1415         .init_late      = tegra_init_late
1416 MACHINE_END