ARM: tegra: Check regulator_enable return values
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/rm31080a_ts.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/memblock.h>
38 #include <linux/spi/spi-tegra.h>
39 #include <linux/nfc/pn544.h>
40 #include <linux/nfc/bcm2079x.h>
41 #include <linux/rfkill-gpio.h>
42 #include <linux/skbuff.h>
43 #include <linux/ti_wilink_st.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/smb349-charger.h>
46 #include <linux/max17048_battery.h>
47 #include <linux/leds.h>
48 #include <linux/i2c/at24.h>
49 #include <linux/mfd/max8831.h>
50 #include <linux/of_platform.h>
51 #include <linux/a2220.h>
52 #include <linux/mfd/tlv320aic3262-registers.h>
53 #include <linux/mfd/tlv320aic3xxx-core.h>
54 #include <linux/usb/tegra_usb_phy.h>
55
56 #include <mach/clk.h>
57 #include <mach/irqs.h>
58 #include <mach/pinmux.h>
59 #include <mach/pinmux-t11.h>
60 #include <mach/io_dpd.h>
61 #include <mach/i2s.h>
62 #include <mach/isomgr.h>
63 #include <mach/tegra_asoc_pdata.h>
64 #include <asm/mach-types.h>
65 #include <asm/mach/arch.h>
66 #include <mach/gpio-tegra.h>
67 #include <mach/tegra_fiq_debugger.h>
68 #include <mach/tegra-bb-power.h>
69 #include <mach/tegra_wakeup_monitor.h>
70 #include <linux/platform_data/tegra_usb_modem_power.h>
71 #include <mach/xusb.h>
72
73 #include "board.h"
74 #include "board-common.h"
75 #include "board-touch.h"
76 #include "board-touch-raydium.h"
77 #include "clock.h"
78 #include "board-pluto.h"
79 #include "baseband-xmm-power.h"
80 #include "tegra-board-id.h"
81 #include "devices.h"
82 #include "gpio-names.h"
83 #include "fuse.h"
84 #include "pm.h"
85 #include "common.h"
86 #include "iomap.h"
87
88
89 #ifdef CONFIG_BT_BLUESLEEP
90 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
91         .name           = "bt_rfkill",
92         .shutdown_gpio  = TEGRA_GPIO_PQ7,
93         .reset_gpio     = TEGRA_GPIO_PQ6,
94         .type           = RFKILL_TYPE_BLUETOOTH,
95 };
96
97 static struct platform_device pluto_bt_rfkill_device = {
98         .name = "rfkill_gpio",
99         .id             = -1,
100         .dev = {
101                 .platform_data = &pluto_bt_rfkill_pdata,
102         },
103 };
104
105 static noinline void __init pluto_setup_bt_rfkill(void)
106 {
107         platform_device_register(&pluto_bt_rfkill_device);
108 }
109
110 static struct resource pluto_bluesleep_resources[] = {
111         [0] = {
112                 .name = "gpio_host_wake",
113                         .start  = TEGRA_GPIO_PU6,
114                         .end    = TEGRA_GPIO_PU6,
115                         .flags  = IORESOURCE_IO,
116         },
117         [1] = {
118                 .name = "gpio_ext_wake",
119                         .start  = TEGRA_GPIO_PEE1,
120                         .end    = TEGRA_GPIO_PEE1,
121                         .flags  = IORESOURCE_IO,
122         },
123         [2] = {
124                 .name = "host_wake",
125                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
126         },
127 };
128
129 static struct platform_device pluto_bluesleep_device = {
130         .name           = "bluesleep",
131         .id             = -1,
132         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
133         .resource       = pluto_bluesleep_resources,
134 };
135
136 static noinline void __init pluto_setup_bluesleep(void)
137 {
138         pluto_bluesleep_resources[2].start =
139                 pluto_bluesleep_resources[2].end =
140                         gpio_to_irq(TEGRA_GPIO_PU6);
141         platform_device_register(&pluto_bluesleep_device);
142         return;
143 }
144 #elif defined CONFIG_BLUEDROID_PM
145 static struct resource pluto_bluedroid_pm_resources[] = {
146         [0] = {
147                 .name   = "shutdown_gpio",
148                 .start  = TEGRA_GPIO_PQ7,
149                 .end    = TEGRA_GPIO_PQ7,
150                 .flags  = IORESOURCE_IO,
151         },
152         [1] = {
153                 .name = "host_wake",
154                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
155         },
156         [2] = {
157                 .name = "gpio_ext_wake",
158                 .start  = TEGRA_GPIO_PEE1,
159                 .end    = TEGRA_GPIO_PEE1,
160                 .flags  = IORESOURCE_IO,
161         },
162         [3] = {
163                 .name = "gpio_host_wake",
164                 .start  = TEGRA_GPIO_PU6,
165                 .end    = TEGRA_GPIO_PU6,
166                 .flags  = IORESOURCE_IO,
167         },
168         [4] = {
169                 .name = "reset_gpio",
170                 .start  = TEGRA_GPIO_PQ6,
171                 .end    = TEGRA_GPIO_PQ6,
172                 .flags  = IORESOURCE_IO,
173         },
174 };
175
176 static struct platform_device pluto_bluedroid_pm_device = {
177         .name = "bluedroid_pm",
178         .id             = 0,
179         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
180         .resource       = pluto_bluedroid_pm_resources,
181 };
182
183 static noinline void __init pluto_setup_bluedroid_pm(void)
184 {
185         pluto_bluedroid_pm_resources[1].start =
186                 pluto_bluedroid_pm_resources[1].end =
187                                         gpio_to_irq(TEGRA_GPIO_PU6);
188         platform_device_register(&pluto_bluedroid_pm_device);
189 }
190 #endif
191
192 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
193         /* name         parent          rate            enabled */
194         { "pll_m",      NULL,           0,              false},
195         { "hda",        "pll_p",        108000000,      false},
196         { "hda2codec_2x", "pll_p",      48000000,       false},
197         { "pwm",        "pll_p",        3187500,        false},
198         { "i2s1",       "pll_a_out0",   0,              false},
199         { "i2s2",       "pll_a_out0",   0,              false},
200         { "i2s3",       "pll_a_out0",   0,              false},
201         { "i2s4",       "pll_a_out0",   0,              false},
202         { "spdif_out",  "pll_a_out0",   0,              false},
203         { "d_audio",    "clk_m",        12000000,       false},
204         { "dam0",       "clk_m",        12000000,       false},
205         { "dam1",       "clk_m",        12000000,       false},
206         { "dam2",       "clk_m",        12000000,       false},
207         { "audio0",     "i2s0_sync",    0,              false},
208         { "audio1",     "i2s1_sync",    0,              false},
209         { "audio2",     "i2s2_sync",    0,              false},
210         { "audio3",     "i2s3_sync",    0,              false},
211         { "audio4",     "i2s4_sync",    0,              false},
212         { "vi_sensor",  "pll_p",        150000000,      false},
213         { "cilab",      "pll_p",        150000000,      false},
214         { "cilcd",      "pll_p",        150000000,      false},
215         { "cile",       "pll_p",        150000000,      false},
216         { "i2c1",       "pll_p",        3200000,        false},
217         { "i2c2",       "pll_p",        3200000,        false},
218         { "i2c3",       "pll_p",        3200000,        false},
219         { "i2c4",       "pll_p",        3200000,        false},
220         { "i2c5",       "pll_p",        3200000,        false},
221         { "sbc1",       "pll_p",        25000000,       false},
222         { "sbc2",       "pll_p",        25000000,       false},
223         { "sbc3",       "pll_p",        25000000,       false},
224         { "sbc4",       "pll_p",        25000000,       false},
225         { "sbc5",       "pll_p",        25000000,       false},
226         { "sbc6",       "pll_p",        25000000,       false},
227         { "extern3",    "clk_m",        12000000,       false},
228         { "dsia",       "pll_d2_out0",  0,              false},
229         { NULL,         NULL,           0,              0},
230 };
231
232 static struct bcm2079x_platform_data nfc_pdata = {
233         .irq_gpio = TEGRA_GPIO_PW2,
234         .en_gpio = TEGRA_GPIO_PU4,
235         .wake_gpio = TEGRA_GPIO_PX7,
236         };
237
238 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
239         {
240                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
241                 .platform_data = &nfc_pdata,
242         },
243 };
244
245 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
246         .bus_clk_rate   = 100000,
247         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
248         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
249 };
250
251 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
252         .bus_clk_rate   = 100000,
253         .is_clkon_always = true,
254         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
255         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
256 };
257
258 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
259         .bus_clk_rate   = 400000,
260         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
261         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
262 };
263
264 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
265         .bus_clk_rate   = 10000,
266         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
267         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
268 };
269
270 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
271         .bus_clk_rate   = 400000,
272         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
273         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
274         .needs_cl_dvfs_clock = true,
275 };
276
277 static struct aic3262_gpio_setup aic3262_gpio[] = {
278         /* GPIO 1*/
279         {
280                 .used = 1,
281                 .in = 0,
282                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
283         },
284         /* GPIO 2*/
285         {
286                 .used = 1,
287                 .in = 0,
288                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
289         },
290         /* GPI1 */
291         {
292                 .used = 1,
293                 .in = 1,
294         },
295         /* GPI2 */
296         {
297                 .used = 1,
298                 .in = 1,
299                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
300                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
301                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
302                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
303         },
304         /* GPO1 */
305         {
306                 .used = 1,
307                 .in = 0,
308                 .value = AIC3262_GPO1_FUNC_MSO_OUTPUT_FOR_SPI,
309         },
310 };
311 static struct aic3xxx_pdata aic3262_codec_pdata = {
312         .gpio_irq       = 0,
313         .gpio           = aic3262_gpio,
314         .naudint_irq    = 0,
315         .irq_base       = AIC3262_CODEC_IRQ_BASE,
316 };
317
318 static struct i2c_board_info __initdata cs42l73_board_info = {
319         I2C_BOARD_INFO("cs42l73", 0x4a),
320 };
321
322 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
323         I2C_BOARD_INFO("audience_a2220", 0x3E),
324 };
325
326 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
327         I2C_BOARD_INFO("tlv320aic3262", 0x18),
328         .platform_data = &aic3262_codec_pdata,
329 };
330
331 static void pluto_i2c_init(void)
332 {
333         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
334         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
335         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
336         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
337         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
338
339         platform_device_register(&tegra11_i2c_device5);
340         platform_device_register(&tegra11_i2c_device4);
341 #ifndef CONFIG_OF
342         platform_device_register(&tegra11_i2c_device3);
343 #endif
344         platform_device_register(&tegra11_i2c_device2);
345         platform_device_register(&tegra11_i2c_device1);
346
347         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
348         i2c_register_board_info(0, &cs42l73_board_info, 1);
349         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
350         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
351         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
352         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
353 }
354
355 static struct platform_device *pluto_uart_devices[] __initdata = {
356         &tegra_uarta_device,
357         &tegra_uartb_device,
358         &tegra_uartc_device,
359         &tegra_uartd_device,
360 };
361 static struct uart_clk_parent uart_parent_clk[] = {
362         [0] = {.name = "clk_m"},
363         [1] = {.name = "pll_p"},
364 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
365         [2] = {.name = "pll_m"},
366 #endif
367 };
368
369 static struct tegra_uart_platform_data pluto_uart_pdata;
370 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
371
372 static void __init uart_debug_init(void)
373 {
374         int debug_port_id;
375
376         debug_port_id = uart_console_debug_init(3);
377         if (debug_port_id < 0)
378                 return;
379         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
380 }
381
382 static void __init pluto_uart_init(void)
383 {
384         struct clk *c;
385         int i;
386
387         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
388                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
389                 if (IS_ERR_OR_NULL(c)) {
390                         pr_err("Not able to get the clock for %s\n",
391                                                 uart_parent_clk[i].name);
392                         continue;
393                 }
394                 uart_parent_clk[i].parent_clk = c;
395                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
396         }
397         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
398         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
399         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
400         pluto_loopback_uart_pdata.parent_clk_count =
401                                                 ARRAY_SIZE(uart_parent_clk);
402         pluto_loopback_uart_pdata.is_loopback = true;
403         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
404         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
405         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
406         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
407
408         /* Register low speed only if it is selected */
409         if (!is_tegra_debug_uartport_hs())
410                 uart_debug_init();
411
412         platform_add_devices(pluto_uart_devices,
413                                 ARRAY_SIZE(pluto_uart_devices));
414 }
415
416 static struct resource tegra_rtc_resources[] = {
417         [0] = {
418                 .start = TEGRA_RTC_BASE,
419                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
420                 .flags = IORESOURCE_MEM,
421         },
422         [1] = {
423                 .start = INT_RTC,
424                 .end = INT_RTC,
425                 .flags = IORESOURCE_IRQ,
426         },
427 };
428
429 static struct platform_device tegra_rtc_device = {
430         .name = "tegra_rtc",
431         .id   = -1,
432         .resource = tegra_rtc_resources,
433         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
434 };
435
436 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
437 static struct tegra_wakeup_monitor_platform_data
438                         pluto_tegra_wakeup_monitor_pdata = {
439         .wifi_wakeup_source     = 6,
440         .rtc_wakeup_source      = 18,
441 };
442
443 static struct platform_device pluto_tegra_wakeup_monitor_device = {
444         .name = "tegra_wakeup_monitor",
445         .id   = -1,
446         .dev  = {
447                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
448         },
449 };
450 #endif
451
452 static struct tegra_asoc_platform_data pluto_audio_pdata = {
453         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
454         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
455         .gpio_hp_mute           = -1,
456         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
457         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
458         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
459         .edp_support            =  true,
460         .edp_states             = {1776, 888, 0},
461         .i2s_param[HIFI_CODEC]  = {
462                 .audio_port_id  = 1,
463                 .is_i2s_master  = 0,
464                 .i2s_mode       = TEGRA_DAIFMT_I2S,
465                 .sample_size    = 16,
466                 .channels       = 2,
467         },
468         .i2s_param[BASEBAND]    = {
469                 .audio_port_id  = 2,
470                 .is_i2s_master  = 1,
471                 .i2s_mode       = TEGRA_DAIFMT_I2S,
472                 .sample_size    = 16,
473                 .rate           = 16000,
474                 .channels       = 2,
475                 .bit_clk        = 1024000,
476         },
477         .i2s_param[BT_SCO]      = {
478                 .audio_port_id  = 3,
479                 .is_i2s_master  = 1,
480                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
481                 .sample_size    = 16,
482                 .channels       = 1,
483                 .bit_clk        = 512000,
484         },
485         .i2s_param[VOICE_CODEC] = {
486                 .audio_port_id  = 0,
487                 .is_i2s_master  = 1,
488                 .i2s_mode       = TEGRA_DAIFMT_I2S,
489                 .sample_size    = 16,
490                 .rate           = 16000,
491                 .channels       = 2,
492         },
493 };
494
495 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
496         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
497         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
498         .gpio_hp_mute           = -1,
499         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
500         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
501         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
502         .edp_support            = true,
503         .edp_states             = {1776, 888, 0},
504         .i2s_param[HIFI_CODEC]  = {
505                 .audio_port_id  = 1,
506                 .is_i2s_master  = 0,
507                 .i2s_mode       = TEGRA_DAIFMT_I2S,
508                 .sample_size    = 16,
509                 .rate           = 48000,
510                 .channels       = 2,
511         },
512         .i2s_param[BASEBAND]    = {
513                 .audio_port_id  = 2,
514                 .is_i2s_master  = 1,
515                 .i2s_mode       = TEGRA_DAIFMT_I2S,
516                 .sample_size    = 16,
517                 .rate           = 16000,
518                 .channels       = 2,
519                 .bit_clk        = 1024000,
520         },
521         .i2s_param[BT_SCO]      = {
522                 .audio_port_id  = 3,
523                 .is_i2s_master  = 1,
524                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
525                 .sample_size    = 16,
526                 .channels       = 1,
527                 .bit_clk        = 512000,
528         },
529         .i2s_param[VOICE_CODEC] = {
530                 .audio_port_id  = 0,
531                 .is_i2s_master  = 1,
532                 .i2s_mode       = TEGRA_DAIFMT_I2S,
533                 .sample_size    = 16,
534                 .rate           = 16000,
535                 .channels       = 2,
536         },
537 };
538
539 static struct platform_device pluto_audio_device = {
540         .name   = "tegra-snd-cs42l73",
541         .id     = 2,
542         .dev    = {
543                 .platform_data = &pluto_audio_pdata,
544         },
545 };
546
547 static struct platform_device pluto_audio_aic326x_device = {
548         .name   = "tegra-snd-aic326x",
549         .id     = 2,
550         .dev    = {
551                 .platform_data  = &pluto_aic3262_pdata,
552         },
553 };
554
555 static struct tegra_spi_device_controller_data dev_bdata = {
556         .rx_clk_tap_delay = 0,
557         .tx_clk_tap_delay = 0,
558 };
559 static struct spi_board_info aic326x_spi_board_info[] = {
560         {
561                 .modalias = "tlv320aic3xxx",
562                 .bus_num = 3,
563                 .chip_select = 0,
564                 .max_speed_hz = 4*1000*1000,
565                 .mode = SPI_MODE_1,
566                 .controller_data = &dev_bdata,
567                 .platform_data = &aic3262_codec_pdata,
568         },
569 };
570
571 #ifdef CONFIG_MHI_NETDEV
572 struct platform_device mhi_netdevice0 = {
573         .name = "mhi_net_device",
574         .id = 0,
575 };
576 #endif /* CONFIG_MHI_NETDEV */
577
578 static struct platform_device *pluto_devices[] __initdata = {
579         &tegra_pmu_device,
580         &tegra_rtc_device,
581         &tegra_udc_device,
582 #if defined(CONFIG_TEGRA_WATCHDOG)
583         &tegra_wdt0_device,
584 #endif
585 #if defined(CONFIG_TEGRA_AVP)
586         &tegra_avp_device,
587 #endif
588 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
589         &tegra11_se_device,
590 #endif
591         &tegra_ahub_device,
592         &tegra_dam_device0,
593         &tegra_dam_device1,
594         &tegra_dam_device2,
595         &tegra_i2s_device0,
596         &tegra_i2s_device1,
597         &tegra_i2s_device2,
598         &tegra_i2s_device3,
599         &tegra_i2s_device4,
600         &tegra_spdif_device,
601         &spdif_dit_device,
602         &bluetooth_dit_device,
603         &baseband_dit_device,
604 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
605         &pluto_tegra_wakeup_monitor_device,
606 #endif
607         &pluto_audio_device,
608         &pluto_audio_aic326x_device,
609         &tegra_hda_device,
610 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
611         &tegra_aes_device,
612 #endif
613 #ifdef CONFIG_MHI_NETDEV
614         &mhi_netdevice0,  /* MHI netdevice */
615 #endif /* CONFIG_MHI_NETDEV */
616 };
617
618 #ifdef CONFIG_USB_SUPPORT
619
620 static void pluto_usb_hsic_postsupend(void)
621 {
622         pr_debug("%s\n", __func__);
623 #ifdef CONFIG_TEGRA_BB_XMM_POWER
624         baseband_xmm_set_power_status(BBXMM_PS_L2);
625 #endif
626 }
627
628 static void pluto_usb_hsic_preresume(void)
629 {
630         pr_debug("%s\n", __func__);
631 #ifdef CONFIG_TEGRA_BB_XMM_POWER
632         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
633 #endif
634 }
635
636 static void pluto_usb_hsic_post_resume(void)
637 {
638         pr_debug("%s\n", __func__);
639 #ifdef CONFIG_TEGRA_BB_XMM_POWER
640         baseband_xmm_set_power_status(BBXMM_PS_L0);
641 #endif
642 }
643
644 static void pluto_usb_hsic_phy_power(void)
645 {
646         pr_debug("%s\n", __func__);
647 #ifdef CONFIG_TEGRA_BB_XMM_POWER
648         baseband_xmm_set_power_status(BBXMM_PS_L0);
649 #endif
650 }
651
652 static void pluto_usb_hsic_post_phy_off(void)
653 {
654         pr_debug("%s\n", __func__);
655 #ifdef CONFIG_TEGRA_BB_XMM_POWER
656         baseband_xmm_set_power_status(BBXMM_PS_L2);
657 #endif
658 }
659
660 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
661         .post_suspend = pluto_usb_hsic_postsupend,
662         .pre_resume = pluto_usb_hsic_preresume,
663         .port_power = pluto_usb_hsic_phy_power,
664         .post_resume = pluto_usb_hsic_post_resume,
665         .post_phy_off = pluto_usb_hsic_post_phy_off,
666 };
667
668 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
669         .port_otg = false,
670         .has_hostpc = true,
671         .unaligned_dma_buf_supported = false,
672         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
673         .op_mode        = TEGRA_USB_OPMODE_HOST,
674         .u_data.host = {
675                 .vbus_gpio = -1,
676                 .hot_plug = false,
677                 .remote_wakeup_supported = true,
678                 .power_off_on_suspend = true,
679         },
680 };
681
682 static struct tegra_usb_platform_data tegra_udc_pdata = {
683         .port_otg = true,
684         .has_hostpc = true,
685         .id_det_type = TEGRA_USB_PMU_ID,
686         .unaligned_dma_buf_supported = false,
687         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
688         .op_mode = TEGRA_USB_OPMODE_DEVICE,
689         .u_data.dev = {
690                 .vbus_pmu_irq = 0,
691                 .vbus_gpio = -1,
692                 .charging_supported = false,
693                 .remote_wakeup_supported = false,
694         },
695         .u_cfg.utmi = {
696                 .hssync_start_delay = 0,
697                 .elastic_limit = 16,
698                 .idle_wait_delay = 17,
699                 .term_range_adj = 6,
700                 .xcvr_setup = 8,
701                 .xcvr_lsfslew = 0,
702                 .xcvr_lsrslew = 3,
703                 .xcvr_setup_offset = 0,
704                 .xcvr_use_fuses = 1,
705         },
706 };
707
708 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
709         .port_otg = true,
710         .has_hostpc = true,
711         .id_det_type = TEGRA_USB_PMU_ID,
712         .unaligned_dma_buf_supported = false,
713         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
714         .op_mode = TEGRA_USB_OPMODE_HOST,
715         .u_data.host = {
716                 .vbus_gpio = -1,
717                 .hot_plug = false,
718                 .remote_wakeup_supported = true,
719                 .power_off_on_suspend = true,
720         },
721         .u_cfg.utmi = {
722                 .hssync_start_delay = 0,
723                 .elastic_limit = 16,
724                 .idle_wait_delay = 17,
725                 .term_range_adj = 6,
726                 .xcvr_setup = 15,
727                 .xcvr_lsfslew = 0,
728                 .xcvr_lsrslew = 3,
729                 .xcvr_setup_offset = 0,
730                 .xcvr_use_fuses = 1,
731                 .vbus_oc_map = 0x7,
732         },
733 };
734
735 static struct tegra_usb_otg_data tegra_otg_pdata = {
736         .ehci_device = &tegra_ehci1_device,
737         .ehci_pdata = &tegra_ehci1_utmi_pdata,
738         .id_extcon_dev_name = "MAX77665_MUIC_ID",
739 };
740
741 static struct regulator *baseband_reg;
742 static struct gpio modem_gpios[] = { /* i500 modem */
743         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
744 };
745
746 static struct gpio modem2_gpios[] = {
747         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
748         {MDM2_RST, GPIOF_OUT_INIT_LOW, "MODEM2 RESET"},
749 };
750
751 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
752         .port_otg = false,
753         .has_hostpc = true,
754         .unaligned_dma_buf_supported = false,
755         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
756         .op_mode = TEGRA_USB_OPMODE_HOST,
757         .u_data.host = {
758                 .vbus_gpio = -1,
759                 .hot_plug = false,
760                 .remote_wakeup_supported = true,
761                 .power_off_on_suspend = true,
762         },
763 };
764
765 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
766         .port_otg = false,
767         .has_hostpc = true,
768         .unaligned_dma_buf_supported = false,
769         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
770         .op_mode = TEGRA_USB_OPMODE_HOST,
771         .u_data.host = {
772                 .vbus_gpio = -1,
773                 .hot_plug = false,
774                 .remote_wakeup_supported = true,
775                 .power_off_on_suspend = true,
776         },
777 };
778
779 static struct tegra_usb_platform_data tegra_hsic_pdata = {
780         .port_otg = false,
781         .has_hostpc = true,
782         .unaligned_dma_buf_supported = false,
783         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
784         .op_mode        = TEGRA_USB_OPMODE_HOST,
785         .u_data.host = {
786                 .vbus_gpio = -1,
787                 .hot_plug = false,
788                 .remote_wakeup_supported = true,
789                 .power_off_on_suspend = true,
790         },
791 };
792
793 static struct platform_device *
794 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
795 {
796         struct platform_device *pdev;
797         int val;
798
799         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
800         if (!pdev)
801                 return NULL;
802
803         val = platform_device_add_resources(pdev, ehci_dev->resource,
804                                                 ehci_dev->num_resources);
805         if (val)
806                 goto error;
807
808         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
809         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
810
811         val = platform_device_add_data(pdev, &tegra_hsic_pdata,
812                         sizeof(struct tegra_usb_platform_data));
813         if (val)
814                 goto error;
815
816         val = platform_device_add(pdev);
817         if (val)
818                 goto error;
819
820         return pdev;
821
822 error:
823         pr_err("%s: failed to add the host contoller device\n", __func__);
824         platform_device_put(pdev);
825         return NULL;
826 }
827
828 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
829 {
830         struct platform_device *pdev = *platdev;
831
832         if (pdev && &pdev->dev) {
833                 platform_device_unregister(pdev);
834                 *platdev = NULL;
835         } else
836                 pr_err("%s: no platform device\n", __func__);
837 }
838
839 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
840
841 static union tegra_bb_gpio_id bb_gpio_oem1 = {
842         .oem1 = {
843                 .reset = BB_OEM1_GPIO_RST,
844                 .pwron = BB_OEM1_GPIO_ON,
845                 .awr = BB_OEM1_GPIO_AWR,
846                 .cwr = BB_OEM1_GPIO_CWR,
847                 .spare = BB_OEM1_GPIO_SPARE,
848                 .wdi = BB_OEM1_GPIO_WDI,
849         },
850 };
851
852 static struct tegra_bb_pdata bb_pdata_oem1 = {
853         .id = &bb_gpio_oem1,
854         .device = &tegra_ehci3_device,
855         .ehci_register = tegra_usb_hsic_host_register,
856         .ehci_unregister = tegra_usb_hsic_host_unregister,
857         .bb_id = TEGRA_BB_OEM1,
858 };
859
860 static struct platform_device tegra_bb_oem1 = {
861         .name = "tegra_baseband_power",
862         .id = -1,
863         .dev = {
864                 .platform_data = &bb_pdata_oem1,
865         },
866 };
867
868 static int baseband_init(void)
869 {
870         int ret;
871
872         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
873         if (ret) {
874                 pr_warn("%s:gpio request failed\n", __func__);
875                 return ret;
876         }
877
878         baseband_reg = regulator_get(NULL, "vdd_core_bb");
879         if (IS_ERR(baseband_reg))
880                 pr_warn("%s: baseband regulator get failed\n", __func__);
881         else {
882                 if (regulator_enable(baseband_reg) != 0)
883                         pr_warn("baseband regulator enable failed\n");
884         }
885
886         /* enable pull-up for MDM1 UART RX */
887         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PU1,
888                                     TEGRA_PUPD_PULL_UP);
889
890         /* enable pull-down for MDM1_COLD_BOOT */
891         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
892                                     TEGRA_PUPD_PULL_DOWN);
893
894         /* export GPIO for user space access through sysfs */
895         gpio_export(MDM_RST, false);
896
897         return 0;
898 }
899
900 static const struct tegra_modem_operations baseband_operations = {
901         .init = baseband_init,
902 };
903
904 #define MODEM_BOOT_EDP_MAX 0
905 /* FIXME: get accurate boot current value */
906 static unsigned int modem_boot_edp_states[] = { 1900, 0 };
907 static struct edp_client modem_boot_edp_client = {
908         .name = "modem_boot",
909         .states = modem_boot_edp_states,
910         .num_states = ARRAY_SIZE(modem_boot_edp_states),
911         .e0_index = MODEM_BOOT_EDP_MAX,
912         .priority = EDP_MAX_PRIO,
913 };
914
915 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
916         .ops = &baseband_operations,
917         .wake_gpio = -1,
918         .boot_gpio = MDM_COLDBOOT,
919         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
920         .autosuspend_delay = 2000,
921         .short_autosuspend_delay = 50,
922         .tegra_ehci_device = &tegra_ehci2_device,
923         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
924         .modem_boot_edp_client = &modem_boot_edp_client,
925         .edp_manager_name = "battery",
926         .i_breach_ppm = 500000,
927         /* FIXME: get useful adjperiods */
928         .i_thresh_3g_adjperiod = 10000,
929         .i_thresh_lte_adjperiod = 10000,
930 };
931
932 static struct platform_device icera_baseband_device = {
933         .name = "tegra_usb_modem_power",
934         .id = -1,
935         .dev = {
936                 .platform_data = &baseband_pdata,
937         },
938 };
939
940 static void baseband2_start(void)
941 {
942         pr_info("%s\n", __func__);
943         gpio_set_value(MDM2_PWR_ON, 1);
944 }
945
946 static void baseband2_reset(void)
947 {
948         /* Initiate power cycle on baseband sub system */
949         pr_info("%s\n", __func__);
950         gpio_set_value(MDM2_RST, 0);
951         mdelay(200);
952         gpio_set_value(MDM2_RST, 1);
953 }
954
955 static int baseband2_init(void)
956 {
957         int ret;
958
959         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD, TEGRA_TRI_NORMAL);
960
961         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
962         if (ret)
963                 return ret;
964
965         /* enable pull-down for MDM2_COLD_BOOT */
966         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_KB_ROW4,
967                                     TEGRA_PUPD_PULL_DOWN);
968
969         /* export GPIO for user space access through sysfs */
970         gpio_export(MDM2_RST, false);
971
972         return 0;
973 }
974
975 static const struct tegra_modem_operations baseband2_operations = {
976         .init = baseband2_init,
977         .start = baseband2_start,
978         .reset = baseband2_reset,
979 };
980
981 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
982         .ops = &baseband2_operations,
983         .wake_gpio = -1,
984         .boot_gpio = MDM2_COLDBOOT,
985         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
986         .autosuspend_delay = 2000,
987         .short_autosuspend_delay = 50,
988         .tegra_ehci_device = &tegra_ehci3_device,
989         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
990 };
991
992 static struct platform_device icera_baseband2_device = {
993         .name = "tegra_usb_modem_power",
994         .id = -1,
995         .dev = {
996                 .platform_data = &baseband2_pdata,
997         },
998 };
999
1000 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
1001         .baseband_type = BASEBAND_XMM,
1002         .modem = {
1003                 .xmm = {
1004                         .bb_rst = XMM_GPIO_BB_RST,
1005                         .bb_on = XMM_GPIO_BB_ON,
1006                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1007                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1008                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1009                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1010                 },
1011         },
1012 };
1013
1014 static struct platform_device tegra_baseband_xmm_power_device = {
1015         .name = "baseband_xmm_power",
1016         .id = -1,
1017         .dev = {
1018                 .platform_data = &tegra_baseband_xmm_power_data,
1019         },
1020 };
1021
1022 static struct platform_device tegra_baseband_xmm_power2_device = {
1023         .name = "baseband_xmm_power2",
1024         .id = -1,
1025         .dev = {
1026                 .platform_data = &tegra_baseband_xmm_power_data,
1027         },
1028 };
1029
1030 static void pluto_usb_init(void)
1031 {
1032         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1033
1034         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1035                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1036                 platform_device_register(&tegra_otg_device);
1037
1038                 /* Setup the udc platform data */
1039                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1040         }
1041 }
1042
1043 static void pluto_modem_init(void)
1044 {
1045         int modem_id = tegra_get_modem_id();
1046         struct board_info board_info;
1047         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1048
1049         tegra_get_board_info(&board_info);
1050         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1051
1052         switch (modem_id) {
1053         case TEGRA_BB_I500: /* on board i500 HSIC */
1054                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
1055                         platform_device_register(&icera_baseband_device);
1056                 break;
1057         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1058                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
1059                         platform_device_register(&icera_baseband2_device);
1060                 break;
1061         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1062                 if ((board_info.board_id == BOARD_E1575) ||
1063                         ((board_info.board_id == BOARD_E1580) &&
1064                                 (board_info.fab >= BOARD_FAB_A03))) {
1065                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1066                                                         TEGRA_TRI_NORMAL);
1067                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1068                 }
1069                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1070                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1071                         tegra_ehci3_device.dev.platform_data
1072                                 = &tegra_hsic_pdata;
1073                         platform_device_register(&tegra_bb_oem1);
1074                 }
1075                 break;
1076         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1077                 /* fix wrong wiring in Pluto A02 */
1078                 if ((board_info.board_id == BOARD_E1580) &&
1079                         (board_info.fab == BOARD_FAB_A02)) {
1080                         pr_info(
1081 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1082                                 __func__);
1083                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1084                                 != MDM2_PWR_ON)
1085                                 pr_err(
1086 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1087                                         __func__);
1088                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1089                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1090                 }
1091                 /* baseband-power.ko will register ehci3 device */
1092                 tegra_hsic_pdata.ops = &oem2_plat_ops;
1093                 tegra_hsic_pdata.u_data.host.remote_wakeup_supported = false;
1094                 tegra_hsic_pdata.u_data.host.power_off_on_suspend = false;
1095                 tegra_ehci3_device.dev.platform_data =
1096                                         &tegra_hsic_pdata;
1097                 tegra_baseband_xmm_power_data.hsic_register =
1098                                                 &tegra_usb_hsic_host_register;
1099                 tegra_baseband_xmm_power_data.hsic_unregister =
1100                                                 &tegra_usb_hsic_host_unregister;
1101                 tegra_baseband_xmm_power_data.ehci_device =
1102                                         &tegra_ehci3_device;
1103                 platform_device_register(&tegra_baseband_xmm_power_device);
1104                 platform_device_register(&tegra_baseband_xmm_power2_device);
1105                 /* override audio settings - use 8kHz */
1106                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1107                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1108                         = 2;
1109                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1110                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1111                         = 1;
1112                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1113                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1114                         = TEGRA_DAIFMT_I2S;
1115                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1116                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1117                         = 16;
1118                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1119                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1120                         = 8000;
1121                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1122                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1123                         = 2;
1124                 break;
1125         case TEGRA_BB_HSIC_HUB: /* HSIC hub */
1126                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1127                         tegra_ehci3_device.dev.platform_data =
1128                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1129                         platform_device_register(&tegra_ehci3_device);
1130                 }
1131                 break;
1132         default:
1133                 return;
1134         }
1135 }
1136
1137 static struct tegra_xusb_board_data xusb_bdata = {
1138         .portmap = TEGRA_XUSB_SS_P0 | TEGRA_XUSB_USB2_P0,
1139         /* ss_portmap[0:3] = SS0 map, ss_portmap[4:7] = SS1 map */
1140         .ss_portmap = (TEGRA_XUSB_SS_PORT_MAP_USB2_P0 << 0),
1141 };
1142
1143 static void pluto_xusb_init(void)
1144 {
1145         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1146
1147         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)
1148                 tegra_xusb_init(&xusb_bdata);
1149 }
1150 #else
1151 static void pluto_usb_init(void) { }
1152 static void pluto_modem_init(void) { }
1153 static void pluto_xusb_init(void) { }
1154 #endif
1155
1156 static void pluto_audio_init(void)
1157 {
1158         struct board_info board_info;
1159
1160         tegra_get_board_info(&board_info);
1161
1162         spi_register_board_info(aic326x_spi_board_info,
1163                                         ARRAY_SIZE(aic326x_spi_board_info));
1164 }
1165
1166 #ifndef CONFIG_USE_OF
1167 static struct platform_device *pluto_spi_devices[] __initdata = {
1168         &tegra11_spi_device4,
1169 };
1170
1171 static struct tegra_spi_platform_data pluto_spi_pdata = {
1172         .dma_req_sel            = 0,
1173         .spi_max_frequency      = 25000000,
1174         .clock_always_on        = false,
1175 };
1176
1177 static void __init pluto_spi_init(void)
1178 {
1179         struct board_info board_info, display_board_info;
1180
1181         tegra_get_board_info(&board_info);
1182         tegra_get_display_board_info(&display_board_info);
1183
1184         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1185         platform_add_devices(pluto_spi_devices,
1186                                 ARRAY_SIZE(pluto_spi_devices));
1187 }
1188 #else
1189 static void __init pluto_spi_init(void)
1190 {
1191 }
1192 #endif
1193
1194 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1195         /* name         parent          rate            enabled */
1196         { "extern2",    "pll_p",        41000000,       false},
1197         { "clk_out_2",  "extern2",      40800000,       false},
1198         { NULL,         NULL,           0,              0},
1199 };
1200
1201 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1202         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
1203         .config = 0,
1204         .platform_id = RM_PLATFORM_P005,
1205         .name_of_clock = "clk_out_2",
1206         .name_of_clock_con = "extern2",
1207 };
1208
1209 static struct tegra_spi_device_controller_data dev_cdata = {
1210         .rx_clk_tap_delay = 0,
1211         .tx_clk_tap_delay = 0,
1212 };
1213
1214 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1215         {
1216          .modalias = "rm_ts_spidev",
1217          .bus_num = 3,
1218          .chip_select = 2,
1219          .max_speed_hz = 12 * 1000 * 1000,
1220          .mode = SPI_MODE_0,
1221          .controller_data = &dev_cdata,
1222          .platform_data = &rm31080ts_pluto_data,
1223          },
1224 };
1225
1226 static struct synaptics_gpio_data synaptics_gpio_pluto_data = {
1227         .attn_gpio = SYNAPTICS_ATTN_GPIO,
1228         .attn_polarity = RMI_ATTN_ACTIVE_LOW,
1229         .reset_gpio = SYNAPTICS_RESET_GPIO,
1230 };
1231
1232 static struct rmi_device_platform_data synaptics_pluto_platformdata = {
1233         .sensor_name   = "TM9999",
1234         .attn_gpio     = SYNAPTICS_ATTN_GPIO,
1235         .attn_polarity = RMI_ATTN_ACTIVE_LOW,
1236         .gpio_data     = &synaptics_gpio_pluto_data,
1237         .gpio_config   = synaptics_touchpad_gpio_setup,
1238         .spi_data = {
1239                 .block_delay_us = 100,
1240                 .read_delay_us = 100,
1241                 .write_delay_us = 20,
1242         },
1243         .power_management = {
1244                 .nosleep = RMI_F01_NOSLEEP_OFF,
1245         },
1246         .f19_button_map = &synaptics_button_map,
1247         .f54_direct_touch_report_size = 944,
1248 };
1249
1250 static struct spi_board_info synaptics_9999_spi_board_pluto[] = {
1251         {
1252                 .modalias = "rmi_spi",
1253                 .bus_num = 3,
1254                 .chip_select = 2,
1255                 .max_speed_hz = 8*1000*1000,
1256                 .mode = SPI_MODE_3,
1257                 .platform_data = &synaptics_pluto_platformdata,
1258         },
1259 };
1260
1261 static int __init pluto_touch_init(void)
1262 {
1263         tegra_clk_init_from_table(touch_clk_init_table);
1264         if (tegra_get_touch_vendor_id() == RAYDIUM_TOUCH) {
1265                 pr_info("%s: initializing raydium\n", __func__);
1266                 rm31080a_pluto_spi_board[0].irq =
1267                         gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1268                 touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1269                                         TOUCH_GPIO_RST_RAYDIUM_SPI,
1270                                         &rm31080ts_pluto_data,
1271                                         &rm31080a_pluto_spi_board[0],
1272                                         ARRAY_SIZE(rm31080a_pluto_spi_board));
1273         } else {
1274                 pr_info("%s: initializing synaptics\n", __func__);
1275                 touch_init_synaptics(synaptics_9999_spi_board_pluto,
1276                                 ARRAY_SIZE(synaptics_9999_spi_board_pluto));
1277         }
1278         return 0;
1279 }
1280
1281 #ifdef CONFIG_USE_OF
1282 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1283         OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-dma", NULL),
1284         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1285                                 NULL),
1286         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1287                                 NULL),
1288         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1289                                 &pluto_tegra_sdhci_platform_data0),
1290         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1291                                 NULL),
1292         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
1293                                 NULL),
1294         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
1295                                 NULL),
1296         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
1297                                 NULL),
1298         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
1299                                 NULL),
1300         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
1301                                 NULL),
1302         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
1303                                 NULL),
1304         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
1305                                 NULL),
1306         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c500, "tegra11-i2c.2",
1307                                 NULL),
1308         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
1309                                 NULL),
1310         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
1311                                 NULL),
1312         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
1313                                 NULL),
1314         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
1315                                 NULL),
1316         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
1317                                 NULL),
1318         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
1319                                 NULL),
1320         {}
1321 };
1322 #endif
1323
1324 static void __init pluto_dtv_init(void)
1325 {
1326         platform_device_register(&tegra_dtv_device);
1327 }
1328
1329 static void __init tegra_pluto_early_init(void)
1330 {
1331         pluto_sysedp_init();
1332         tegra_clk_init_from_table(pluto_clk_init_table);
1333         tegra_clk_verify_parents();
1334         tegra_soc_device_init("tegra_pluto");
1335 }
1336
1337 static void __init tegra_pluto_late_init(void)
1338 {
1339         platform_device_register(&tegra_pinmux_device);
1340         pluto_pinmux_init();
1341         pluto_i2c_init();
1342         pluto_spi_init();
1343         pluto_usb_init();
1344         pluto_xusb_init();
1345         pluto_uart_init();
1346         pluto_audio_init();
1347         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1348         //tegra_ram_console_debug_init();
1349         tegra_io_dpd_init();
1350         pluto_sdhci_init();
1351         pluto_regulator_init();
1352         pluto_dtv_init();
1353         pluto_suspend_init();
1354         pluto_touch_init();
1355         pluto_emc_init();
1356         pluto_edp_init();
1357         isomgr_init();
1358         pluto_panel_init();
1359         pluto_pmon_init();
1360         pluto_kbc_init();
1361 #ifdef CONFIG_BT_BLUESLEEP
1362         pluto_setup_bluesleep();
1363         pluto_setup_bt_rfkill();
1364 #elif defined CONFIG_BLUEDROID_PM
1365         pluto_setup_bluedroid_pm();
1366 #endif
1367         tegra_release_bootloader_fb();
1368         pluto_modem_init();
1369 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1370         tegra_wdt_recovery_init();
1371 #endif
1372         pluto_sensors_init();
1373         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1374         pluto_soctherm_init();
1375         tegra_register_fuse();
1376         pluto_sysedp_core_init();
1377         pluto_sysedp_psydepl_init();
1378 }
1379
1380 static void __init pluto_ramconsole_reserve(unsigned long size)
1381 {
1382         tegra_ram_console_debug_reserve(SZ_1M);
1383 }
1384
1385 static void __init tegra_pluto_dt_init(void)
1386 {
1387         tegra_pluto_early_init();
1388
1389         of_platform_populate(NULL,
1390                 of_default_bus_match_table, pluto_auxdata_lookup,
1391                 &platform_bus);
1392
1393         tegra_pluto_late_init();
1394 }
1395
1396 static void __init tegra_pluto_reserve(void)
1397 {
1398 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1399         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1400         tegra_reserve(0, SZ_16M, SZ_4M);
1401 #else
1402         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1403 #endif
1404         pluto_ramconsole_reserve(SZ_1M);
1405 }
1406
1407 static const char * const pluto_dt_board_compat[] = {
1408         "nvidia,pluto",
1409         NULL
1410 };
1411
1412 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1413         .atag_offset    = 0x100,
1414         .smp            = smp_ops(tegra_smp_ops),
1415         .map_io         = tegra_map_common_io,
1416         .reserve        = tegra_pluto_reserve,
1417         .init_early     = tegra11x_init_early,
1418         .init_irq       = tegra_dt_init_irq,
1419         .init_time      = tegra_init_timer,
1420         .init_machine   = tegra_pluto_dt_init,
1421         .restart        = tegra_assert_system_reset,
1422         .dt_compat      = pluto_dt_board_compat,
1423 MACHINE_END