5232643df57b302c34c6468c5440f5e6a8266c36
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/edp.h>
54 #include <linux/mfd/tlv320aic3262-registers.h>
55 #include <linux/mfd/tlv320aic3xxx-core.h>
56
57 #include <asm/hardware/gic.h>
58
59 #include <mach/clk.h>
60 #include <mach/iomap.h>
61 #include <mach/irqs.h>
62 #include <mach/pinmux.h>
63 #include <mach/pinmux-t11.h>
64 #include <mach/iomap.h>
65 #include <mach/io.h>
66 #include <mach/io_dpd.h>
67 #include <mach/i2s.h>
68 #include <mach/isomgr.h>
69 #include <mach/tegra_asoc_pdata.h>
70 #include <asm/mach-types.h>
71 #include <asm/mach/arch.h>
72 #include <mach/usb_phy.h>
73 #include <mach/gpio-tegra.h>
74 #include <mach/tegra_fiq_debugger.h>
75 #include <mach/tegra-bb-power.h>
76 #include <mach/tegra_usb_modem_power.h>
77 #include <mach/tegra_wakeup_monitor.h>
78
79 #include "board.h"
80 #include "board-common.h"
81 #include "board-touch-raydium.h"
82 #include "clock.h"
83 #include "board-pluto.h"
84 #include "baseband-xmm-power.h"
85 #include "tegra-board-id.h"
86 #include "devices.h"
87 #include "gpio-names.h"
88 #include "fuse.h"
89 #include "pm.h"
90 #include "common.h"
91
92 #ifdef CONFIG_BT_BLUESLEEP
93 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
94         .name           = "bt_rfkill",
95         .shutdown_gpio  = TEGRA_GPIO_PQ7,
96         .reset_gpio     = TEGRA_GPIO_PQ6,
97         .type           = RFKILL_TYPE_BLUETOOTH,
98 };
99
100 static struct platform_device pluto_bt_rfkill_device = {
101         .name = "rfkill_gpio",
102         .id             = -1,
103         .dev = {
104                 .platform_data = &pluto_bt_rfkill_pdata,
105         },
106 };
107
108 static noinline void __init pluto_setup_bt_rfkill(void)
109 {
110         platform_device_register(&pluto_bt_rfkill_device);
111 }
112
113 static struct resource pluto_bluesleep_resources[] = {
114         [0] = {
115                 .name = "gpio_host_wake",
116                         .start  = TEGRA_GPIO_PU6,
117                         .end    = TEGRA_GPIO_PU6,
118                         .flags  = IORESOURCE_IO,
119         },
120         [1] = {
121                 .name = "gpio_ext_wake",
122                         .start  = TEGRA_GPIO_PEE1,
123                         .end    = TEGRA_GPIO_PEE1,
124                         .flags  = IORESOURCE_IO,
125         },
126         [2] = {
127                 .name = "host_wake",
128                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
129         },
130 };
131
132 static struct platform_device pluto_bluesleep_device = {
133         .name           = "bluesleep",
134         .id             = -1,
135         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
136         .resource       = pluto_bluesleep_resources,
137 };
138
139 static noinline void __init pluto_setup_bluesleep(void)
140 {
141         pluto_bluesleep_resources[2].start =
142                 pluto_bluesleep_resources[2].end =
143                         gpio_to_irq(TEGRA_GPIO_PU6);
144         platform_device_register(&pluto_bluesleep_device);
145         return;
146 }
147 #elif defined CONFIG_BLUEDROID_PM
148 static struct resource pluto_bluedroid_pm_resources[] = {
149         [0] = {
150                 .name   = "shutdown_gpio",
151                 .start  = TEGRA_GPIO_PQ7,
152                 .end    = TEGRA_GPIO_PQ7,
153                 .flags  = IORESOURCE_IO,
154         },
155         [1] = {
156                 .name = "host_wake",
157                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
158         },
159         [2] = {
160                 .name = "gpio_ext_wake",
161                 .start  = TEGRA_GPIO_PEE1,
162                 .end    = TEGRA_GPIO_PEE1,
163                 .flags  = IORESOURCE_IO,
164         },
165         [3] = {
166                 .name = "gpio_host_wake",
167                 .start  = TEGRA_GPIO_PU6,
168                 .end    = TEGRA_GPIO_PU6,
169                 .flags  = IORESOURCE_IO,
170         },
171         [4] = {
172                 .name = "reset_gpio",
173                 .start  = TEGRA_GPIO_PQ6,
174                 .end    = TEGRA_GPIO_PQ6,
175                 .flags  = IORESOURCE_IO,
176         },
177 };
178
179 static struct platform_device pluto_bluedroid_pm_device = {
180         .name = "bluedroid_pm",
181         .id             = 0,
182         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
183         .resource       = pluto_bluedroid_pm_resources,
184 };
185
186 static noinline void __init pluto_setup_bluedroid_pm(void)
187 {
188         pluto_bluedroid_pm_resources[1].start =
189                 pluto_bluedroid_pm_resources[1].end =
190                                         gpio_to_irq(TEGRA_GPIO_PU6);
191         platform_device_register(&pluto_bluedroid_pm_device);
192 }
193 #endif
194
195 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
196         /* name         parent          rate            enabled */
197         { "pll_m",      NULL,           0,              false},
198         { "hda",        "pll_p",        108000000,      false},
199         { "hda2codec_2x", "pll_p",      48000000,       false},
200         { "pwm",        "pll_p",        3187500,        false},
201         { "i2s1",       "pll_a_out0",   0,              false},
202         { "i2s2",       "pll_a_out0",   0,              false},
203         { "i2s3",       "pll_a_out0",   0,              false},
204         { "i2s4",       "pll_a_out0",   0,              false},
205         { "spdif_out",  "pll_a_out0",   0,              false},
206         { "d_audio",    "clk_m",        12000000,       false},
207         { "dam0",       "clk_m",        12000000,       false},
208         { "dam1",       "clk_m",        12000000,       false},
209         { "dam2",       "clk_m",        12000000,       false},
210         { "audio0",     "i2s0_sync",    0,              false},
211         { "audio1",     "i2s1_sync",    0,              false},
212         { "audio2",     "i2s2_sync",    0,              false},
213         { "audio3",     "i2s3_sync",    0,              false},
214         { "audio4",     "i2s4_sync",    0,              false},
215         { "vi_sensor",  "pll_p",        150000000,      false},
216         { "cilab",      "pll_p",        150000000,      false},
217         { "cilcd",      "pll_p",        150000000,      false},
218         { "cile",       "pll_p",        150000000,      false},
219         { "i2c1",       "pll_p",        3200000,        false},
220         { "i2c2",       "pll_p",        3200000,        false},
221         { "i2c3",       "pll_p",        3200000,        false},
222         { "i2c4",       "pll_p",        3200000,        false},
223         { "i2c5",       "pll_p",        3200000,        false},
224         { "extern3",    "clk_m",        12000000,       false},
225         { NULL,         NULL,           0,              0},
226 };
227
228 static struct bcm2079x_platform_data nfc_pdata = {
229         .irq_gpio = TEGRA_GPIO_PW2,
230         .en_gpio = TEGRA_GPIO_PU4,
231         .wake_gpio = TEGRA_GPIO_PX7,
232         };
233
234 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
235         {
236                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
237                 .platform_data = &nfc_pdata,
238         },
239 };
240
241 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
242         .bus_clk_rate   = 100000,
243         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
244         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
245 };
246
247 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
248         .bus_clk_rate   = 100000,
249         .is_clkon_always = true,
250         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
251         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
252 };
253
254 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
255         .bus_clk_rate   = 100000,
256         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
257         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
258 };
259
260 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
261         .bus_clk_rate   = 10000,
262         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
263         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
264 };
265
266 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
267         .bus_clk_rate   = 400000,
268         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
269         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
270 };
271
272 static struct aic3262_gpio_setup aic3262_gpio[] = {
273         /* GPIO 1*/
274         {
275                 .used = 1,
276                 .in = 0,
277                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
278         },
279         /* GPIO 2*/
280         {
281                 .used = 1,
282                 .in = 0,
283                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
284         },
285         /* GPIO 1 */
286         {
287                 .used = 0,
288         },
289         /* GPI2 */
290         {
291                 .used = 1,
292                 .in = 1,
293                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
294                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
295                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
296                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
297         },
298         /* GPO1 */
299         {
300                 .used = 0,
301                 .value = AIC3262_GPO1_FUNC_DISABLED,
302         },
303 };
304 static struct aic3xxx_pdata aic3262_codec_pdata = {
305         .gpio_irq       = 0,
306         .gpio           = aic3262_gpio,
307         .naudint_irq    = 0,
308         .irq_base       = AIC3262_CODEC_IRQ_BASE,
309 };
310
311 static struct i2c_board_info __initdata cs42l73_board_info = {
312         I2C_BOARD_INFO("cs42l73", 0x4a),
313 };
314
315 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
316         I2C_BOARD_INFO("audience_a2220", 0x3E),
317 };
318
319 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
320         I2C_BOARD_INFO("tlv320aic3262", 0x18),
321         .platform_data = &aic3262_codec_pdata,
322 };
323
324 static void pluto_i2c_init(void)
325 {
326         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
327         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
328         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
329         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
330         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
331
332         platform_device_register(&tegra11_i2c_device5);
333         platform_device_register(&tegra11_i2c_device4);
334         platform_device_register(&tegra11_i2c_device3);
335         platform_device_register(&tegra11_i2c_device2);
336         platform_device_register(&tegra11_i2c_device1);
337
338         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
339         i2c_register_board_info(0, &cs42l73_board_info, 1);
340         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
341         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
342         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
343 }
344
345 static struct platform_device *pluto_uart_devices[] __initdata = {
346         &tegra_uarta_device,
347         &tegra_uartb_device,
348         &tegra_uartc_device,
349         &tegra_uartd_device,
350 };
351 static struct uart_clk_parent uart_parent_clk[] = {
352         [0] = {.name = "clk_m"},
353         [1] = {.name = "pll_p"},
354 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
355         [2] = {.name = "pll_m"},
356 #endif
357 };
358
359 static struct tegra_uart_platform_data pluto_uart_pdata;
360 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
361
362 static void __init uart_debug_init(void)
363 {
364         int debug_port_id;
365
366         debug_port_id = uart_console_debug_init(3);
367         if (debug_port_id < 0)
368                 return;
369         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
370 }
371
372 static void __init pluto_uart_init(void)
373 {
374         struct clk *c;
375         int i;
376
377         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
378                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
379                 if (IS_ERR_OR_NULL(c)) {
380                         pr_err("Not able to get the clock for %s\n",
381                                                 uart_parent_clk[i].name);
382                         continue;
383                 }
384                 uart_parent_clk[i].parent_clk = c;
385                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
386         }
387         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
388         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
389         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
390         pluto_loopback_uart_pdata.parent_clk_count =
391                                                 ARRAY_SIZE(uart_parent_clk);
392         pluto_loopback_uart_pdata.is_loopback = true;
393         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
394         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
395         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
396         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
397
398         /* Register low speed only if it is selected */
399         if (!is_tegra_debug_uartport_hs())
400                 uart_debug_init();
401
402         platform_add_devices(pluto_uart_devices,
403                                 ARRAY_SIZE(pluto_uart_devices));
404 }
405
406 static struct resource tegra_rtc_resources[] = {
407         [0] = {
408                 .start = TEGRA_RTC_BASE,
409                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
410                 .flags = IORESOURCE_MEM,
411         },
412         [1] = {
413                 .start = INT_RTC,
414                 .end = INT_RTC,
415                 .flags = IORESOURCE_IRQ,
416         },
417 };
418
419 static struct platform_device tegra_rtc_device = {
420         .name = "tegra_rtc",
421         .id   = -1,
422         .resource = tegra_rtc_resources,
423         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
424 };
425
426 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
427 static struct tegra_wakeup_monitor_platform_data
428                         pluto_tegra_wakeup_monitor_pdata = {
429         .wifi_wakeup_source     = 6,
430 };
431
432 static struct platform_device pluto_tegra_wakeup_monitor_device = {
433         .name = "tegra_wakeup_monitor",
434         .id   = -1,
435         .dev  = {
436                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
437         },
438 };
439 #endif
440
441 static struct tegra_asoc_platform_data pluto_audio_pdata = {
442         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
443         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
444         .gpio_hp_mute           = -1,
445         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
446         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
447         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
448         .i2s_param[HIFI_CODEC]  = {
449                 .audio_port_id  = 1,
450                 .is_i2s_master  = 0,
451                 .i2s_mode       = TEGRA_DAIFMT_I2S,
452                 .sample_size    = 16,
453                 .channels       = 2,
454         },
455         .i2s_param[BASEBAND]    = {
456                 .audio_port_id  = 2,
457                 .is_i2s_master  = 1,
458                 .i2s_mode       = TEGRA_DAIFMT_I2S,
459                 .sample_size    = 16,
460                 .rate           = 16000,
461                 .channels       = 2,
462                 .bit_clk        = 1024000,
463         },
464         .i2s_param[BT_SCO]      = {
465                 .audio_port_id  = 3,
466                 .is_i2s_master  = 1,
467                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
468                 .sample_size    = 16,
469                 .channels       = 1,
470                 .bit_clk        = 512000,
471         },
472         .i2s_param[VOICE_CODEC] = {
473                 .audio_port_id  = 0,
474                 .is_i2s_master  = 1,
475                 .i2s_mode       = TEGRA_DAIFMT_I2S,
476                 .sample_size    = 16,
477                 .rate           = 16000,
478                 .channels       = 2,
479         },
480 };
481
482 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
483         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
484         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
485         .gpio_hp_mute           = -1,
486         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
487         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
488         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
489         .i2s_param[HIFI_CODEC]  = {
490                 .audio_port_id  = 1,
491                 .is_i2s_master  = 1,
492                 .i2s_mode       = TEGRA_DAIFMT_I2S,
493                 .sample_size    = 16,
494                 .channels       = 2,
495         },
496         .i2s_param[BASEBAND]    = {
497                 .audio_port_id  = 2,
498                 .is_i2s_master  = 1,
499                 .i2s_mode       = TEGRA_DAIFMT_I2S,
500                 .sample_size    = 16,
501                 .rate           = 16000,
502                 .channels       = 2,
503                 .bit_clk        = 1024000,
504         },
505         .i2s_param[BT_SCO]      = {
506                 .audio_port_id  = 3,
507                 .is_i2s_master  = 1,
508                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
509                 .sample_size    = 16,
510                 .channels       = 1,
511                 .bit_clk        = 512000,
512         },
513         .i2s_param[VOICE_CODEC] = {
514                 .audio_port_id  = 0,
515                 .is_i2s_master  = 1,
516                 .i2s_mode       = TEGRA_DAIFMT_I2S,
517                 .sample_size    = 16,
518                 .rate           = 16000,
519                 .channels       = 2,
520         },
521 };
522
523 static struct platform_device pluto_audio_device = {
524         .name   = "tegra-snd-cs42l73",
525         .id     = 2,
526         .dev    = {
527                 .platform_data = &pluto_audio_pdata,
528         },
529 };
530
531 static struct platform_device pluto_audio_aic326x_device = {
532         .name   = "tegra-snd-aic326x",
533         .id     = 2,
534         .dev    = {
535                 .platform_data  = &pluto_aic3262_pdata,
536         },
537 };
538
539 #ifndef CONFIG_USE_OF
540 static struct platform_device tegra_camera = {
541         .name = "tegra_camera",
542         .id = -1,
543 };
544 #endif
545
546 #ifdef CONFIG_MHI_NETDEV
547 struct platform_device mhi_netdevice0 = {
548         .name = "mhi_net_device",
549         .id = 0,
550 };
551 #endif /* CONFIG_MHI_NETDEV */
552
553 static struct platform_device *pluto_devices[] __initdata = {
554         &tegra_pmu_device,
555         &tegra_rtc_device,
556         &tegra_udc_device,
557 #if defined(CONFIG_TEGRA_AVP)
558         &tegra_avp_device,
559 #endif
560 #ifndef CONFIG_USE_OF
561         &tegra_camera,
562 #endif
563 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
564         &tegra11_se_device,
565 #endif
566         &tegra_ahub_device,
567         &tegra_dam_device0,
568         &tegra_dam_device1,
569         &tegra_dam_device2,
570         &tegra_i2s_device0,
571         &tegra_i2s_device1,
572         &tegra_i2s_device2,
573         &tegra_i2s_device3,
574         &tegra_i2s_device4,
575         &tegra_spdif_device,
576         &spdif_dit_device,
577         &bluetooth_dit_device,
578         &baseband_dit_device,
579 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
580         &pluto_tegra_wakeup_monitor_device,
581 #endif
582         &pluto_audio_device,
583         &pluto_audio_aic326x_device,
584         &tegra_hda_device,
585 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
586         &tegra_aes_device,
587 #endif
588 #ifdef CONFIG_MHI_NETDEV
589         &mhi_netdevice0,  /* MHI netdevice */
590 #endif /* CONFIG_MHI_NETDEV */
591 };
592
593 #ifdef CONFIG_USB_SUPPORT
594
595 static void pluto_usb_hsic_postsupend(void)
596 {
597         pr_debug("%s\n", __func__);
598 #ifdef CONFIG_TEGRA_BB_XMM_POWER
599         baseband_xmm_set_power_status(BBXMM_PS_L2);
600 #endif
601 }
602
603 static void pluto_usb_hsic_preresume(void)
604 {
605         pr_debug("%s\n", __func__);
606 #ifdef CONFIG_TEGRA_BB_XMM_POWER
607         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
608 #endif
609 }
610
611 static void pluto_usb_hsic_post_resume(void)
612 {
613         pr_debug("%s\n", __func__);
614 #ifdef CONFIG_TEGRA_BB_XMM_POWER
615         baseband_xmm_set_power_status(BBXMM_PS_L0);
616 #endif
617 }
618
619 static void pluto_usb_hsic_phy_power(void)
620 {
621         pr_debug("%s\n", __func__);
622 #ifdef CONFIG_TEGRA_BB_XMM_POWER
623         baseband_xmm_set_power_status(BBXMM_PS_L0);
624 #endif
625 }
626
627 static void pluto_usb_hsic_post_phy_off(void)
628 {
629         pr_debug("%s\n", __func__);
630 #ifdef CONFIG_TEGRA_BB_XMM_POWER
631         baseband_xmm_set_power_status(BBXMM_PS_L2);
632 #endif
633 }
634
635 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
636         .post_suspend = pluto_usb_hsic_postsupend,
637         .pre_resume = pluto_usb_hsic_preresume,
638         .port_power = pluto_usb_hsic_phy_power,
639         .post_resume = pluto_usb_hsic_post_resume,
640         .post_phy_off = pluto_usb_hsic_post_phy_off,
641 };
642
643 static struct tegra_usb_platform_data tegra_ehci3_hsic_xmm_pdata = {
644         .port_otg = false,
645         .has_hostpc = true,
646         .unaligned_dma_buf_supported = false,
647         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
648         .op_mode        = TEGRA_USB_OPMODE_HOST,
649         .u_data.host = {
650                 .vbus_gpio = -1,
651                 .hot_plug = false,
652                 .remote_wakeup_supported = false,
653                 .power_off_on_suspend = false,
654         },
655         .ops = &oem2_plat_ops,
656 };
657
658 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
659         .port_otg = false,
660         .has_hostpc = true,
661         .unaligned_dma_buf_supported = false,
662         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
663         .op_mode        = TEGRA_USB_OPMODE_HOST,
664         .u_data.host = {
665                 .vbus_gpio = -1,
666                 .hot_plug = false,
667                 .remote_wakeup_supported = true,
668                 .power_off_on_suspend = true,
669         },
670 };
671
672 static struct tegra_usb_platform_data tegra_udc_pdata = {
673         .port_otg = true,
674         .has_hostpc = true,
675         .builtin_host_disabled = true,
676         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
677         .op_mode = TEGRA_USB_OPMODE_DEVICE,
678         .u_data.dev = {
679                 .vbus_pmu_irq = 0,
680                 .vbus_gpio = -1,
681                 .charging_supported = false,
682                 .remote_wakeup_supported = false,
683         },
684         .u_cfg.utmi = {
685                 .hssync_start_delay = 0,
686                 .elastic_limit = 16,
687                 .idle_wait_delay = 17,
688                 .term_range_adj = 6,
689                 .xcvr_setup = 8,
690                 .xcvr_lsfslew = 2,
691                 .xcvr_lsrslew = 2,
692                 .xcvr_setup_offset = 0,
693                 .xcvr_use_fuses = 1,
694         },
695 };
696
697 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
698         .port_otg = true,
699         .has_hostpc = true,
700         .builtin_host_disabled = true,
701         .unaligned_dma_buf_supported = false,
702         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
703         .op_mode = TEGRA_USB_OPMODE_HOST,
704         .u_data.host = {
705                 .vbus_gpio = -1,
706                 .hot_plug = false,
707                 .remote_wakeup_supported = true,
708                 .power_off_on_suspend = true,
709         },
710         .u_cfg.utmi = {
711                 .hssync_start_delay = 0,
712                 .elastic_limit = 16,
713                 .idle_wait_delay = 17,
714                 .term_range_adj = 6,
715                 .xcvr_setup = 15,
716                 .xcvr_lsfslew = 2,
717                 .xcvr_lsrslew = 2,
718                 .xcvr_setup_offset = 0,
719                 .xcvr_use_fuses = 1,
720                 .vbus_oc_map = 0x7,
721         },
722 };
723
724 static struct tegra_usb_otg_data tegra_otg_pdata = {
725         .ehci_device = &tegra_ehci1_device,
726         .ehci_pdata = &tegra_ehci1_utmi_pdata,
727 };
728
729 static struct regulator *baseband_reg;
730 static struct gpio modem_gpios[] = { /* i500 modem */
731         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
732 };
733
734 static struct gpio modem2_gpios[] = {
735         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
736         {MDM2_RST, GPIOF_DIR_OUT, "MODEM2 RESET"},
737         {MDM2_ACK2, GPIOF_OUT_INIT_HIGH, "MODEM2 ACK2"},
738         {MDM2_ACK1, GPIOF_OUT_INIT_LOW, "MODEM2 ACK1"},
739 };
740
741 static void baseband2_post_phy_on(void);
742 static void baseband2_pre_phy_off(void);
743
744 static struct tegra_usb_phy_platform_ops baseband2_plat_ops = {
745         .pre_phy_off = baseband2_pre_phy_off,
746         .post_phy_on = baseband2_post_phy_on,
747 };
748
749 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
750         .port_otg = false,
751         .has_hostpc = true,
752         .unaligned_dma_buf_supported = false,
753         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
754         .op_mode = TEGRA_USB_OPMODE_HOST,
755         .u_data.host = {
756                 .vbus_gpio = -1,
757                 .hot_plug = false,
758                 .remote_wakeup_supported = false,
759                 .power_off_on_suspend = false,
760         },
761 };
762
763 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
764         .port_otg = false,
765         .has_hostpc = true,
766         .unaligned_dma_buf_supported = false,
767         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
768         .op_mode = TEGRA_USB_OPMODE_HOST,
769         .u_data.host = {
770                 .vbus_gpio = -1,
771                 .hot_plug = false,
772                 .remote_wakeup_supported = false,
773                 .power_off_on_suspend = false,
774         },
775         .ops = &baseband2_plat_ops,
776 };
777
778 static struct tegra_usb_platform_data tegra_hsic_pdata = {
779         .port_otg = false,
780         .has_hostpc = true,
781         .unaligned_dma_buf_supported = false,
782         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
783         .op_mode        = TEGRA_USB_OPMODE_HOST,
784         .u_data.host = {
785                 .vbus_gpio = -1,
786                 .hot_plug = false,
787                 .remote_wakeup_supported = true,
788                 .power_off_on_suspend = true,
789         },
790 };
791
792 static struct platform_device *
793 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
794 {
795         struct platform_device *pdev;
796         int val;
797
798         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
799         if (!pdev)
800                 return NULL;
801
802         val = platform_device_add_resources(pdev, ehci_dev->resource,
803                                                 ehci_dev->num_resources);
804         if (val)
805                 goto error;
806
807         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
808         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
809
810         val = platform_device_add_data(pdev, &tegra_ehci3_hsic_xmm_pdata,
811                         sizeof(struct tegra_usb_platform_data));
812         if (val)
813                 goto error;
814
815         val = platform_device_add(pdev);
816         if (val)
817                 goto error;
818
819         return pdev;
820
821 error:
822         pr_err("%s: failed to add the host contoller device\n", __func__);
823         platform_device_put(pdev);
824         return NULL;
825 }
826
827 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
828 {
829         struct platform_device *pdev = *platdev;
830
831         if (pdev && &pdev->dev) {
832                 platform_device_unregister(pdev);
833                 *platdev = NULL;
834         } else
835                 pr_err("%s: no platform device\n", __func__);
836 }
837
838 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
839
840 static union tegra_bb_gpio_id bb_gpio_oem1 = {
841         .oem1 = {
842                 .reset = BB_OEM1_GPIO_RST,
843                 .pwron = BB_OEM1_GPIO_ON,
844                 .awr = BB_OEM1_GPIO_AWR,
845                 .cwr = BB_OEM1_GPIO_CWR,
846                 .spare = BB_OEM1_GPIO_SPARE,
847                 .wdi = BB_OEM1_GPIO_WDI,
848         },
849 };
850
851 static struct tegra_bb_pdata bb_pdata_oem1 = {
852         .id = &bb_gpio_oem1,
853         .device = &tegra_ehci3_device,
854         .ehci_register = tegra_usb_hsic_host_register,
855         .ehci_unregister = tegra_usb_hsic_host_unregister,
856         .bb_id = TEGRA_BB_OEM1,
857 };
858
859 static struct platform_device tegra_bb_oem1 = {
860         .name = "tegra_baseband_power",
861         .id = -1,
862         .dev = {
863                 .platform_data = &bb_pdata_oem1,
864         },
865 };
866
867 static int baseband_init(void)
868 {
869         int ret;
870
871         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
872         if (ret) {
873                 pr_warn("%s:gpio request failed\n", __func__);
874                 return ret;
875         }
876
877         baseband_reg = regulator_get(NULL, "vdd_core_bb");
878         if (IS_ERR_OR_NULL(baseband_reg))
879                 pr_warn("%s: baseband regulator get failed\n", __func__);
880         else
881                 regulator_enable(baseband_reg);
882
883         /* enable pull-down for MDM1_COLD_BOOT */
884         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
885                                     TEGRA_PUPD_PULL_DOWN);
886
887         /* export GPIO for user space access through sysfs */
888         gpio_export(MDM_RST, false);
889
890         return 0;
891 }
892
893 static const struct tegra_modem_operations baseband_operations = {
894         .init = baseband_init,
895 };
896
897 #define MODEM_BOOT_EDP_MAX 0
898 /* FIXME: get accurate boot current value */
899 static unsigned int modem_boot_edp_states[] = {500};
900 static struct edp_client modem_boot_edp_client = {
901         .name = "modem_boot",
902         .states = modem_boot_edp_states,
903         .num_states = ARRAY_SIZE(modem_boot_edp_states),
904         .e0_index = MODEM_BOOT_EDP_MAX,
905         .priority = EDP_MAX_PRIO,
906 };
907
908 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
909         .ops = &baseband_operations,
910         .wake_gpio = -1,
911         .boot_gpio = MDM_COLDBOOT,
912         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
913         .autosuspend_delay = 2000,
914         .short_autosuspend_delay = 50,
915         .tegra_ehci_device = &tegra_ehci2_device,
916         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
917         .modem_boot_edp_client = &modem_boot_edp_client,
918         .edp_manager_name = "battery",
919         .i_breach_ppm = 500000,
920         /* FIXME: get useful adjperiods */
921         .i_thresh_3g_adjperiod = 10000,
922         .i_thresh_lte_adjperiod = 10000,
923 };
924
925 static struct platform_device icera_baseband_device = {
926         .name = "tegra_usb_modem_power",
927         .id = -1,
928         .dev = {
929                 .platform_data = &baseband_pdata,
930         },
931 };
932
933 static void baseband2_post_phy_on(void)
934 {
935         /* set MDM2_ACK2 low */
936         gpio_set_value(MDM2_ACK2, 0);
937 }
938
939 static void baseband2_pre_phy_off(void)
940 {
941         /* set MDM2_ACK2 high */
942         gpio_set_value(MDM2_ACK2, 1);
943 }
944
945 static void baseband2_start(void)
946 {
947         /*
948          *  Leave baseband powered OFF.
949          *  User-space daemons will take care of powering it up.
950          */
951         pr_info("%s\n", __func__);
952         gpio_set_value(MDM2_PWR_ON, 0);
953 }
954
955 static void baseband2_reset(void)
956 {
957         /* Initiate power cycle on baseband sub system */
958         pr_info("%s\n", __func__);
959         gpio_set_value(MDM2_PWR_ON, 0);
960         mdelay(200);
961         gpio_set_value(MDM2_PWR_ON, 1);
962 }
963
964 static int baseband2_init(void)
965 {
966         int ret;
967
968         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
969         if (ret)
970                 return ret;
971
972         /* enable pull-up for MDM2_REQ2 */
973         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PV1,
974                                     TEGRA_PUPD_PULL_UP);
975
976         /* export GPIO for user space access through sysfs */
977         gpio_export(MDM2_PWR_ON, false);
978
979         return 0;
980 }
981
982 static const struct tegra_modem_operations baseband2_operations = {
983         .init = baseband2_init,
984         .start = baseband2_start,
985         .reset = baseband2_reset,
986 };
987
988 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
989         .ops = &baseband2_operations,
990         .wake_gpio = MDM2_REQ2,
991         .wake_irq_flags = IRQF_TRIGGER_FALLING,
992         .boot_gpio = MDM2_COLDBOOT,
993         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
994         .autosuspend_delay = 2000,
995         .short_autosuspend_delay = 50,
996         .tegra_ehci_device = &tegra_ehci3_device,
997         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
998 };
999
1000 static struct platform_device icera_baseband2_device = {
1001         .name = "tegra_usb_modem_power",
1002         .id = -1,
1003         .dev = {
1004                 .platform_data = &baseband2_pdata,
1005         },
1006 };
1007
1008 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
1009         .baseband_type = BASEBAND_XMM,
1010         .modem = {
1011                 .xmm = {
1012                         .bb_rst = XMM_GPIO_BB_RST,
1013                         .bb_on = XMM_GPIO_BB_ON,
1014                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1015                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1016                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1017                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1018                 },
1019         },
1020 };
1021
1022 static struct platform_device tegra_baseband_xmm_power_device = {
1023         .name = "baseband_xmm_power",
1024         .id = -1,
1025         .dev = {
1026                 .platform_data = &tegra_baseband_xmm_power_data,
1027         },
1028 };
1029
1030 static struct platform_device tegra_baseband_xmm_power2_device = {
1031         .name = "baseband_xmm_power2",
1032         .id = -1,
1033         .dev = {
1034                 .platform_data = &tegra_baseband_xmm_power_data,
1035         },
1036 };
1037
1038 static void pluto_usb_init(void)
1039 {
1040         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1041
1042         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1043                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1044                 platform_device_register(&tegra_otg_device);
1045
1046                 /* Setup the udc platform data */
1047                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1048         }
1049 }
1050
1051 static void pluto_modem_init(void)
1052 {
1053         int modem_id = tegra_get_modem_id();
1054         struct board_info board_info;
1055         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1056
1057         tegra_get_board_info(&board_info);
1058         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1059
1060         switch (modem_id) {
1061         case TEGRA_BB_I500: /* on board i500 HSIC */
1062                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB))
1063                         platform_device_register(&icera_baseband_device);
1064                 break;
1065         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1066                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB))
1067                         platform_device_register(&icera_baseband2_device);
1068                 break;
1069         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1070                 if ((board_info.board_id == BOARD_E1575) ||
1071                         ((board_info.board_id == BOARD_E1580) &&
1072                                 (board_info.fab >= BOARD_FAB_A03))) {
1073                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1074                                                         TEGRA_TRI_NORMAL);
1075                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1076                 }
1077                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1078                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1079                         tegra_ehci3_device.dev.platform_data
1080                                 = &tegra_hsic_pdata;
1081                         platform_device_register(&tegra_bb_oem1);
1082                 }
1083                 break;
1084         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1085                 /* fix wrong wiring in Pluto A02 */
1086                 if ((board_info.board_id == BOARD_E1580) &&
1087                         (board_info.fab == BOARD_FAB_A02)) {
1088                         pr_info(
1089 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1090                                 __func__);
1091                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1092                                 != MDM2_PWR_ON)
1093                                 pr_err(
1094 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1095                                         __func__);
1096                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1097                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1098                 }
1099                 /* baseband-power.ko will register ehci3 device */
1100                 tegra_ehci3_device.dev.platform_data =
1101                                         &tegra_ehci3_hsic_xmm_pdata;
1102                 tegra_baseband_xmm_power_data.hsic_register =
1103                                                 &tegra_usb_hsic_host_register;
1104                 tegra_baseband_xmm_power_data.hsic_unregister =
1105                                                 &tegra_usb_hsic_host_unregister;
1106                 tegra_baseband_xmm_power_data.ehci_device =
1107                                         &tegra_ehci3_device;
1108                 platform_device_register(&tegra_baseband_xmm_power_device);
1109                 platform_device_register(&tegra_baseband_xmm_power2_device);
1110                 /* override audio settings - use 8kHz */
1111                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1112                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1113                         = 2;
1114                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1115                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1116                         = 1;
1117                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1118                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1119                         = TEGRA_DAIFMT_I2S;
1120                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1121                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1122                         = 16;
1123                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1124                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1125                         = 8000;
1126                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1127                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1128                         = 2;
1129                 break;
1130         case TEGRA_BB_HSIC_HUB: /* i500 SWD HSIC */
1131                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1132                         tegra_ehci3_device.dev.platform_data =
1133                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1134                         platform_device_register(&tegra_ehci3_device);
1135                 }
1136                 break;
1137         default:
1138                 return;
1139         }
1140 }
1141
1142 static struct tegra_xusb_pad_data xusb_padctl_data = {
1143         .pad_mux = 0x1,
1144         .port_cap = 0x1,
1145         .snps_oc_map = 0x1ff,
1146         .usb2_oc_map = 0x3c,
1147         .ss_port_map = 0x2,
1148         .oc_det = 0,
1149         .rx_wander = 0xf0,
1150         .otg_pad0_ctl0 = 0xffc7ffff,
1151         .otg_pad0_ctl1 = 0x7,
1152         .otg_pad1_ctl0 = 0xffffffff,
1153         .otg_pad1_ctl1 = 0,
1154         .bias_pad_ctl0 = 0,
1155         .hsic_pad0_ctl0 = 0xffff00ff,
1156         .hsic_pad0_ctl1 = 0xffff00ff,
1157         .pmc_value = 0xfffffff0,
1158 };
1159
1160 static void pluto_xusb_init(void)
1161 {
1162         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1163
1164         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1165                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1166
1167                 /*
1168                  * read from usb_calib0 and pass to driver
1169                  * set HS_CURR_LEVEL = usb_calib0[5:0]
1170                  * set TERM_RANGE_ADJ = usb_calib0[10:7]
1171                  * set HS_IREF_CAP = usb_calib0[14:13]
1172                  * set HS_SQUELCH_LEVEL = usb_calib0[12:11]
1173                  */
1174
1175                 xusb_padctl_data.hs_curr_level = (usb_calib0 >> 0) & 0x3f;
1176                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1177                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1178                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1179
1180                 tegra_xhci_device.dev.platform_data = &xusb_padctl_data;
1181                 platform_device_register(&tegra_xhci_device);
1182         }
1183 }
1184 #else
1185 static void pluto_usb_init(void) { }
1186 static void pluto_modem_init(void) { }
1187 static void pluto_xusb_init(void) { }
1188 #endif
1189
1190 static void pluto_audio_init(void)
1191 {
1192         struct board_info board_info;
1193
1194         tegra_get_board_info(&board_info);
1195
1196 }
1197
1198 static struct platform_device *pluto_spi_devices[] __initdata = {
1199         &tegra11_spi_device4,
1200 };
1201
1202 struct spi_clk_parent spi_parent_clk_pluto[] = {
1203         [0] = {.name = "pll_p"},
1204 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
1205         [1] = {.name = "pll_m"},
1206         [2] = {.name = "clk_m"},
1207 #else
1208         [1] = {.name = "clk_m"},
1209 #endif
1210 };
1211
1212 static struct tegra_spi_platform_data pluto_spi_pdata = {
1213         .is_dma_based           = false,
1214         .max_dma_buffer         = 16 * 1024,
1215         .is_clkon_always        = false,
1216         .max_rate               = 25000000,
1217 };
1218
1219 static void __init pluto_spi_init(void)
1220 {
1221         int i;
1222         struct clk *c;
1223         struct board_info board_info, display_board_info;
1224
1225         tegra_get_board_info(&board_info);
1226         tegra_get_display_board_info(&display_board_info);
1227
1228         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_pluto); ++i) {
1229                 c = tegra_get_clock_by_name(spi_parent_clk_pluto[i].name);
1230                 if (IS_ERR_OR_NULL(c)) {
1231                         pr_err("Not able to get the clock for %s\n",
1232                                                 spi_parent_clk_pluto[i].name);
1233                         continue;
1234                 }
1235                 spi_parent_clk_pluto[i].parent_clk = c;
1236                 spi_parent_clk_pluto[i].fixed_clk_rate = clk_get_rate(c);
1237         }
1238         pluto_spi_pdata.parent_clk_list = spi_parent_clk_pluto;
1239         pluto_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_pluto);
1240         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1241         platform_add_devices(pluto_spi_devices,
1242                                 ARRAY_SIZE(pluto_spi_devices));
1243 }
1244
1245 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1246         /* name         parent          rate            enabled */
1247         { "extern2",    "pll_p",        41000000,       false},
1248         { "clk_out_2",  "extern2",      40800000,       false},
1249         { NULL,         NULL,           0,              0},
1250 };
1251
1252 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1253         .gpio_reset = 0,
1254         .config = 0,
1255         .platform_id = RM_PLATFORM_P005,
1256         .name_of_clock = "clk_out_2",
1257 };
1258
1259 static struct tegra_spi_device_controller_data dev_cdata = {
1260         .rx_clk_tap_delay = 0,
1261         .tx_clk_tap_delay = 0,
1262 };
1263
1264 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1265         {
1266          .modalias = "rm_ts_spidev",
1267          .bus_num = 3,
1268          .chip_select = 2,
1269          .max_speed_hz = 12 * 1000 * 1000,
1270          .mode = SPI_MODE_0,
1271          .controller_data = &dev_cdata,
1272          .platform_data = &rm31080ts_pluto_data,
1273          },
1274 };
1275
1276 static int __init pluto_touch_init(void)
1277 {
1278         tegra_clk_init_from_table(touch_clk_init_table);
1279         clk_enable(tegra_get_clock_by_name("clk_out_2"));
1280         mdelay(20);
1281         rm31080a_pluto_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1282         touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1283                                 TOUCH_GPIO_RST_RAYDIUM_SPI,
1284                                 &rm31080ts_pluto_data,
1285                                 &rm31080a_pluto_spi_board[0],
1286                                 ARRAY_SIZE(rm31080a_pluto_spi_board));
1287         return 0;
1288 }
1289
1290 #ifdef CONFIG_EDP_FRAMEWORK
1291 static struct edp_manager battery_edp_manager = {
1292         .name = "battery",
1293         .imax = 3250
1294 };
1295
1296 static void __init pluto_battery_edp_init(void)
1297 {
1298         struct edp_governor *g;
1299         int r;
1300
1301         r = edp_register_manager(&battery_edp_manager);
1302         if (r)
1303                 goto err_ret;
1304
1305         /* start with priority governor */
1306         g = edp_get_governor("priority");
1307         if (!g) {
1308                 r = -EFAULT;
1309                 goto err_ret;
1310         }
1311
1312         r = edp_set_governor(&battery_edp_manager, g);
1313         if (r)
1314                 goto err_ret;
1315
1316         return;
1317
1318 err_ret:
1319         pr_err("Battery EDP init failed with error %d\n", r);
1320         WARN_ON(1);
1321 }
1322 #else
1323 static inline void pluto_battery_edp_init(void) {}
1324 #endif
1325
1326 #ifdef CONFIG_USE_OF
1327 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1328         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1329                                 NULL),
1330         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1331                                 NULL),
1332         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1333                                 &pluto_tegra_sdhci_platform_data0),
1334         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1335                                 NULL),
1336         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
1337                                 NULL),
1338         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
1339                                 NULL),
1340         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
1341                                 NULL),
1342         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
1343                                 NULL),
1344         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
1345                                 NULL),
1346         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
1347                                 NULL),
1348         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
1349                                 NULL),
1350         {}
1351 };
1352 #endif
1353
1354 static void __init tegra_pluto_early_init(void)
1355 {
1356         pluto_battery_edp_init();
1357         tegra_clk_init_from_table(pluto_clk_init_table);
1358         tegra_clk_vefify_parents();
1359         tegra_smmu_init();
1360         tegra_soc_device_init("tegra_pluto");
1361 }
1362
1363 static void __init tegra_pluto_late_init(void)
1364 {
1365         platform_device_register(&tegra_pinmux_device);
1366         pluto_pinmux_init();
1367         pluto_i2c_init();
1368         pluto_spi_init();
1369         pluto_usb_init();
1370         pluto_xusb_init();
1371         pluto_uart_init();
1372         pluto_audio_init();
1373         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1374         //tegra_ram_console_debug_init();
1375         tegra_io_dpd_init();
1376         pluto_sdhci_init();
1377         pluto_regulator_init();
1378         pluto_suspend_init();
1379         pluto_touch_init();
1380         pluto_emc_init();
1381         pluto_edp_init();
1382         isomgr_init();
1383         pluto_panel_init();
1384         pluto_pmon_init();
1385         pluto_kbc_init();
1386 #ifdef CONFIG_BT_BLUESLEEP
1387         pluto_setup_bluesleep();
1388         pluto_setup_bt_rfkill();
1389 #elif defined CONFIG_BLUEDROID_PM
1390         pluto_setup_bluedroid_pm();
1391 #endif
1392         tegra_release_bootloader_fb();
1393         pluto_modem_init();
1394 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1395         tegra_wdt_recovery_init();
1396 #endif
1397         pluto_sensors_init();
1398         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1399         pluto_soctherm_init();
1400         tegra_register_fuse();
1401 }
1402
1403 static void __init pluto_ramconsole_reserve(unsigned long size)
1404 {
1405         tegra_ram_console_debug_reserve(SZ_1M);
1406 }
1407
1408 static void __init tegra_pluto_dt_init(void)
1409 {
1410         tegra_pluto_early_init();
1411
1412         of_platform_populate(NULL,
1413                 of_default_bus_match_table, pluto_auxdata_lookup,
1414                 &platform_bus);
1415
1416         tegra_pluto_late_init();
1417 }
1418
1419 static void __init tegra_pluto_reserve(void)
1420 {
1421 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1422         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1423         tegra_reserve(0, SZ_16M, SZ_4M);
1424 #else
1425         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1426 #endif
1427         pluto_ramconsole_reserve(SZ_1M);
1428 }
1429
1430 static const char * const pluto_dt_board_compat[] = {
1431         "nvidia,pluto",
1432         NULL
1433 };
1434
1435 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1436         .atag_offset    = 0x100,
1437         .smp            = smp_ops(tegra_smp_ops),
1438         .map_io         = tegra_map_common_io,
1439         .reserve        = tegra_pluto_reserve,
1440         .init_early     = tegra11x_init_early,
1441         .init_irq       = tegra_dt_init_irq,
1442         .handle_irq     = gic_handle_irq,
1443         .timer          = &tegra_timer,
1444         .init_machine   = tegra_pluto_dt_init,
1445         .restart        = tegra_assert_system_reset,
1446         .dt_compat      = pluto_dt_board_compat,
1447 MACHINE_END