ARM: tegra: pluto: add DTV support
[linux-3.10.git] / arch / arm / mach-tegra / board-pluto.c
1 /*
2  * arch/arm/mach-tegra/board-pluto.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/ctype.h>
24 #include <linux/platform_device.h>
25 #include <linux/clk.h>
26 #include <linux/serial_8250.h>
27 #include <linux/i2c.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/delay.h>
30 #include <linux/i2c-tegra.h>
31 #include <linux/gpio.h>
32 #include <linux/input.h>
33 #include <linux/platform_data/tegra_usb.h>
34 #include <linux/platform_data/tegra_xusb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/spi/rm31080a_ts.h>
37 #include <linux/tegra_uart.h>
38 #include <linux/memblock.h>
39 #include <linux/spi/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41 #include <linux/nfc/bcm2079x.h>
42 #include <linux/rfkill-gpio.h>
43 #include <linux/skbuff.h>
44 #include <linux/ti_wilink_st.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/smb349-charger.h>
47 #include <linux/max17048_battery.h>
48 #include <linux/leds.h>
49 #include <linux/i2c/at24.h>
50 #include <linux/mfd/max8831.h>
51 #include <linux/of_platform.h>
52 #include <linux/a2220.h>
53 #include <linux/edp.h>
54 #include <linux/mfd/tlv320aic3262-registers.h>
55 #include <linux/mfd/tlv320aic3xxx-core.h>
56 #include <linux/usb/tegra_usb_phy.h>
57
58 #include <asm/hardware/gic.h>
59
60 #include <mach/clk.h>
61 #include <mach/irqs.h>
62 #include <mach/pinmux.h>
63 #include <mach/pinmux-t11.h>
64 #include <mach/io_dpd.h>
65 #include <mach/i2s.h>
66 #include <mach/isomgr.h>
67 #include <mach/tegra_asoc_pdata.h>
68 #include <asm/mach-types.h>
69 #include <asm/mach/arch.h>
70 #include <mach/gpio-tegra.h>
71 #include <mach/tegra_fiq_debugger.h>
72 #include <mach/tegra-bb-power.h>
73 #include <mach/tegra_wakeup_monitor.h>
74 #include <linux/platform_data/tegra_usb_modem_power.h>
75
76 #include "board.h"
77 #include "board-common.h"
78 #include "board-touch.h"
79 #include "board-touch-raydium.h"
80 #include "clock.h"
81 #include "board-pluto.h"
82 #include "baseband-xmm-power.h"
83 #include "tegra-board-id.h"
84 #include "devices.h"
85 #include "gpio-names.h"
86 #include "fuse.h"
87 #include "pm.h"
88 #include "common.h"
89 #include "iomap.h"
90
91
92 #ifdef CONFIG_BT_BLUESLEEP
93 static struct rfkill_gpio_platform_data pluto_bt_rfkill_pdata = {
94         .name           = "bt_rfkill",
95         .shutdown_gpio  = TEGRA_GPIO_PQ7,
96         .reset_gpio     = TEGRA_GPIO_PQ6,
97         .type           = RFKILL_TYPE_BLUETOOTH,
98 };
99
100 static struct platform_device pluto_bt_rfkill_device = {
101         .name = "rfkill_gpio",
102         .id             = -1,
103         .dev = {
104                 .platform_data = &pluto_bt_rfkill_pdata,
105         },
106 };
107
108 static noinline void __init pluto_setup_bt_rfkill(void)
109 {
110         platform_device_register(&pluto_bt_rfkill_device);
111 }
112
113 static struct resource pluto_bluesleep_resources[] = {
114         [0] = {
115                 .name = "gpio_host_wake",
116                         .start  = TEGRA_GPIO_PU6,
117                         .end    = TEGRA_GPIO_PU6,
118                         .flags  = IORESOURCE_IO,
119         },
120         [1] = {
121                 .name = "gpio_ext_wake",
122                         .start  = TEGRA_GPIO_PEE1,
123                         .end    = TEGRA_GPIO_PEE1,
124                         .flags  = IORESOURCE_IO,
125         },
126         [2] = {
127                 .name = "host_wake",
128                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
129         },
130 };
131
132 static struct platform_device pluto_bluesleep_device = {
133         .name           = "bluesleep",
134         .id             = -1,
135         .num_resources  = ARRAY_SIZE(pluto_bluesleep_resources),
136         .resource       = pluto_bluesleep_resources,
137 };
138
139 static noinline void __init pluto_setup_bluesleep(void)
140 {
141         pluto_bluesleep_resources[2].start =
142                 pluto_bluesleep_resources[2].end =
143                         gpio_to_irq(TEGRA_GPIO_PU6);
144         platform_device_register(&pluto_bluesleep_device);
145         return;
146 }
147 #elif defined CONFIG_BLUEDROID_PM
148 static struct resource pluto_bluedroid_pm_resources[] = {
149         [0] = {
150                 .name   = "shutdown_gpio",
151                 .start  = TEGRA_GPIO_PQ7,
152                 .end    = TEGRA_GPIO_PQ7,
153                 .flags  = IORESOURCE_IO,
154         },
155         [1] = {
156                 .name = "host_wake",
157                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
158         },
159         [2] = {
160                 .name = "gpio_ext_wake",
161                 .start  = TEGRA_GPIO_PEE1,
162                 .end    = TEGRA_GPIO_PEE1,
163                 .flags  = IORESOURCE_IO,
164         },
165         [3] = {
166                 .name = "gpio_host_wake",
167                 .start  = TEGRA_GPIO_PU6,
168                 .end    = TEGRA_GPIO_PU6,
169                 .flags  = IORESOURCE_IO,
170         },
171         [4] = {
172                 .name = "reset_gpio",
173                 .start  = TEGRA_GPIO_PQ6,
174                 .end    = TEGRA_GPIO_PQ6,
175                 .flags  = IORESOURCE_IO,
176         },
177 };
178
179 static struct platform_device pluto_bluedroid_pm_device = {
180         .name = "bluedroid_pm",
181         .id             = 0,
182         .num_resources  = ARRAY_SIZE(pluto_bluedroid_pm_resources),
183         .resource       = pluto_bluedroid_pm_resources,
184 };
185
186 static noinline void __init pluto_setup_bluedroid_pm(void)
187 {
188         pluto_bluedroid_pm_resources[1].start =
189                 pluto_bluedroid_pm_resources[1].end =
190                                         gpio_to_irq(TEGRA_GPIO_PU6);
191         platform_device_register(&pluto_bluedroid_pm_device);
192 }
193 #endif
194
195 static __initdata struct tegra_clk_init_table pluto_clk_init_table[] = {
196         /* name         parent          rate            enabled */
197         { "pll_m",      NULL,           0,              false},
198         { "hda",        "pll_p",        108000000,      false},
199         { "hda2codec_2x", "pll_p",      48000000,       false},
200         { "pwm",        "pll_p",        3187500,        false},
201         { "i2s1",       "pll_a_out0",   0,              false},
202         { "i2s2",       "pll_a_out0",   0,              false},
203         { "i2s3",       "pll_a_out0",   0,              false},
204         { "i2s4",       "pll_a_out0",   0,              false},
205         { "spdif_out",  "pll_a_out0",   0,              false},
206         { "d_audio",    "clk_m",        12000000,       false},
207         { "dam0",       "clk_m",        12000000,       false},
208         { "dam1",       "clk_m",        12000000,       false},
209         { "dam2",       "clk_m",        12000000,       false},
210         { "audio0",     "i2s0_sync",    0,              false},
211         { "audio1",     "i2s1_sync",    0,              false},
212         { "audio2",     "i2s2_sync",    0,              false},
213         { "audio3",     "i2s3_sync",    0,              false},
214         { "audio4",     "i2s4_sync",    0,              false},
215         { "vi_sensor",  "pll_p",        150000000,      false},
216         { "cilab",      "pll_p",        150000000,      false},
217         { "cilcd",      "pll_p",        150000000,      false},
218         { "cile",       "pll_p",        150000000,      false},
219         { "i2c1",       "pll_p",        3200000,        false},
220         { "i2c2",       "pll_p",        3200000,        false},
221         { "i2c3",       "pll_p",        3200000,        false},
222         { "i2c4",       "pll_p",        3200000,        false},
223         { "i2c5",       "pll_p",        3200000,        false},
224         { "sbc1",       "pll_p",        25000000,       false},
225         { "sbc2",       "pll_p",        25000000,       false},
226         { "sbc3",       "pll_p",        25000000,       false},
227         { "sbc4",       "pll_p",        25000000,       false},
228         { "sbc5",       "pll_p",        25000000,       false},
229         { "sbc6",       "pll_p",        25000000,       false},
230         { "extern3",    "clk_m",        12000000,       false},
231         { "dsia",       "pll_d2_out0",  0,              false},
232         { NULL,         NULL,           0,              0},
233 };
234
235 static struct bcm2079x_platform_data nfc_pdata = {
236         .irq_gpio = TEGRA_GPIO_PW2,
237         .en_gpio = TEGRA_GPIO_PU4,
238         .wake_gpio = TEGRA_GPIO_PX7,
239         };
240
241 static struct i2c_board_info __initdata pluto_i2c_bus3_board_info[] = {
242         {
243                 I2C_BOARD_INFO("bcm2079x-i2c", 0x77),
244                 .platform_data = &nfc_pdata,
245         },
246 };
247
248 static struct tegra_i2c_platform_data pluto_i2c1_platform_data = {
249         .bus_clk_rate   = 100000,
250         .scl_gpio       = TEGRA_GPIO_I2C1_SCL,
251         .sda_gpio       = TEGRA_GPIO_I2C1_SDA,
252 };
253
254 static struct tegra_i2c_platform_data pluto_i2c2_platform_data = {
255         .bus_clk_rate   = 100000,
256         .is_clkon_always = true,
257         .scl_gpio       = TEGRA_GPIO_I2C2_SCL,
258         .sda_gpio       = TEGRA_GPIO_I2C2_SDA,
259 };
260
261 static struct tegra_i2c_platform_data pluto_i2c3_platform_data = {
262         .bus_clk_rate   = 400000,
263         .scl_gpio       = TEGRA_GPIO_I2C3_SCL,
264         .sda_gpio       = TEGRA_GPIO_I2C3_SDA,
265 };
266
267 static struct tegra_i2c_platform_data pluto_i2c4_platform_data = {
268         .bus_clk_rate   = 10000,
269         .scl_gpio       = TEGRA_GPIO_I2C4_SCL,
270         .sda_gpio       = TEGRA_GPIO_I2C4_SDA,
271 };
272
273 static struct tegra_i2c_platform_data pluto_i2c5_platform_data = {
274         .bus_clk_rate   = 400000,
275         .scl_gpio       = TEGRA_GPIO_I2C5_SCL,
276         .sda_gpio       = TEGRA_GPIO_I2C5_SDA,
277         .needs_cl_dvfs_clock = true,
278 };
279
280 static struct aic3262_gpio_setup aic3262_gpio[] = {
281         /* GPIO 1*/
282         {
283                 .used = 1,
284                 .in = 0,
285                 .value = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
286         },
287         /* GPIO 2*/
288         {
289                 .used = 1,
290                 .in = 0,
291                 .value = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
292         },
293         /* GPI1 */
294         {
295                 .used = 1,
296                 .in = 1,
297         },
298         /* GPI2 */
299         {
300                 .used = 1,
301                 .in = 1,
302                 .in_reg = AIC3262_DMIC_INPUT_CNTL,
303                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
304                 .in_reg_shift = AIC3262_DMIC_CONFIGURE_SHIFT,
305                 .value = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
306         },
307         /* GPO1 */
308         {
309                 .used = 1,
310                 .in = 0,
311                 .value = AIC3262_GPO1_FUNC_MSO_OUTPUT_FOR_SPI,
312         },
313 };
314 static struct aic3xxx_pdata aic3262_codec_pdata = {
315         .gpio_irq       = 0,
316         .gpio           = aic3262_gpio,
317         .naudint_irq    = 0,
318         .irq_base       = AIC3262_CODEC_IRQ_BASE,
319 };
320
321 static struct i2c_board_info __initdata cs42l73_board_info = {
322         I2C_BOARD_INFO("cs42l73", 0x4a),
323 };
324
325 static struct i2c_board_info __initdata pluto_codec_a2220_info = {
326         I2C_BOARD_INFO("audience_a2220", 0x3E),
327 };
328
329 static struct i2c_board_info __initdata pluto_codec_aic326x_info = {
330         I2C_BOARD_INFO("tlv320aic3262", 0x18),
331         .platform_data = &aic3262_codec_pdata,
332 };
333
334 static void pluto_i2c_init(void)
335 {
336         tegra11_i2c_device1.dev.platform_data = &pluto_i2c1_platform_data;
337         tegra11_i2c_device2.dev.platform_data = &pluto_i2c2_platform_data;
338         tegra11_i2c_device3.dev.platform_data = &pluto_i2c3_platform_data;
339         tegra11_i2c_device4.dev.platform_data = &pluto_i2c4_platform_data;
340         tegra11_i2c_device5.dev.platform_data = &pluto_i2c5_platform_data;
341
342         platform_device_register(&tegra11_i2c_device5);
343         platform_device_register(&tegra11_i2c_device4);
344 #ifndef CONFIG_OF
345         platform_device_register(&tegra11_i2c_device3);
346 #endif
347         platform_device_register(&tegra11_i2c_device2);
348         platform_device_register(&tegra11_i2c_device1);
349
350         i2c_register_board_info(0, &pluto_codec_a2220_info, 1);
351         i2c_register_board_info(0, &cs42l73_board_info, 1);
352         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
353         pluto_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PW2);
354         i2c_register_board_info(0, pluto_i2c_bus3_board_info, 1);
355         i2c_register_board_info(0, &pluto_codec_aic326x_info, 1);
356 }
357
358 static struct platform_device *pluto_uart_devices[] __initdata = {
359         &tegra_uarta_device,
360         &tegra_uartb_device,
361         &tegra_uartc_device,
362         &tegra_uartd_device,
363 };
364 static struct uart_clk_parent uart_parent_clk[] = {
365         [0] = {.name = "clk_m"},
366         [1] = {.name = "pll_p"},
367 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
368         [2] = {.name = "pll_m"},
369 #endif
370 };
371
372 static struct tegra_uart_platform_data pluto_uart_pdata;
373 static struct tegra_uart_platform_data pluto_loopback_uart_pdata;
374
375 static void __init uart_debug_init(void)
376 {
377         int debug_port_id;
378
379         debug_port_id = uart_console_debug_init(3);
380         if (debug_port_id < 0)
381                 return;
382         pluto_uart_devices[debug_port_id] = uart_console_debug_device;
383 }
384
385 static void __init pluto_uart_init(void)
386 {
387         struct clk *c;
388         int i;
389
390         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
391                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
392                 if (IS_ERR_OR_NULL(c)) {
393                         pr_err("Not able to get the clock for %s\n",
394                                                 uart_parent_clk[i].name);
395                         continue;
396                 }
397                 uart_parent_clk[i].parent_clk = c;
398                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
399         }
400         pluto_uart_pdata.parent_clk_list = uart_parent_clk;
401         pluto_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
402         pluto_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
403         pluto_loopback_uart_pdata.parent_clk_count =
404                                                 ARRAY_SIZE(uart_parent_clk);
405         pluto_loopback_uart_pdata.is_loopback = true;
406         tegra_uarta_device.dev.platform_data = &pluto_uart_pdata;
407         tegra_uartb_device.dev.platform_data = &pluto_uart_pdata;
408         tegra_uartc_device.dev.platform_data = &pluto_uart_pdata;
409         tegra_uartd_device.dev.platform_data = &pluto_uart_pdata;
410
411         /* Register low speed only if it is selected */
412         if (!is_tegra_debug_uartport_hs())
413                 uart_debug_init();
414
415         platform_add_devices(pluto_uart_devices,
416                                 ARRAY_SIZE(pluto_uart_devices));
417 }
418
419 static struct resource tegra_rtc_resources[] = {
420         [0] = {
421                 .start = TEGRA_RTC_BASE,
422                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
423                 .flags = IORESOURCE_MEM,
424         },
425         [1] = {
426                 .start = INT_RTC,
427                 .end = INT_RTC,
428                 .flags = IORESOURCE_IRQ,
429         },
430 };
431
432 static struct platform_device tegra_rtc_device = {
433         .name = "tegra_rtc",
434         .id   = -1,
435         .resource = tegra_rtc_resources,
436         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
437 };
438
439 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
440 static struct tegra_wakeup_monitor_platform_data
441                         pluto_tegra_wakeup_monitor_pdata = {
442         .wifi_wakeup_source     = 6,
443         .rtc_wakeup_source      = 18,
444 };
445
446 static struct platform_device pluto_tegra_wakeup_monitor_device = {
447         .name = "tegra_wakeup_monitor",
448         .id   = -1,
449         .dev  = {
450                 .platform_data = &pluto_tegra_wakeup_monitor_pdata,
451         },
452 };
453 #endif
454
455 static struct tegra_asoc_platform_data pluto_audio_pdata = {
456         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
457         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
458         .gpio_hp_mute           = -1,
459         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
460         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
461         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
462         .edp_support            =  true,
463         .edp_states             = {1776, 888, 0},
464         .i2s_param[HIFI_CODEC]  = {
465                 .audio_port_id  = 1,
466                 .is_i2s_master  = 0,
467                 .i2s_mode       = TEGRA_DAIFMT_I2S,
468                 .sample_size    = 16,
469                 .channels       = 2,
470         },
471         .i2s_param[BASEBAND]    = {
472                 .audio_port_id  = 2,
473                 .is_i2s_master  = 1,
474                 .i2s_mode       = TEGRA_DAIFMT_I2S,
475                 .sample_size    = 16,
476                 .rate           = 16000,
477                 .channels       = 2,
478                 .bit_clk        = 1024000,
479         },
480         .i2s_param[BT_SCO]      = {
481                 .audio_port_id  = 3,
482                 .is_i2s_master  = 1,
483                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
484                 .sample_size    = 16,
485                 .channels       = 1,
486                 .bit_clk        = 512000,
487         },
488         .i2s_param[VOICE_CODEC] = {
489                 .audio_port_id  = 0,
490                 .is_i2s_master  = 1,
491                 .i2s_mode       = TEGRA_DAIFMT_I2S,
492                 .sample_size    = 16,
493                 .rate           = 16000,
494                 .channels       = 2,
495         },
496 };
497
498 static struct tegra_asoc_platform_data pluto_aic3262_pdata = {
499         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
500         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
501         .gpio_hp_mute           = -1,
502         .gpio_int_mic_en        = TEGRA_GPIO_INT_MIC_EN,
503         .gpio_ext_mic_en        = TEGRA_GPIO_EXT_MIC_EN,
504         .gpio_ldo1_en           = TEGRA_GPIO_LDO1_EN,
505         .edp_support            = true,
506         .edp_states             = {1776, 888, 0},
507         .i2s_param[HIFI_CODEC]  = {
508                 .audio_port_id  = 1,
509                 .is_i2s_master  = 0,
510                 .i2s_mode       = TEGRA_DAIFMT_I2S,
511                 .sample_size    = 16,
512                 .rate           = 48000,
513                 .channels       = 2,
514         },
515         .i2s_param[BASEBAND]    = {
516                 .audio_port_id  = 2,
517                 .is_i2s_master  = 1,
518                 .i2s_mode       = TEGRA_DAIFMT_I2S,
519                 .sample_size    = 16,
520                 .rate           = 16000,
521                 .channels       = 2,
522                 .bit_clk        = 1024000,
523         },
524         .i2s_param[BT_SCO]      = {
525                 .audio_port_id  = 3,
526                 .is_i2s_master  = 1,
527                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
528                 .sample_size    = 16,
529                 .channels       = 1,
530                 .bit_clk        = 512000,
531         },
532         .i2s_param[VOICE_CODEC] = {
533                 .audio_port_id  = 0,
534                 .is_i2s_master  = 1,
535                 .i2s_mode       = TEGRA_DAIFMT_I2S,
536                 .sample_size    = 16,
537                 .rate           = 16000,
538                 .channels       = 2,
539         },
540 };
541
542 static struct platform_device pluto_audio_device = {
543         .name   = "tegra-snd-cs42l73",
544         .id     = 2,
545         .dev    = {
546                 .platform_data = &pluto_audio_pdata,
547         },
548 };
549
550 static struct platform_device pluto_audio_aic326x_device = {
551         .name   = "tegra-snd-aic326x",
552         .id     = 2,
553         .dev    = {
554                 .platform_data  = &pluto_aic3262_pdata,
555         },
556 };
557
558 static struct tegra_spi_device_controller_data dev_bdata = {
559         .rx_clk_tap_delay = 0,
560         .tx_clk_tap_delay = 0,
561 };
562 static struct spi_board_info aic326x_spi_board_info[] = {
563         {
564                 .modalias = "tlv320aic3xxx",
565                 .bus_num = 3,
566                 .chip_select = 0,
567                 .max_speed_hz = 4*1000*1000,
568                 .mode = SPI_MODE_1,
569                 .controller_data = &dev_bdata,
570                 .platform_data = &aic3262_codec_pdata,
571         },
572 };
573
574 #ifdef CONFIG_MHI_NETDEV
575 struct platform_device mhi_netdevice0 = {
576         .name = "mhi_net_device",
577         .id = 0,
578 };
579 #endif /* CONFIG_MHI_NETDEV */
580
581 static struct platform_device *pluto_devices[] __initdata = {
582         &tegra_pmu_device,
583         &tegra_rtc_device,
584         &tegra_udc_device,
585 #if defined(CONFIG_TEGRA_WATCHDOG)
586         &tegra_wdt0_device,
587 #endif
588 #if defined(CONFIG_TEGRA_AVP)
589         &tegra_avp_device,
590 #endif
591 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
592         &tegra11_se_device,
593 #endif
594         &tegra_ahub_device,
595         &tegra_dam_device0,
596         &tegra_dam_device1,
597         &tegra_dam_device2,
598         &tegra_i2s_device0,
599         &tegra_i2s_device1,
600         &tegra_i2s_device2,
601         &tegra_i2s_device3,
602         &tegra_i2s_device4,
603         &tegra_spdif_device,
604         &spdif_dit_device,
605         &bluetooth_dit_device,
606         &baseband_dit_device,
607 #if defined(CONFIG_TEGRA_WAKEUP_MONITOR)
608         &pluto_tegra_wakeup_monitor_device,
609 #endif
610         &pluto_audio_device,
611         &pluto_audio_aic326x_device,
612         &tegra_hda_device,
613 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
614         &tegra_aes_device,
615 #endif
616 #ifdef CONFIG_MHI_NETDEV
617         &mhi_netdevice0,  /* MHI netdevice */
618 #endif /* CONFIG_MHI_NETDEV */
619 };
620
621 #ifdef CONFIG_USB_SUPPORT
622
623 static void pluto_usb_hsic_postsupend(void)
624 {
625         pr_debug("%s\n", __func__);
626 #ifdef CONFIG_TEGRA_BB_XMM_POWER
627         baseband_xmm_set_power_status(BBXMM_PS_L2);
628 #endif
629 }
630
631 static void pluto_usb_hsic_preresume(void)
632 {
633         pr_debug("%s\n", __func__);
634 #ifdef CONFIG_TEGRA_BB_XMM_POWER
635         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
636 #endif
637 }
638
639 static void pluto_usb_hsic_post_resume(void)
640 {
641         pr_debug("%s\n", __func__);
642 #ifdef CONFIG_TEGRA_BB_XMM_POWER
643         baseband_xmm_set_power_status(BBXMM_PS_L0);
644 #endif
645 }
646
647 static void pluto_usb_hsic_phy_power(void)
648 {
649         pr_debug("%s\n", __func__);
650 #ifdef CONFIG_TEGRA_BB_XMM_POWER
651         baseband_xmm_set_power_status(BBXMM_PS_L0);
652 #endif
653 }
654
655 static void pluto_usb_hsic_post_phy_off(void)
656 {
657         pr_debug("%s\n", __func__);
658 #ifdef CONFIG_TEGRA_BB_XMM_POWER
659         baseband_xmm_set_power_status(BBXMM_PS_L2);
660 #endif
661 }
662
663 static struct tegra_usb_phy_platform_ops oem2_plat_ops = {
664         .post_suspend = pluto_usb_hsic_postsupend,
665         .pre_resume = pluto_usb_hsic_preresume,
666         .port_power = pluto_usb_hsic_phy_power,
667         .post_resume = pluto_usb_hsic_post_resume,
668         .post_phy_off = pluto_usb_hsic_post_phy_off,
669 };
670
671 static struct tegra_usb_platform_data tegra_ehci3_hsic_smsc_hub_pdata = {
672         .port_otg = false,
673         .has_hostpc = true,
674         .unaligned_dma_buf_supported = false,
675         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
676         .op_mode        = TEGRA_USB_OPMODE_HOST,
677         .u_data.host = {
678                 .vbus_gpio = -1,
679                 .hot_plug = false,
680                 .remote_wakeup_supported = true,
681                 .power_off_on_suspend = true,
682         },
683 };
684
685 static struct tegra_usb_platform_data tegra_udc_pdata = {
686         .port_otg = true,
687         .has_hostpc = true,
688         .id_det_type = TEGRA_USB_PMU_ID,
689         .unaligned_dma_buf_supported = false,
690         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
691         .op_mode = TEGRA_USB_OPMODE_DEVICE,
692         .u_data.dev = {
693                 .vbus_pmu_irq = 0,
694                 .vbus_gpio = -1,
695                 .charging_supported = false,
696                 .remote_wakeup_supported = false,
697         },
698         .u_cfg.utmi = {
699                 .hssync_start_delay = 0,
700                 .elastic_limit = 16,
701                 .idle_wait_delay = 17,
702                 .term_range_adj = 6,
703                 .xcvr_setup = 8,
704                 .xcvr_lsfslew = 0,
705                 .xcvr_lsrslew = 3,
706                 .xcvr_setup_offset = 0,
707                 .xcvr_use_fuses = 1,
708         },
709 };
710
711 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
712         .port_otg = true,
713         .has_hostpc = true,
714         .id_det_type = TEGRA_USB_PMU_ID,
715         .unaligned_dma_buf_supported = false,
716         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
717         .op_mode = TEGRA_USB_OPMODE_HOST,
718         .u_data.host = {
719                 .vbus_gpio = -1,
720                 .hot_plug = false,
721                 .remote_wakeup_supported = true,
722                 .power_off_on_suspend = true,
723         },
724         .u_cfg.utmi = {
725                 .hssync_start_delay = 0,
726                 .elastic_limit = 16,
727                 .idle_wait_delay = 17,
728                 .term_range_adj = 6,
729                 .xcvr_setup = 15,
730                 .xcvr_lsfslew = 0,
731                 .xcvr_lsrslew = 3,
732                 .xcvr_setup_offset = 0,
733                 .xcvr_use_fuses = 1,
734                 .vbus_oc_map = 0x7,
735         },
736 };
737
738 static struct tegra_usb_otg_data tegra_otg_pdata = {
739         .ehci_device = &tegra_ehci1_device,
740         .ehci_pdata = &tegra_ehci1_utmi_pdata,
741         .id_extcon_dev_name = "MAX77665_MUIC_ID",
742 };
743
744 static struct regulator *baseband_reg;
745 static struct gpio modem_gpios[] = { /* i500 modem */
746         {MDM_RST, GPIOF_OUT_INIT_LOW, "MODEM RESET"},
747 };
748
749 static struct gpio modem2_gpios[] = {
750         {MDM2_PWR_ON, GPIOF_OUT_INIT_LOW, "MODEM2 PWR ON"},
751         {MDM2_RST, GPIOF_OUT_INIT_LOW, "MODEM2 RESET"},
752 };
753
754 static struct tegra_usb_platform_data tegra_ehci2_hsic_baseband_pdata = {
755         .port_otg = false,
756         .has_hostpc = true,
757         .unaligned_dma_buf_supported = false,
758         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
759         .op_mode = TEGRA_USB_OPMODE_HOST,
760         .u_data.host = {
761                 .vbus_gpio = -1,
762                 .hot_plug = false,
763                 .remote_wakeup_supported = true,
764                 .power_off_on_suspend = true,
765         },
766 };
767
768 static struct tegra_usb_platform_data tegra_ehci3_hsic_baseband2_pdata = {
769         .port_otg = false,
770         .has_hostpc = true,
771         .unaligned_dma_buf_supported = false,
772         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
773         .op_mode = TEGRA_USB_OPMODE_HOST,
774         .u_data.host = {
775                 .vbus_gpio = -1,
776                 .hot_plug = false,
777                 .remote_wakeup_supported = true,
778                 .power_off_on_suspend = true,
779         },
780 };
781
782 static struct tegra_usb_platform_data tegra_hsic_pdata = {
783         .port_otg = false,
784         .has_hostpc = true,
785         .unaligned_dma_buf_supported = false,
786         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
787         .op_mode        = TEGRA_USB_OPMODE_HOST,
788         .u_data.host = {
789                 .vbus_gpio = -1,
790                 .hot_plug = false,
791                 .remote_wakeup_supported = true,
792                 .power_off_on_suspend = true,
793         },
794 };
795
796 static struct platform_device *
797 tegra_usb_hsic_host_register(struct platform_device *ehci_dev)
798 {
799         struct platform_device *pdev;
800         int val;
801
802         pdev = platform_device_alloc(ehci_dev->name, ehci_dev->id);
803         if (!pdev)
804                 return NULL;
805
806         val = platform_device_add_resources(pdev, ehci_dev->resource,
807                                                 ehci_dev->num_resources);
808         if (val)
809                 goto error;
810
811         pdev->dev.dma_mask =  ehci_dev->dev.dma_mask;
812         pdev->dev.coherent_dma_mask = ehci_dev->dev.coherent_dma_mask;
813
814         val = platform_device_add_data(pdev, &tegra_hsic_pdata,
815                         sizeof(struct tegra_usb_platform_data));
816         if (val)
817                 goto error;
818
819         val = platform_device_add(pdev);
820         if (val)
821                 goto error;
822
823         return pdev;
824
825 error:
826         pr_err("%s: failed to add the host contoller device\n", __func__);
827         platform_device_put(pdev);
828         return NULL;
829 }
830
831 static void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
832 {
833         struct platform_device *pdev = *platdev;
834
835         if (pdev && &pdev->dev) {
836                 platform_device_unregister(pdev);
837                 *platdev = NULL;
838         } else
839                 pr_err("%s: no platform device\n", __func__);
840 }
841
842 static struct tegra_usb_phy_platform_ops oem1_hsic_pops;
843
844 static union tegra_bb_gpio_id bb_gpio_oem1 = {
845         .oem1 = {
846                 .reset = BB_OEM1_GPIO_RST,
847                 .pwron = BB_OEM1_GPIO_ON,
848                 .awr = BB_OEM1_GPIO_AWR,
849                 .cwr = BB_OEM1_GPIO_CWR,
850                 .spare = BB_OEM1_GPIO_SPARE,
851                 .wdi = BB_OEM1_GPIO_WDI,
852         },
853 };
854
855 static struct tegra_bb_pdata bb_pdata_oem1 = {
856         .id = &bb_gpio_oem1,
857         .device = &tegra_ehci3_device,
858         .ehci_register = tegra_usb_hsic_host_register,
859         .ehci_unregister = tegra_usb_hsic_host_unregister,
860         .bb_id = TEGRA_BB_OEM1,
861 };
862
863 static struct platform_device tegra_bb_oem1 = {
864         .name = "tegra_baseband_power",
865         .id = -1,
866         .dev = {
867                 .platform_data = &bb_pdata_oem1,
868         },
869 };
870
871 static int baseband_init(void)
872 {
873         int ret;
874
875         ret = gpio_request_array(modem_gpios, ARRAY_SIZE(modem_gpios));
876         if (ret) {
877                 pr_warn("%s:gpio request failed\n", __func__);
878                 return ret;
879         }
880
881         baseband_reg = regulator_get(NULL, "vdd_core_bb");
882         if (IS_ERR_OR_NULL(baseband_reg))
883                 pr_warn("%s: baseband regulator get failed\n", __func__);
884         else
885                 regulator_enable(baseband_reg);
886
887         /* enable pull-up for MDM1 UART RX */
888         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_GPIO_PU1,
889                                     TEGRA_PUPD_PULL_UP);
890
891         /* enable pull-down for MDM1_COLD_BOOT */
892         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_ULPI_DATA4,
893                                     TEGRA_PUPD_PULL_DOWN);
894
895         /* export GPIO for user space access through sysfs */
896         gpio_export(MDM_RST, false);
897
898         return 0;
899 }
900
901 static const struct tegra_modem_operations baseband_operations = {
902         .init = baseband_init,
903 };
904
905 #define MODEM_BOOT_EDP_MAX 0
906 /* FIXME: get accurate boot current value */
907 static unsigned int modem_boot_edp_states[] = { 1900, 0 };
908 static struct edp_client modem_boot_edp_client = {
909         .name = "modem_boot",
910         .states = modem_boot_edp_states,
911         .num_states = ARRAY_SIZE(modem_boot_edp_states),
912         .e0_index = MODEM_BOOT_EDP_MAX,
913         .priority = EDP_MAX_PRIO,
914 };
915
916 static struct tegra_usb_modem_power_platform_data baseband_pdata = {
917         .ops = &baseband_operations,
918         .wake_gpio = -1,
919         .boot_gpio = MDM_COLDBOOT,
920         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
921         .autosuspend_delay = 2000,
922         .short_autosuspend_delay = 50,
923         .tegra_ehci_device = &tegra_ehci2_device,
924         .tegra_ehci_pdata = &tegra_ehci2_hsic_baseband_pdata,
925         .modem_boot_edp_client = &modem_boot_edp_client,
926         .edp_manager_name = "battery",
927         .i_breach_ppm = 500000,
928         /* FIXME: get useful adjperiods */
929         .i_thresh_3g_adjperiod = 10000,
930         .i_thresh_lte_adjperiod = 10000,
931 };
932
933 static struct platform_device icera_baseband_device = {
934         .name = "tegra_usb_modem_power",
935         .id = -1,
936         .dev = {
937                 .platform_data = &baseband_pdata,
938         },
939 };
940
941 static void baseband2_start(void)
942 {
943         pr_info("%s\n", __func__);
944         gpio_set_value(MDM2_PWR_ON, 1);
945 }
946
947 static void baseband2_reset(void)
948 {
949         /* Initiate power cycle on baseband sub system */
950         pr_info("%s\n", __func__);
951         gpio_set_value(MDM2_RST, 0);
952         mdelay(200);
953         gpio_set_value(MDM2_RST, 1);
954 }
955
956 static int baseband2_init(void)
957 {
958         int ret;
959
960         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD, TEGRA_TRI_NORMAL);
961
962         ret = gpio_request_array(modem2_gpios, ARRAY_SIZE(modem2_gpios));
963         if (ret)
964                 return ret;
965
966         /* enable pull-down for MDM2_COLD_BOOT */
967         tegra_pinmux_set_pullupdown(TEGRA_PINGROUP_KB_ROW4,
968                                     TEGRA_PUPD_PULL_DOWN);
969
970         /* export GPIO for user space access through sysfs */
971         gpio_export(MDM2_RST, false);
972
973         return 0;
974 }
975
976 static const struct tegra_modem_operations baseband2_operations = {
977         .init = baseband2_init,
978         .start = baseband2_start,
979         .reset = baseband2_reset,
980 };
981
982 static struct tegra_usb_modem_power_platform_data baseband2_pdata = {
983         .ops = &baseband2_operations,
984         .wake_gpio = -1,
985         .boot_gpio = MDM2_COLDBOOT,
986         .boot_irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
987         .autosuspend_delay = 2000,
988         .short_autosuspend_delay = 50,
989         .tegra_ehci_device = &tegra_ehci3_device,
990         .tegra_ehci_pdata = &tegra_ehci3_hsic_baseband2_pdata,
991 };
992
993 static struct platform_device icera_baseband2_device = {
994         .name = "tegra_usb_modem_power",
995         .id = -1,
996         .dev = {
997                 .platform_data = &baseband2_pdata,
998         },
999 };
1000
1001 static struct baseband_power_platform_data tegra_baseband_xmm_power_data = {
1002         .baseband_type = BASEBAND_XMM,
1003         .modem = {
1004                 .xmm = {
1005                         .bb_rst = XMM_GPIO_BB_RST,
1006                         .bb_on = XMM_GPIO_BB_ON,
1007                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1008                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1009                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1010                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1011                 },
1012         },
1013 };
1014
1015 static struct platform_device tegra_baseband_xmm_power_device = {
1016         .name = "baseband_xmm_power",
1017         .id = -1,
1018         .dev = {
1019                 .platform_data = &tegra_baseband_xmm_power_data,
1020         },
1021 };
1022
1023 static struct platform_device tegra_baseband_xmm_power2_device = {
1024         .name = "baseband_xmm_power2",
1025         .id = -1,
1026         .dev = {
1027                 .platform_data = &tegra_baseband_xmm_power_data,
1028         },
1029 };
1030
1031 static void pluto_usb_init(void)
1032 {
1033         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1034
1035         if (!(usb_port_owner_info & UTMI1_PORT_OWNER_XUSB)) {
1036                 if ((tegra_get_chipid() == TEGRA_CHIPID_TEGRA11) &&
1037                         (tegra_revision == TEGRA_REVISION_A02)) {
1038                         tegra_ehci1_utmi_pdata \
1039                         .unaligned_dma_buf_supported = true;
1040                         tegra_udc_pdata \
1041                         .unaligned_dma_buf_supported = true;
1042                 }
1043                 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1044                 platform_device_register(&tegra_otg_device);
1045
1046                 /* Setup the udc platform data */
1047                 tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1048         }
1049 }
1050
1051 static void pluto_modem_init(void)
1052 {
1053         int modem_id = tegra_get_modem_id();
1054         struct board_info board_info;
1055         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1056
1057         tegra_get_board_info(&board_info);
1058         pr_info("%s: modem_id = %d\n", __func__, modem_id);
1059
1060         switch (modem_id) {
1061         case TEGRA_BB_I500: /* on board i500 HSIC */
1062                 if (!(usb_port_owner_info & HSIC1_PORT_OWNER_XUSB)) {
1063                         if ((tegra_get_chipid() == TEGRA_CHIPID_TEGRA11) &&
1064                                 (tegra_revision == TEGRA_REVISION_A02))
1065                                 tegra_ehci2_hsic_baseband_pdata \
1066                                 .unaligned_dma_buf_supported = true;
1067                         platform_device_register(&icera_baseband_device);
1068                 }
1069                 break;
1070         case TEGRA_BB_I500SWD: /* i500 SWD HSIC */
1071                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1072                         if ((tegra_get_chipid() == TEGRA_CHIPID_TEGRA11) &&
1073                                 (tegra_revision == TEGRA_REVISION_A02))
1074                                 tegra_ehci3_hsic_baseband2_pdata \
1075                                 .unaligned_dma_buf_supported = true;
1076                         platform_device_register(&icera_baseband2_device);
1077                 }
1078                 break;
1079         case TEGRA_BB_OEM1:     /* OEM1 HSIC */
1080                 if ((board_info.board_id == BOARD_E1575) ||
1081                         ((board_info.board_id == BOARD_E1580) &&
1082                                 (board_info.fab >= BOARD_FAB_A03))) {
1083                         tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPIO_X1_AUD,
1084                                                         TEGRA_TRI_NORMAL);
1085                         bb_gpio_oem1.oem1.pwron = BB_OEM1_GPIO_ON_V;
1086                 }
1087                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1088                         tegra_hsic_pdata.ops = &oem1_hsic_pops;
1089                         tegra_ehci3_device.dev.platform_data
1090                                 = &tegra_hsic_pdata;
1091                         if ((tegra_get_chipid() == TEGRA_CHIPID_TEGRA11) &&
1092                                 (tegra_revision == TEGRA_REVISION_A02))
1093                                 tegra_hsic_pdata \
1094                                 .unaligned_dma_buf_supported = true;
1095                         platform_device_register(&tegra_bb_oem1);
1096                 }
1097                 break;
1098         case TEGRA_BB_OEM2: /* XMM6260/XMM6360 HSIC */
1099                 /* fix wrong wiring in Pluto A02 */
1100                 if ((board_info.board_id == BOARD_E1580) &&
1101                         (board_info.fab == BOARD_FAB_A02)) {
1102                         pr_info(
1103 "%s: Pluto A02: replace MDM2_PWR_ON with MDM2_PWR_ON_FOR_PLUTO_A02\n",
1104                                 __func__);
1105                         if (tegra_baseband_xmm_power_data.modem.xmm.bb_on
1106                                 != MDM2_PWR_ON)
1107                                 pr_err(
1108 "%s: expected MDM2_PWR_ON default gpio for XMM bb_on\n",
1109                                         __func__);
1110                         tegra_baseband_xmm_power_data.modem.xmm.bb_on
1111                                 = MDM2_PWR_ON_FOR_PLUTO_A02;
1112                 }
1113                 /* baseband-power.ko will register ehci3 device */
1114                 tegra_hsic_pdata.ops = &oem2_plat_ops;
1115                 tegra_hsic_pdata.u_data.host.remote_wakeup_supported = false;
1116                 tegra_hsic_pdata.u_data.host.power_off_on_suspend = false;
1117                 tegra_ehci3_device.dev.platform_data =
1118                                         &tegra_hsic_pdata;
1119                 tegra_baseband_xmm_power_data.hsic_register =
1120                                                 &tegra_usb_hsic_host_register;
1121                 tegra_baseband_xmm_power_data.hsic_unregister =
1122                                                 &tegra_usb_hsic_host_unregister;
1123                 tegra_baseband_xmm_power_data.ehci_device =
1124                                         &tegra_ehci3_device;
1125                 platform_device_register(&tegra_baseband_xmm_power_device);
1126                 platform_device_register(&tegra_baseband_xmm_power2_device);
1127                 /* override audio settings - use 8kHz */
1128                 pluto_audio_pdata.i2s_param[BASEBAND].audio_port_id
1129                         = pluto_aic3262_pdata.i2s_param[BASEBAND].audio_port_id
1130                         = 2;
1131                 pluto_audio_pdata.i2s_param[BASEBAND].is_i2s_master
1132                         = pluto_aic3262_pdata.i2s_param[BASEBAND].is_i2s_master
1133                         = 1;
1134                 pluto_audio_pdata.i2s_param[BASEBAND].i2s_mode
1135                         = pluto_aic3262_pdata.i2s_param[BASEBAND].i2s_mode
1136                         = TEGRA_DAIFMT_I2S;
1137                 pluto_audio_pdata.i2s_param[BASEBAND].sample_size
1138                         = pluto_aic3262_pdata.i2s_param[BASEBAND].sample_size
1139                         = 16;
1140                 pluto_audio_pdata.i2s_param[BASEBAND].rate
1141                         = pluto_aic3262_pdata.i2s_param[BASEBAND].rate
1142                         = 8000;
1143                 pluto_audio_pdata.i2s_param[BASEBAND].channels
1144                         = pluto_aic3262_pdata.i2s_param[BASEBAND].channels
1145                         = 2;
1146                 break;
1147         case TEGRA_BB_HSIC_HUB: /* HSIC hub */
1148                 if (!(usb_port_owner_info & HSIC2_PORT_OWNER_XUSB)) {
1149                         if ((tegra_get_chipid() == TEGRA_CHIPID_TEGRA11) &&
1150                                 (tegra_revision == TEGRA_REVISION_A02))
1151                                 tegra_ehci3_hsic_smsc_hub_pdata \
1152                                 .unaligned_dma_buf_supported = true;
1153                         tegra_ehci3_device.dev.platform_data =
1154                                 &tegra_ehci3_hsic_smsc_hub_pdata;
1155                         platform_device_register(&tegra_ehci3_device);
1156                 }
1157                 break;
1158         default:
1159                 return;
1160         }
1161 }
1162
1163 static struct tegra_xusb_pad_data xusb_padctl_data = {
1164         .pad_mux = (0x1 << 0),
1165         .port_cap = (0x1 << 0),
1166         .snps_oc_map = (0x1ff << 0),
1167         .usb2_oc_map = (0x3c << 0),
1168         .ss_port_map = (0x0 << 0),
1169         .oc_det = (0x3f << 10),
1170         .rx_wander = (0xf << 4),
1171         .rx_eq = (0x3070 << 8),
1172         .cdr_cntl = (0x26 << 24),
1173         .dfe_cntl = 0x002008EE,
1174         .hs_slew = (0xE << 6),
1175         .ls_rslew = (0x3 << 14),
1176         .otg_pad0_ctl0 = (0x0 << 19),
1177         .otg_pad1_ctl0 = (0x7 << 19),
1178         .otg_pad0_ctl1 = (0x3 << 0),
1179         .otg_pad1_ctl1 = (0x4 << 0),
1180         .hs_disc_lvl = (0x5 << 2),
1181         .hsic_pad0_ctl0 = (0x00 << 8),
1182         .hsic_pad0_ctl1 = (0x00 << 8),
1183 };
1184
1185 static void pluto_xusb_init(void)
1186 {
1187         int usb_port_owner_info = tegra_get_usb_port_owner_info();
1188
1189         if (usb_port_owner_info & UTMI1_PORT_OWNER_XUSB) {
1190                 u32 usb_calib0 = tegra_fuse_readl(FUSE_SKU_USB_CALIB_0);
1191
1192                 pr_info("dalmore_xusb_init: usb_calib0 = 0x%08x\n", usb_calib0);
1193                 /*
1194                  * read from usb_calib0 and pass to driver
1195                  * set HS_CURR_LEVEL (PAD0)     = usb_calib0[5:0]
1196                  * set TERM_RANGE_ADJ           = usb_calib0[10:7]
1197                  * set HS_SQUELCH_LEVEL         = usb_calib0[12:11]
1198                  * set HS_IREF_CAP              = usb_calib0[14:13]
1199                  * set HS_CURR_LEVEL (PAD1)     = usb_calib0[20:15]
1200                  */
1201
1202                 xusb_padctl_data.hs_curr_level_pad0 = (usb_calib0 >> 0) & 0x3f;
1203                 xusb_padctl_data.hs_term_range_adj = (usb_calib0 >> 7) & 0xf;
1204                 xusb_padctl_data.hs_squelch_level = (usb_calib0 >> 11) & 0x3;
1205                 xusb_padctl_data.hs_iref_cap = (usb_calib0 >> 13) & 0x3;
1206                 xusb_padctl_data.hs_curr_level_pad1 = (usb_calib0 >> 15) & 0x3f;
1207
1208                 tegra_xhci_device.dev.platform_data = &xusb_padctl_data;
1209                 platform_device_register(&tegra_xhci_device);
1210         }
1211 }
1212 #else
1213 static void pluto_usb_init(void) { }
1214 static void pluto_modem_init(void) { }
1215 static void pluto_xusb_init(void) { }
1216 #endif
1217
1218 static void pluto_audio_init(void)
1219 {
1220         struct board_info board_info;
1221
1222         tegra_get_board_info(&board_info);
1223
1224         spi_register_board_info(aic326x_spi_board_info,
1225                                         ARRAY_SIZE(aic326x_spi_board_info));
1226 }
1227
1228 #ifndef CONFIG_USE_OF
1229 static struct platform_device *pluto_spi_devices[] __initdata = {
1230         &tegra11_spi_device4,
1231 };
1232
1233 static struct tegra_spi_platform_data pluto_spi_pdata = {
1234         .dma_req_sel            = 0,
1235         .spi_max_frequency      = 25000000,
1236         .clock_always_on        = false,
1237 };
1238
1239 static void __init pluto_spi_init(void)
1240 {
1241         struct board_info board_info, display_board_info;
1242
1243         tegra_get_board_info(&board_info);
1244         tegra_get_display_board_info(&display_board_info);
1245
1246         tegra11_spi_device4.dev.platform_data = &pluto_spi_pdata;
1247         platform_add_devices(pluto_spi_devices,
1248                                 ARRAY_SIZE(pluto_spi_devices));
1249 }
1250 #else
1251 static void __init pluto_spi_init(void)
1252 {
1253 }
1254 #endif
1255
1256 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
1257         /* name         parent          rate            enabled */
1258         { "extern2",    "pll_p",        41000000,       false},
1259         { "clk_out_2",  "extern2",      40800000,       false},
1260         { NULL,         NULL,           0,              0},
1261 };
1262
1263 struct rm_spi_ts_platform_data rm31080ts_pluto_data = {
1264         .gpio_reset = TOUCH_GPIO_RST_RAYDIUM_SPI,
1265         .config = 0,
1266         .platform_id = RM_PLATFORM_P005,
1267         .name_of_clock = "clk_out_2",
1268         .name_of_clock_con = "extern2",
1269 };
1270
1271 static struct tegra_spi_device_controller_data dev_cdata = {
1272         .rx_clk_tap_delay = 0,
1273         .tx_clk_tap_delay = 0,
1274 };
1275
1276 struct spi_board_info rm31080a_pluto_spi_board[1] = {
1277         {
1278          .modalias = "rm_ts_spidev",
1279          .bus_num = 3,
1280          .chip_select = 2,
1281          .max_speed_hz = 12 * 1000 * 1000,
1282          .mode = SPI_MODE_0,
1283          .controller_data = &dev_cdata,
1284          .platform_data = &rm31080ts_pluto_data,
1285          },
1286 };
1287
1288 static struct synaptics_gpio_data synaptics_gpio_pluto_data = {
1289         .attn_gpio = SYNAPTICS_ATTN_GPIO,
1290         .attn_polarity = RMI_ATTN_ACTIVE_LOW,
1291         .reset_gpio = SYNAPTICS_RESET_GPIO,
1292 };
1293
1294 static struct rmi_device_platform_data synaptics_pluto_platformdata = {
1295         .sensor_name   = "TM9999",
1296         .attn_gpio     = SYNAPTICS_ATTN_GPIO,
1297         .attn_polarity = RMI_ATTN_ACTIVE_LOW,
1298         .gpio_data     = &synaptics_gpio_pluto_data,
1299         .gpio_config   = synaptics_touchpad_gpio_setup,
1300         .spi_data = {
1301                 .block_delay_us = 100,
1302                 .read_delay_us = 100,
1303                 .write_delay_us = 20,
1304         },
1305         .power_management = {
1306                 .nosleep = RMI_F01_NOSLEEP_OFF,
1307         },
1308         .f19_button_map = &synaptics_button_map,
1309         .f54_direct_touch_report_size = 944,
1310 };
1311
1312 static struct spi_board_info synaptics_9999_spi_board_pluto[] = {
1313         {
1314                 .modalias = "rmi_spi",
1315                 .bus_num = 3,
1316                 .chip_select = 2,
1317                 .max_speed_hz = 8*1000*1000,
1318                 .mode = SPI_MODE_3,
1319                 .platform_data = &synaptics_pluto_platformdata,
1320         },
1321 };
1322
1323 static int __init pluto_touch_init(void)
1324 {
1325         tegra_clk_init_from_table(touch_clk_init_table);
1326         if (tegra_get_touch_id() == RAYDIUM_TOUCH) {
1327                 pr_info("%s: initializing raydium\n", __func__);
1328                 rm31080a_pluto_spi_board[0].irq =
1329                         gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
1330                 touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
1331                                         TOUCH_GPIO_RST_RAYDIUM_SPI,
1332                                         &rm31080ts_pluto_data,
1333                                         &rm31080a_pluto_spi_board[0],
1334                                         ARRAY_SIZE(rm31080a_pluto_spi_board));
1335         } else {
1336                 pr_info("%s: initializing synaptics\n", __func__);
1337                 touch_init_synaptics(synaptics_9999_spi_board_pluto,
1338                                 ARRAY_SIZE(synaptics_9999_spi_board_pluto));
1339         }
1340         return 0;
1341 }
1342
1343 #ifdef CONFIG_EDP_FRAMEWORK
1344 static struct edp_manager battery_edp_manager = {
1345         .name = "battery",
1346         .max = 15000
1347 };
1348
1349 static void __init pluto_battery_edp_init(void)
1350 {
1351         struct edp_governor *g;
1352         int r;
1353
1354         r = edp_register_manager(&battery_edp_manager);
1355         if (r)
1356                 goto err_ret;
1357
1358         /* start with priority governor */
1359         g = edp_get_governor("priority");
1360         if (!g) {
1361                 r = -EFAULT;
1362                 goto err_ret;
1363         }
1364
1365         r = edp_set_governor(&battery_edp_manager, g);
1366         if (r)
1367                 goto err_ret;
1368
1369         return;
1370
1371 err_ret:
1372         pr_err("Battery EDP init failed with error %d\n", r);
1373         WARN_ON(1);
1374 }
1375 #else
1376 static inline void pluto_battery_edp_init(void) {}
1377 #endif
1378
1379 #ifdef CONFIG_USE_OF
1380 struct of_dev_auxdata pluto_auxdata_lookup[] __initdata = {
1381         OF_DEV_AUXDATA("nvidia,tegra114-apbdma", 0x6000a000, "tegra-dma", NULL),
1382         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000600, "sdhci-tegra.3",
1383                                 NULL),
1384         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000400, "sdhci-tegra.2",
1385                                 NULL),
1386         OF_DEV_AUXDATA("nvidia,tegra114-sdhci", 0x78000000, "sdhci-tegra.0",
1387                                 &pluto_tegra_sdhci_platform_data0),
1388         OF_DEV_AUXDATA("nvidia,tegra114-camera", 0x0, "tegra_camera",
1389                                 NULL),
1390         OF_DEV_AUXDATA("nvidia,tegra114-host1x", TEGRA_HOST1X_BASE, "host1x",
1391                                 NULL),
1392         OF_DEV_AUXDATA("nvidia,tegra114-gr3d", TEGRA_GR3D_BASE, "gr3d",
1393                                 NULL),
1394         OF_DEV_AUXDATA("nvidia,tegra114-gr2d", TEGRA_GR2D_BASE, "gr2d",
1395                                 NULL),
1396         OF_DEV_AUXDATA("nvidia,tegra114-msenc", TEGRA_MSENC_BASE, "msenc",
1397                                 NULL),
1398         OF_DEV_AUXDATA("nvidia,tegra114-vi", TEGRA_VI_BASE, "vi",
1399                                 NULL),
1400         OF_DEV_AUXDATA("nvidia,tegra114-isp", TEGRA_ISP_BASE, "isp",
1401                                 NULL),
1402         OF_DEV_AUXDATA("nvidia,tegra114-tsec", TEGRA_TSEC_BASE, "tsec",
1403                                 NULL),
1404         OF_DEV_AUXDATA("nvidia,tegra114-i2c", 0x7000c500, "tegra11-i2c.2",
1405                                 NULL),
1406         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d400, "spi-tegra114.0",
1407                                 NULL),
1408         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d600, "spi-tegra114.1",
1409                                 NULL),
1410         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000d800, "spi-tegra114.2",
1411                                 NULL),
1412         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000da00, "spi-tegra114.3",
1413                                 NULL),
1414         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000dc00, "spi-tegra114.4",
1415                                 NULL),
1416         OF_DEV_AUXDATA("nvidia,tegra114-spi", 0x7000de00, "spi-tegra114.5",
1417                                 NULL),
1418         {}
1419 };
1420 #endif
1421
1422 static void __init pluto_dtv_init(void)
1423 {
1424         platform_device_register(&tegra_dtv_device);
1425 }
1426
1427 static void __init tegra_pluto_early_init(void)
1428 {
1429         pluto_battery_edp_init();
1430         tegra_clk_init_from_table(pluto_clk_init_table);
1431         tegra_clk_verify_parents();
1432         tegra_soc_device_init("tegra_pluto");
1433 }
1434
1435 static void __init tegra_pluto_late_init(void)
1436 {
1437         platform_device_register(&tegra_pinmux_device);
1438         pluto_pinmux_init();
1439         pluto_i2c_init();
1440         pluto_spi_init();
1441         pluto_usb_init();
1442         pluto_xusb_init();
1443         pluto_uart_init();
1444         pluto_audio_init();
1445         platform_add_devices(pluto_devices, ARRAY_SIZE(pluto_devices));
1446         //tegra_ram_console_debug_init();
1447         tegra_io_dpd_init();
1448         pluto_sdhci_init();
1449         pluto_regulator_init();
1450         pluto_dtv_init();
1451         pluto_suspend_init();
1452         pluto_touch_init();
1453         pluto_emc_init();
1454         pluto_edp_init();
1455         isomgr_init();
1456         pluto_panel_init();
1457         pluto_pmon_init();
1458         pluto_kbc_init();
1459 #ifdef CONFIG_BT_BLUESLEEP
1460         pluto_setup_bluesleep();
1461         pluto_setup_bt_rfkill();
1462 #elif defined CONFIG_BLUEDROID_PM
1463         pluto_setup_bluedroid_pm();
1464 #endif
1465         tegra_release_bootloader_fb();
1466         pluto_modem_init();
1467 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1468         tegra_wdt_recovery_init();
1469 #endif
1470         pluto_sensors_init();
1471         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1472         pluto_soctherm_init();
1473         tegra_register_fuse();
1474 }
1475
1476 static void __init pluto_ramconsole_reserve(unsigned long size)
1477 {
1478         tegra_ram_console_debug_reserve(SZ_1M);
1479 }
1480
1481 static void __init tegra_pluto_dt_init(void)
1482 {
1483         tegra_pluto_early_init();
1484
1485         of_platform_populate(NULL,
1486                 of_default_bus_match_table, pluto_auxdata_lookup,
1487                 &platform_bus);
1488
1489         tegra_pluto_late_init();
1490 }
1491
1492 static void __init tegra_pluto_reserve(void)
1493 {
1494 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1495         /* for PANEL_5_SHARP_1080p: 1920*1080*4*2 = 16588800 bytes */
1496         tegra_reserve(0, SZ_16M, SZ_4M);
1497 #else
1498         tegra_reserve(SZ_128M, SZ_16M, SZ_4M);
1499 #endif
1500         pluto_ramconsole_reserve(SZ_1M);
1501 }
1502
1503 static const char * const pluto_dt_board_compat[] = {
1504         "nvidia,pluto",
1505         NULL
1506 };
1507
1508 MACHINE_START(TEGRA_PLUTO, "tegra_pluto")
1509         .atag_offset    = 0x100,
1510         .smp            = smp_ops(tegra_smp_ops),
1511         .map_io         = tegra_map_common_io,
1512         .reserve        = tegra_pluto_reserve,
1513         .init_early     = tegra11x_init_early,
1514         .init_irq       = tegra_dt_init_irq,
1515         .handle_irq     = gic_handle_irq,
1516         .timer          = &tegra_sys_timer,
1517         .init_machine   = tegra_pluto_dt_init,
1518         .restart        = tegra_assert_system_reset,
1519         .dt_compat      = pluto_dt_board_compat,
1520 MACHINE_END