4d6d039be2616e22166c3158cc2d81067fae4bc8
[linux-3.10.git] / arch / arm / mach-tegra / board-pismo-power.c
1 /*
2  * arch/arm/mach-tegra/board-pismo-power.c
3  *
4  * Copyright (C) 2012-2013 NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/io.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/regulator/fixed.h>
28 #include <linux/mfd/as3720.h>
29 #include <linux/gpio.h>
30 #include <linux/regulator/userspace-consumer.h>
31
32 #include <asm/mach-types.h>
33
34 #include <mach/irqs.h>
35 #include <mach/edp.h>
36 #include <mach/gpio-tegra.h>
37
38 #include "cpu-tegra.h"
39 #include "pm.h"
40 #include "tegra-board-id.h"
41 #include "board.h"
42 #include "gpio-names.h"
43 #include "board-pismo.h"
44 #include "tegra_cl_dvfs.h"
45 #include "devices.h"
46 #include "tegra11_soctherm.h"
47 #include "iomap.h"
48
49 #define PMC_CTRL                0x0
50 #define PMC_CTRL_INTR_LOW       (1 << 17)
51
52 static struct regulator_consumer_supply as3720_ldo0_supply[] = {
53         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
54         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
55         REGULATOR_SUPPLY("avdd_dsi_csi", "tegra_camera"),
56         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
57         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.2"),
58 };
59
60 static struct regulator_consumer_supply as3720_ldo1_supply[] = {
61         REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
62         REGULATOR_SUPPLY("pwrdet_cam", NULL),
63 };
64
65 static struct regulator_consumer_supply as3720_ldo2_supply[] = {
66         REGULATOR_SUPPLY("vpp_fuse", NULL),
67 };
68
69 static struct regulator_consumer_supply as3720_ldo3_supply[] = {
70         REGULATOR_SUPPLY("vdd_rtc", NULL),
71 };
72
73 static struct regulator_consumer_supply as3720_ldo5_supply[] = {
74         REGULATOR_SUPPLY("vdd_sensor_2v85", NULL),
75         REGULATOR_SUPPLY("vdd_als", NULL),
76         REGULATOR_SUPPLY("vdd", "0-004c"),
77         REGULATOR_SUPPLY("vdd", "0-0069"),
78 };
79
80 static struct regulator_consumer_supply as3720_ldo6_supply[] = {
81         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
82         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
83 };
84
85 static struct regulator_consumer_supply as3720_ldo8_supply[] = {
86         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
87 };
88
89 static struct regulator_consumer_supply as3720_sd0_supply[] = {
90         REGULATOR_SUPPLY("vdd_cpu", NULL),
91 };
92
93 static struct regulator_consumer_supply as3720_sd1_supply[] = {
94         REGULATOR_SUPPLY("vdd_core", NULL),
95 };
96
97 static struct regulator_consumer_supply as3720_sd2_supply[] = {
98         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
99         REGULATOR_SUPPLY("vcore_emmc", NULL),
100         REGULATOR_SUPPLY("vdd_gps_3v3", NULL),
101         REGULATOR_SUPPLY("vdd_af_cam1", NULL),
102 };
103
104 static struct regulator_consumer_supply as3720_sd3_supply[] = {
105         REGULATOR_SUPPLY("vdd_emmc", NULL),
106         REGULATOR_SUPPLY("vddio_sys", NULL),
107         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
108         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
109         REGULATOR_SUPPLY("vddio_bb", NULL),
110         REGULATOR_SUPPLY("pwrdet_bb", NULL),
111         REGULATOR_SUPPLY("vddio_uart", NULL),
112         REGULATOR_SUPPLY("pwrdet_uart", NULL),
113         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
114         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
115         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
116         REGULATOR_SUPPLY("avdd_osc", NULL),
117         REGULATOR_SUPPLY("vddio_gmi", NULL),
118         REGULATOR_SUPPLY("pwrdet_nand", NULL),
119         REGULATOR_SUPPLY("vddio_audio", NULL),
120         REGULATOR_SUPPLY("pwrdet_audio", NULL),
121         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
122         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
123         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
124         REGULATOR_SUPPLY("vddio_bt_1v8", NULL),
125         REGULATOR_SUPPLY("vddio_wifi_1v8", NULL),
126         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
127 };
128
129 static struct regulator_consumer_supply as3720_sd4_supply[] = {
130         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
131         REGULATOR_SUPPLY("avdd_plle", NULL),
132         REGULATOR_SUPPLY("avdd_pllm", NULL),
133         REGULATOR_SUPPLY("avdd_pllu", NULL),
134         REGULATOR_SUPPLY("avdd_pllx", NULL),
135         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
136         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
137         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
138         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
139         REGULATOR_SUPPLY("vddio_ddr_hs", NULL),
140         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
141         REGULATOR_SUPPLY("avddio_usb", NULL),
142 };
143
144 static struct regulator_consumer_supply as3720_sd5_supply[] = {
145         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
146         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
147         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
148         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
149         REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
150         REGULATOR_SUPPLY("pwrdet_hv", NULL),
151         REGULATOR_SUPPLY("vdd_bt_3v3", NULL),
152         REGULATOR_SUPPLY("vdd_wifi_3v3", NULL),
153 };
154
155 static struct regulator_consumer_supply as3720_sd6_supply[] = {
156         REGULATOR_SUPPLY("vddio_ddr", NULL),
157         REGULATOR_SUPPLY("vddio_ddr0", NULL),
158         REGULATOR_SUPPLY("vddio_ddr1", NULL),
159 };
160
161 static struct regulator_init_data as3720_ldo0 = {
162         .constraints = {
163                 .min_uV = 1200000,
164                 .max_uV = 1200000,
165                 .valid_modes_mask = REGULATOR_MODE_NORMAL
166                         | REGULATOR_MODE_STANDBY,
167                 .valid_ops_mask = REGULATOR_CHANGE_MODE
168                         | REGULATOR_CHANGE_STATUS
169                         | REGULATOR_CHANGE_VOLTAGE,
170                 .always_on = false,
171                 .boot_on = 1,
172                 .apply_uV = 1,
173         },
174         .consumer_supplies = as3720_ldo0_supply,
175         .num_consumer_supplies = ARRAY_SIZE(as3720_ldo0_supply),
176 };
177
178 static struct regulator_init_data as3720_ldo1 = {
179         .constraints = {
180                 .min_uV = 1800000,
181                 .max_uV = 1800000,
182                 .valid_modes_mask = REGULATOR_MODE_NORMAL
183                         | REGULATOR_MODE_STANDBY,
184                 .valid_ops_mask = REGULATOR_CHANGE_MODE
185                         | REGULATOR_CHANGE_STATUS
186                         | REGULATOR_CHANGE_VOLTAGE,
187                 .always_on = true,
188                 .boot_on = 1,
189                 .apply_uV = 1,
190         },
191         .consumer_supplies = as3720_ldo1_supply,
192         .num_consumer_supplies = ARRAY_SIZE(as3720_ldo1_supply),
193 };
194
195 static struct regulator_init_data as3720_ldo2 = {
196         .constraints = {
197                 .min_uV = 1800000,
198                 .max_uV = 1800000,
199                 .valid_modes_mask = REGULATOR_MODE_NORMAL
200                         | REGULATOR_MODE_STANDBY,
201                 .valid_ops_mask = REGULATOR_CHANGE_MODE
202                         | REGULATOR_CHANGE_STATUS
203                         | REGULATOR_CHANGE_VOLTAGE,
204                 .always_on = false,
205                 .boot_on = 1,
206                 .apply_uV = 1,
207         },
208         .consumer_supplies = as3720_ldo2_supply,
209         .num_consumer_supplies = ARRAY_SIZE(as3720_ldo2_supply),
210 };
211
212 static struct regulator_init_data as3720_ldo3 = {
213         .constraints = {
214                 .min_uV = 1100000,
215                 .max_uV = 1100000,
216                 .valid_modes_mask = REGULATOR_MODE_NORMAL
217                         | REGULATOR_MODE_STANDBY,
218                 .valid_ops_mask = REGULATOR_CHANGE_MODE
219                         | REGULATOR_CHANGE_STATUS
220                         | REGULATOR_CHANGE_VOLTAGE,
221                 .always_on = true,
222                 .boot_on = 1,
223                 .apply_uV = 1,
224         },
225         .consumer_supplies = as3720_ldo3_supply,
226         .num_consumer_supplies = ARRAY_SIZE(as3720_ldo3_supply),
227 };
228
229 static struct regulator_init_data as3720_ldo5 = {
230         .constraints = {
231                 .min_uV = 3300000,
232                 .max_uV = 3300000,
233                 .valid_modes_mask = REGULATOR_MODE_NORMAL
234                         | REGULATOR_MODE_STANDBY,
235                 .valid_ops_mask = REGULATOR_CHANGE_MODE
236                         | REGULATOR_CHANGE_STATUS
237                         | REGULATOR_CHANGE_VOLTAGE,
238                 .always_on = true,
239                 .boot_on = 1,
240                 .apply_uV = 1,
241         },
242         .consumer_supplies = as3720_ldo5_supply,
243         .num_consumer_supplies = ARRAY_SIZE(as3720_ldo5_supply),
244 };
245 static struct regulator_init_data as3720_ldo6 = {
246         .constraints = {
247                 .min_uV = 1800000,
248                 .max_uV = 3300000,
249                 .valid_modes_mask = REGULATOR_MODE_NORMAL
250                         | REGULATOR_MODE_STANDBY,
251                 .valid_ops_mask = REGULATOR_CHANGE_MODE
252                         | REGULATOR_CHANGE_STATUS
253                         | REGULATOR_CHANGE_VOLTAGE,
254                 .always_on = false,
255                 .boot_on = 0,
256                 .apply_uV = 1,
257         },
258         .consumer_supplies = as3720_ldo6_supply,
259         .num_consumer_supplies = ARRAY_SIZE(as3720_ldo6_supply),
260 };
261
262 static struct regulator_init_data as3720_ldo8 = {
263         .constraints = {
264                 .min_uV = 3300000,
265                 .max_uV = 3300000,
266                 .valid_modes_mask = REGULATOR_MODE_NORMAL
267                         | REGULATOR_MODE_STANDBY,
268                 .valid_ops_mask = REGULATOR_CHANGE_MODE
269                         | REGULATOR_CHANGE_STATUS
270                         | REGULATOR_CHANGE_VOLTAGE,
271                 .always_on = true,
272                 .boot_on = 1,
273                 .apply_uV = 1,
274         },
275         .consumer_supplies = as3720_ldo8_supply,
276         .num_consumer_supplies = ARRAY_SIZE(as3720_ldo8_supply),
277 };
278
279 static struct regulator_init_data as3720_sd0 = {
280         .constraints = {
281                 .min_uV = 1100000,
282                 .max_uV = 1100000,
283                 .valid_modes_mask = REGULATOR_MODE_NORMAL
284                         | REGULATOR_MODE_STANDBY,
285                 .valid_ops_mask = REGULATOR_CHANGE_MODE
286                         | REGULATOR_CHANGE_STATUS
287                         | REGULATOR_CHANGE_VOLTAGE,
288                 .always_on = true,
289                 .boot_on = 1,
290                 .apply_uV = 1,
291         },
292         .consumer_supplies = as3720_sd0_supply,
293         .num_consumer_supplies = ARRAY_SIZE(as3720_sd0_supply),
294 };
295
296 static struct regulator_init_data as3720_sd1 = {
297         .constraints = {
298                 .min_uV =  900000,
299                 .max_uV = 1400000,
300                 .valid_modes_mask = REGULATOR_MODE_NORMAL
301                         | REGULATOR_MODE_STANDBY,
302                 .valid_ops_mask = REGULATOR_CHANGE_MODE
303                         | REGULATOR_CHANGE_STATUS
304                         | REGULATOR_CHANGE_VOLTAGE,
305                 .always_on = true,
306                 .boot_on = 1,
307                 .apply_uV = 0,
308         },
309         .consumer_supplies = as3720_sd1_supply,
310         .num_consumer_supplies = ARRAY_SIZE(as3720_sd1_supply),
311 };
312
313 static struct regulator_init_data as3720_sd2 = {
314         .constraints = {
315                 .min_uV = 2850000,
316                 .max_uV = 3300000,
317                 .valid_modes_mask = REGULATOR_MODE_NORMAL
318                         | REGULATOR_MODE_STANDBY,
319                 .valid_ops_mask = REGULATOR_CHANGE_MODE
320                         | REGULATOR_CHANGE_STATUS
321                         | REGULATOR_CHANGE_VOLTAGE,
322                 .always_on = true,
323                 .boot_on = 1,
324                 .apply_uV = 1,
325         },
326         .consumer_supplies = as3720_sd2_supply,
327         .num_consumer_supplies = ARRAY_SIZE(as3720_sd2_supply),
328 };
329
330 static struct regulator_init_data as3720_sd3 = {
331         .constraints = {
332                 .min_uV = 1800000,
333                 .max_uV = 1800000,
334                 .valid_modes_mask = REGULATOR_MODE_NORMAL
335                         | REGULATOR_MODE_STANDBY,
336                 .valid_ops_mask = REGULATOR_CHANGE_MODE
337                         | REGULATOR_CHANGE_STATUS
338                         | REGULATOR_CHANGE_VOLTAGE,
339                 .always_on = true,
340                 .boot_on = 1,
341                 .apply_uV = 1,
342         },
343         .consumer_supplies = as3720_sd3_supply,
344         .num_consumer_supplies = ARRAY_SIZE(as3720_sd3_supply),
345 };
346
347 static struct regulator_init_data as3720_sd4 = {
348         .constraints = {
349                 .min_uV = 1050000,
350                 .max_uV = 1050000,
351                 .valid_modes_mask = REGULATOR_MODE_NORMAL
352                         | REGULATOR_MODE_STANDBY,
353                 .valid_ops_mask = REGULATOR_CHANGE_MODE
354                         | REGULATOR_CHANGE_STATUS
355                         | REGULATOR_CHANGE_VOLTAGE,
356                 .always_on = true,
357                 .boot_on = 1,
358                 .apply_uV = 1,
359         },
360         .consumer_supplies = as3720_sd4_supply,
361         .num_consumer_supplies = ARRAY_SIZE(as3720_sd4_supply),
362 };
363
364 static struct regulator_init_data as3720_sd5 = {
365         .constraints = {
366                 .min_uV = 3300000,
367                 .max_uV = 3300000,
368                 .valid_modes_mask = REGULATOR_MODE_NORMAL
369                         | REGULATOR_MODE_STANDBY,
370                 .valid_ops_mask = REGULATOR_CHANGE_MODE
371                         | REGULATOR_CHANGE_STATUS
372                         | REGULATOR_CHANGE_VOLTAGE,
373                 .always_on = true,
374                 .boot_on = 1,
375                 .apply_uV = 1,
376         },
377         .consumer_supplies = as3720_sd5_supply,
378         .num_consumer_supplies = ARRAY_SIZE(as3720_sd5_supply),
379 };
380
381 static struct regulator_init_data as3720_sd6 = {
382         .constraints = {
383                 .min_uV = 1350000,
384                 .max_uV = 1350000,
385                 .valid_modes_mask = REGULATOR_MODE_NORMAL
386                         | REGULATOR_MODE_STANDBY,
387                 .valid_ops_mask = REGULATOR_CHANGE_MODE
388                         | REGULATOR_CHANGE_STATUS
389                         | REGULATOR_CHANGE_VOLTAGE,
390                 .always_on = true,
391                 .boot_on = 1,
392                 .apply_uV = 1,
393         },
394         .consumer_supplies = as3720_sd6_supply,
395         .num_consumer_supplies = ARRAY_SIZE(as3720_sd6_supply),
396 };
397
398 static struct as3720_reg_init as3720_core_init_data[] = {
399         /* disable all regulators */
400         AS3720_REG_INIT(AS3720_SD_CONTROL_REG, 0x7f),
401         AS3720_REG_INIT(AS3720_LDOCONTROL0_REG, 0xef),
402         AS3720_REG_INIT(AS3720_LDOCONTROL1_REG, 0x01),
403         /* set to lowest voltage output */
404         /* set to OTP settings */
405         AS3720_REG_INIT(AS3720_SD0_VOLTAGE_REG, 0x32),
406         AS3720_REG_INIT(AS3720_SD1_VOLTAGE_REG, 0x32),
407         AS3720_REG_INIT(AS3720_SD2_VOLTAGE_REG, 0xFF),
408         AS3720_REG_INIT(AS3720_SD3_VOLTAGE_REG, 0xD0),
409         AS3720_REG_INIT(AS3720_SD4_VOLTAGE_REG, 0xA4),
410         AS3720_REG_INIT(AS3720_SD5_VOLTAGE_REG, 0xFE),
411         AS3720_REG_INIT(AS3720_SD6_VOLTAGE_REG, 0x52),
412         AS3720_REG_INIT(AS3720_LDO0_VOLTAGE_REG, 0x90),
413         AS3720_REG_INIT(AS3720_LDO1_VOLTAGE_REG, 0x43),
414         AS3720_REG_INIT(AS3720_LDO2_VOLTAGE_REG, 0x43),
415         AS3720_REG_INIT(AS3720_LDO3_VOLTAGE_REG, 0xA8),
416         AS3720_REG_INIT(AS3720_LDO4_VOLTAGE_REG, 0x00),
417         AS3720_REG_INIT(AS3720_LDO5_VOLTAGE_REG, 0xff),
418         AS3720_REG_INIT(AS3720_LDO6_VOLTAGE_REG, 0xff),
419         AS3720_REG_INIT(AS3720_LDO7_VOLTAGE_REG, 0x90),
420         AS3720_REG_INIT(AS3720_LDO8_VOLTAGE_REG, 0x7F),
421         AS3720_REG_INIT(AS3720_LDO9_VOLTAGE_REG, 0x00),
422         AS3720_REG_INIT(AS3720_LDO10_VOLTAGE_REG, 0x00),
423         AS3720_REG_INIT(AS3720_LDO11_VOLTAGE_REG, 0x00),
424         {.reg = AS3720_REG_INIT_TERMINATE},
425 };
426
427 /* config settings are OTP plus initial state
428  * GPIOsignal_out at 20h not configurable through OTP and is initialized to
429  * zero. To enable output, the invert bit must be turned on.
430  * GPIOxcontrol register format
431  * bit(s)  bitname
432  * ---------------------
433  *  7     gpiox_invert   invert input or output
434  * 6:3    gpiox_iosf     0: normal
435  * 2:0    gpiox_mode     0: input, 1: output push/pull, 3: ADC input (tristate)
436  *
437  * Examples:
438  * otp  meaning
439  * ------------
440  * 0x3  gpiox_invert=0(no invert), gpiox_iosf=0(normal), gpiox_mode=3(ADC input)
441  * 0x81 gpiox_invert=1(invert), gpiox_iosf=0(normal), gpiox_mode=1(output)
442  *
443  * Note: output state should be defined for gpiox_mode = output.  Do not change
444  * the state of the invert bit for critical devices such as GPIO 7 which enables
445  * SDRAM. Driver applies invert mask to output state to configure GPIOsignal_out
446  * register correctly.
447  * E.g. Invert = 1, (requested) output state = 1 => GPIOsignal_out = 0
448  */
449
450 static struct as3720_gpio_config as3720_gpio_cfgs[] = {
451         {
452                 /* otp = 0x3 */
453                 .gpio = AS3720_GPIO0,
454                 .mode = AS3720_GPIO_MODE_ADC_IN,
455         },
456         {
457                 /* otp = 0x3 */
458                 .gpio = AS3720_GPIO1,
459                 .mode = AS3720_GPIO_MODE_ADC_IN,
460         },
461         {
462                 /* otp = 0x3 */
463                 .gpio = AS3720_GPIO2,
464                 .mode = AS3720_GPIO_MODE_ADC_IN,
465         },
466         {
467                 /* otp = 0x01 => REGEN_3 = LP0 gate (1.8V, 5 V) */
468                 .gpio       = AS3720_GPIO3,
469                 .invert     = AS3720_GPIO_CFG_INVERT, /* don't go into LP0 */
470                 .mode       = AS3720_GPIO_MODE_OUTPUT_VDDH,
471                 .output_state = AS3720_GPIO_CFG_OUTPUT_ENABLED,
472         },
473         {
474                 /* otp = 0x81 => on by default
475                  * gates SDMMC3
476                  */
477                 .gpio       = AS3720_GPIO4,
478                 .invert     = AS3720_GPIO_CFG_NO_INVERT,
479                 .mode       = AS3720_GPIO_MODE_OUTPUT_VDDH,
480                 .output_state = AS3720_GPIO_CFG_OUTPUT_DISABLED,
481         },
482         {
483                 /* otp = 0x3  EN_MIC_BIAS_L */
484                 .gpio = AS3720_GPIO5,
485                 .mode = AS3720_GPIO_MODE_ADC_IN,
486         },
487         {
488                 /* otp = 0x3  CAM_LDO1_EN */
489                 .gpio = AS3720_GPIO6,
490                 .mode = AS3720_GPIO_MODE_ADC_IN,
491         },
492         {
493                 /* otp = 0x81 */
494                 .gpio       = AS3720_GPIO7,
495                 .invert     = AS3720_GPIO_CFG_INVERT,
496                 .mode       = AS3720_GPIO_MODE_OUTPUT_VDDH,
497                 .output_state = AS3720_GPIO_CFG_OUTPUT_ENABLED,
498         },
499 };
500
501 static struct as3720_platform_data as3720_pdata = {
502         .reg_init[AS3720_LDO0] = &as3720_ldo0,
503         .reg_init[AS3720_LDO1] = &as3720_ldo1,
504         .reg_init[AS3720_LDO2] = &as3720_ldo2,
505         .reg_init[AS3720_LDO3] = &as3720_ldo3,
506         .reg_init[AS3720_LDO5] = &as3720_ldo5,
507         .reg_init[AS3720_LDO6] = &as3720_ldo6,
508         .reg_init[AS3720_LDO8] = &as3720_ldo8,
509         .reg_init[AS3720_SD0] = &as3720_sd0,
510         .reg_init[AS3720_SD1] = &as3720_sd1,
511         .reg_init[AS3720_SD2] = &as3720_sd2,
512         .reg_init[AS3720_SD3] = &as3720_sd3,
513         .reg_init[AS3720_SD4] = &as3720_sd4,
514         .reg_init[AS3720_SD5] = &as3720_sd5,
515         .reg_init[AS3720_SD6] = &as3720_sd6,
516
517         .core_init_data = &as3720_core_init_data[0],
518         .gpio_base = AS3720_GPIO_BASE,
519         .rtc_start_year = 2010,
520
521         .num_gpio_cfgs = ARRAY_SIZE(as3720_gpio_cfgs),
522         .gpio_cfgs     = as3720_gpio_cfgs,
523 };
524
525 static struct i2c_board_info __initdata as3720_regulators[] = {
526         {
527                 I2C_BOARD_INFO("as3720", 0x40),
528                 .flags = I2C_CLIENT_WAKE,
529                 .irq = INT_EXTERNAL_PMU,
530                 .platform_data = &as3720_pdata,
531         },
532 };
533
534 int __init pismo_as3720_regulator_init(void)
535 {
536         printk(KERN_INFO "%s: i2c_register_board_info\n",
537                 __func__);
538         i2c_register_board_info(4, as3720_regulators,
539                                 ARRAY_SIZE(as3720_regulators));
540         return 0;
541 }
542
543 static int ac_online(void)
544 {
545         return 1;
546 }
547
548 static struct resource pismo_pda_resources[] = {
549         [0] = {
550                 .name   = "ac",
551         },
552 };
553
554 static struct pda_power_pdata pismo_pda_data = {
555         .is_ac_online   = ac_online,
556 };
557
558 static struct platform_device pismo_pda_power_device = {
559         .name           = "pda-power",
560         .id             = -1,
561         .resource       = pismo_pda_resources,
562         .num_resources  = ARRAY_SIZE(pismo_pda_resources),
563         .dev    = {
564                 .platform_data  = &pismo_pda_data,
565         },
566 };
567
568 static struct tegra_suspend_platform_data pismo_suspend_data = {
569         .cpu_timer      = 2000,
570         .cpu_off_timer  = 2000,
571         .suspend_mode   = TEGRA_SUSPEND_NONE,
572         .core_timer     = 0x7e7e,
573         .core_off_timer = 2000,
574         .corereq_high   = true,
575         .sysclkreq_high = true,
576         .cpu_lp2_min_residency = 1000,
577 };
578
579 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
580 /* board parameters for cpu dfll */
581 static struct tegra_cl_dvfs_cfg_param pismo_cl_dvfs_param = {
582         .sample_rate = 12500,
583
584         .force_mode = TEGRA_CL_DVFS_FORCE_FIXED,
585         .cf = 10,
586         .ci = 0,
587         .cg = 2,
588
589         .droop_cut_value = 0xF,
590         .droop_restore_ramp = 0x0,
591         .scale_out_ramp = 0x0,
592 };
593 #endif
594
595 /* TPS51632: fixed 10mV steps from 600mV to 1400mV, with offset 0x23 */
596 #define PMU_CPU_VDD_MAP_SIZE ((1400000 - 600000) / 10000 + 1)
597 static struct voltage_reg_map pmu_cpu_vdd_map[PMU_CPU_VDD_MAP_SIZE];
598 static inline void fill_reg_map(void)
599 {
600         int i;
601         for (i = 0; i < PMU_CPU_VDD_MAP_SIZE; i++) {
602                 pmu_cpu_vdd_map[i].reg_value = i + 0x23;
603                 pmu_cpu_vdd_map[i].reg_uV = 600000 + 10000 * i;
604         }
605 }
606
607 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
608 static struct tegra_cl_dvfs_platform_data pismo_cl_dvfs_data = {
609         .dfll_clk_name = "dfll_cpu",
610         .pmu_if = TEGRA_CL_DVFS_PMU_I2C,
611         .u.pmu_i2c = {
612                 .fs_rate = 400000,
613                 .slave_addr = 0x86,
614                 .reg = 0x00,
615         },
616         .vdd_map = pmu_cpu_vdd_map,
617         .vdd_map_size = PMU_CPU_VDD_MAP_SIZE,
618
619         .cfg_param = &pismo_cl_dvfs_param,
620 };
621
622 static int __init pismo_cl_dvfs_init(void)
623 {
624         fill_reg_map();
625         tegra_cl_dvfs_device.dev.platform_data = &pismo_cl_dvfs_data;
626         platform_device_register(&tegra_cl_dvfs_device);
627
628         return 0;
629 }
630 #endif
631
632 static struct regulator_bulk_data pismo_gps_regulator_supply[] = {
633         [0] = {
634                 .supply = "vdd_gps_3v3",
635         },
636         [1] = {
637                 .supply = "vdd_gps_1v8",
638         },
639 };
640
641 static struct regulator_userspace_consumer_data pismo_gps_regulator_pdata = {
642         .num_supplies   = ARRAY_SIZE(pismo_gps_regulator_supply),
643         .supplies       = pismo_gps_regulator_supply,
644 };
645
646 static struct platform_device pismo_gps_regulator_device = {
647         .name   = "reg-userspace-consumer",
648         .id     = 2,
649         .dev    = {
650                         .platform_data = &pismo_gps_regulator_pdata,
651         },
652 };
653
654 static struct regulator_bulk_data pismo_bt_regulator_supply[] = {
655         [0] = {
656                 .supply = "vdd_bt_3v3",
657         },
658         [1] = {
659                 .supply = "vddio_bt_1v8",
660         },
661 };
662
663 static struct regulator_userspace_consumer_data pismo_bt_regulator_pdata = {
664         .num_supplies   = ARRAY_SIZE(pismo_bt_regulator_supply),
665         .supplies       = pismo_bt_regulator_supply,
666 };
667
668 static struct platform_device pismo_bt_regulator_device = {
669         .name   = "reg-userspace-consumer",
670         .id     = 1,
671         .dev    = {
672                         .platform_data = &pismo_bt_regulator_pdata,
673         },
674 };
675
676 /* Gated by CAM_LDO1_EN From AMS7230 GPIO6*/
677 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
678         REGULATOR_SUPPLY("dvdd_cam", NULL),
679         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
680         REGULATOR_SUPPLY("vi2c", "2-0030"),
681         REGULATOR_SUPPLY("vif", "2-0036"),
682         REGULATOR_SUPPLY("dovdd", "2-0010"),
683         REGULATOR_SUPPLY("vdd_i2c", "2-000e"),
684 };
685
686 /* Gated by PMU_REGEN3 From AMS7230 GPIO3*/
687 static struct regulator_consumer_supply fixed_reg_vdd_hdmi_5v0_supply[] = {
688         REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
689 };
690
691 /* Not gated */
692 static struct regulator_consumer_supply fixed_reg_usb1_vbus_supply[] = {
693         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
694 };
695
696 /* Not Gated */
697 static struct regulator_consumer_supply fixed_reg_usb3_vbus_supply[] = {
698         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.2"),
699 };
700
701 /* Macro for defining fixed regulator sub device data */
702 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
703 #define FIXED_REG(_id, _var, _name, _always_on, _boot_on,       \
704         _gpio_nr, _open_drain, _active_high, _boot_state, _millivolts)  \
705         static struct regulator_init_data ri_data_##_var =              \
706         {                                                               \
707                 .num_consumer_supplies =                                \
708                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
709                 .consumer_supplies = fixed_reg_##_name##_supply,        \
710                 .constraints = {                                        \
711                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
712                                         REGULATOR_MODE_STANDBY),        \
713                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
714                                         REGULATOR_CHANGE_STATUS |       \
715                                         REGULATOR_CHANGE_VOLTAGE),      \
716                         .always_on = _always_on,                        \
717                         .boot_on = _boot_on,                            \
718                 },                                                      \
719         };                                                              \
720         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
721         {                                                               \
722                 .supply_name = FIXED_SUPPLY(_name),                     \
723                 .microvolts = _millivolts * 1000,                       \
724                 .gpio = _gpio_nr,                                       \
725                 .gpio_is_open_drain = _open_drain,                      \
726                 .enable_high = _active_high,                            \
727                 .enabled_at_boot = _boot_state,                         \
728                 .init_data = &ri_data_##_var,                           \
729         };                                                              \
730         static struct platform_device fixed_reg_##_var##_dev = {        \
731                 .name = "reg-fixed-voltage",                            \
732                 .id = _id,                                              \
733                 .dev = {                                                \
734                         .platform_data = &fixed_reg_##_var##_pdata,     \
735                 },                                                      \
736         }
737
738 FIXED_REG(1,    en_1v8_cam,     en_1v8_cam,     0,      0,
739         AS3720_GPIO_BASE + AS3720_GPIO6,        false,  true,   0,      1800);
740
741 FIXED_REG(2,    vdd_hdmi_5v0,   vdd_hdmi_5v0,   0,      0,
742         TEGRA_GPIO_PK1, false,  true,   0,      5000);
743
744 FIXED_REG(3,    usb1_vbus,      usb1_vbus,      0,      0,
745         -EINVAL,        true,   true,   1,      5000);
746
747 FIXED_REG(4,    usb3_vbus,      usb3_vbus,      0,      0,
748         -EINVAL,        true,   true,   1,      5000);
749
750 /*
751  * Creating the fixed regulator device tables
752  */
753
754 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
755
756 #define PISMO_COMMON_FIXED_REG          \
757         ADD_FIXED_REG(usb1_vbus),               \
758         ADD_FIXED_REG(usb3_vbus),               \
759         ADD_FIXED_REG(vdd_hdmi_5v0),            \
760         ADD_FIXED_REG(en_1v8_cam),
761
762 /* Gpio switch regulator platform data for pluto */
763 static struct platform_device *fixed_reg_devs_pm347[] = {
764         PISMO_COMMON_FIXED_REG
765 };
766
767
768 static int __init pismo_fixed_regulator_init(void)
769 {
770
771         if (!machine_is_pismo())
772                 return 0;
773
774         return platform_add_devices(fixed_reg_devs_pm347,
775                                 ARRAY_SIZE(fixed_reg_devs_pm347));
776 }
777
778 subsys_initcall_sync(pismo_fixed_regulator_init);
779
780 int __init pismo_regulator_init(void)
781 {
782
783 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
784         pismo_cl_dvfs_init();
785 #endif
786         pismo_as3720_regulator_init();
787
788         platform_device_register(&pismo_pda_power_device);
789         platform_device_register(&pismo_bt_regulator_device);
790         platform_device_register(&pismo_gps_regulator_device);
791         return 0;
792 }
793
794 int __init pismo_suspend_init(void)
795 {
796         tegra_init_suspend(&pismo_suspend_data);
797         return 0;
798 }
799
800 int __init pismo_edp_init(void)
801 {
802 #ifdef CONFIG_TEGRA_EDP_LIMITS
803         unsigned int regulator_mA;
804
805         regulator_mA = get_maximum_cpu_current_supported();
806         if (!regulator_mA)
807                 regulator_mA = 15000;
808
809         pr_info("%s: CPU regulator %d mA\n", __func__, regulator_mA);
810
811         tegra_init_cpu_edp_limits(regulator_mA);
812 #endif
813         return 0;
814 }
815
816
817 static struct soctherm_platform_data pismo_soctherm_data = {
818         .therm = {
819                 [THERM_CPU] = {
820                         .zone_enable = true,
821                         .passive_delay = 1000,
822                         .num_trips = 3,
823                         .trips = {
824                                 {
825                                         .cdev_type = "tegra-balanced",
826                                         .trip_temp = 85000,
827                                         .trip_type = THERMAL_TRIP_PASSIVE,
828                                         .upper = THERMAL_NO_LIMIT,
829                                         .lower = THERMAL_NO_LIMIT,
830                                 },
831                                 {
832                                         .cdev_type = "tegra-heavy",
833                                         .trip_temp = 95000,
834                                         .trip_type = THERMAL_TRIP_HOT,
835                                         .upper = THERMAL_NO_LIMIT,
836                                         .lower = THERMAL_NO_LIMIT,
837                                 },
838                                 {
839                                         .cdev_type = "tegra-shutdown",
840                                         .trip_temp = 105000,
841                                         .trip_type = THERMAL_TRIP_CRITICAL,
842                                         .upper = THERMAL_NO_LIMIT,
843                                         .lower = THERMAL_NO_LIMIT,
844                                 },
845                         },
846                 },
847                 [THERM_GPU] = {
848                         .zone_enable = true,
849                 },
850                 [THERM_PLL] = {
851                         .zone_enable = true,
852                 },
853         },
854         .throttle = {
855                 [THROTTLE_HEAVY] = {
856                         .devs = {
857                                 [THROTTLE_DEV_CPU] = {
858                                         .enable = 1,
859                                 },
860                         },
861                 },
862         },
863 };
864
865 int __init pismo_soctherm_init(void)
866 {
867         return tegra11_soctherm_init(&pismo_soctherm_data);
868 }