ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
[linux-3.10.git] / arch / arm / mach-tegra / board-macallan-powermon.c
1 /*
2  * arch/arm/mach-tegra/board-macallan-powermon.c
3  *
4  * Copyright (c) 2013, NVIDIA Corporation. All Rights Reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18
19 #include <linux/i2c.h>
20 #include <linux/ina219.h>
21 #include <linux/platform_data/ina230.h>
22
23 #include "board.h"
24 #include "board-macallan.h"
25
26 #define PRECISION_MULTIPLIER_MACALLAN 1000
27
28 #define AVG_SAMPLES (2 << 9) /* 16 samples */
29
30 /* AVG is specified from platform data */
31 #define INA230_CONT_CONFIG      (AVG_SAMPLES | INA230_VBUS_CT | \
32                                 INA230_VSH_CT | INA230_CONT_MODE)
33 #define INA230_TRIG_CONFIG      (AVG_SAMPLES | INA230_VBUS_CT | \
34                                  INA230_VSH_CT | INA230_TRIG_MODE)
35
36 enum {
37         VD_CPU,
38         VD_SOC,
39         VS_DDR0,
40         VS_DDR1,
41         VS_LCD_BL,
42         VD_LCD_HV,
43         VS_SYS_1V8,
44         VD_AP_1V8,
45         VD_AP_RTC,
46         VS_AUD_SYS,
47         VD_DDR0,
48         VD_DDR1,
49         VD_AP_VBUS,
50         VS_SYS_2V9,
51         VA_PLLX,
52         VA_AP_1V2,
53 };
54
55 static struct ina219_platform_data power_mon_ina219_info[] = {
56         [VD_CPU] = {
57                 .calibration_data  = 0x7CD2,
58                 .power_lsb = 2.563685298 * PRECISION_MULTIPLIER_MACALLAN,
59                 .rail_name = "VD_CPU",
60                 .divisor = 20,
61                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
62                 .cont_conf = 0x3FFF,
63                 .trig_conf = 0x1DB,
64                 .shunt_resistor = 1,
65         },
66
67         [VD_SOC] = {
68                 .calibration_data  = 0x7CD2,
69                 .power_lsb = 2.563685298 * PRECISION_MULTIPLIER_MACALLAN,
70                 .rail_name = "VD_SOC",
71                 .divisor = 20,
72                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
73                 .cont_conf = 0x3FFF,
74                 .trig_conf = 0x1DB,
75                 .shunt_resistor = 1,
76         },
77
78         [VS_DDR0] = {
79                 .calibration_data  = 0xfffe,
80                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
81                 .rail_name = "VS_DDR0",
82                 .divisor = 20,
83                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
84                 .cont_conf = 0x3FFF,
85                 .trig_conf = 0x1DB,
86                 .shunt_resistor = 10,
87         },
88
89         [VS_DDR1] = {
90                 .calibration_data  = 0xfffe,
91                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
92                 .rail_name = "VS_DDR1",
93                 .divisor = 20,
94                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
95                 .cont_conf = 0x3FFF,
96                 .trig_conf = 0x1DB,
97                 .shunt_resistor = 10,
98         },
99
100         [VS_LCD_BL] = {
101                 .calibration_data  = 0xfffe,
102                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
103                 .rail_name = "VS_LCD_BL",
104                 .divisor = 20,
105                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
106                 .cont_conf = 0x3FFF,
107                 .trig_conf = 0x1DB,
108                 .shunt_resistor = 10,
109         },
110
111         [VD_LCD_HV] = {
112                 .calibration_data  = 0xfffe,
113                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
114                 .rail_name = "VD_LCD_HV",
115                 .divisor = 20,
116                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
117                 .cont_conf = 0x3FFF,
118                 .trig_conf = 0x1DB,
119                 .shunt_resistor = 10,
120         },
121
122         [VS_SYS_1V8] = {
123                 .calibration_data  = 0x7CD2,
124                 .power_lsb = 2.563685298 * PRECISION_MULTIPLIER_MACALLAN,
125                 .rail_name = "VS_SYS_1V8",
126                 .divisor = 20,
127                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
128                 .cont_conf = 0x3FFF,
129                 .trig_conf = 0x1DB,
130                 .shunt_resistor = 10,
131         },
132
133         [VD_AP_1V8] = {
134                 .calibration_data  = 0xfffe,
135                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
136                 .rail_name = "VD_AP_1V8",
137                 .divisor = 20,
138                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
139                 .cont_conf = 0x3FFF,
140                 .trig_conf = 0x1DB,
141                 .shunt_resistor = 10,
142         },
143
144         [VD_AP_RTC] = {
145                 .calibration_data  = 0xfffe,
146                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
147                 .rail_name = "VD_AP_RTC",
148                 .divisor = 20,
149                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
150                 .cont_conf = 0x3FFF,
151                 .trig_conf = 0x1DB,
152                 .shunt_resistor = 10,
153         },
154
155         [VS_AUD_SYS] = {
156                 .calibration_data  = 0xfffe,
157                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
158                 .rail_name = "VS_AUD_SYS",
159                 .divisor = 20,
160                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
161                 .cont_conf = 0x3FFF,
162                 .trig_conf = 0x1DB,
163                 .shunt_resistor = 10,
164         },
165
166         [VD_DDR0] = {
167                 .calibration_data  = 0xaec0,
168                 .power_lsb = 1.8311874106 * PRECISION_MULTIPLIER_MACALLAN,
169                 .rail_name = "VD_DDR0",
170                 .divisor = 20,
171                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
172                 .cont_conf = 0x3FFF,
173                 .trig_conf = 0x1DB,
174                 .shunt_resistor = 10,
175         },
176
177         [VD_DDR1] = {
178                 .calibration_data  = 0xaec0,
179                 .power_lsb = 1.8311874106 * PRECISION_MULTIPLIER_MACALLAN,
180                 .rail_name = "VD_DDR1",
181                 .divisor = 20,
182                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
183                 .cont_conf = 0x3FFF,
184                 .trig_conf = 0x1DB,
185                 .shunt_resistor = 10,
186         },
187
188         [VD_AP_VBUS] = {
189                 .calibration_data  = 0xfffe,
190                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
191                 .rail_name = "VD_AP_VBUS",
192                 .divisor = 20,
193                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
194                 .cont_conf = 0x3FFF,
195                 .trig_conf = 0x1DB,
196                 .shunt_resistor = 200,
197         },
198
199         [VS_SYS_2V9] = {
200                 .calibration_data  = 0xfffe,
201                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
202                 .rail_name = "VS_SYS_2V9",
203                 .divisor = 20,
204                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
205                 .cont_conf = 0x3FFF,
206                 .trig_conf = 0x1DB,
207                 .shunt_resistor = 10,
208         },
209
210         [VA_PLLX] = {
211                 .calibration_data  = 0xfffe,
212                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
213                 .rail_name = "VA_PLLX",
214                 .divisor = 20,
215                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
216                 .cont_conf = 0x3FFF,
217                 .trig_conf = 0x1DB,
218                 .shunt_resistor = 10,
219         },
220
221         [VA_AP_1V2] = {
222                 .calibration_data  = 0xfffe,
223                 .power_lsb = 1.2500381481 * PRECISION_MULTIPLIER_MACALLAN,
224                 .rail_name = "VA_AP_1V2",
225                 .divisor = 20,
226                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
227                 .cont_conf = 0x3FFF,
228                 .trig_conf = 0x1DB,
229                 .shunt_resistor = 10,
230         },
231 };
232
233 enum {
234         VDD_CELL
235 };
236
237 static struct ina230_platform_data power_mon_ina230_info[] = {
238         [VDD_CELL] = {
239                 .calibration_data  = 0x20c4,
240                 .power_lsb = 3.051757813 * PRECISION_MULTIPLIER_MACALLAN,
241                 .rail_name = "VDD_CELL",
242                 .trig_conf = INA230_TRIG_CONFIG,
243                 .cont_conf = INA230_CONT_CONFIG,
244                 .resistor = 5,
245                 .min_cores_online = 2,
246                 .divisor = 25,
247                 .precision_multiplier = PRECISION_MULTIPLIER_MACALLAN,
248                 /* set to 5A, wait for syseng tuning */
249                 .current_threshold = 5000,
250                 .shunt_polarity_inverted = 1,
251         }
252 };
253
254 enum {
255         INA_I2C_ADDR_40,
256         INA_I2C_ADDR_41,
257         INA_I2C_ADDR_42,
258         INA_I2C_ADDR_43,
259         INA_I2C_ADDR_44,
260         INA_I2C_ADDR_45,
261         INA_I2C_ADDR_46,
262         INA_I2C_ADDR_47,
263         INA_I2C_ADDR_48,
264         INA_I2C_ADDR_49,
265         INA_I2C_ADDR_4A,
266         INA_I2C_ADDR_4B,
267         INA_I2C_ADDR_4C,
268         INA_I2C_ADDR_4D,
269         INA_I2C_ADDR_4E,
270         INA_I2C_ADDR_4F,
271 };
272
273 static struct i2c_board_info macallan_i2c1_ina_board_info[] = {
274         [INA_I2C_ADDR_40] = {
275                 I2C_BOARD_INFO("ina219", 0x40),
276                 .platform_data = &power_mon_ina219_info[VD_CPU],
277                 .irq = -1,
278         },
279
280         [INA_I2C_ADDR_41] = {
281                 I2C_BOARD_INFO("ina219", 0x41),
282                 .platform_data = &power_mon_ina219_info[VD_SOC],
283                 .irq = -1,
284         },
285
286         [INA_I2C_ADDR_42] = {
287                 I2C_BOARD_INFO("ina219", 0x42),
288                 .platform_data = &power_mon_ina219_info[VS_DDR0],
289                 .irq = -1,
290         },
291
292         [INA_I2C_ADDR_43] = {
293                 I2C_BOARD_INFO("ina219", 0x43),
294                 .platform_data = &power_mon_ina219_info[VS_DDR1],
295                 .irq = -1,
296         },
297
298         [INA_I2C_ADDR_44] = {
299                 I2C_BOARD_INFO("ina230", 0x44),
300                 .platform_data = &power_mon_ina230_info[VDD_CELL],
301                 .irq = -1,
302         },
303
304         [INA_I2C_ADDR_45] = {
305                 I2C_BOARD_INFO("ina219", 0x45),
306                 .platform_data = &power_mon_ina219_info[VD_LCD_HV],
307                 .irq = -1,
308         },
309
310         [INA_I2C_ADDR_46] = {
311                 I2C_BOARD_INFO("ina219", 0x46),
312                 .platform_data = &power_mon_ina219_info[VS_SYS_1V8],
313                 .irq = -1,
314         },
315
316         [INA_I2C_ADDR_47] = {
317                 I2C_BOARD_INFO("ina219", 0x47),
318                 .platform_data = &power_mon_ina219_info[VD_AP_1V8],
319                 .irq = -1,
320         },
321
322         [INA_I2C_ADDR_48] = {
323                 I2C_BOARD_INFO("ina219", 0x48),
324                 .platform_data = &power_mon_ina219_info[VD_AP_RTC],
325                 .irq = -1,
326         },
327
328         [INA_I2C_ADDR_49] = {
329                 I2C_BOARD_INFO("ina219", 0x49),
330                 .platform_data = &power_mon_ina219_info[VS_AUD_SYS],
331                 .irq = -1,
332         },
333
334         [INA_I2C_ADDR_4A] = {
335                 I2C_BOARD_INFO("ina219", 0x4A),
336                 .platform_data = &power_mon_ina219_info[VD_DDR0],
337                 .irq = -1,
338         },
339
340         [INA_I2C_ADDR_4B] = {
341                 I2C_BOARD_INFO("ina219", 0x4B),
342                 .platform_data = &power_mon_ina219_info[VD_DDR1],
343                 .irq = -1,
344         },
345
346         [INA_I2C_ADDR_4C] = {
347                 I2C_BOARD_INFO("ina219", 0x4C),
348                 .platform_data = &power_mon_ina219_info[VD_AP_VBUS],
349                 .irq = -1,
350         },
351
352         [INA_I2C_ADDR_4D] = {
353                 I2C_BOARD_INFO("ina219", 0x4D),
354                 .platform_data = &power_mon_ina219_info[VS_SYS_2V9],
355                 .irq = -1,
356         },
357
358         [INA_I2C_ADDR_4E] = {
359                 I2C_BOARD_INFO("ina219", 0x4E),
360                 .platform_data = &power_mon_ina219_info[VA_PLLX],
361                 .irq = -1,
362         },
363
364         [INA_I2C_ADDR_4F] = {
365                 I2C_BOARD_INFO("ina219", 0x4F),
366                 .platform_data = &power_mon_ina219_info[VA_AP_1V2],
367                 .irq = -1,
368         },
369 };
370
371 int __init macallan_pmon_init(void)
372 {
373         i2c_register_board_info(1, macallan_i2c1_ina_board_info,
374                 ARRAY_SIZE(macallan_i2c1_ina_board_info));
375
376         return 0;
377 }
378
379