arm: tegra: remove unnecessary fuse header files
[linux-3.10.git] / arch / arm / mach-tegra / board-loki-memory.c
1 /*
2  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
15  */
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_data/tegra_emc.h>
19
20 #include "board.h"
21 #include "board-loki.h"
22 #include "tegra-board-id.h"
23 #include "tegra12_emc.h"
24 #include "devices.h"
25
26 static struct tegra12_emc_table loki_emc_table[] = {
27         {
28                 0x15,       /* V5.0.2 */
29                 "01_12750_V01_V5.0.2_V0.3", /* DVFS table version */
30                 12750,      /* SDRAM frequency */
31                 780,        /* min voltage */
32                 800,        /* gpu min voltage */
33                 "pllp_out0", /* clock source id */
34                 0x4000003e, /* CLK_SOURCE_EMC */
35                 167,        /* number of burst_regs */
36                 31,         /* number of up_down_regs */
37                 {
38                         0x00000000, /* EMC_RC */
39                         0x00000003, /* EMC_RFC */
40                         0x00000000, /* EMC_RFC_SLR */
41                         0x00000000, /* EMC_RAS */
42                         0x00000000, /* EMC_RP */
43                         0x00000003, /* EMC_R2W */
44                         0x0000000a, /* EMC_W2R */
45                         0x00000003, /* EMC_R2P */
46                         0x0000000b, /* EMC_W2P */
47                         0x00000000, /* EMC_RD_RCD */
48                         0x00000000, /* EMC_WR_RCD */
49                         0x00000003, /* EMC_RRD */
50                         0x00000003, /* EMC_REXT */
51                         0x00000000, /* EMC_WEXT */
52                         0x00000005, /* EMC_WDV */
53                         0x00000005, /* EMC_WDV_MASK */
54                         0x00000005, /* EMC_QUSE */
55                         0x00000000, /* EMC_QUSE_WIDTH */
56                         0x00000000, /* EMC_IBDLY */
57                         0x00000004, /* EMC_EINPUT */
58                         0x00000004, /* EMC_EINPUT_DURATION */
59                         0x00010000, /* EMC_PUTERM_EXTRA */
60                         0x00000002, /* EMC_PUTERM_WIDTH */
61                         0x00000000, /* EMC_PUTERM_ADJ */
62                         0x00000000, /* EMC_CDB_CNTL_1 */
63                         0x00000000, /* EMC_CDB_CNTL_2 */
64                         0x00000000, /* EMC_CDB_CNTL_3 */
65                         0x00000003, /* EMC_QRST */
66                         0x0000000c, /* EMC_QSAFE */
67                         0x0000000c, /* EMC_RDV */
68                         0x0000000e, /* EMC_RDV_MASK */
69                         0x00000060, /* EMC_REFRESH */
70                         0x00000000, /* EMC_BURST_REFRESH_NUM */
71                         0x00000018, /* EMC_PRE_REFRESH_REQ_CNT */
72                         0x00000002, /* EMC_PDEX2WR */
73                         0x00000002, /* EMC_PDEX2RD */
74                         0x00000001, /* EMC_PCHG2PDEN */
75                         0x00000000, /* EMC_ACT2PDEN */
76                         0x00000007, /* EMC_AR2PDEN */
77                         0x0000000f, /* EMC_RW2PDEN */
78                         0x00000005, /* EMC_TXSR */
79                         0x00000005, /* EMC_TXSRDLL */
80                         0x00000004, /* EMC_TCKE */
81                         0x00000005, /* EMC_TCKESR */
82                         0x00000004, /* EMC_TPD */
83                         0x00000000, /* EMC_TFAW */
84                         0x00000000, /* EMC_TRPAB */
85                         0x00000005, /* EMC_TCLKSTABLE */
86                         0x00000005, /* EMC_TCLKSTOP */
87                         0x00000064, /* EMC_TREFBW */
88                         0x00000000, /* EMC_FBIO_CFG6 */
89                         0x00000000, /* EMC_ODT_WRITE */
90                         0x00000000, /* EMC_ODT_READ */
91                         0x10674098, /* EMC_FBIO_CFG5 */
92                         0x002c00a0, /* EMC_CFG_DIG_DLL */
93                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
94                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
95                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
96                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
97                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
98                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
99                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
100                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
101                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
102                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
103                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
104                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
105                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
106                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
107                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
108                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
109                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
110                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
111                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
112                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
113                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
114                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
115                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
116                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
117                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
118                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
119                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
120                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
121                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
122                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
123                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
124                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
125                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
126                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
127                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
128                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
129                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
130                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
131                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
132                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
133                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
134                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
135                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
136                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
137                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
138                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
139                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
140                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
141                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
142                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
143                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
144                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
145                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
146                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
147                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
148                         0x0007c000, /* EMC_DLL_XFORM_DQ0 */
149                         0x0007c000, /* EMC_DLL_XFORM_DQ1 */
150                         0x0007c000, /* EMC_DLL_XFORM_DQ2 */
151                         0x0007c000, /* EMC_DLL_XFORM_DQ3 */
152                         0x00007c00, /* EMC_DLL_XFORM_DQ4 */
153                         0x00007c00, /* EMC_DLL_XFORM_DQ5 */
154                         0x00007c00, /* EMC_DLL_XFORM_DQ6 */
155                         0x00007c00, /* EMC_DLL_XFORM_DQ7 */
156                         0x10000280, /* EMC_XM2CMDPADCTRL */
157                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
158                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
159                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
160                         0x00000000, /* EMC_XM2DQPADCTRL2 */
161                         0x00000000, /* EMC_XM2DQPADCTRL3 */
162                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
163                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
164                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
165                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
166                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
167                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
168                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
169                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
170                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
171                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
172                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
173                         0x00000007, /* EMC_TXDSRVTTGEN */
174                         0x00000000, /* EMC_FBIO_SPARE */
175                         0x00000000, /* EMC_ZCAL_INTERVAL */
176                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
177                         0x000e000e, /* EMC_MRS_WAIT_CNT */
178                         0x000e000e, /* EMC_MRS_WAIT_CNT2 */
179                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
180                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
181                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
182                         0x00000000, /* EMC_CTT */
183                         0x00000002, /* EMC_CTT_DURATION */
184                         0x0000f3f3, /* EMC_CFG_PIPE */
185                         0x800001c5, /* EMC_DYN_SELF_REF_CONTROL */
186                         0x00000009, /* EMC_QPOP */
187                         0x40040001, /* MC_EMEM_ARB_CFG */
188                         0x8000000a, /* MC_EMEM_ARB_OUTSTANDING_REQ */
189                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
190                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
191                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
192                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
193                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
194                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
195                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
196                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
197                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
198                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
199                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
200                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
201                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
202                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
203                         0x77e30303, /* MC_EMEM_ARB_MISC0 */
204                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
205                 },
206                 {
207                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
208                         0x00000007, /* MC_PTSA_GRANT_DECREMENT */
209                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
210                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
211                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
212                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
213                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
214                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
215                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
216                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
217                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
218                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
219                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
220                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
221                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
222                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
223                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
224                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
225                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
226                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
227                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
228                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
229                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
230                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
231                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
232                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
233                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_1 */
234                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
235                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
236                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
237                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
238                 },
239                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
240                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
241                 0x00000802, /* EMC_CTT_TERM_CTRL */
242                 0x73240000, /* EMC_CFG */
243                 0x00000885, /* EMC_CFG_2 */
244                 0x0004012c, /* EMC_SEL_DPD_CTRL */
245                 0x002c0068, /* EMC_CFG_DIG_DLL */
246                 0x80001221, /* Mode Register 0 */
247                 0x80100003, /* Mode Register 1 */
248                 0x80200008, /* Mode Register 2 */
249                 0x00000000, /* Mode Register 4 */
250                 57820,      /* expected dvfs latency (ns) */
251         },
252         {
253                 0x15,       /* V5.0.2 */
254                 "01_20400_V01_V5.0.2_V0.3", /* DVFS table version */
255                 20400,      /* SDRAM frequency */
256                 780,        /* min voltage */
257                 800,        /* gpu min voltage */
258                 "pllp_out0", /* clock source id */
259                 0x40000026, /* CLK_SOURCE_EMC */
260                 167,        /* number of burst_regs */
261                 31,         /* number of up_down_regs */
262                 {
263                         0x00000000, /* EMC_RC */
264                         0x00000005, /* EMC_RFC */
265                         0x00000000, /* EMC_RFC_SLR */
266                         0x00000000, /* EMC_RAS */
267                         0x00000000, /* EMC_RP */
268                         0x00000003, /* EMC_R2W */
269                         0x0000000a, /* EMC_W2R */
270                         0x00000003, /* EMC_R2P */
271                         0x0000000b, /* EMC_W2P */
272                         0x00000000, /* EMC_RD_RCD */
273                         0x00000000, /* EMC_WR_RCD */
274                         0x00000003, /* EMC_RRD */
275                         0x00000003, /* EMC_REXT */
276                         0x00000000, /* EMC_WEXT */
277                         0x00000005, /* EMC_WDV */
278                         0x00000005, /* EMC_WDV_MASK */
279                         0x00000005, /* EMC_QUSE */
280                         0x00000000, /* EMC_QUSE_WIDTH */
281                         0x00000000, /* EMC_IBDLY */
282                         0x00000004, /* EMC_EINPUT */
283                         0x00000004, /* EMC_EINPUT_DURATION */
284                         0x00010000, /* EMC_PUTERM_EXTRA */
285                         0x00000002, /* EMC_PUTERM_WIDTH */
286                         0x00000000, /* EMC_PUTERM_ADJ */
287                         0x00000000, /* EMC_CDB_CNTL_1 */
288                         0x00000000, /* EMC_CDB_CNTL_2 */
289                         0x00000000, /* EMC_CDB_CNTL_3 */
290                         0x00000003, /* EMC_QRST */
291                         0x0000000c, /* EMC_QSAFE */
292                         0x0000000c, /* EMC_RDV */
293                         0x0000000e, /* EMC_RDV_MASK */
294                         0x0000009a, /* EMC_REFRESH */
295                         0x00000000, /* EMC_BURST_REFRESH_NUM */
296                         0x00000026, /* EMC_PRE_REFRESH_REQ_CNT */
297                         0x00000002, /* EMC_PDEX2WR */
298                         0x00000002, /* EMC_PDEX2RD */
299                         0x00000001, /* EMC_PCHG2PDEN */
300                         0x00000000, /* EMC_ACT2PDEN */
301                         0x00000007, /* EMC_AR2PDEN */
302                         0x0000000f, /* EMC_RW2PDEN */
303                         0x00000006, /* EMC_TXSR */
304                         0x00000006, /* EMC_TXSRDLL */
305                         0x00000004, /* EMC_TCKE */
306                         0x00000005, /* EMC_TCKESR */
307                         0x00000004, /* EMC_TPD */
308                         0x00000000, /* EMC_TFAW */
309                         0x00000000, /* EMC_TRPAB */
310                         0x00000005, /* EMC_TCLKSTABLE */
311                         0x00000005, /* EMC_TCLKSTOP */
312                         0x000000a0, /* EMC_TREFBW */
313                         0x00000000, /* EMC_FBIO_CFG6 */
314                         0x00000000, /* EMC_ODT_WRITE */
315                         0x00000000, /* EMC_ODT_READ */
316                         0x10674098, /* EMC_FBIO_CFG5 */
317                         0x002c00a0, /* EMC_CFG_DIG_DLL */
318                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
319                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
320                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
321                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
322                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
323                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
324                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
325                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
326                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
327                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
328                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
329                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
330                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
331                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
332                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
333                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
334                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
335                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
336                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
337                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
338                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
339                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
340                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
341                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
342                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
343                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
344                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
345                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
346                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
347                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
348                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
349                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
350                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
351                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
352                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
353                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
354                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
355                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
356                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
357                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
358                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
359                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
360                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
361                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
362                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
363                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
364                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
365                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
366                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
367                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
368                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
369                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
370                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
371                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
372                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
373                         0x0007c000, /* EMC_DLL_XFORM_DQ0 */
374                         0x0007c000, /* EMC_DLL_XFORM_DQ1 */
375                         0x0007c000, /* EMC_DLL_XFORM_DQ2 */
376                         0x0007c000, /* EMC_DLL_XFORM_DQ3 */
377                         0x00007c00, /* EMC_DLL_XFORM_DQ4 */
378                         0x00007c00, /* EMC_DLL_XFORM_DQ5 */
379                         0x00007c00, /* EMC_DLL_XFORM_DQ6 */
380                         0x00007c00, /* EMC_DLL_XFORM_DQ7 */
381                         0x10000280, /* EMC_XM2CMDPADCTRL */
382                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
383                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
384                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
385                         0x00000000, /* EMC_XM2DQPADCTRL2 */
386                         0x00000000, /* EMC_XM2DQPADCTRL3 */
387                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
388                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
389                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
390                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
391                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
392                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
393                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
394                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
395                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
396                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
397                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
398                         0x0000000b, /* EMC_TXDSRVTTGEN */
399                         0x00000000, /* EMC_FBIO_SPARE */
400                         0x00000000, /* EMC_ZCAL_INTERVAL */
401                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
402                         0x000e000e, /* EMC_MRS_WAIT_CNT */
403                         0x000e000e, /* EMC_MRS_WAIT_CNT2 */
404                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
405                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
406                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
407                         0x00000000, /* EMC_CTT */
408                         0x00000002, /* EMC_CTT_DURATION */
409                         0x0000f3f3, /* EMC_CFG_PIPE */
410                         0x8000023a, /* EMC_DYN_SELF_REF_CONTROL */
411                         0x00000009, /* EMC_QPOP */
412                         0x40020001, /* MC_EMEM_ARB_CFG */
413                         0x80000012, /* MC_EMEM_ARB_OUTSTANDING_REQ */
414                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
415                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
416                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
417                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
418                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
419                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
420                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
421                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
422                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
423                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
424                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
425                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
426                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
427                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
428                         0x76230303, /* MC_EMEM_ARB_MISC0 */
429                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
430                 },
431                 {
432                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
433                         0x0000000a, /* MC_PTSA_GRANT_DECREMENT */
434                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
435                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
436                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
437                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
438                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
439                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
440                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
441                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
442                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
443                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
444                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
445                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
446                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
447                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
448                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
449                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
450                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
451                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
452                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
453                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
454                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
455                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
456                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
457                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
458                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_1 */
459                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
460                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
461                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
462                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
463                 },
464                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
465                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
466                 0x00000802, /* EMC_CTT_TERM_CTRL */
467                 0x73240000, /* EMC_CFG */
468                 0x00000885, /* EMC_CFG_2 */
469                 0x0004012c, /* EMC_SEL_DPD_CTRL */
470                 0x002c0068, /* EMC_CFG_DIG_DLL */
471                 0x80001221, /* Mode Register 0 */
472                 0x80100003, /* Mode Register 1 */
473                 0x80200008, /* Mode Register 2 */
474                 0x00000000, /* Mode Register 4 */
475                 35610,      /* expected dvfs latency (ns) */
476         },
477         {
478                 0x15,       /* V5.0.2 */
479                 "01_40800_V01_V5.0.2_V0.3", /* DVFS table version */
480                 40800,      /* SDRAM frequency */
481                 780,        /* min voltage */
482                 800,        /* gpu min voltage */
483                 "pllp_out0", /* clock source id */
484                 0x40000012, /* CLK_SOURCE_EMC */
485                 167,        /* number of burst_regs */
486                 31,         /* number of up_down_regs */
487                 {
488                         0x00000001, /* EMC_RC */
489                         0x0000000a, /* EMC_RFC */
490                         0x00000000, /* EMC_RFC_SLR */
491                         0x00000001, /* EMC_RAS */
492                         0x00000000, /* EMC_RP */
493                         0x00000003, /* EMC_R2W */
494                         0x0000000a, /* EMC_W2R */
495                         0x00000003, /* EMC_R2P */
496                         0x0000000b, /* EMC_W2P */
497                         0x00000000, /* EMC_RD_RCD */
498                         0x00000000, /* EMC_WR_RCD */
499                         0x00000003, /* EMC_RRD */
500                         0x00000003, /* EMC_REXT */
501                         0x00000000, /* EMC_WEXT */
502                         0x00000005, /* EMC_WDV */
503                         0x00000005, /* EMC_WDV_MASK */
504                         0x00000005, /* EMC_QUSE */
505                         0x00000000, /* EMC_QUSE_WIDTH */
506                         0x00000000, /* EMC_IBDLY */
507                         0x00000004, /* EMC_EINPUT */
508                         0x00000004, /* EMC_EINPUT_DURATION */
509                         0x00010000, /* EMC_PUTERM_EXTRA */
510                         0x00000002, /* EMC_PUTERM_WIDTH */
511                         0x00000000, /* EMC_PUTERM_ADJ */
512                         0x00000000, /* EMC_CDB_CNTL_1 */
513                         0x00000000, /* EMC_CDB_CNTL_2 */
514                         0x00000000, /* EMC_CDB_CNTL_3 */
515                         0x00000003, /* EMC_QRST */
516                         0x0000000c, /* EMC_QSAFE */
517                         0x0000000c, /* EMC_RDV */
518                         0x0000000e, /* EMC_RDV_MASK */
519                         0x00000134, /* EMC_REFRESH */
520                         0x00000000, /* EMC_BURST_REFRESH_NUM */
521                         0x0000004d, /* EMC_PRE_REFRESH_REQ_CNT */
522                         0x00000002, /* EMC_PDEX2WR */
523                         0x00000002, /* EMC_PDEX2RD */
524                         0x00000001, /* EMC_PCHG2PDEN */
525                         0x00000000, /* EMC_ACT2PDEN */
526                         0x00000008, /* EMC_AR2PDEN */
527                         0x0000000f, /* EMC_RW2PDEN */
528                         0x0000000c, /* EMC_TXSR */
529                         0x0000000c, /* EMC_TXSRDLL */
530                         0x00000004, /* EMC_TCKE */
531                         0x00000005, /* EMC_TCKESR */
532                         0x00000004, /* EMC_TPD */
533                         0x00000000, /* EMC_TFAW */
534                         0x00000000, /* EMC_TRPAB */
535                         0x00000005, /* EMC_TCLKSTABLE */
536                         0x00000005, /* EMC_TCLKSTOP */
537                         0x0000013f, /* EMC_TREFBW */
538                         0x00000000, /* EMC_FBIO_CFG6 */
539                         0x00000000, /* EMC_ODT_WRITE */
540                         0x00000000, /* EMC_ODT_READ */
541                         0x10674098, /* EMC_FBIO_CFG5 */
542                         0x002c00a0, /* EMC_CFG_DIG_DLL */
543                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
544                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
545                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
546                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
547                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
548                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
549                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
550                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
551                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
552                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
553                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
554                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
555                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
556                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
557                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
558                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
559                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
560                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
561                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
562                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
563                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
564                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
565                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
566                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
567                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
568                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
569                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
570                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
571                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
572                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
573                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
574                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
575                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
576                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
577                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
578                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
579                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
580                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
581                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
582                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
583                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
584                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
585                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
586                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
587                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
588                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
589                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
590                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
591                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
592                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
593                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
594                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
595                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
596                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
597                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
598                         0x0007c000, /* EMC_DLL_XFORM_DQ0 */
599                         0x0007c000, /* EMC_DLL_XFORM_DQ1 */
600                         0x0007c000, /* EMC_DLL_XFORM_DQ2 */
601                         0x0007c000, /* EMC_DLL_XFORM_DQ3 */
602                         0x00007c00, /* EMC_DLL_XFORM_DQ4 */
603                         0x00007c00, /* EMC_DLL_XFORM_DQ5 */
604                         0x00007c00, /* EMC_DLL_XFORM_DQ6 */
605                         0x00007c00, /* EMC_DLL_XFORM_DQ7 */
606                         0x10000280, /* EMC_XM2CMDPADCTRL */
607                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
608                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
609                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
610                         0x00000000, /* EMC_XM2DQPADCTRL2 */
611                         0x00000000, /* EMC_XM2DQPADCTRL3 */
612                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
613                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
614                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
615                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
616                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
617                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
618                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
619                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
620                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
621                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
622                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
623                         0x00000015, /* EMC_TXDSRVTTGEN */
624                         0x00000000, /* EMC_FBIO_SPARE */
625                         0x00000000, /* EMC_ZCAL_INTERVAL */
626                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
627                         0x000e000e, /* EMC_MRS_WAIT_CNT */
628                         0x000e000e, /* EMC_MRS_WAIT_CNT2 */
629                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
630                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
631                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
632                         0x00000000, /* EMC_CTT */
633                         0x00000002, /* EMC_CTT_DURATION */
634                         0x0000f3f3, /* EMC_CFG_PIPE */
635                         0x80000370, /* EMC_DYN_SELF_REF_CONTROL */
636                         0x00000009, /* EMC_QPOP */
637                         0xa0000001, /* MC_EMEM_ARB_CFG */
638                         0x80000017, /* MC_EMEM_ARB_OUTSTANDING_REQ */
639                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
640                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
641                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
642                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
643                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
644                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
645                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
646                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
647                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
648                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
649                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
650                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
651                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
652                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
653                         0x74a30303, /* MC_EMEM_ARB_MISC0 */
654                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
655                 },
656                 {
657                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
658                         0x00000014, /* MC_PTSA_GRANT_DECREMENT */
659                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
660                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
661                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
662                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
663                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
664                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
665                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
666                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
667                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
668                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
669                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
670                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
671                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
672                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
673                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
674                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
675                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
676                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
677                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
678                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
679                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
680                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
681                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
682                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
683                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_1 */
684                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
685                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
686                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
687                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
688                 },
689                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
690                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
691                 0x00000802, /* EMC_CTT_TERM_CTRL */
692                 0x73240000, /* EMC_CFG */
693                 0x00000885, /* EMC_CFG_2 */
694                 0x0004012c, /* EMC_SEL_DPD_CTRL */
695                 0x002c0068, /* EMC_CFG_DIG_DLL */
696                 0x80001221, /* Mode Register 0 */
697                 0x80100003, /* Mode Register 1 */
698                 0x80200008, /* Mode Register 2 */
699                 0x00000000, /* Mode Register 4 */
700                 20850,      /* expected dvfs latency (ns) */
701         },
702         {
703                 0x15,       /* V5.0.2 */
704                 "01_68000_V01_V5.0.2_V0.3", /* DVFS table version */
705                 68000,      /* SDRAM frequency */
706                 780,        /* min voltage */
707                 800,        /* gpu min voltage */
708                 "pllp_out0", /* clock source id */
709                 0x4000000a, /* CLK_SOURCE_EMC */
710                 167,        /* number of burst_regs */
711                 31,         /* number of up_down_regs */
712                 {
713                         0x00000003, /* EMC_RC */
714                         0x00000011, /* EMC_RFC */
715                         0x00000000, /* EMC_RFC_SLR */
716                         0x00000002, /* EMC_RAS */
717                         0x00000000, /* EMC_RP */
718                         0x00000003, /* EMC_R2W */
719                         0x0000000a, /* EMC_W2R */
720                         0x00000003, /* EMC_R2P */
721                         0x0000000b, /* EMC_W2P */
722                         0x00000000, /* EMC_RD_RCD */
723                         0x00000000, /* EMC_WR_RCD */
724                         0x00000003, /* EMC_RRD */
725                         0x00000003, /* EMC_REXT */
726                         0x00000000, /* EMC_WEXT */
727                         0x00000005, /* EMC_WDV */
728                         0x00000005, /* EMC_WDV_MASK */
729                         0x00000005, /* EMC_QUSE */
730                         0x00000000, /* EMC_QUSE_WIDTH */
731                         0x00000000, /* EMC_IBDLY */
732                         0x00000004, /* EMC_EINPUT */
733                         0x00000004, /* EMC_EINPUT_DURATION */
734                         0x00010000, /* EMC_PUTERM_EXTRA */
735                         0x00000002, /* EMC_PUTERM_WIDTH */
736                         0x00000000, /* EMC_PUTERM_ADJ */
737                         0x00000000, /* EMC_CDB_CNTL_1 */
738                         0x00000000, /* EMC_CDB_CNTL_2 */
739                         0x00000000, /* EMC_CDB_CNTL_3 */
740                         0x00000003, /* EMC_QRST */
741                         0x0000000c, /* EMC_QSAFE */
742                         0x0000000c, /* EMC_RDV */
743                         0x0000000e, /* EMC_RDV_MASK */
744                         0x00000202, /* EMC_REFRESH */
745                         0x00000000, /* EMC_BURST_REFRESH_NUM */
746                         0x00000080, /* EMC_PRE_REFRESH_REQ_CNT */
747                         0x00000002, /* EMC_PDEX2WR */
748                         0x00000002, /* EMC_PDEX2RD */
749                         0x00000001, /* EMC_PCHG2PDEN */
750                         0x00000000, /* EMC_ACT2PDEN */
751                         0x0000000f, /* EMC_AR2PDEN */
752                         0x0000000f, /* EMC_RW2PDEN */
753                         0x00000013, /* EMC_TXSR */
754                         0x00000013, /* EMC_TXSRDLL */
755                         0x00000004, /* EMC_TCKE */
756                         0x00000005, /* EMC_TCKESR */
757                         0x00000004, /* EMC_TPD */
758                         0x00000001, /* EMC_TFAW */
759                         0x00000000, /* EMC_TRPAB */
760                         0x00000005, /* EMC_TCLKSTABLE */
761                         0x00000005, /* EMC_TCLKSTOP */
762                         0x00000213, /* EMC_TREFBW */
763                         0x00000002, /* EMC_FBIO_CFG6 */
764                         0x00000000, /* EMC_ODT_WRITE */
765                         0x00000000, /* EMC_ODT_READ */
766                         0x10674098, /* EMC_FBIO_CFG5 */
767                         0x002c00a0, /* EMC_CFG_DIG_DLL */
768                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
769                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
770                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
771                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
772                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
773                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
774                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
775                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
776                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
777                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
778                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
779                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
780                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
781                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
782                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
783                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
784                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
785                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
786                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
787                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
788                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
789                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
790                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
791                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
792                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
793                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
794                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
795                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
796                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
797                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
798                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
799                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
800                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
801                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
802                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
803                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
804                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
805                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
806                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
807                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
808                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
809                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
810                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
811                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
812                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
813                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
814                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
815                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
816                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
817                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
818                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
819                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
820                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
821                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
822                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
823                         0x0007c000, /* EMC_DLL_XFORM_DQ0 */
824                         0x0007c000, /* EMC_DLL_XFORM_DQ1 */
825                         0x0007c000, /* EMC_DLL_XFORM_DQ2 */
826                         0x0007c000, /* EMC_DLL_XFORM_DQ3 */
827                         0x00007c00, /* EMC_DLL_XFORM_DQ4 */
828                         0x00007c00, /* EMC_DLL_XFORM_DQ5 */
829                         0x00007c00, /* EMC_DLL_XFORM_DQ6 */
830                         0x00007c00, /* EMC_DLL_XFORM_DQ7 */
831                         0x10000280, /* EMC_XM2CMDPADCTRL */
832                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
833                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
834                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
835                         0x00000000, /* EMC_XM2DQPADCTRL2 */
836                         0x00000000, /* EMC_XM2DQPADCTRL3 */
837                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
838                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
839                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
840                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
841                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
842                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
843                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
844                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
845                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
846                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
847                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
848                         0x00000022, /* EMC_TXDSRVTTGEN */
849                         0x00000000, /* EMC_FBIO_SPARE */
850                         0x00000000, /* EMC_ZCAL_INTERVAL */
851                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
852                         0x000e000e, /* EMC_MRS_WAIT_CNT */
853                         0x000e000e, /* EMC_MRS_WAIT_CNT2 */
854                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
855                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
856                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
857                         0x00000000, /* EMC_CTT */
858                         0x00000002, /* EMC_CTT_DURATION */
859                         0x0000f3f3, /* EMC_CFG_PIPE */
860                         0x8000050e, /* EMC_DYN_SELF_REF_CONTROL */
861                         0x00000009, /* EMC_QPOP */
862                         0x00000001, /* MC_EMEM_ARB_CFG */
863                         0x8000001e, /* MC_EMEM_ARB_OUTSTANDING_REQ */
864                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
865                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
866                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
867                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
868                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
869                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
870                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
871                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
872                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
873                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
874                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
875                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
876                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
877                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
878                         0x74230403, /* MC_EMEM_ARB_MISC0 */
879                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
880                 },
881                 {
882                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
883                         0x00000021, /* MC_PTSA_GRANT_DECREMENT */
884                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
885                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
886                         0x00ff00b0, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
887                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
888                         0x00ff00ec, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
889                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
890                         0x00ff00ec, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
891                         0x00e90049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
892                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
893                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
894                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
895                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
896                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
897                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
898                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
899                         0x00ff00a3, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
900                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
901                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
902                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
903                         0x000000ef, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
904                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
905                         0x000000ef, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
906                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
907                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
908                         0x00ee00ef, /* MC_LATENCY_ALLOWANCE_VDE_1 */
909                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
910                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
911                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
912                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
913                 },
914                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
915                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
916                 0x00000802, /* EMC_CTT_TERM_CTRL */
917                 0x73240000, /* EMC_CFG */
918                 0x00000885, /* EMC_CFG_2 */
919                 0x0004012c, /* EMC_SEL_DPD_CTRL */
920                 0x002c0068, /* EMC_CFG_DIG_DLL */
921                 0x80001221, /* Mode Register 0 */
922                 0x80100003, /* Mode Register 1 */
923                 0x80200008, /* Mode Register 2 */
924                 0x00000000, /* Mode Register 4 */
925                 10720,      /* expected dvfs latency (ns) */
926         },
927         {
928                 0x15,       /* V5.0.2 */
929                 "01_102000_V01_V5.0.2_V0.3", /* DVFS table version */
930                 102000,     /* SDRAM frequency */
931                 780,        /* min voltage */
932                 800,        /* gpu min voltage */
933                 "pllp_out0", /* clock source id */
934                 0x40000006, /* CLK_SOURCE_EMC */
935                 167,        /* number of burst_regs */
936                 31,         /* number of up_down_regs */
937                 {
938                         0x00000004, /* EMC_RC */
939                         0x0000001a, /* EMC_RFC */
940                         0x00000000, /* EMC_RFC_SLR */
941                         0x00000003, /* EMC_RAS */
942                         0x00000001, /* EMC_RP */
943                         0x00000003, /* EMC_R2W */
944                         0x0000000a, /* EMC_W2R */
945                         0x00000003, /* EMC_R2P */
946                         0x0000000b, /* EMC_W2P */
947                         0x00000001, /* EMC_RD_RCD */
948                         0x00000001, /* EMC_WR_RCD */
949                         0x00000003, /* EMC_RRD */
950                         0x00000003, /* EMC_REXT */
951                         0x00000000, /* EMC_WEXT */
952                         0x00000005, /* EMC_WDV */
953                         0x00000005, /* EMC_WDV_MASK */
954                         0x00000006, /* EMC_QUSE */
955                         0x00000000, /* EMC_QUSE_WIDTH */
956                         0x00000000, /* EMC_IBDLY */
957                         0x00000004, /* EMC_EINPUT */
958                         0x00000004, /* EMC_EINPUT_DURATION */
959                         0x00010000, /* EMC_PUTERM_EXTRA */
960                         0x00000002, /* EMC_PUTERM_WIDTH */
961                         0x00000000, /* EMC_PUTERM_ADJ */
962                         0x00000000, /* EMC_CDB_CNTL_1 */
963                         0x00000000, /* EMC_CDB_CNTL_2 */
964                         0x00000000, /* EMC_CDB_CNTL_3 */
965                         0x00000003, /* EMC_QRST */
966                         0x0000000c, /* EMC_QSAFE */
967                         0x0000000c, /* EMC_RDV */
968                         0x0000000e, /* EMC_RDV_MASK */
969                         0x00000304, /* EMC_REFRESH */
970                         0x00000000, /* EMC_BURST_REFRESH_NUM */
971                         0x000000c1, /* EMC_PRE_REFRESH_REQ_CNT */
972                         0x00000002, /* EMC_PDEX2WR */
973                         0x00000002, /* EMC_PDEX2RD */
974                         0x00000001, /* EMC_PCHG2PDEN */
975                         0x00000000, /* EMC_ACT2PDEN */
976                         0x00000018, /* EMC_AR2PDEN */
977                         0x0000000f, /* EMC_RW2PDEN */
978                         0x0000001c, /* EMC_TXSR */
979                         0x0000001c, /* EMC_TXSRDLL */
980                         0x00000004, /* EMC_TCKE */
981                         0x00000005, /* EMC_TCKESR */
982                         0x00000004, /* EMC_TPD */
983                         0x00000003, /* EMC_TFAW */
984                         0x00000000, /* EMC_TRPAB */
985                         0x00000005, /* EMC_TCLKSTABLE */
986                         0x00000005, /* EMC_TCLKSTOP */
987                         0x0000031c, /* EMC_TREFBW */
988                         0x00000000, /* EMC_FBIO_CFG6 */
989                         0x00000000, /* EMC_ODT_WRITE */
990                         0x00000000, /* EMC_ODT_READ */
991                         0x10674098, /* EMC_FBIO_CFG5 */
992                         0x002c00a0, /* EMC_CFG_DIG_DLL */
993                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
994                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
995                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
996                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
997                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
998                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
999                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
1000                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
1001                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
1002                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
1003                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
1004                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
1005                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
1006                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
1007                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
1008                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
1009                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
1010                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1011                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1012                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1013                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1014                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1015                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1016                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1017                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1018                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
1019                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
1020                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1021                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
1022                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
1023                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1024                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1025                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1026                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1027                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1028                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1029                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1030                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1031                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1032                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1033                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1034                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1035                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1036                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1037                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1038                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1039                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1040                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1041                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1042                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1043                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1044                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1045                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1046                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1047                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1048                         0x0007c000, /* EMC_DLL_XFORM_DQ0 */
1049                         0x0007c000, /* EMC_DLL_XFORM_DQ1 */
1050                         0x0007c000, /* EMC_DLL_XFORM_DQ2 */
1051                         0x0007c000, /* EMC_DLL_XFORM_DQ3 */
1052                         0x00007c00, /* EMC_DLL_XFORM_DQ4 */
1053                         0x00007c00, /* EMC_DLL_XFORM_DQ5 */
1054                         0x00007c00, /* EMC_DLL_XFORM_DQ6 */
1055                         0x00007c00, /* EMC_DLL_XFORM_DQ7 */
1056                         0x10000280, /* EMC_XM2CMDPADCTRL */
1057                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1058                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1059                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
1060                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1061                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1062                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
1063                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
1064                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1065                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1066                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
1067                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1068                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
1069                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1070                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1071                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1072                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
1073                         0x00000033, /* EMC_TXDSRVTTGEN */
1074                         0x00000000, /* EMC_FBIO_SPARE */
1075                         0x00000000, /* EMC_ZCAL_INTERVAL */
1076                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
1077                         0x000e000e, /* EMC_MRS_WAIT_CNT */
1078                         0x000e000e, /* EMC_MRS_WAIT_CNT2 */
1079                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1080                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1081                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1082                         0x00000000, /* EMC_CTT */
1083                         0x00000002, /* EMC_CTT_DURATION */
1084                         0x0000f3f3, /* EMC_CFG_PIPE */
1085                         0x80000713, /* EMC_DYN_SELF_REF_CONTROL */
1086                         0x00000009, /* EMC_QPOP */
1087                         0x08000001, /* MC_EMEM_ARB_CFG */
1088                         0x80000026, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1089                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1090                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
1091                         0x00000003, /* MC_EMEM_ARB_TIMING_RC */
1092                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
1093                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
1094                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1095                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1096                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1097                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
1098                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1099                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
1100                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1101                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
1102                         0x000a0403, /* MC_EMEM_ARB_DA_COVERS */
1103                         0x73c30504, /* MC_EMEM_ARB_MISC0 */
1104                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1105                 },
1106                 {
1107                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
1108                         0x00000031, /* MC_PTSA_GRANT_DECREMENT */
1109                         0x00ff00da, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1110                         0x00ff00da, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1111                         0x00ff0075, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1112                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1113                         0x00ff009d, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1114                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1115                         0x00ff009d, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1116                         0x009b0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1117                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1118                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1119                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1120                         0x000800ad, /* MC_LATENCY_ALLOWANCE_HC_0 */
1121                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
1122                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1123                         0x00ff00c6, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1124                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1125                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1126                         0x00ff00d6, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1127                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1128                         0x0000009f, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1129                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1130                         0x0000009f, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1131                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1132                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1133                         0x009f00a0, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1134                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1135                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1136                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1137                         0x00ff00da, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1138                 },
1139                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1140                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1141                 0x00000802, /* EMC_CTT_TERM_CTRL */
1142                 0x73240000, /* EMC_CFG */
1143                 0x00000885, /* EMC_CFG_2 */
1144                 0x0004012c, /* EMC_SEL_DPD_CTRL */
1145                 0x002c0068, /* EMC_CFG_DIG_DLL */
1146                 0x80001221, /* Mode Register 0 */
1147                 0x80100003, /* Mode Register 1 */
1148                 0x80200008, /* Mode Register 2 */
1149                 0x00000000, /* Mode Register 4 */
1150                 6890,       /* expected dvfs latency (ns) */
1151         },
1152         {
1153                 0x15,       /* V5.0.2 */
1154                 "01_204000_V01_V5.0.2_V0.3", /* DVFS table version */
1155                 204000,     /* SDRAM frequency */
1156                 800,        /* min voltage */
1157                 800,        /* gpu min voltage */
1158                 "pllp_out0", /* clock source id */
1159                 0x40000002, /* CLK_SOURCE_EMC */
1160                 167,        /* number of burst_regs */
1161                 31,         /* number of up_down_regs */
1162                 {
1163                         0x00000009, /* EMC_RC */
1164                         0x00000035, /* EMC_RFC */
1165                         0x00000000, /* EMC_RFC_SLR */
1166                         0x00000006, /* EMC_RAS */
1167                         0x00000002, /* EMC_RP */
1168                         0x00000004, /* EMC_R2W */
1169                         0x0000000a, /* EMC_W2R */
1170                         0x00000003, /* EMC_R2P */
1171                         0x0000000b, /* EMC_W2P */
1172                         0x00000002, /* EMC_RD_RCD */
1173                         0x00000002, /* EMC_WR_RCD */
1174                         0x00000003, /* EMC_RRD */
1175                         0x00000003, /* EMC_REXT */
1176                         0x00000000, /* EMC_WEXT */
1177                         0x00000004, /* EMC_WDV */
1178                         0x00000004, /* EMC_WDV_MASK */
1179                         0x00000005, /* EMC_QUSE */
1180                         0x00000000, /* EMC_QUSE_WIDTH */
1181                         0x00000000, /* EMC_IBDLY */
1182                         0x00000003, /* EMC_EINPUT */
1183                         0x00000005, /* EMC_EINPUT_DURATION */
1184                         0x00010000, /* EMC_PUTERM_EXTRA */
1185                         0x00000002, /* EMC_PUTERM_WIDTH */
1186                         0x00000000, /* EMC_PUTERM_ADJ */
1187                         0x00000000, /* EMC_CDB_CNTL_1 */
1188                         0x00000000, /* EMC_CDB_CNTL_2 */
1189                         0x00000000, /* EMC_CDB_CNTL_3 */
1190                         0x00000002, /* EMC_QRST */
1191                         0x0000000d, /* EMC_QSAFE */
1192                         0x0000000e, /* EMC_RDV */
1193                         0x00000010, /* EMC_RDV_MASK */
1194                         0x00000607, /* EMC_REFRESH */
1195                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1196                         0x00000181, /* EMC_PRE_REFRESH_REQ_CNT */
1197                         0x00000002, /* EMC_PDEX2WR */
1198                         0x00000002, /* EMC_PDEX2RD */
1199                         0x00000001, /* EMC_PCHG2PDEN */
1200                         0x00000000, /* EMC_ACT2PDEN */
1201                         0x00000032, /* EMC_AR2PDEN */
1202                         0x0000000f, /* EMC_RW2PDEN */
1203                         0x00000038, /* EMC_TXSR */
1204                         0x00000038, /* EMC_TXSRDLL */
1205                         0x00000004, /* EMC_TCKE */
1206                         0x00000005, /* EMC_TCKESR */
1207                         0x00000004, /* EMC_TPD */
1208                         0x00000007, /* EMC_TFAW */
1209                         0x00000000, /* EMC_TRPAB */
1210                         0x00000005, /* EMC_TCLKSTABLE */
1211                         0x00000005, /* EMC_TCLKSTOP */
1212                         0x00000638, /* EMC_TREFBW */
1213                         0x00000002, /* EMC_FBIO_CFG6 */
1214                         0x00000000, /* EMC_ODT_WRITE */
1215                         0x00000000, /* EMC_ODT_READ */
1216                         0x10674098, /* EMC_FBIO_CFG5 */
1217                         0x002c00a0, /* EMC_CFG_DIG_DLL */
1218                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1219                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
1220                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
1221                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
1222                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
1223                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
1224                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
1225                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
1226                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
1227                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
1228                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
1229                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
1230                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
1231                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
1232                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
1233                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
1234                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
1235                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1236                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1237                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1238                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1239                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1240                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1241                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1242                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1243                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
1244                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
1245                         0x00004000, /* EMC_DLL_XFORM_ADDR2 */
1246                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
1247                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
1248                         0x00004000, /* EMC_DLL_XFORM_ADDR5 */
1249                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1250                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1251                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1252                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1253                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1254                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1255                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1256                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1257                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1258                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1259                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1260                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1261                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1262                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1263                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1264                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1265                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1266                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1267                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1268                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1269                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1270                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1271                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1272                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1273                         0x0007c000, /* EMC_DLL_XFORM_DQ0 */
1274                         0x0007c000, /* EMC_DLL_XFORM_DQ1 */
1275                         0x0007c000, /* EMC_DLL_XFORM_DQ2 */
1276                         0x0007c000, /* EMC_DLL_XFORM_DQ3 */
1277                         0x00007c00, /* EMC_DLL_XFORM_DQ4 */
1278                         0x00007c00, /* EMC_DLL_XFORM_DQ5 */
1279                         0x00007c00, /* EMC_DLL_XFORM_DQ6 */
1280                         0x00007c00, /* EMC_DLL_XFORM_DQ7 */
1281                         0x10000280, /* EMC_XM2CMDPADCTRL */
1282                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1283                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1284                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
1285                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1286                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1287                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
1288                         0x00001212, /* EMC_XM2CLKPADCTRL2 */
1289                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1290                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1291                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
1292                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1293                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
1294                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1295                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1296                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1297                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
1298                         0x00000066, /* EMC_TXDSRVTTGEN */
1299                         0x00000000, /* EMC_FBIO_SPARE */
1300                         0x00020000, /* EMC_ZCAL_INTERVAL */
1301                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1302                         0x000e000e, /* EMC_MRS_WAIT_CNT */
1303                         0x000e000e, /* EMC_MRS_WAIT_CNT2 */
1304                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1305                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1306                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1307                         0x00000000, /* EMC_CTT */
1308                         0x00000002, /* EMC_CTT_DURATION */
1309                         0x0000d3b3, /* EMC_CFG_PIPE */
1310                         0x80000d22, /* EMC_DYN_SELF_REF_CONTROL */
1311                         0x00000009, /* EMC_QPOP */
1312                         0x01000003, /* MC_EMEM_ARB_CFG */
1313                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1314                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1315                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
1316                         0x00000004, /* MC_EMEM_ARB_TIMING_RC */
1317                         0x00000002, /* MC_EMEM_ARB_TIMING_RAS */
1318                         0x00000004, /* MC_EMEM_ARB_TIMING_FAW */
1319                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1320                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1321                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1322                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
1323                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1324                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
1325                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1326                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
1327                         0x000a0404, /* MC_EMEM_ARB_DA_COVERS */
1328                         0x73840a05, /* MC_EMEM_ARB_MISC0 */
1329                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1330                 },
1331                 {
1332                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
1333                         0x00000062, /* MC_PTSA_GRANT_DECREMENT */
1334                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1335                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1336                         0x00ff003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1337                         0x00ff00af, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1338                         0x00ff004f, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1339                         0x00ff00af, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1340                         0x00ff004f, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1341                         0x004e0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1342                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1343                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1344                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1345                         0x00080057, /* MC_LATENCY_ALLOWANCE_HC_0 */
1346                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
1347                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1348                         0x00ff0063, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1349                         0x00ff0036, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1350                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1351                         0x00ff006b, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1352                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1353                         0x00000050, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1354                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1355                         0x00000050, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1356                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1357                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1358                         0x00510050, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1359                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1360                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1361                         0x00ff00c6, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1362                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1363                 },
1364                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1365                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1366                 0x00000802, /* EMC_CTT_TERM_CTRL */
1367                 0x73240000, /* EMC_CFG */
1368                 0x0000088d, /* EMC_CFG_2 */
1369                 0x0004012c, /* EMC_SEL_DPD_CTRL */
1370                 0x002c0068, /* EMC_CFG_DIG_DLL */
1371                 0x80001221, /* Mode Register 0 */
1372                 0x80100003, /* Mode Register 1 */
1373                 0x80200008, /* Mode Register 2 */
1374                 0x00000000, /* Mode Register 4 */
1375                 3420,       /* expected dvfs latency (ns) */
1376         },
1377         {
1378                 0x15,       /* V5.0.2 */
1379                 "01_312000_V01_V5.0.2_V0.3", /* DVFS table version */
1380                 312000,     /* SDRAM frequency */
1381                 820,        /* min voltage */
1382                 800,        /* gpu min voltage */
1383                 "pllm_out0", /* clock source id */
1384                 0x00000002, /* CLK_SOURCE_EMC */
1385                 167,        /* number of burst_regs */
1386                 31,         /* number of up_down_regs */
1387                 {
1388                         0x0000000d, /* EMC_RC */
1389                         0x00000050, /* EMC_RFC */
1390                         0x00000000, /* EMC_RFC_SLR */
1391                         0x00000009, /* EMC_RAS */
1392                         0x00000003, /* EMC_RP */
1393                         0x00000004, /* EMC_R2W */
1394                         0x00000008, /* EMC_W2R */
1395                         0x00000002, /* EMC_R2P */
1396                         0x00000009, /* EMC_W2P */
1397                         0x00000003, /* EMC_RD_RCD */
1398                         0x00000003, /* EMC_WR_RCD */
1399                         0x00000002, /* EMC_RRD */
1400                         0x00000002, /* EMC_REXT */
1401                         0x00000000, /* EMC_WEXT */
1402                         0x00000003, /* EMC_WDV */
1403                         0x00000003, /* EMC_WDV_MASK */
1404                         0x00000005, /* EMC_QUSE */
1405                         0x00000002, /* EMC_QUSE_WIDTH */
1406                         0x00000000, /* EMC_IBDLY */
1407                         0x00000002, /* EMC_EINPUT */
1408                         0x00000006, /* EMC_EINPUT_DURATION */
1409                         0x00030000, /* EMC_PUTERM_EXTRA */
1410                         0x00000004, /* EMC_PUTERM_WIDTH */
1411                         0x00000000, /* EMC_PUTERM_ADJ */
1412                         0x00000000, /* EMC_CDB_CNTL_1 */
1413                         0x00000000, /* EMC_CDB_CNTL_2 */
1414                         0x00000000, /* EMC_CDB_CNTL_3 */
1415                         0x00000002, /* EMC_QRST */
1416                         0x0000000e, /* EMC_QSAFE */
1417                         0x0000000e, /* EMC_RDV */
1418                         0x00000010, /* EMC_RDV_MASK */
1419                         0x00000942, /* EMC_REFRESH */
1420                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1421                         0x00000250, /* EMC_PRE_REFRESH_REQ_CNT */
1422                         0x00000001, /* EMC_PDEX2WR */
1423                         0x00000008, /* EMC_PDEX2RD */
1424                         0x00000001, /* EMC_PCHG2PDEN */
1425                         0x00000000, /* EMC_ACT2PDEN */
1426                         0x0000004d, /* EMC_AR2PDEN */
1427                         0x0000000e, /* EMC_RW2PDEN */
1428                         0x00000055, /* EMC_TXSR */
1429                         0x00000200, /* EMC_TXSRDLL */
1430                         0x00000004, /* EMC_TCKE */
1431                         0x00000005, /* EMC_TCKESR */
1432                         0x00000004, /* EMC_TPD */
1433                         0x0000000a, /* EMC_TFAW */
1434                         0x00000000, /* EMC_TRPAB */
1435                         0x00000005, /* EMC_TCLKSTABLE */
1436                         0x00000005, /* EMC_TCLKSTOP */
1437                         0x00000982, /* EMC_TREFBW */
1438                         0x00000000, /* EMC_FBIO_CFG6 */
1439                         0x00000000, /* EMC_ODT_WRITE */
1440                         0x00000000, /* EMC_ODT_READ */
1441                         0x1047b898, /* EMC_FBIO_CFG5 */
1442                         0x002c00a0, /* EMC_CFG_DIG_DLL */
1443                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1444                         0x00030000, /* EMC_DLL_XFORM_DQS0 */
1445                         0x00030000, /* EMC_DLL_XFORM_DQS1 */
1446                         0x00030000, /* EMC_DLL_XFORM_DQS2 */
1447                         0x00030000, /* EMC_DLL_XFORM_DQS3 */
1448                         0x00030000, /* EMC_DLL_XFORM_DQS4 */
1449                         0x00030000, /* EMC_DLL_XFORM_DQS5 */
1450                         0x00030000, /* EMC_DLL_XFORM_DQS6 */
1451                         0x00030000, /* EMC_DLL_XFORM_DQS7 */
1452                         0x00030000, /* EMC_DLL_XFORM_DQS8 */
1453                         0x00030000, /* EMC_DLL_XFORM_DQS9 */
1454                         0x00030000, /* EMC_DLL_XFORM_DQS10 */
1455                         0x00030000, /* EMC_DLL_XFORM_DQS11 */
1456                         0x00030000, /* EMC_DLL_XFORM_DQS12 */
1457                         0x00030000, /* EMC_DLL_XFORM_DQS13 */
1458                         0x00030000, /* EMC_DLL_XFORM_DQS14 */
1459                         0x00030000, /* EMC_DLL_XFORM_DQS15 */
1460                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1461                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1462                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1463                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1464                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1465                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1466                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1467                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1468                         0x00068000, /* EMC_DLL_XFORM_ADDR0 */
1469                         0x00068000, /* EMC_DLL_XFORM_ADDR1 */
1470                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1471                         0x00068000, /* EMC_DLL_XFORM_ADDR3 */
1472                         0x00068000, /* EMC_DLL_XFORM_ADDR4 */
1473                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1474                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1475                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1476                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1477                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1478                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1479                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1480                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1481                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1482                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1483                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1484                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1485                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1486                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1487                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1488                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1489                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1490                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1491                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1492                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1493                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1494                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1495                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1496                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1497                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1498                         0x00050000, /* EMC_DLL_XFORM_DQ0 */
1499                         0x00050000, /* EMC_DLL_XFORM_DQ1 */
1500                         0x00050000, /* EMC_DLL_XFORM_DQ2 */
1501                         0x00050000, /* EMC_DLL_XFORM_DQ3 */
1502                         0x00005000, /* EMC_DLL_XFORM_DQ4 */
1503                         0x00005000, /* EMC_DLL_XFORM_DQ5 */
1504                         0x00005000, /* EMC_DLL_XFORM_DQ6 */
1505                         0x00005000, /* EMC_DLL_XFORM_DQ7 */
1506                         0x10000280, /* EMC_XM2CMDPADCTRL */
1507                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1508                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1509                         0x01231339, /* EMC_XM2DQSPADCTRL2 */
1510                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1511                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1512                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
1513                         0x00000606, /* EMC_XM2CLKPADCTRL2 */
1514                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1515                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1516                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
1517                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1518                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
1519                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1520                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1521                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1522                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
1523                         0x0000009c, /* EMC_TXDSRVTTGEN */
1524                         0x00000000, /* EMC_FBIO_SPARE */
1525                         0x00020000, /* EMC_ZCAL_INTERVAL */
1526                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1527                         0x0171000e, /* EMC_MRS_WAIT_CNT */
1528                         0x0171000e, /* EMC_MRS_WAIT_CNT2 */
1529                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1530                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1531                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1532                         0x00000000, /* EMC_CTT */
1533                         0x00000004, /* EMC_CTT_DURATION */
1534                         0x0000d3b3, /* EMC_CFG_PIPE */
1535                         0x8000138d, /* EMC_DYN_SELF_REF_CONTROL */
1536                         0x00000009, /* EMC_QPOP */
1537                         0x0b000004, /* MC_EMEM_ARB_CFG */
1538                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1539                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1540                         0x00000002, /* MC_EMEM_ARB_TIMING_RP */
1541                         0x00000007, /* MC_EMEM_ARB_TIMING_RC */
1542                         0x00000004, /* MC_EMEM_ARB_TIMING_RAS */
1543                         0x00000005, /* MC_EMEM_ARB_TIMING_FAW */
1544                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1545                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1546                         0x00000007, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1547                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1548                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1549                         0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
1550                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1551                         0x06040202, /* MC_EMEM_ARB_DA_TURNS */
1552                         0x000b0607, /* MC_EMEM_ARB_DA_COVERS */
1553                         0x76e50f08, /* MC_EMEM_ARB_MISC0 */
1554                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1555                 },
1556                 {
1557                         0x00000005, /* MC_MLL_MPCORER_PTSA_RATE */
1558                         0x00000096, /* MC_PTSA_GRANT_DECREMENT */
1559                         0x00ff0047, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1560                         0x00ff0047, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1561                         0x00ff003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1562                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1563                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1564                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1565                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1566                         0x00330049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1567                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1568                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1569                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1570                         0x00080039, /* MC_LATENCY_ALLOWANCE_HC_0 */
1571                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
1572                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1573                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1574                         0x00ff002c, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1575                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1576                         0x00ff0046, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1577                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1578                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1579                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1580                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1581                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1582                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1583                         0x00510034, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1584                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1585                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1586                         0x00ff0082, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1587                         0x00ff0047, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1588                 },
1589                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1590                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1591                 0x00000802, /* EMC_CTT_TERM_CTRL */
1592                 0x73340000, /* EMC_CFG */
1593                 0x0000088d, /* EMC_CFG_2 */
1594                 0x0004012c, /* EMC_SEL_DPD_CTRL */
1595                 0x002c0068, /* EMC_CFG_DIG_DLL */
1596                 0x80000321, /* Mode Register 0 */
1597                 0x80100002, /* Mode Register 1 */
1598                 0x80200000, /* Mode Register 2 */
1599                 0x00000000, /* Mode Register 4 */
1600                 2180,       /* expected dvfs latency (ns) */
1601         },
1602         {
1603                 0x15,       /* V5.0.2 */
1604                 "01_396000_V01_V5.0.2_V0.3", /* DVFS table version */
1605                 396000,     /* SDRAM frequency */
1606                 870,        /* min voltage */
1607                 800,        /* gpu min voltage */
1608                 "pllc_out0", /* clock source id */
1609                 0x20000002, /* CLK_SOURCE_EMC */
1610                 167,        /* number of burst_regs */
1611                 31,         /* number of up_down_regs */
1612                 {
1613                         0x00000011, /* EMC_RC */
1614                         0x00000065, /* EMC_RFC */
1615                         0x00000000, /* EMC_RFC_SLR */
1616                         0x0000000c, /* EMC_RAS */
1617                         0x00000004, /* EMC_RP */
1618                         0x00000005, /* EMC_R2W */
1619                         0x00000008, /* EMC_W2R */
1620                         0x00000002, /* EMC_R2P */
1621                         0x0000000a, /* EMC_W2P */
1622                         0x00000004, /* EMC_RD_RCD */
1623                         0x00000004, /* EMC_WR_RCD */
1624                         0x00000002, /* EMC_RRD */
1625                         0x00000002, /* EMC_REXT */
1626                         0x00000000, /* EMC_WEXT */
1627                         0x00000004, /* EMC_WDV */
1628                         0x00000004, /* EMC_WDV_MASK */
1629                         0x00000007, /* EMC_QUSE */
1630                         0x00000002, /* EMC_QUSE_WIDTH */
1631                         0x00000000, /* EMC_IBDLY */
1632                         0x00000003, /* EMC_EINPUT */
1633                         0x00000006, /* EMC_EINPUT_DURATION */
1634                         0x00050000, /* EMC_PUTERM_EXTRA */
1635                         0x00000004, /* EMC_PUTERM_WIDTH */
1636                         0x00000000, /* EMC_PUTERM_ADJ */
1637                         0x00000000, /* EMC_CDB_CNTL_1 */
1638                         0x00000000, /* EMC_CDB_CNTL_2 */
1639                         0x00000000, /* EMC_CDB_CNTL_3 */
1640                         0x00000004, /* EMC_QRST */
1641                         0x0000000f, /* EMC_QSAFE */
1642                         0x00000010, /* EMC_RDV */
1643                         0x00000012, /* EMC_RDV_MASK */
1644                         0x00000bd1, /* EMC_REFRESH */
1645                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1646                         0x000002f4, /* EMC_PRE_REFRESH_REQ_CNT */
1647                         0x00000001, /* EMC_PDEX2WR */
1648                         0x00000008, /* EMC_PDEX2RD */
1649                         0x00000001, /* EMC_PCHG2PDEN */
1650                         0x00000000, /* EMC_ACT2PDEN */
1651                         0x00000063, /* EMC_AR2PDEN */
1652                         0x0000000f, /* EMC_RW2PDEN */
1653                         0x0000006b, /* EMC_TXSR */
1654                         0x00000200, /* EMC_TXSRDLL */
1655                         0x00000004, /* EMC_TCKE */
1656                         0x00000005, /* EMC_TCKESR */
1657                         0x00000004, /* EMC_TPD */
1658                         0x0000000d, /* EMC_TFAW */
1659                         0x00000000, /* EMC_TRPAB */
1660                         0x00000005, /* EMC_TCLKSTABLE */
1661                         0x00000005, /* EMC_TCLKSTOP */
1662                         0x00000c11, /* EMC_TREFBW */
1663                         0x00000000, /* EMC_FBIO_CFG6 */
1664                         0x00000000, /* EMC_ODT_WRITE */
1665                         0x00000000, /* EMC_ODT_READ */
1666                         0x1047b898, /* EMC_FBIO_CFG5 */
1667                         0x002c00a0, /* EMC_CFG_DIG_DLL */
1668                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1669                         0x00030000, /* EMC_DLL_XFORM_DQS0 */
1670                         0x00030000, /* EMC_DLL_XFORM_DQS1 */
1671                         0x00030000, /* EMC_DLL_XFORM_DQS2 */
1672                         0x00030000, /* EMC_DLL_XFORM_DQS3 */
1673                         0x00030000, /* EMC_DLL_XFORM_DQS4 */
1674                         0x00030000, /* EMC_DLL_XFORM_DQS5 */
1675                         0x00030000, /* EMC_DLL_XFORM_DQS6 */
1676                         0x00030000, /* EMC_DLL_XFORM_DQS7 */
1677                         0x00030000, /* EMC_DLL_XFORM_DQS8 */
1678                         0x00030000, /* EMC_DLL_XFORM_DQS9 */
1679                         0x00030000, /* EMC_DLL_XFORM_DQS10 */
1680                         0x00030000, /* EMC_DLL_XFORM_DQS11 */
1681                         0x00030000, /* EMC_DLL_XFORM_DQS12 */
1682                         0x00030000, /* EMC_DLL_XFORM_DQS13 */
1683                         0x00030000, /* EMC_DLL_XFORM_DQS14 */
1684                         0x00030000, /* EMC_DLL_XFORM_DQS15 */
1685                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1686                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1687                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1688                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1689                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1690                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1691                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1692                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1693                         0x00068000, /* EMC_DLL_XFORM_ADDR0 */
1694                         0x00068000, /* EMC_DLL_XFORM_ADDR1 */
1695                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1696                         0x00068000, /* EMC_DLL_XFORM_ADDR3 */
1697                         0x00068000, /* EMC_DLL_XFORM_ADDR4 */
1698                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1699                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1700                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1701                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1702                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1703                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1704                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1705                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1706                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1707                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1708                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1709                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1710                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1711                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1712                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1713                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1714                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1715                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1716                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1717                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1718                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1719                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1720                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1721                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1722                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1723                         0x00038000, /* EMC_DLL_XFORM_DQ0 */
1724                         0x00038000, /* EMC_DLL_XFORM_DQ1 */
1725                         0x00038000, /* EMC_DLL_XFORM_DQ2 */
1726                         0x00038000, /* EMC_DLL_XFORM_DQ3 */
1727                         0x00003800, /* EMC_DLL_XFORM_DQ4 */
1728                         0x00003800, /* EMC_DLL_XFORM_DQ5 */
1729                         0x00003800, /* EMC_DLL_XFORM_DQ6 */
1730                         0x00003800, /* EMC_DLL_XFORM_DQ7 */
1731                         0x100002a0, /* EMC_XM2CMDPADCTRL */
1732                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1733                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1734                         0x0123133d, /* EMC_XM2DQSPADCTRL2 */
1735                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1736                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1737                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
1738                         0x00000606, /* EMC_XM2CLKPADCTRL2 */
1739                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1740                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1741                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
1742                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1743                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
1744                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1745                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1746                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1747                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
1748                         0x000000c6, /* EMC_TXDSRVTTGEN */
1749                         0x00000000, /* EMC_FBIO_SPARE */
1750                         0x00020000, /* EMC_ZCAL_INTERVAL */
1751                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1752                         0x015b000e, /* EMC_MRS_WAIT_CNT */
1753                         0x015b000e, /* EMC_MRS_WAIT_CNT2 */
1754                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1755                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1756                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1757                         0x00000000, /* EMC_CTT */
1758                         0x00000004, /* EMC_CTT_DURATION */
1759                         0x0000d2b3, /* EMC_CFG_PIPE */
1760                         0x8000188b, /* EMC_DYN_SELF_REF_CONTROL */
1761                         0x0000000b, /* EMC_QPOP */
1762                         0x0f000005, /* MC_EMEM_ARB_CFG */
1763                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1764                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1765                         0x00000002, /* MC_EMEM_ARB_TIMING_RP */
1766                         0x00000009, /* MC_EMEM_ARB_TIMING_RC */
1767                         0x00000005, /* MC_EMEM_ARB_TIMING_RAS */
1768                         0x00000007, /* MC_EMEM_ARB_TIMING_FAW */
1769                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1770                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1771                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1772                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1773                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1774                         0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
1775                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1776                         0x06040202, /* MC_EMEM_ARB_DA_TURNS */
1777                         0x000d0709, /* MC_EMEM_ARB_DA_COVERS */
1778                         0x7586120a, /* MC_EMEM_ARB_MISC0 */
1779                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1780                 },
1781                 {
1782                         0x0000000a, /* MC_MLL_MPCORER_PTSA_RATE */
1783                         0x000000be, /* MC_PTSA_GRANT_DECREMENT */
1784                         0x00ff0038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1785                         0x00ff0038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1786                         0x00ff003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1787                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1788                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1789                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1790                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1791                         0x00280049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1792                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1793                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1794                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1795                         0x0008002d, /* MC_LATENCY_ALLOWANCE_HC_0 */
1796                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
1797                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1798                         0x00ff0033, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1799                         0x00ff0022, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1800                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1801                         0x00ff0037, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1802                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1803                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1804                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1805                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1806                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1807                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1808                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1809                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1810                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1811                         0x00ff0066, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1812                         0x00ff0038, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1813                 },
1814                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1815                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1816                 0x00000802, /* EMC_CTT_TERM_CTRL */
1817                 0x73340000, /* EMC_CFG */
1818                 0x0000088d, /* EMC_CFG_2 */
1819                 0x0004012c, /* EMC_SEL_DPD_CTRL */
1820                 0x002c0068, /* EMC_CFG_DIG_DLL */
1821                 0x80000521, /* Mode Register 0 */
1822                 0x80100002, /* Mode Register 1 */
1823                 0x80200000, /* Mode Register 2 */
1824                 0x00000000, /* Mode Register 4 */
1825                 1750,       /* expected dvfs latency (ns) */
1826         },
1827         {
1828                 0x15,       /* V5.0.2 */
1829                 "01_528000_V01_V5.0.2_V0.3", /* DVFS table version */
1830                 528000,     /* SDRAM frequency */
1831                 900,        /* min voltage */
1832                 900,        /* gpu min voltage */
1833                 "pllm_ud",  /* clock source id */
1834                 0x80000000, /* CLK_SOURCE_EMC */
1835                 167,        /* number of burst_regs */
1836                 31,         /* number of up_down_regs */
1837                 {
1838                         0x00000018, /* EMC_RC */
1839                         0x00000088, /* EMC_RFC */
1840                         0x00000000, /* EMC_RFC_SLR */
1841                         0x00000010, /* EMC_RAS */
1842                         0x00000006, /* EMC_RP */
1843                         0x00000006, /* EMC_R2W */
1844                         0x00000009, /* EMC_W2R */
1845                         0x00000002, /* EMC_R2P */
1846                         0x0000000d, /* EMC_W2P */
1847                         0x00000006, /* EMC_RD_RCD */
1848                         0x00000006, /* EMC_WR_RCD */
1849                         0x00000002, /* EMC_RRD */
1850                         0x00000002, /* EMC_REXT */
1851                         0x00000000, /* EMC_WEXT */
1852                         0x00000004, /* EMC_WDV */
1853                         0x00000004, /* EMC_WDV_MASK */
1854                         0x00000008, /* EMC_QUSE */
1855                         0x00000002, /* EMC_QUSE_WIDTH */
1856                         0x00000000, /* EMC_IBDLY */
1857                         0x00000003, /* EMC_EINPUT */
1858                         0x00000007, /* EMC_EINPUT_DURATION */
1859                         0x00060000, /* EMC_PUTERM_EXTRA */
1860                         0x00000004, /* EMC_PUTERM_WIDTH */
1861                         0x00000000, /* EMC_PUTERM_ADJ */
1862                         0x00000000, /* EMC_CDB_CNTL_1 */
1863                         0x00000000, /* EMC_CDB_CNTL_2 */
1864                         0x00000000, /* EMC_CDB_CNTL_3 */
1865                         0x00000004, /* EMC_QRST */
1866                         0x0000000e, /* EMC_QSAFE */
1867                         0x00000013, /* EMC_RDV */
1868                         0x00000015, /* EMC_RDV_MASK */
1869                         0x00000fd6, /* EMC_REFRESH */
1870                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1871                         0x000003f5, /* EMC_PRE_REFRESH_REQ_CNT */
1872                         0x00000002, /* EMC_PDEX2WR */
1873                         0x0000000b, /* EMC_PDEX2RD */
1874                         0x00000001, /* EMC_PCHG2PDEN */
1875                         0x00000000, /* EMC_ACT2PDEN */
1876                         0x00000084, /* EMC_AR2PDEN */
1877                         0x00000012, /* EMC_RW2PDEN */
1878                         0x0000008f, /* EMC_TXSR */
1879                         0x00000200, /* EMC_TXSRDLL */
1880                         0x00000004, /* EMC_TCKE */
1881                         0x00000005, /* EMC_TCKESR */
1882                         0x00000004, /* EMC_TPD */
1883                         0x00000013, /* EMC_TFAW */
1884                         0x00000000, /* EMC_TRPAB */
1885                         0x00000006, /* EMC_TCLKSTABLE */
1886                         0x00000006, /* EMC_TCLKSTOP */
1887                         0x00001017, /* EMC_TREFBW */
1888                         0x00000002, /* EMC_FBIO_CFG6 */
1889                         0x00000000, /* EMC_ODT_WRITE */
1890                         0x00000000, /* EMC_ODT_READ */
1891                         0x1047b898, /* EMC_FBIO_CFG5 */
1892                         0xe01200b1, /* EMC_CFG_DIG_DLL */
1893                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1894                         0x0000000a, /* EMC_DLL_XFORM_DQS0 */
1895                         0x0000000a, /* EMC_DLL_XFORM_DQS1 */
1896                         0x0000000a, /* EMC_DLL_XFORM_DQS2 */
1897                         0x0000000a, /* EMC_DLL_XFORM_DQS3 */
1898                         0x0000000a, /* EMC_DLL_XFORM_DQS4 */
1899                         0x0000000a, /* EMC_DLL_XFORM_DQS5 */
1900                         0x0000000a, /* EMC_DLL_XFORM_DQS6 */
1901                         0x0000000a, /* EMC_DLL_XFORM_DQS7 */
1902                         0x0000000a, /* EMC_DLL_XFORM_DQS8 */
1903                         0x0000000a, /* EMC_DLL_XFORM_DQS9 */
1904                         0x0000000a, /* EMC_DLL_XFORM_DQS10 */
1905                         0x0000000a, /* EMC_DLL_XFORM_DQS11 */
1906                         0x0000000a, /* EMC_DLL_XFORM_DQS12 */
1907                         0x0000000a, /* EMC_DLL_XFORM_DQS13 */
1908                         0x0000000a, /* EMC_DLL_XFORM_DQS14 */
1909                         0x0000000a, /* EMC_DLL_XFORM_DQS15 */
1910                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1911                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1912                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1913                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1914                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1915                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1916                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1917                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1918                         0x0000000e, /* EMC_DLL_XFORM_ADDR0 */
1919                         0x0000000e, /* EMC_DLL_XFORM_ADDR1 */
1920                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1921                         0x0000000e, /* EMC_DLL_XFORM_ADDR3 */
1922                         0x0000000e, /* EMC_DLL_XFORM_ADDR4 */
1923                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1924                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1925                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1926                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1927                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1928                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1929                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1930                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1931                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1932                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1933                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1934                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1935                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1936                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1937                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1938                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1939                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1940                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1941                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1942                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1943                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1944                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1945                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1946                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1947                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1948                         0x0000000b, /* EMC_DLL_XFORM_DQ0 */
1949                         0x0000000b, /* EMC_DLL_XFORM_DQ1 */
1950                         0x0000000b, /* EMC_DLL_XFORM_DQ2 */
1951                         0x0000000b, /* EMC_DLL_XFORM_DQ3 */
1952                         0x0000000b, /* EMC_DLL_XFORM_DQ4 */
1953                         0x0000000b, /* EMC_DLL_XFORM_DQ5 */
1954                         0x0000000b, /* EMC_DLL_XFORM_DQ6 */
1955                         0x0000000b, /* EMC_DLL_XFORM_DQ7 */
1956                         0x100002a0, /* EMC_XM2CMDPADCTRL */
1957                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1958                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1959                         0x0123133d, /* EMC_XM2DQSPADCTRL2 */
1960                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1961                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1962                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
1963                         0x00000c0c, /* EMC_XM2CLKPADCTRL2 */
1964                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1965                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1966                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
1967                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1968                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
1969                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1970                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1971                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1972                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
1973                         0x00000000, /* EMC_TXDSRVTTGEN */
1974                         0x00000000, /* EMC_FBIO_SPARE */
1975                         0x00020000, /* EMC_ZCAL_INTERVAL */
1976                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1977                         0x013a000e, /* EMC_MRS_WAIT_CNT */
1978                         0x013a000e, /* EMC_MRS_WAIT_CNT2 */
1979                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1980                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1981                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1982                         0x00000000, /* EMC_CTT */
1983                         0x00000004, /* EMC_CTT_DURATION */
1984                         0x000052a0, /* EMC_CFG_PIPE */
1985                         0x80002062, /* EMC_DYN_SELF_REF_CONTROL */
1986                         0x0000000c, /* EMC_QPOP */
1987                         0x0f000007, /* MC_EMEM_ARB_CFG */
1988                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1989                         0x00000002, /* MC_EMEM_ARB_TIMING_RCD */
1990                         0x00000003, /* MC_EMEM_ARB_TIMING_RP */
1991                         0x0000000c, /* MC_EMEM_ARB_TIMING_RC */
1992                         0x00000007, /* MC_EMEM_ARB_TIMING_RAS */
1993                         0x0000000a, /* MC_EMEM_ARB_TIMING_FAW */
1994                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1995                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1996                         0x00000009, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1997                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1998                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1999                         0x00000005, /* MC_EMEM_ARB_TIMING_R2W */
2000                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
2001                         0x06050202, /* MC_EMEM_ARB_DA_TURNS */
2002                         0x0010090c, /* MC_EMEM_ARB_DA_COVERS */
2003                         0x7428180d, /* MC_EMEM_ARB_MISC0 */
2004                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2005                 },
2006                 {
2007                         0x0000000d, /* MC_MLL_MPCORER_PTSA_RATE */
2008                         0x000000fd, /* MC_PTSA_GRANT_DECREMENT */
2009                         0x00c10038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
2010                         0x00c10038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
2011                         0x00c1003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
2012                         0x00c10090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
2013                         0x00c10041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
2014                         0x00c10090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
2015                         0x00c10041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
2016                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
2017                         0x00c10080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
2018                         0x00c10004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
2019                         0x00c10004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
2020                         0x00080021, /* MC_LATENCY_ALLOWANCE_HC_0 */
2021                         0x000000c1, /* MC_LATENCY_ALLOWANCE_HC_1 */
2022                         0x00c10004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
2023                         0x00c10026, /* MC_LATENCY_ALLOWANCE_GPU_0 */
2024                         0x00c1001a, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
2025                         0x00c10024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
2026                         0x00c10029, /* MC_LATENCY_ALLOWANCE_VIC_0 */
2027                         0x000000c1, /* MC_LATENCY_ALLOWANCE_VI2_0 */
2028                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
2029                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
2030                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
2031                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
2032                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
2033                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
2034                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_VDE_2 */
2035                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_VDE_3 */
2036                         0x00c10065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
2037                         0x00c1002a, /* MC_LATENCY_ALLOWANCE_AFI_0 */
2038                 },
2039                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
2040                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2041                 0x00000802, /* EMC_CTT_TERM_CTRL */
2042                 0x73300000, /* EMC_CFG */
2043                 0x00000895, /* EMC_CFG_2 */
2044                 0x00040128, /* EMC_SEL_DPD_CTRL */
2045                 0xe0120069, /* EMC_CFG_DIG_DLL */
2046                 0x80000941, /* Mode Register 0 */
2047                 0x80100002, /* Mode Register 1 */
2048                 0x80200008, /* Mode Register 2 */
2049                 0x00000000, /* Mode Register 4 */
2050                 1440,       /* expected dvfs latency (ns) */
2051         },
2052         {
2053                 0x15,       /* V5.0.2 */
2054                 "01_624000_V01_V5.0.2_V0.3", /* DVFS table version */
2055                 624000,     /* SDRAM frequency */
2056                 910,        /* min voltage */
2057                 900,        /* gpu min voltage */
2058                 "pllm_ud",  /* clock source id */
2059                 0x80000000, /* CLK_SOURCE_EMC */
2060                 167,        /* number of burst_regs */
2061                 31,         /* number of up_down_regs */
2062                 {
2063                         0x0000001c, /* EMC_RC */
2064                         0x000000a1, /* EMC_RFC */
2065                         0x00000000, /* EMC_RFC_SLR */
2066                         0x00000014, /* EMC_RAS */
2067                         0x00000007, /* EMC_RP */
2068                         0x00000007, /* EMC_R2W */
2069                         0x0000000b, /* EMC_W2R */
2070                         0x00000003, /* EMC_R2P */
2071                         0x00000010, /* EMC_W2P */
2072                         0x00000007, /* EMC_RD_RCD */
2073                         0x00000007, /* EMC_WR_RCD */
2074                         0x00000002, /* EMC_RRD */
2075                         0x00000002, /* EMC_REXT */
2076                         0x00000000, /* EMC_WEXT */
2077                         0x00000005, /* EMC_WDV */
2078                         0x00000005, /* EMC_WDV_MASK */
2079                         0x0000000a, /* EMC_QUSE */
2080                         0x00000002, /* EMC_QUSE_WIDTH */
2081                         0x00000000, /* EMC_IBDLY */
2082                         0x00000003, /* EMC_EINPUT */
2083                         0x0000000b, /* EMC_EINPUT_DURATION */
2084                         0x00080000, /* EMC_PUTERM_EXTRA */
2085                         0x00000004, /* EMC_PUTERM_WIDTH */
2086                         0x00000000, /* EMC_PUTERM_ADJ */
2087                         0x00000000, /* EMC_CDB_CNTL_1 */
2088                         0x00000000, /* EMC_CDB_CNTL_2 */
2089                         0x00000000, /* EMC_CDB_CNTL_3 */
2090                         0x00000002, /* EMC_QRST */
2091                         0x00000013, /* EMC_QSAFE */
2092                         0x00000016, /* EMC_RDV */
2093                         0x00000018, /* EMC_RDV_MASK */
2094                         0x000012c3, /* EMC_REFRESH */
2095                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2096                         0x000004b0, /* EMC_PRE_REFRESH_REQ_CNT */
2097                         0x00000002, /* EMC_PDEX2WR */
2098                         0x0000000d, /* EMC_PDEX2RD */
2099                         0x00000001, /* EMC_PCHG2PDEN */
2100                         0x00000000, /* EMC_ACT2PDEN */
2101                         0x0000009c, /* EMC_AR2PDEN */
2102                         0x00000015, /* EMC_RW2PDEN */
2103                         0x000000a9, /* EMC_TXSR */
2104                         0x00000200, /* EMC_TXSRDLL */
2105                         0x00000004, /* EMC_TCKE */
2106                         0x00000005, /* EMC_TCKESR */
2107                         0x00000004, /* EMC_TPD */
2108                         0x00000016, /* EMC_TFAW */
2109                         0x00000000, /* EMC_TRPAB */
2110                         0x00000007, /* EMC_TCLKSTABLE */
2111                         0x00000007, /* EMC_TCLKSTOP */
2112                         0x00001304, /* EMC_TREFBW */
2113                         0x00000002, /* EMC_FBIO_CFG6 */
2114                         0x00000000, /* EMC_ODT_WRITE */
2115                         0x00000000, /* EMC_ODT_READ */
2116                         0x1047b898, /* EMC_FBIO_CFG5 */
2117                         0xe00d01b1, /* EMC_CFG_DIG_DLL */
2118                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2119                         0x0000000a, /* EMC_DLL_XFORM_DQS0 */
2120                         0x0000000a, /* EMC_DLL_XFORM_DQS1 */
2121                         0x0000000a, /* EMC_DLL_XFORM_DQS2 */
2122                         0x0000000a, /* EMC_DLL_XFORM_DQS3 */
2123                         0x0000000a, /* EMC_DLL_XFORM_DQS4 */
2124                         0x0000000a, /* EMC_DLL_XFORM_DQS5 */
2125                         0x0000000a, /* EMC_DLL_XFORM_DQS6 */
2126                         0x0000000a, /* EMC_DLL_XFORM_DQS7 */
2127                         0x0000000a, /* EMC_DLL_XFORM_DQS8 */
2128                         0x0000000a, /* EMC_DLL_XFORM_DQS9 */
2129                         0x0000000a, /* EMC_DLL_XFORM_DQS10 */
2130                         0x0000000a, /* EMC_DLL_XFORM_DQS11 */
2131                         0x0000000a, /* EMC_DLL_XFORM_DQS12 */
2132                         0x0000000a, /* EMC_DLL_XFORM_DQS13 */
2133                         0x0000000a, /* EMC_DLL_XFORM_DQS14 */
2134                         0x0000000a, /* EMC_DLL_XFORM_DQS15 */
2135                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2136                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2137                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2138                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2139                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
2140                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
2141                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
2142                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
2143                         0x0000000e, /* EMC_DLL_XFORM_ADDR0 */
2144                         0x0000000e, /* EMC_DLL_XFORM_ADDR1 */
2145                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
2146                         0x0000000e, /* EMC_DLL_XFORM_ADDR3 */
2147                         0x0000000e, /* EMC_DLL_XFORM_ADDR4 */
2148                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
2149                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
2150                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
2151                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
2152                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
2153                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
2154                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
2155                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
2156                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
2157                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2158                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2159                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2160                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2161                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2162                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2163                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2164                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2165                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
2166                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
2167                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
2168                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
2169                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
2170                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
2171                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
2172                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
2173                         0x007f800d, /* EMC_DLL_XFORM_DQ0 */
2174                         0x007f800e, /* EMC_DLL_XFORM_DQ1 */
2175                         0x007f800d, /* EMC_DLL_XFORM_DQ2 */
2176                         0x007f800e, /* EMC_DLL_XFORM_DQ3 */
2177                         0x0007f80d, /* EMC_DLL_XFORM_DQ4 */
2178                         0x0007f80d, /* EMC_DLL_XFORM_DQ5 */
2179                         0x0007f80d, /* EMC_DLL_XFORM_DQ6 */
2180                         0x0007f80d, /* EMC_DLL_XFORM_DQ7 */
2181                         0x100002a0, /* EMC_XM2CMDPADCTRL */
2182                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
2183                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
2184                         0x0121113d, /* EMC_XM2DQSPADCTRL2 */
2185                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2186                         0x00000000, /* EMC_XM2DQPADCTRL3 */
2187                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
2188                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
2189                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
2190                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
2191                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
2192                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
2193                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
2194                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
2195                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
2196                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
2197                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
2198                         0x00000000, /* EMC_TXDSRVTTGEN */
2199                         0x00000000, /* EMC_FBIO_SPARE */
2200                         0x00020000, /* EMC_ZCAL_INTERVAL */
2201                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
2202                         0x0122000e, /* EMC_MRS_WAIT_CNT */
2203                         0x0122000e, /* EMC_MRS_WAIT_CNT2 */
2204                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
2205                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
2206                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
2207                         0x00000000, /* EMC_CTT */
2208                         0x00000004, /* EMC_CTT_DURATION */
2209                         0x000040a0, /* EMC_CFG_PIPE */
2210                         0x80002617, /* EMC_DYN_SELF_REF_CONTROL */
2211                         0x0000000e, /* EMC_QPOP */
2212                         0x06000009, /* MC_EMEM_ARB_CFG */
2213                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2214                         0x00000003, /* MC_EMEM_ARB_TIMING_RCD */
2215                         0x00000004, /* MC_EMEM_ARB_TIMING_RP */
2216                         0x0000000f, /* MC_EMEM_ARB_TIMING_RC */
2217                         0x00000009, /* MC_EMEM_ARB_TIMING_RAS */
2218                         0x0000000b, /* MC_EMEM_ARB_TIMING_FAW */
2219                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
2220                         0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2221                         0x0000000b, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2222                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
2223                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
2224                         0x00000005, /* MC_EMEM_ARB_TIMING_R2W */
2225                         0x00000007, /* MC_EMEM_ARB_TIMING_W2R */
2226                         0x07050202, /* MC_EMEM_ARB_DA_TURNS */
2227                         0x00130b0f, /* MC_EMEM_ARB_DA_COVERS */
2228                         0x736a1d10, /* MC_EMEM_ARB_MISC0 */
2229                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2230                 },
2231                 {
2232                         0x0000000f, /* MC_MLL_MPCORER_PTSA_RATE */
2233                         0x0000012b, /* MC_PTSA_GRANT_DECREMENT */
2234                         0x00a40038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
2235                         0x00a40038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
2236                         0x00a4003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
2237                         0x00a40090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
2238                         0x00a40041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
2239                         0x00a40090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
2240                         0x00a40041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
2241                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
2242                         0x00a40080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
2243                         0x00a40004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
2244                         0x00a40004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
2245                         0x0008001c, /* MC_LATENCY_ALLOWANCE_HC_0 */
2246                         0x000000a4, /* MC_LATENCY_ALLOWANCE_HC_1 */
2247                         0x00a40004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
2248                         0x00a40020, /* MC_LATENCY_ALLOWANCE_GPU_0 */
2249                         0x00a40018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
2250                         0x00a40024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
2251                         0x00a40023, /* MC_LATENCY_ALLOWANCE_VIC_0 */
2252                         0x000000a4, /* MC_LATENCY_ALLOWANCE_VI2_0 */
2253                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
2254                         0x00a400a4, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
2255                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
2256                         0x00a400a4, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
2257                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
2258                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
2259                         0x00a400a4, /* MC_LATENCY_ALLOWANCE_VDE_2 */
2260                         0x00a400a4, /* MC_LATENCY_ALLOWANCE_VDE_3 */
2261                         0x00a40065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
2262                         0x00a40024, /* MC_LATENCY_ALLOWANCE_AFI_0 */
2263                 },
2264                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
2265                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2266                 0x00000802, /* EMC_CTT_TERM_CTRL */
2267                 0x73300000, /* EMC_CFG */
2268                 0x0000089d, /* EMC_CFG_2 */
2269                 0x00040128, /* EMC_SEL_DPD_CTRL */
2270                 0xe00d0169, /* EMC_CFG_DIG_DLL */
2271                 0x80000b61, /* Mode Register 0 */
2272                 0x80100002, /* Mode Register 1 */
2273                 0x80200010, /* Mode Register 2 */
2274                 0x00000000, /* Mode Register 4 */
2275                 1230,       /* expected dvfs latency (ns) */
2276         },
2277         {
2278                 0x15,       /* V5.0.2 */
2279                 "01_792000_V01_V5.0.2_V0.3", /* DVFS table version */
2280                 792000,     /* SDRAM frequency */
2281                 1000,       /* min voltage */
2282                 1100,       /* gpu min voltage */
2283                 "pllc_out0", /* clock source id */
2284                 0x20000000, /* CLK_SOURCE_EMC */
2285                 167,        /* number of burst_regs */
2286                 31,         /* number of up_down_regs */
2287                 {
2288                         0x00000024, /* EMC_RC */
2289                         0x000000cc, /* EMC_RFC */
2290                         0x00000000, /* EMC_RFC_SLR */
2291                         0x00000019, /* EMC_RAS */
2292                         0x0000000a, /* EMC_RP */
2293                         0x00000008, /* EMC_R2W */
2294                         0x0000000d, /* EMC_W2R */
2295                         0x00000004, /* EMC_R2P */
2296                         0x00000013, /* EMC_W2P */
2297                         0x0000000a, /* EMC_RD_RCD */
2298                         0x0000000a, /* EMC_WR_RCD */
2299                         0x00000003, /* EMC_RRD */
2300                         0x00000002, /* EMC_REXT */
2301                         0x00000000, /* EMC_WEXT */
2302                         0x00000006, /* EMC_WDV */
2303                         0x00000006, /* EMC_WDV_MASK */
2304                         0x0000000b, /* EMC_QUSE */
2305                         0x00000002, /* EMC_QUSE_WIDTH */
2306                         0x00000000, /* EMC_IBDLY */
2307                         0x00000004, /* EMC_EINPUT */
2308                         0x0000000c, /* EMC_EINPUT_DURATION */
2309                         0x000a0000, /* EMC_PUTERM_EXTRA */
2310                         0x00000004, /* EMC_PUTERM_WIDTH */
2311                         0x00000000, /* EMC_PUTERM_ADJ */
2312                         0x00000000, /* EMC_CDB_CNTL_1 */
2313                         0x00000000, /* EMC_CDB_CNTL_2 */
2314                         0x00000000, /* EMC_CDB_CNTL_3 */
2315                         0x00000003, /* EMC_QRST */
2316                         0x00000013, /* EMC_QSAFE */
2317                         0x00000018, /* EMC_RDV */
2318                         0x0000001a, /* EMC_RDV_MASK */
2319                         0x000017e2, /* EMC_REFRESH */
2320                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2321                         0x000005f8, /* EMC_PRE_REFRESH_REQ_CNT */
2322                         0x00000003, /* EMC_PDEX2WR */
2323                         0x00000011, /* EMC_PDEX2RD */
2324                         0x00000001, /* EMC_PCHG2PDEN */
2325                         0x00000000, /* EMC_ACT2PDEN */
2326                         0x000000c6, /* EMC_AR2PDEN */
2327                         0x00000018, /* EMC_RW2PDEN */
2328                         0x000000d6, /* EMC_TXSR */
2329                         0x00000200, /* EMC_TXSRDLL */
2330                         0x00000005, /* EMC_TCKE */
2331                         0x00000006, /* EMC_TCKESR */
2332                         0x00000005, /* EMC_TPD */
2333                         0x0000001d, /* EMC_TFAW */
2334                         0x00000000, /* EMC_TRPAB */
2335                         0x00000008, /* EMC_TCLKSTABLE */
2336                         0x00000008, /* EMC_TCLKSTOP */
2337                         0x00001822, /* EMC_TREFBW */
2338                         0x00000002, /* EMC_FBIO_CFG6 */
2339                         0x00000000, /* EMC_ODT_WRITE */
2340                         0x00000000, /* EMC_ODT_READ */
2341                         0x1047b898, /* EMC_FBIO_CFG5 */
2342                         0xe00701b1, /* EMC_CFG_DIG_DLL */
2343                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2344                         0x00000008, /* EMC_DLL_XFORM_DQS0 */
2345                         0x00000008, /* EMC_DLL_XFORM_DQS1 */
2346                         0x00000008, /* EMC_DLL_XFORM_DQS2 */
2347                         0x00000008, /* EMC_DLL_XFORM_DQS3 */
2348                         0x00000008, /* EMC_DLL_XFORM_DQS4 */
2349                         0x00000008, /* EMC_DLL_XFORM_DQS5 */
2350                         0x00000008, /* EMC_DLL_XFORM_DQS6 */
2351                         0x00000008, /* EMC_DLL_XFORM_DQS7 */
2352                         0x00000008, /* EMC_DLL_XFORM_DQS8 */
2353                         0x00000008, /* EMC_DLL_XFORM_DQS9 */
2354                         0x00000008, /* EMC_DLL_XFORM_DQS10 */
2355                         0x00000008, /* EMC_DLL_XFORM_DQS11 */
2356                         0x00000008, /* EMC_DLL_XFORM_DQS12 */
2357                         0x00000008, /* EMC_DLL_XFORM_DQS13 */
2358                         0x00000008, /* EMC_DLL_XFORM_DQS14 */
2359                         0x00000008, /* EMC_DLL_XFORM_DQS15 */
2360                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2361                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2362                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2363                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2364                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
2365                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
2366                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
2367                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
2368                         0x0000000e, /* EMC_DLL_XFORM_ADDR0 */
2369                         0x0000000e, /* EMC_DLL_XFORM_ADDR1 */
2370                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
2371                         0x0000000e, /* EMC_DLL_XFORM_ADDR3 */
2372                         0x0000000e, /* EMC_DLL_XFORM_ADDR4 */
2373                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
2374                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
2375                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
2376                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
2377                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
2378                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
2379                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
2380                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
2381                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
2382                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2383                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2384                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2385                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2386                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2387                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2388                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2389                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2390                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
2391                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
2392                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
2393                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
2394                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
2395                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
2396                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
2397                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
2398                         0x0000000a, /* EMC_DLL_XFORM_DQ0 */
2399                         0x0000000a, /* EMC_DLL_XFORM_DQ1 */
2400                         0x0000000a, /* EMC_DLL_XFORM_DQ2 */
2401                         0x0000000a, /* EMC_DLL_XFORM_DQ3 */
2402                         0x0000000a, /* EMC_DLL_XFORM_DQ4 */
2403                         0x0000000a, /* EMC_DLL_XFORM_DQ5 */
2404                         0x0000000a, /* EMC_DLL_XFORM_DQ6 */
2405                         0x0000000a, /* EMC_DLL_XFORM_DQ7 */
2406                         0x100002a0, /* EMC_XM2CMDPADCTRL */
2407                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
2408                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
2409                         0x0120113d, /* EMC_XM2DQSPADCTRL2 */
2410                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2411                         0x00000000, /* EMC_XM2DQPADCTRL3 */
2412                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
2413                         0x00000c0c, /* EMC_XM2CLKPADCTRL2 */
2414                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
2415                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
2416                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
2417                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
2418                         0x59659600, /* EMC_XM2DQSPADCTRL3 */
2419                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
2420                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
2421                         0x59659600, /* EMC_XM2DQSPADCTRL6 */
2422                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
2423                         0x00000000, /* EMC_TXDSRVTTGEN */
2424                         0x00000000, /* EMC_FBIO_SPARE */
2425                         0x00020000, /* EMC_ZCAL_INTERVAL */
2426                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
2427                         0x00f8000e, /* EMC_MRS_WAIT_CNT */
2428                         0x00f8000e, /* EMC_MRS_WAIT_CNT2 */
2429                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
2430                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
2431                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
2432                         0x00000000, /* EMC_CTT */
2433                         0x00000004, /* EMC_CTT_DURATION */
2434                         0x000040a0, /* EMC_CFG_PIPE */
2435                         0x80003012, /* EMC_DYN_SELF_REF_CONTROL */
2436                         0x00000010, /* EMC_QPOP */
2437                         0x0e00000b, /* MC_EMEM_ARB_CFG */
2438                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2439                         0x00000004, /* MC_EMEM_ARB_TIMING_RCD */
2440                         0x00000005, /* MC_EMEM_ARB_TIMING_RP */
2441                         0x00000013, /* MC_EMEM_ARB_TIMING_RC */
2442                         0x0000000c, /* MC_EMEM_ARB_TIMING_RAS */
2443                         0x0000000f, /* MC_EMEM_ARB_TIMING_FAW */
2444                         0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
2445                         0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2446                         0x0000000c, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2447                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
2448                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
2449                         0x00000006, /* MC_EMEM_ARB_TIMING_R2W */
2450                         0x00000008, /* MC_EMEM_ARB_TIMING_W2R */
2451                         0x08060202, /* MC_EMEM_ARB_DA_TURNS */
2452                         0x00170e13, /* MC_EMEM_ARB_DA_COVERS */
2453                         0x734c2414, /* MC_EMEM_ARB_MISC0 */
2454                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2455                 },
2456                 {
2457                         0x00000013, /* MC_MLL_MPCORER_PTSA_RATE */
2458                         0x0000017c, /* MC_PTSA_GRANT_DECREMENT */
2459                         0x00810038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
2460                         0x00810038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
2461                         0x0081003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
2462                         0x00810090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
2463                         0x00810041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
2464                         0x00810090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
2465                         0x00810041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
2466                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
2467                         0x00810080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
2468                         0x00810004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
2469                         0x00810004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
2470                         0x00080016, /* MC_LATENCY_ALLOWANCE_HC_0 */
2471                         0x00000081, /* MC_LATENCY_ALLOWANCE_HC_1 */
2472                         0x00810004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
2473                         0x00810019, /* MC_LATENCY_ALLOWANCE_GPU_0 */
2474                         0x00810018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
2475                         0x00810024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
2476                         0x0081001c, /* MC_LATENCY_ALLOWANCE_VIC_0 */
2477                         0x00000081, /* MC_LATENCY_ALLOWANCE_VI2_0 */
2478                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
2479                         0x00810081, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
2480                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
2481                         0x00810081, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
2482                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
2483                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
2484                         0x00810081, /* MC_LATENCY_ALLOWANCE_VDE_2 */
2485                         0x00810081, /* MC_LATENCY_ALLOWANCE_VDE_3 */
2486                         0x00810065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
2487                         0x0081001c, /* MC_LATENCY_ALLOWANCE_AFI_0 */
2488                 },
2489                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
2490                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2491                 0x00000802, /* EMC_CTT_TERM_CTRL */
2492                 0x73300000, /* EMC_CFG */
2493                 0x0000089d, /* EMC_CFG_2 */
2494                 0x00040000, /* EMC_SEL_DPD_CTRL */
2495                 0xe0070169, /* EMC_CFG_DIG_DLL */
2496                 0x80000d71, /* Mode Register 0 */
2497                 0x80100002, /* Mode Register 1 */
2498                 0x80200018, /* Mode Register 2 */
2499                 0x00000000, /* Mode Register 4 */
2500                 1200,       /* expected dvfs latency (ns) */
2501         },
2502         {
2503                 0x15,       /* V5.0.2 */
2504                 "01_924000_V01_V5.0.2_V0.3", /* DVFS table version */
2505                 924000,     /* SDRAM frequency */
2506                 1100,       /* min voltage */
2507                 1100,       /* gpu min voltage */
2508                 "pllm_ud",  /* clock source id */
2509                 0x80000000, /* CLK_SOURCE_EMC */
2510                 167,        /* number of burst_regs */
2511                 31,         /* number of up_down_regs */
2512                 {
2513                         0x0000002b, /* EMC_RC */
2514                         0x000000ef, /* EMC_RFC */
2515                         0x00000000, /* EMC_RFC_SLR */
2516                         0x0000001e, /* EMC_RAS */
2517                         0x0000000b, /* EMC_RP */
2518                         0x00000009, /* EMC_R2W */
2519                         0x0000000f, /* EMC_W2R */
2520                         0x00000005, /* EMC_R2P */
2521                         0x00000016, /* EMC_W2P */
2522                         0x0000000b, /* EMC_RD_RCD */
2523                         0x0000000b, /* EMC_WR_RCD */
2524                         0x00000004, /* EMC_RRD */
2525                         0x00000002, /* EMC_REXT */
2526                         0x00000000, /* EMC_WEXT */
2527                         0x00000007, /* EMC_WDV */
2528                         0x00000007, /* EMC_WDV_MASK */
2529                         0x0000000e, /* EMC_QUSE */
2530                         0x00000002, /* EMC_QUSE_WIDTH */
2531                         0x00000000, /* EMC_IBDLY */
2532                         0x00000004, /* EMC_EINPUT */
2533                         0x0000000e, /* EMC_EINPUT_DURATION */
2534                         0x000c0000, /* EMC_PUTERM_EXTRA */
2535                         0x00000004, /* EMC_PUTERM_WIDTH */
2536                         0x00000000, /* EMC_PUTERM_ADJ */
2537                         0x00000000, /* EMC_CDB_CNTL_1 */
2538                         0x00000000, /* EMC_CDB_CNTL_2 */
2539                         0x00000000, /* EMC_CDB_CNTL_3 */
2540                         0x00000003, /* EMC_QRST */
2541                         0x00000015, /* EMC_QSAFE */
2542                         0x0000001b, /* EMC_RDV */
2543                         0x0000001d, /* EMC_RDV_MASK */
2544                         0x00001be7, /* EMC_REFRESH */
2545                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2546                         0x000006f9, /* EMC_PRE_REFRESH_REQ_CNT */
2547                         0x00000004, /* EMC_PDEX2WR */
2548                         0x00000015, /* EMC_PDEX2RD */
2549                         0x00000001, /* EMC_PCHG2PDEN */
2550                         0x00000000, /* EMC_ACT2PDEN */
2551                         0x000000e6, /* EMC_AR2PDEN */
2552                         0x0000001b, /* EMC_RW2PDEN */
2553                         0x000000fa, /* EMC_TXSR */
2554                         0x00000200, /* EMC_TXSRDLL */
2555                         0x00000006, /* EMC_TCKE */
2556                         0x00000007, /* EMC_TCKESR */
2557                         0x00000006, /* EMC_TPD */
2558                         0x00000022, /* EMC_TFAW */
2559                         0x00000000, /* EMC_TRPAB */
2560                         0x0000000a, /* EMC_TCLKSTABLE */
2561                         0x0000000a, /* EMC_TCLKSTOP */
2562                         0x00001c28, /* EMC_TREFBW */
2563                         0x00000000, /* EMC_FBIO_CFG6 */
2564                         0x00000000, /* EMC_ODT_WRITE */
2565                         0x00000000, /* EMC_ODT_READ */
2566                         0x1047b898, /* EMC_FBIO_CFG5 */
2567                         0xe00401b1, /* EMC_CFG_DIG_DLL */
2568                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2569                         0x007f800a, /* EMC_DLL_XFORM_DQS0 */
2570                         0x007f800a, /* EMC_DLL_XFORM_DQS1 */
2571                         0x007f800a, /* EMC_DLL_XFORM_DQS2 */
2572                         0x007f800a, /* EMC_DLL_XFORM_DQS3 */
2573                         0x007f800a, /* EMC_DLL_XFORM_DQS4 */
2574                         0x007f800a, /* EMC_DLL_XFORM_DQS5 */
2575                         0x007f800a, /* EMC_DLL_XFORM_DQS6 */
2576                         0x007f800a, /* EMC_DLL_XFORM_DQS7 */
2577                         0x007f800a, /* EMC_DLL_XFORM_DQS8 */
2578                         0x007f800a, /* EMC_DLL_XFORM_DQS9 */
2579                         0x007f800a, /* EMC_DLL_XFORM_DQS10 */
2580                         0x007f800a, /* EMC_DLL_XFORM_DQS11 */
2581                         0x007f800a, /* EMC_DLL_XFORM_DQS12 */
2582                         0x007f800a, /* EMC_DLL_XFORM_DQS13 */
2583                         0x007f800a, /* EMC_DLL_XFORM_DQS14 */
2584                         0x007f800a, /* EMC_DLL_XFORM_DQS15 */
2585                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2586                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2587                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2588                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2589                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
2590                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
2591                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
2592                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
2593                         0x00000010, /* EMC_DLL_XFORM_ADDR0 */
2594                         0x00000010, /* EMC_DLL_XFORM_ADDR1 */
2595                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
2596                         0x00000010, /* EMC_DLL_XFORM_ADDR3 */
2597                         0x00000010, /* EMC_DLL_XFORM_ADDR4 */
2598                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
2599                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
2600                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
2601                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
2602                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
2603                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
2604                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
2605                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
2606                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
2607                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2608                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2609                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2610                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2611                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2612                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2613                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2614                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2615                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
2616                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
2617                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
2618                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
2619                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
2620                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
2621                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
2622                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
2623                         0x007f800c, /* EMC_DLL_XFORM_DQ0 */
2624                         0x007f800c, /* EMC_DLL_XFORM_DQ1 */
2625                         0x007f800c, /* EMC_DLL_XFORM_DQ2 */
2626                         0x007f800c, /* EMC_DLL_XFORM_DQ3 */
2627                         0x0007f80c, /* EMC_DLL_XFORM_DQ4 */
2628                         0x0007f80c, /* EMC_DLL_XFORM_DQ5 */
2629                         0x0007f80c, /* EMC_DLL_XFORM_DQ6 */
2630                         0x0007f80c, /* EMC_DLL_XFORM_DQ7 */
2631                         0x100002a0, /* EMC_XM2CMDPADCTRL */
2632                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
2633                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
2634                         0x0120113d, /* EMC_XM2DQSPADCTRL2 */
2635                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2636                         0x00000000, /* EMC_XM2DQPADCTRL3 */
2637                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
2638                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
2639                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
2640                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
2641                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
2642                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
2643                         0x5d75d720, /* EMC_XM2DQSPADCTRL3 */
2644                         0x00492492, /* EMC_XM2DQSPADCTRL4 */
2645                         0x00492492, /* EMC_XM2DQSPADCTRL5 */
2646                         0x5d75d700, /* EMC_XM2DQSPADCTRL6 */
2647                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
2648                         0x00000000, /* EMC_TXDSRVTTGEN */
2649                         0x00000000, /* EMC_FBIO_SPARE */
2650                         0x00020000, /* EMC_ZCAL_INTERVAL */
2651                         0x00000128, /* EMC_ZCAL_WAIT_CNT */
2652                         0x00ce000e, /* EMC_MRS_WAIT_CNT */
2653                         0x00ce000e, /* EMC_MRS_WAIT_CNT2 */
2654                         0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
2655                         0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
2656                         0xa1430000, /* EMC_AUTO_CAL_CONFIG */
2657                         0x00000000, /* EMC_CTT */
2658                         0x00000004, /* EMC_CTT_DURATION */
2659                         0x00004080, /* EMC_CFG_PIPE */
2660                         0x800037ea, /* EMC_DYN_SELF_REF_CONTROL */
2661                         0x00000012, /* EMC_QPOP */
2662                         0x0e00000d, /* MC_EMEM_ARB_CFG */
2663                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2664                         0x00000005, /* MC_EMEM_ARB_TIMING_RCD */
2665                         0x00000006, /* MC_EMEM_ARB_TIMING_RP */
2666                         0x00000016, /* MC_EMEM_ARB_TIMING_RC */
2667                         0x0000000e, /* MC_EMEM_ARB_TIMING_RAS */
2668                         0x00000011, /* MC_EMEM_ARB_TIMING_FAW */
2669                         0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
2670                         0x00000004, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2671                         0x0000000e, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2672                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
2673                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
2674                         0x00000006, /* MC_EMEM_ARB_TIMING_R2W */
2675                         0x00000009, /* MC_EMEM_ARB_TIMING_W2R */
2676                         0x09060202, /* MC_EMEM_ARB_DA_TURNS */
2677                         0x001a1016, /* MC_EMEM_ARB_DA_COVERS */
2678                         0x734e2a17, /* MC_EMEM_ARB_MISC0 */
2679                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2680                 },
2681                 {
2682                         0x00000017, /* MC_MLL_MPCORER_PTSA_RATE */
2683                         0x000001bb, /* MC_PTSA_GRANT_DECREMENT */
2684                         0x006e0038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
2685                         0x006e0038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
2686                         0x006e003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
2687                         0x006e0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
2688                         0x006e0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
2689                         0x006e0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
2690                         0x006e0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
2691                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
2692                         0x006e0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
2693                         0x006e0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
2694                         0x006e0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
2695                         0x00080016, /* MC_LATENCY_ALLOWANCE_HC_0 */
2696                         0x0000006e, /* MC_LATENCY_ALLOWANCE_HC_1 */
2697                         0x006e0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
2698                         0x006e0019, /* MC_LATENCY_ALLOWANCE_GPU_0 */
2699                         0x006e0018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
2700                         0x006e0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
2701                         0x006e001b, /* MC_LATENCY_ALLOWANCE_VIC_0 */
2702                         0x0000006e, /* MC_LATENCY_ALLOWANCE_VI2_0 */
2703                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
2704                         0x006e006e, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
2705                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
2706                         0x006e006e, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
2707                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
2708                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
2709                         0x006e006e, /* MC_LATENCY_ALLOWANCE_VDE_2 */
2710                         0x006e006e, /* MC_LATENCY_ALLOWANCE_VDE_3 */
2711                         0x006e0065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
2712                         0x006e001c, /* MC_LATENCY_ALLOWANCE_AFI_0 */
2713                 },
2714                 0x0000004c, /* EMC_ZCAL_WAIT_CNT after clock change */
2715                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2716                 0x00000802, /* EMC_CTT_TERM_CTRL */
2717                 0x73300000, /* EMC_CFG */
2718                 0x0000089d, /* EMC_CFG_2 */
2719                 0x00040000, /* EMC_SEL_DPD_CTRL */
2720                 0xe0040169, /* EMC_CFG_DIG_DLL */
2721                 0x80000f15, /* Mode Register 0 */
2722                 0x80100002, /* Mode Register 1 */
2723                 0x80200020, /* Mode Register 2 */
2724                 0x00000000, /* Mode Register 4 */
2725                 1180,       /* expected dvfs latency (ns) */
2726         },
2727 };
2728
2729
2730
2731 static struct tegra12_emc_pdata loki_emc_pdata = {
2732         .description = "loki_emc_tables",
2733         .tables = loki_emc_table,
2734         .num_tables = ARRAY_SIZE(loki_emc_table),
2735 };
2736
2737 int __init loki_emc_init(void)
2738 {
2739         struct board_info bi;
2740
2741         tegra_get_board_info(&bi);
2742
2743         if (bi.board_id == BOARD_E2548) {
2744                 switch (bi.sku) {
2745                 case 0x0:
2746                         pr_info("Loading loki EMC tables.\n");
2747                         tegra_emc_device.dev.platform_data = &loki_emc_pdata;
2748                         break;
2749                 default:
2750                         WARN(1, "B00 EMC not yet supported: %u\n", bi.sku);
2751                         return -EINVAL;
2752                 }
2753         } else {
2754                 WARN(1, "B00 EMC not yet supported: %u\n", bi.sku);
2755                 return -EINVAL;
2756         }
2757         platform_device_register(&tegra_emc_device);
2758         tegra12_emc_init();
2759         return 0;
2760 }