arch: arm: tegra: add E2548 memory tables
[linux-3.10.git] / arch / arm / mach-tegra / board-loki-memory.c
1 /*
2  * Copyright (c) 2013-2014, NVIDIA CORPORATION.  All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
15  */
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_data/tegra_emc.h>
19
20 #include "board.h"
21 #include "board-loki.h"
22 #include "tegra-board-id.h"
23 #include "tegra12_emc.h"
24 #include "devices.h"
25
26 static struct tegra12_emc_table loki_b00_sku0_emc_table[] = {
27         {
28                 0x18,       /* V5.0.6 */
29                 "06_12750_01_V5.0.6_V0.8", /* DVFS table version */
30                 12750,      /* SDRAM frequency */
31                 800,        /* min voltage */
32                 800,        /* gpu min voltage */
33                 "pllp_out0", /* clock source id */
34                 0x4000003e, /* CLK_SOURCE_EMC */
35                 164,        /* number of burst_regs */
36                 31,         /* number of up_down_regs */
37                 {
38                         0x00000000, /* EMC_RC */
39                         0x00000003, /* EMC_RFC */
40                         0x00000000, /* EMC_RFC_SLR */
41                         0x00000000, /* EMC_RAS */
42                         0x00000000, /* EMC_RP */
43                         0x00000003, /* EMC_R2W */
44                         0x0000000a, /* EMC_W2R */
45                         0x00000003, /* EMC_R2P */
46                         0x0000000b, /* EMC_W2P */
47                         0x00000000, /* EMC_RD_RCD */
48                         0x00000000, /* EMC_WR_RCD */
49                         0x00000003, /* EMC_RRD */
50                         0x00000003, /* EMC_REXT */
51                         0x00000000, /* EMC_WEXT */
52                         0x00000005, /* EMC_WDV */
53                         0x00000005, /* EMC_WDV_MASK */
54                         0x00000005, /* EMC_QUSE */
55                         0x00000000, /* EMC_QUSE_WIDTH */
56                         0x00000000, /* EMC_IBDLY */
57                         0x00000004, /* EMC_EINPUT */
58                         0x00000004, /* EMC_EINPUT_DURATION */
59                         0x00010000, /* EMC_PUTERM_EXTRA */
60                         0x00000001, /* EMC_PUTERM_WIDTH */
61                         0x00000000, /* EMC_PUTERM_ADJ */
62                         0x00000000, /* EMC_CDB_CNTL_1 */
63                         0x00000000, /* EMC_CDB_CNTL_2 */
64                         0x00000000, /* EMC_CDB_CNTL_3 */
65                         0x00000003, /* EMC_QRST */
66                         0x0000000c, /* EMC_QSAFE */
67                         0x0000000c, /* EMC_RDV */
68                         0x0000000e, /* EMC_RDV_MASK */
69                         0x00000060, /* EMC_REFRESH */
70                         0x00000000, /* EMC_BURST_REFRESH_NUM */
71                         0x00000018, /* EMC_PRE_REFRESH_REQ_CNT */
72                         0x00000002, /* EMC_PDEX2WR */
73                         0x00000002, /* EMC_PDEX2RD */
74                         0x00000001, /* EMC_PCHG2PDEN */
75                         0x00000000, /* EMC_ACT2PDEN */
76                         0x00000007, /* EMC_AR2PDEN */
77                         0x0000000f, /* EMC_RW2PDEN */
78                         0x00000005, /* EMC_TXSR */
79                         0x00000005, /* EMC_TXSRDLL */
80                         0x00000004, /* EMC_TCKE */
81                         0x00000005, /* EMC_TCKESR */
82                         0x00000004, /* EMC_TPD */
83                         0x00000000, /* EMC_TFAW */
84                         0x00000000, /* EMC_TRPAB */
85                         0x00000005, /* EMC_TCLKSTABLE */
86                         0x00000005, /* EMC_TCLKSTOP */
87                         0x00000064, /* EMC_TREFBW */
88                         0x00000000, /* EMC_FBIO_CFG6 */
89                         0x00000000, /* EMC_ODT_WRITE */
90                         0x00000000, /* EMC_ODT_READ */
91                         0x10604098, /* EMC_FBIO_CFG5 */
92                         0x002c00a0, /* EMC_CFG_DIG_DLL */
93                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
94                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
95                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
96                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
97                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
98                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
99                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
100                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
101                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
102                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
103                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
104                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
105                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
106                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
107                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
108                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
109                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
110                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
111                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
112                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
113                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
114                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
115                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
116                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
117                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
118                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
119                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
120                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
121                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
122                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
123                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
124                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
125                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
126                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
127                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
128                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
129                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
130                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
131                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
132                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
133                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
134                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
135                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
136                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
137                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
138                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
139                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
140                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
141                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
142                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
143                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
144                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
145                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
146                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
147                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
148                         0x000fc000, /* EMC_DLL_XFORM_DQ0 */
149                         0x000fc000, /* EMC_DLL_XFORM_DQ1 */
150                         0x000fc000, /* EMC_DLL_XFORM_DQ2 */
151                         0x000fc000, /* EMC_DLL_XFORM_DQ3 */
152                         0x0000fc00, /* EMC_DLL_XFORM_DQ4 */
153                         0x0000fc00, /* EMC_DLL_XFORM_DQ5 */
154                         0x0000fc00, /* EMC_DLL_XFORM_DQ6 */
155                         0x0000fc00, /* EMC_DLL_XFORM_DQ7 */
156                         0x10000280, /* EMC_XM2CMDPADCTRL */
157                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
158                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
159                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
160                         0x00000000, /* EMC_XM2DQPADCTRL2 */
161                         0x00000000, /* EMC_XM2DQPADCTRL3 */
162                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
163                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
164                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
165                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
166                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
167                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
168                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
169                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
170                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
171                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
172                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
173                         0x00000007, /* EMC_TXDSRVTTGEN */
174                         0x00000000, /* EMC_FBIO_SPARE */
175                         0x00000000, /* EMC_ZCAL_INTERVAL */
176                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
177                         0x00100010, /* EMC_MRS_WAIT_CNT */
178                         0x00100010, /* EMC_MRS_WAIT_CNT2 */
179                         0x00000000, /* EMC_CTT */
180                         0x00000001, /* EMC_CTT_DURATION */
181                         0x0000f3f3, /* EMC_CFG_PIPE */
182                         0x800001c5, /* EMC_DYN_SELF_REF_CONTROL */
183                         0x00000009, /* EMC_QPOP */
184                         0x40040001, /* MC_EMEM_ARB_CFG */
185                         0x8000000a, /* MC_EMEM_ARB_OUTSTANDING_REQ */
186                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
187                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
188                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
189                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
190                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
191                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
192                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
193                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
194                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
195                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
196                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
197                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
198                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
199                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
200                         0x77e30303, /* MC_EMEM_ARB_MISC0 */
201                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
202                 },
203                 {
204                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
205                         0x00000007, /* MC_PTSA_GRANT_DECREMENT */
206                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
207                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
208                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
209                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
210                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
211                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
212                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
213                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
214                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
215                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
216                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
217                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
218                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
219                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
220                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
221                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
222                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
223                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
224                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
225                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
226                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
227                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
228                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
229                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
230                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_1 */
231                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
232                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
233                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
234                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
235                 },
236                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
237                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
238                 0x00000802, /* EMC_CTT_TERM_CTRL */
239                 0x73240000, /* EMC_CFG */
240                 0x000008c5, /* EMC_CFG_2 */
241                 0x00040128, /* EMC_SEL_DPD_CTRL */
242                 0x002c0068, /* EMC_CFG_DIG_DLL */
243                 0x00000008, /* EMC_BGBIAS_CTL0 */
244                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
245                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
246                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
247                 0x80001221, /* Mode Register 0 */
248                 0x80100003, /* Mode Register 1 */
249                 0x80200008, /* Mode Register 2 */
250                 0x00000000, /* Mode Register 4 */
251                 57820,      /* expected dvfs latency (ns) */
252         },
253         {
254                 0x18,       /* V5.0.6 */
255                 "06_20400_01_V5.0.6_V0.8", /* DVFS table version */
256                 20400,      /* SDRAM frequency */
257                 800,        /* min voltage */
258                 800,        /* gpu min voltage */
259                 "pllp_out0", /* clock source id */
260                 0x40000026, /* CLK_SOURCE_EMC */
261                 164,        /* number of burst_regs */
262                 31,         /* number of up_down_regs */
263                 {
264                         0x00000000, /* EMC_RC */
265                         0x00000005, /* EMC_RFC */
266                         0x00000000, /* EMC_RFC_SLR */
267                         0x00000000, /* EMC_RAS */
268                         0x00000000, /* EMC_RP */
269                         0x00000003, /* EMC_R2W */
270                         0x0000000a, /* EMC_W2R */
271                         0x00000003, /* EMC_R2P */
272                         0x0000000b, /* EMC_W2P */
273                         0x00000000, /* EMC_RD_RCD */
274                         0x00000000, /* EMC_WR_RCD */
275                         0x00000003, /* EMC_RRD */
276                         0x00000003, /* EMC_REXT */
277                         0x00000000, /* EMC_WEXT */
278                         0x00000005, /* EMC_WDV */
279                         0x00000005, /* EMC_WDV_MASK */
280                         0x00000005, /* EMC_QUSE */
281                         0x00000000, /* EMC_QUSE_WIDTH */
282                         0x00000000, /* EMC_IBDLY */
283                         0x00000004, /* EMC_EINPUT */
284                         0x00000004, /* EMC_EINPUT_DURATION */
285                         0x00010000, /* EMC_PUTERM_EXTRA */
286                         0x00000001, /* EMC_PUTERM_WIDTH */
287                         0x00000000, /* EMC_PUTERM_ADJ */
288                         0x00000000, /* EMC_CDB_CNTL_1 */
289                         0x00000000, /* EMC_CDB_CNTL_2 */
290                         0x00000000, /* EMC_CDB_CNTL_3 */
291                         0x00000003, /* EMC_QRST */
292                         0x0000000c, /* EMC_QSAFE */
293                         0x0000000c, /* EMC_RDV */
294                         0x0000000e, /* EMC_RDV_MASK */
295                         0x0000009a, /* EMC_REFRESH */
296                         0x00000000, /* EMC_BURST_REFRESH_NUM */
297                         0x00000026, /* EMC_PRE_REFRESH_REQ_CNT */
298                         0x00000002, /* EMC_PDEX2WR */
299                         0x00000002, /* EMC_PDEX2RD */
300                         0x00000001, /* EMC_PCHG2PDEN */
301                         0x00000000, /* EMC_ACT2PDEN */
302                         0x00000007, /* EMC_AR2PDEN */
303                         0x0000000f, /* EMC_RW2PDEN */
304                         0x00000006, /* EMC_TXSR */
305                         0x00000006, /* EMC_TXSRDLL */
306                         0x00000004, /* EMC_TCKE */
307                         0x00000005, /* EMC_TCKESR */
308                         0x00000004, /* EMC_TPD */
309                         0x00000000, /* EMC_TFAW */
310                         0x00000000, /* EMC_TRPAB */
311                         0x00000005, /* EMC_TCLKSTABLE */
312                         0x00000005, /* EMC_TCLKSTOP */
313                         0x000000a0, /* EMC_TREFBW */
314                         0x00000000, /* EMC_FBIO_CFG6 */
315                         0x00000000, /* EMC_ODT_WRITE */
316                         0x00000000, /* EMC_ODT_READ */
317                         0x10604098, /* EMC_FBIO_CFG5 */
318                         0x002c00a0, /* EMC_CFG_DIG_DLL */
319                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
320                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
321                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
322                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
323                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
324                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
325                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
326                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
327                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
328                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
329                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
330                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
331                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
332                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
333                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
334                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
335                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
336                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
337                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
338                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
339                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
340                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
341                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
342                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
343                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
344                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
345                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
346                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
347                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
348                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
349                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
350                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
351                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
352                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
353                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
354                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
355                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
356                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
357                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
358                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
359                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
360                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
361                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
362                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
363                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
364                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
365                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
366                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
367                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
368                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
369                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
370                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
371                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
372                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
373                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
374                         0x000fc000, /* EMC_DLL_XFORM_DQ0 */
375                         0x000fc000, /* EMC_DLL_XFORM_DQ1 */
376                         0x000fc000, /* EMC_DLL_XFORM_DQ2 */
377                         0x000fc000, /* EMC_DLL_XFORM_DQ3 */
378                         0x0000fc00, /* EMC_DLL_XFORM_DQ4 */
379                         0x0000fc00, /* EMC_DLL_XFORM_DQ5 */
380                         0x0000fc00, /* EMC_DLL_XFORM_DQ6 */
381                         0x0000fc00, /* EMC_DLL_XFORM_DQ7 */
382                         0x10000280, /* EMC_XM2CMDPADCTRL */
383                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
384                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
385                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
386                         0x00000000, /* EMC_XM2DQPADCTRL2 */
387                         0x00000000, /* EMC_XM2DQPADCTRL3 */
388                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
389                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
390                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
391                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
392                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
393                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
394                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
395                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
396                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
397                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
398                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
399                         0x0000000b, /* EMC_TXDSRVTTGEN */
400                         0x00000000, /* EMC_FBIO_SPARE */
401                         0x00000000, /* EMC_ZCAL_INTERVAL */
402                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
403                         0x00100010, /* EMC_MRS_WAIT_CNT */
404                         0x00100010, /* EMC_MRS_WAIT_CNT2 */
405                         0x00000000, /* EMC_CTT */
406                         0x00000001, /* EMC_CTT_DURATION */
407                         0x0000f3f3, /* EMC_CFG_PIPE */
408                         0x8000023a, /* EMC_DYN_SELF_REF_CONTROL */
409                         0x00000009, /* EMC_QPOP */
410                         0x40020001, /* MC_EMEM_ARB_CFG */
411                         0x80000012, /* MC_EMEM_ARB_OUTSTANDING_REQ */
412                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
413                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
414                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
415                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
416                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
417                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
418                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
419                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
420                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
421                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
422                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
423                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
424                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
425                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
426                         0x76230303, /* MC_EMEM_ARB_MISC0 */
427                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
428                 },
429                 {
430                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
431                         0x0000000a, /* MC_PTSA_GRANT_DECREMENT */
432                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
433                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
434                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
435                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
436                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
437                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
438                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
439                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
440                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
441                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
442                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
443                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
444                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
445                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
446                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
447                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
448                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
449                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
450                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
451                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
452                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
453                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
454                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
455                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
456                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_1 */
457                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
458                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
459                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
460                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
461                 },
462                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
463                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
464                 0x00000802, /* EMC_CTT_TERM_CTRL */
465                 0x73240000, /* EMC_CFG */
466                 0x000008c5, /* EMC_CFG_2 */
467                 0x00040128, /* EMC_SEL_DPD_CTRL */
468                 0x002c0068, /* EMC_CFG_DIG_DLL */
469                 0x00000008, /* EMC_BGBIAS_CTL0 */
470                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
471                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
472                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
473                 0x80001221, /* Mode Register 0 */
474                 0x80100003, /* Mode Register 1 */
475                 0x80200008, /* Mode Register 2 */
476                 0x00000000, /* Mode Register 4 */
477                 35610,      /* expected dvfs latency (ns) */
478         },
479         {
480                 0x18,       /* V5.0.6 */
481                 "06_40800_01_V5.0.6_V0.8", /* DVFS table version */
482                 40800,      /* SDRAM frequency */
483                 800,        /* min voltage */
484                 800,        /* gpu min voltage */
485                 "pllp_out0", /* clock source id */
486                 0x40000012, /* CLK_SOURCE_EMC */
487                 164,        /* number of burst_regs */
488                 31,         /* number of up_down_regs */
489                 {
490                         0x00000001, /* EMC_RC */
491                         0x0000000a, /* EMC_RFC */
492                         0x00000000, /* EMC_RFC_SLR */
493                         0x00000001, /* EMC_RAS */
494                         0x00000000, /* EMC_RP */
495                         0x00000003, /* EMC_R2W */
496                         0x0000000a, /* EMC_W2R */
497                         0x00000003, /* EMC_R2P */
498                         0x0000000b, /* EMC_W2P */
499                         0x00000000, /* EMC_RD_RCD */
500                         0x00000000, /* EMC_WR_RCD */
501                         0x00000003, /* EMC_RRD */
502                         0x00000003, /* EMC_REXT */
503                         0x00000000, /* EMC_WEXT */
504                         0x00000005, /* EMC_WDV */
505                         0x00000005, /* EMC_WDV_MASK */
506                         0x00000005, /* EMC_QUSE */
507                         0x00000000, /* EMC_QUSE_WIDTH */
508                         0x00000000, /* EMC_IBDLY */
509                         0x00000004, /* EMC_EINPUT */
510                         0x00000004, /* EMC_EINPUT_DURATION */
511                         0x00010000, /* EMC_PUTERM_EXTRA */
512                         0x00000001, /* EMC_PUTERM_WIDTH */
513                         0x00000000, /* EMC_PUTERM_ADJ */
514                         0x00000000, /* EMC_CDB_CNTL_1 */
515                         0x00000000, /* EMC_CDB_CNTL_2 */
516                         0x00000000, /* EMC_CDB_CNTL_3 */
517                         0x00000003, /* EMC_QRST */
518                         0x0000000c, /* EMC_QSAFE */
519                         0x0000000c, /* EMC_RDV */
520                         0x0000000e, /* EMC_RDV_MASK */
521                         0x00000134, /* EMC_REFRESH */
522                         0x00000000, /* EMC_BURST_REFRESH_NUM */
523                         0x0000004d, /* EMC_PRE_REFRESH_REQ_CNT */
524                         0x00000002, /* EMC_PDEX2WR */
525                         0x00000002, /* EMC_PDEX2RD */
526                         0x00000001, /* EMC_PCHG2PDEN */
527                         0x00000000, /* EMC_ACT2PDEN */
528                         0x00000008, /* EMC_AR2PDEN */
529                         0x0000000f, /* EMC_RW2PDEN */
530                         0x0000000c, /* EMC_TXSR */
531                         0x0000000c, /* EMC_TXSRDLL */
532                         0x00000004, /* EMC_TCKE */
533                         0x00000005, /* EMC_TCKESR */
534                         0x00000004, /* EMC_TPD */
535                         0x00000000, /* EMC_TFAW */
536                         0x00000000, /* EMC_TRPAB */
537                         0x00000005, /* EMC_TCLKSTABLE */
538                         0x00000005, /* EMC_TCLKSTOP */
539                         0x0000013f, /* EMC_TREFBW */
540                         0x00000000, /* EMC_FBIO_CFG6 */
541                         0x00000000, /* EMC_ODT_WRITE */
542                         0x00000000, /* EMC_ODT_READ */
543                         0x10604098, /* EMC_FBIO_CFG5 */
544                         0x002c00a0, /* EMC_CFG_DIG_DLL */
545                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
546                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
547                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
548                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
549                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
550                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
551                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
552                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
553                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
554                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
555                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
556                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
557                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
558                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
559                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
560                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
561                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
562                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
563                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
564                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
565                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
566                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
567                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
568                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
569                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
570                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
571                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
572                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
573                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
574                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
575                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
576                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
577                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
578                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
579                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
580                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
581                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
582                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
583                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
584                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
585                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
586                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
587                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
588                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
589                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
590                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
591                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
592                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
593                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
594                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
595                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
596                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
597                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
598                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
599                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
600                         0x000fc000, /* EMC_DLL_XFORM_DQ0 */
601                         0x000fc000, /* EMC_DLL_XFORM_DQ1 */
602                         0x000fc000, /* EMC_DLL_XFORM_DQ2 */
603                         0x000fc000, /* EMC_DLL_XFORM_DQ3 */
604                         0x0000fc00, /* EMC_DLL_XFORM_DQ4 */
605                         0x0000fc00, /* EMC_DLL_XFORM_DQ5 */
606                         0x0000fc00, /* EMC_DLL_XFORM_DQ6 */
607                         0x0000fc00, /* EMC_DLL_XFORM_DQ7 */
608                         0x10000280, /* EMC_XM2CMDPADCTRL */
609                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
610                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
611                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
612                         0x00000000, /* EMC_XM2DQPADCTRL2 */
613                         0x00000000, /* EMC_XM2DQPADCTRL3 */
614                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
615                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
616                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
617                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
618                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
619                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
620                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
621                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
622                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
623                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
624                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
625                         0x00000015, /* EMC_TXDSRVTTGEN */
626                         0x00000000, /* EMC_FBIO_SPARE */
627                         0x00000000, /* EMC_ZCAL_INTERVAL */
628                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
629                         0x00100010, /* EMC_MRS_WAIT_CNT */
630                         0x00100010, /* EMC_MRS_WAIT_CNT2 */
631                         0x00000000, /* EMC_CTT */
632                         0x00000001, /* EMC_CTT_DURATION */
633                         0x0000f3f3, /* EMC_CFG_PIPE */
634                         0x80000370, /* EMC_DYN_SELF_REF_CONTROL */
635                         0x00000009, /* EMC_QPOP */
636                         0xa0000001, /* MC_EMEM_ARB_CFG */
637                         0x80000017, /* MC_EMEM_ARB_OUTSTANDING_REQ */
638                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
639                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
640                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
641                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
642                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
643                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
644                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
645                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
646                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
647                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
648                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
649                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
650                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
651                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
652                         0x74a30303, /* MC_EMEM_ARB_MISC0 */
653                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
654                 },
655                 {
656                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
657                         0x00000014, /* MC_PTSA_GRANT_DECREMENT */
658                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
659                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
660                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
661                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
662                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
663                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
664                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
665                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
666                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
667                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
668                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
669                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
670                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
671                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
672                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
673                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
674                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
675                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
676                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
677                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
678                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
679                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
680                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
681                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
682                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_1 */
683                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
684                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
685                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
686                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
687                 },
688                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
689                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
690                 0x00000802, /* EMC_CTT_TERM_CTRL */
691                 0x73240000, /* EMC_CFG */
692                 0x000008c5, /* EMC_CFG_2 */
693                 0x00040128, /* EMC_SEL_DPD_CTRL */
694                 0x002c0068, /* EMC_CFG_DIG_DLL */
695                 0x00000008, /* EMC_BGBIAS_CTL0 */
696                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
697                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
698                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
699                 0x80001221, /* Mode Register 0 */
700                 0x80100003, /* Mode Register 1 */
701                 0x80200008, /* Mode Register 2 */
702                 0x00000000, /* Mode Register 4 */
703                 20850,      /* expected dvfs latency (ns) */
704         },
705         {
706                 0x18,       /* V5.0.6 */
707                 "06_68000_01_V5.0.6_V0.8", /* DVFS table version */
708                 68000,      /* SDRAM frequency */
709                 800,        /* min voltage */
710                 800,        /* gpu min voltage */
711                 "pllp_out0", /* clock source id */
712                 0x4000000a, /* CLK_SOURCE_EMC */
713                 164,        /* number of burst_regs */
714                 31,         /* number of up_down_regs */
715                 {
716                         0x00000003, /* EMC_RC */
717                         0x00000011, /* EMC_RFC */
718                         0x00000000, /* EMC_RFC_SLR */
719                         0x00000002, /* EMC_RAS */
720                         0x00000000, /* EMC_RP */
721                         0x00000003, /* EMC_R2W */
722                         0x0000000a, /* EMC_W2R */
723                         0x00000003, /* EMC_R2P */
724                         0x0000000b, /* EMC_W2P */
725                         0x00000000, /* EMC_RD_RCD */
726                         0x00000000, /* EMC_WR_RCD */
727                         0x00000003, /* EMC_RRD */
728                         0x00000003, /* EMC_REXT */
729                         0x00000000, /* EMC_WEXT */
730                         0x00000005, /* EMC_WDV */
731                         0x00000005, /* EMC_WDV_MASK */
732                         0x00000005, /* EMC_QUSE */
733                         0x00000000, /* EMC_QUSE_WIDTH */
734                         0x00000000, /* EMC_IBDLY */
735                         0x00000004, /* EMC_EINPUT */
736                         0x00000004, /* EMC_EINPUT_DURATION */
737                         0x00010000, /* EMC_PUTERM_EXTRA */
738                         0x00000001, /* EMC_PUTERM_WIDTH */
739                         0x00000000, /* EMC_PUTERM_ADJ */
740                         0x00000000, /* EMC_CDB_CNTL_1 */
741                         0x00000000, /* EMC_CDB_CNTL_2 */
742                         0x00000000, /* EMC_CDB_CNTL_3 */
743                         0x00000003, /* EMC_QRST */
744                         0x0000000c, /* EMC_QSAFE */
745                         0x0000000c, /* EMC_RDV */
746                         0x0000000e, /* EMC_RDV_MASK */
747                         0x00000202, /* EMC_REFRESH */
748                         0x00000000, /* EMC_BURST_REFRESH_NUM */
749                         0x00000080, /* EMC_PRE_REFRESH_REQ_CNT */
750                         0x00000002, /* EMC_PDEX2WR */
751                         0x00000002, /* EMC_PDEX2RD */
752                         0x00000001, /* EMC_PCHG2PDEN */
753                         0x00000000, /* EMC_ACT2PDEN */
754                         0x0000000f, /* EMC_AR2PDEN */
755                         0x0000000f, /* EMC_RW2PDEN */
756                         0x00000013, /* EMC_TXSR */
757                         0x00000013, /* EMC_TXSRDLL */
758                         0x00000004, /* EMC_TCKE */
759                         0x00000005, /* EMC_TCKESR */
760                         0x00000004, /* EMC_TPD */
761                         0x00000000, /* EMC_TFAW */
762                         0x00000000, /* EMC_TRPAB */
763                         0x00000005, /* EMC_TCLKSTABLE */
764                         0x00000005, /* EMC_TCLKSTOP */
765                         0x00000213, /* EMC_TREFBW */
766                         0x00000002, /* EMC_FBIO_CFG6 */
767                         0x00000000, /* EMC_ODT_WRITE */
768                         0x00000000, /* EMC_ODT_READ */
769                         0x10604098, /* EMC_FBIO_CFG5 */
770                         0x002c00a0, /* EMC_CFG_DIG_DLL */
771                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
772                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
773                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
774                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
775                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
776                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
777                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
778                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
779                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
780                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
781                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
782                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
783                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
784                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
785                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
786                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
787                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
788                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
789                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
790                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
791                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
792                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
793                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
794                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
795                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
796                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
797                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
798                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
799                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
800                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
801                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
802                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
803                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
804                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
805                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
806                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
807                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
808                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
809                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
810                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
811                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
812                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
813                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
814                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
815                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
816                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
817                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
818                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
819                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
820                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
821                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
822                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
823                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
824                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
825                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
826                         0x000fc000, /* EMC_DLL_XFORM_DQ0 */
827                         0x000fc000, /* EMC_DLL_XFORM_DQ1 */
828                         0x000fc000, /* EMC_DLL_XFORM_DQ2 */
829                         0x000fc000, /* EMC_DLL_XFORM_DQ3 */
830                         0x0000fc00, /* EMC_DLL_XFORM_DQ4 */
831                         0x0000fc00, /* EMC_DLL_XFORM_DQ5 */
832                         0x0000fc00, /* EMC_DLL_XFORM_DQ6 */
833                         0x0000fc00, /* EMC_DLL_XFORM_DQ7 */
834                         0x10000280, /* EMC_XM2CMDPADCTRL */
835                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
836                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
837                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
838                         0x00000000, /* EMC_XM2DQPADCTRL2 */
839                         0x00000000, /* EMC_XM2DQPADCTRL3 */
840                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
841                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
842                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
843                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
844                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
845                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
846                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
847                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
848                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
849                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
850                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
851                         0x00000022, /* EMC_TXDSRVTTGEN */
852                         0x00000000, /* EMC_FBIO_SPARE */
853                         0x00000000, /* EMC_ZCAL_INTERVAL */
854                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
855                         0x00100010, /* EMC_MRS_WAIT_CNT */
856                         0x00100010, /* EMC_MRS_WAIT_CNT2 */
857                         0x00000000, /* EMC_CTT */
858                         0x00000001, /* EMC_CTT_DURATION */
859                         0x0000f3f3, /* EMC_CFG_PIPE */
860                         0x8000050e, /* EMC_DYN_SELF_REF_CONTROL */
861                         0x00000009, /* EMC_QPOP */
862                         0x00000001, /* MC_EMEM_ARB_CFG */
863                         0x8000001e, /* MC_EMEM_ARB_OUTSTANDING_REQ */
864                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
865                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
866                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
867                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
868                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
869                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
870                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
871                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
872                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
873                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
874                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
875                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
876                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
877                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
878                         0x74230403, /* MC_EMEM_ARB_MISC0 */
879                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
880                 },
881                 {
882                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
883                         0x00000021, /* MC_PTSA_GRANT_DECREMENT */
884                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
885                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
886                         0x00ff00b0, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
887                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
888                         0x00ff00ec, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
889                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
890                         0x00ff00ec, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
891                         0x00e90049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
892                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
893                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
894                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
895                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
896                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
897                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
898                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
899                         0x00ff00a3, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
900                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
901                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
902                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
903                         0x000000ef, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
904                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
905                         0x000000ef, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
906                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
907                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
908                         0x00ee00ef, /* MC_LATENCY_ALLOWANCE_VDE_1 */
909                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
910                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
911                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
912                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
913                 },
914                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
915                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
916                 0x00000802, /* EMC_CTT_TERM_CTRL */
917                 0x73240000, /* EMC_CFG */
918                 0x000008c5, /* EMC_CFG_2 */
919                 0x00040128, /* EMC_SEL_DPD_CTRL */
920                 0x002c0068, /* EMC_CFG_DIG_DLL */
921                 0x00000008, /* EMC_BGBIAS_CTL0 */
922                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
923                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
924                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
925                 0x80001221, /* Mode Register 0 */
926                 0x80100003, /* Mode Register 1 */
927                 0x80200008, /* Mode Register 2 */
928                 0x00000000, /* Mode Register 4 */
929                 10720,      /* expected dvfs latency (ns) */
930         },
931         {
932                 0x18,       /* V5.0.6 */
933                 "06_102000_01_V5.0.6_V0.8", /* DVFS table version */
934                 102000,     /* SDRAM frequency */
935                 800,        /* min voltage */
936                 800,        /* gpu min voltage */
937                 "pllp_out0", /* clock source id */
938                 0x40000006, /* CLK_SOURCE_EMC */
939                 164,        /* number of burst_regs */
940                 31,         /* number of up_down_regs */
941                 {
942                         0x00000004, /* EMC_RC */
943                         0x0000001a, /* EMC_RFC */
944                         0x00000000, /* EMC_RFC_SLR */
945                         0x00000003, /* EMC_RAS */
946                         0x00000001, /* EMC_RP */
947                         0x00000003, /* EMC_R2W */
948                         0x0000000a, /* EMC_W2R */
949                         0x00000003, /* EMC_R2P */
950                         0x0000000b, /* EMC_W2P */
951                         0x00000001, /* EMC_RD_RCD */
952                         0x00000001, /* EMC_WR_RCD */
953                         0x00000003, /* EMC_RRD */
954                         0x00000003, /* EMC_REXT */
955                         0x00000000, /* EMC_WEXT */
956                         0x00000005, /* EMC_WDV */
957                         0x00000005, /* EMC_WDV_MASK */
958                         0x00000005, /* EMC_QUSE */
959                         0x00000000, /* EMC_QUSE_WIDTH */
960                         0x00000000, /* EMC_IBDLY */
961                         0x00000004, /* EMC_EINPUT */
962                         0x00000004, /* EMC_EINPUT_DURATION */
963                         0x00010000, /* EMC_PUTERM_EXTRA */
964                         0x00000001, /* EMC_PUTERM_WIDTH */
965                         0x00000000, /* EMC_PUTERM_ADJ */
966                         0x00000000, /* EMC_CDB_CNTL_1 */
967                         0x00000000, /* EMC_CDB_CNTL_2 */
968                         0x00000000, /* EMC_CDB_CNTL_3 */
969                         0x00000003, /* EMC_QRST */
970                         0x0000000c, /* EMC_QSAFE */
971                         0x0000000c, /* EMC_RDV */
972                         0x0000000e, /* EMC_RDV_MASK */
973                         0x00000304, /* EMC_REFRESH */
974                         0x00000000, /* EMC_BURST_REFRESH_NUM */
975                         0x000000c1, /* EMC_PRE_REFRESH_REQ_CNT */
976                         0x00000002, /* EMC_PDEX2WR */
977                         0x00000002, /* EMC_PDEX2RD */
978                         0x00000001, /* EMC_PCHG2PDEN */
979                         0x00000000, /* EMC_ACT2PDEN */
980                         0x00000018, /* EMC_AR2PDEN */
981                         0x0000000f, /* EMC_RW2PDEN */
982                         0x0000001c, /* EMC_TXSR */
983                         0x0000001c, /* EMC_TXSRDLL */
984                         0x00000004, /* EMC_TCKE */
985                         0x00000005, /* EMC_TCKESR */
986                         0x00000004, /* EMC_TPD */
987                         0x00000001, /* EMC_TFAW */
988                         0x00000000, /* EMC_TRPAB */
989                         0x00000005, /* EMC_TCLKSTABLE */
990                         0x00000005, /* EMC_TCLKSTOP */
991                         0x0000031c, /* EMC_TREFBW */
992                         0x00000002, /* EMC_FBIO_CFG6 */
993                         0x00000000, /* EMC_ODT_WRITE */
994                         0x00000000, /* EMC_ODT_READ */
995                         0x10604098, /* EMC_FBIO_CFG5 */
996                         0x002c00a0, /* EMC_CFG_DIG_DLL */
997                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
998                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
999                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
1000                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
1001                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
1002                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
1003                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
1004                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
1005                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
1006                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
1007                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
1008                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
1009                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
1010                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
1011                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
1012                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
1013                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
1014                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1015                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1016                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1017                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1018                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1019                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1020                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1021                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1022                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
1023                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
1024                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1025                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
1026                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
1027                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1028                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1029                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1030                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1031                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1032                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1033                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1034                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1035                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1036                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1037                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1038                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1039                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1040                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1041                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1042                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1043                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1044                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1045                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1046                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1047                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1048                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1049                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1050                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1051                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1052                         0x000fc000, /* EMC_DLL_XFORM_DQ0 */
1053                         0x000fc000, /* EMC_DLL_XFORM_DQ1 */
1054                         0x000fc000, /* EMC_DLL_XFORM_DQ2 */
1055                         0x000fc000, /* EMC_DLL_XFORM_DQ3 */
1056                         0x0000fc00, /* EMC_DLL_XFORM_DQ4 */
1057                         0x0000fc00, /* EMC_DLL_XFORM_DQ5 */
1058                         0x0000fc00, /* EMC_DLL_XFORM_DQ6 */
1059                         0x0000fc00, /* EMC_DLL_XFORM_DQ7 */
1060                         0x10000280, /* EMC_XM2CMDPADCTRL */
1061                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1062                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1063                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
1064                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1065                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1066                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
1067                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
1068                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1069                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1070                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
1071                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1072                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
1073                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1074                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1075                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1076                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
1077                         0x00000033, /* EMC_TXDSRVTTGEN */
1078                         0x00000000, /* EMC_FBIO_SPARE */
1079                         0x00000000, /* EMC_ZCAL_INTERVAL */
1080                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
1081                         0x00100010, /* EMC_MRS_WAIT_CNT */
1082                         0x00100010, /* EMC_MRS_WAIT_CNT2 */
1083                         0x00000000, /* EMC_CTT */
1084                         0x00000001, /* EMC_CTT_DURATION */
1085                         0x0000f3f3, /* EMC_CFG_PIPE */
1086                         0x80000713, /* EMC_DYN_SELF_REF_CONTROL */
1087                         0x00000009, /* EMC_QPOP */
1088                         0x08000001, /* MC_EMEM_ARB_CFG */
1089                         0x80000026, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1090                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1091                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
1092                         0x00000003, /* MC_EMEM_ARB_TIMING_RC */
1093                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
1094                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
1095                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1096                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1097                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1098                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
1099                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1100                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
1101                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1102                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
1103                         0x000a0403, /* MC_EMEM_ARB_DA_COVERS */
1104                         0x73c30504, /* MC_EMEM_ARB_MISC0 */
1105                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1106                 },
1107                 {
1108                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
1109                         0x00000031, /* MC_PTSA_GRANT_DECREMENT */
1110                         0x00ff00da, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1111                         0x00ff00da, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1112                         0x00ff0075, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1113                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1114                         0x00ff009d, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1115                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1116                         0x00ff009d, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1117                         0x009b0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1118                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1119                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1120                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1121                         0x000800ad, /* MC_LATENCY_ALLOWANCE_HC_0 */
1122                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
1123                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1124                         0x00ff00c6, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1125                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1126                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1127                         0x00ff00d6, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1128                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1129                         0x0000009f, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1130                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1131                         0x0000009f, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1132                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1133                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1134                         0x009f00a0, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1135                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1136                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1137                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1138                         0x00ff00da, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1139                 },
1140                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1141                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1142                 0x00000802, /* EMC_CTT_TERM_CTRL */
1143                 0x73240000, /* EMC_CFG */
1144                 0x000008c5, /* EMC_CFG_2 */
1145                 0x00040128, /* EMC_SEL_DPD_CTRL */
1146                 0x002c0068, /* EMC_CFG_DIG_DLL */
1147                 0x00000008, /* EMC_BGBIAS_CTL0 */
1148                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1149                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1150                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1151                 0x80001221, /* Mode Register 0 */
1152                 0x80100003, /* Mode Register 1 */
1153                 0x80200008, /* Mode Register 2 */
1154                 0x00000000, /* Mode Register 4 */
1155                 6890,       /* expected dvfs latency (ns) */
1156         },
1157         {
1158                 0x18,       /* V5.0.6 */
1159                 "06_204000_01_V5.0.6_V0.8", /* DVFS table version */
1160                 204000,     /* SDRAM frequency */
1161                 800,        /* min voltage */
1162                 800,        /* gpu min voltage */
1163                 "pllp_out0", /* clock source id */
1164                 0x40000002, /* CLK_SOURCE_EMC */
1165                 164,        /* number of burst_regs */
1166                 31,         /* number of up_down_regs */
1167                 {
1168                         0x00000009, /* EMC_RC */
1169                         0x00000035, /* EMC_RFC */
1170                         0x00000000, /* EMC_RFC_SLR */
1171                         0x00000006, /* EMC_RAS */
1172                         0x00000002, /* EMC_RP */
1173                         0x00000004, /* EMC_R2W */
1174                         0x0000000a, /* EMC_W2R */
1175                         0x00000003, /* EMC_R2P */
1176                         0x0000000b, /* EMC_W2P */
1177                         0x00000002, /* EMC_RD_RCD */
1178                         0x00000002, /* EMC_WR_RCD */
1179                         0x00000003, /* EMC_RRD */
1180                         0x00000003, /* EMC_REXT */
1181                         0x00000000, /* EMC_WEXT */
1182                         0x00000004, /* EMC_WDV */
1183                         0x00000004, /* EMC_WDV_MASK */
1184                         0x00000005, /* EMC_QUSE */
1185                         0x00000000, /* EMC_QUSE_WIDTH */
1186                         0x00000000, /* EMC_IBDLY */
1187                         0x00000003, /* EMC_EINPUT */
1188                         0x00000005, /* EMC_EINPUT_DURATION */
1189                         0x00010000, /* EMC_PUTERM_EXTRA */
1190                         0x00000001, /* EMC_PUTERM_WIDTH */
1191                         0x00000000, /* EMC_PUTERM_ADJ */
1192                         0x00000000, /* EMC_CDB_CNTL_1 */
1193                         0x00000000, /* EMC_CDB_CNTL_2 */
1194                         0x00000000, /* EMC_CDB_CNTL_3 */
1195                         0x00000002, /* EMC_QRST */
1196                         0x0000000d, /* EMC_QSAFE */
1197                         0x0000000e, /* EMC_RDV */
1198                         0x00000010, /* EMC_RDV_MASK */
1199                         0x00000607, /* EMC_REFRESH */
1200                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1201                         0x00000181, /* EMC_PRE_REFRESH_REQ_CNT */
1202                         0x00000002, /* EMC_PDEX2WR */
1203                         0x00000002, /* EMC_PDEX2RD */
1204                         0x00000001, /* EMC_PCHG2PDEN */
1205                         0x00000000, /* EMC_ACT2PDEN */
1206                         0x00000032, /* EMC_AR2PDEN */
1207                         0x0000000f, /* EMC_RW2PDEN */
1208                         0x00000038, /* EMC_TXSR */
1209                         0x00000038, /* EMC_TXSRDLL */
1210                         0x00000004, /* EMC_TCKE */
1211                         0x00000005, /* EMC_TCKESR */
1212                         0x00000004, /* EMC_TPD */
1213                         0x00000004, /* EMC_TFAW */
1214                         0x00000000, /* EMC_TRPAB */
1215                         0x00000005, /* EMC_TCLKSTABLE */
1216                         0x00000005, /* EMC_TCLKSTOP */
1217                         0x00000638, /* EMC_TREFBW */
1218                         0x00000002, /* EMC_FBIO_CFG6 */
1219                         0x00000000, /* EMC_ODT_WRITE */
1220                         0x00000000, /* EMC_ODT_READ */
1221                         0x10604098, /* EMC_FBIO_CFG5 */
1222                         0x002c00a0, /* EMC_CFG_DIG_DLL */
1223                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1224                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
1225                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
1226                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
1227                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
1228                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
1229                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
1230                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
1231                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
1232                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
1233                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
1234                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
1235                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
1236                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
1237                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
1238                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
1239                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
1240                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1241                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1242                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1243                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1244                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1245                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1246                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1247                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1248                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
1249                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
1250                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1251                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
1252                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
1253                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1254                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1255                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1256                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1257                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1258                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1259                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1260                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1261                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1262                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1263                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1264                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1265                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1266                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1267                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1268                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1269                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1270                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1271                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1272                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1273                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1274                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1275                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1276                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1277                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1278                         0x00090000, /* EMC_DLL_XFORM_DQ0 */
1279                         0x00090000, /* EMC_DLL_XFORM_DQ1 */
1280                         0x00090000, /* EMC_DLL_XFORM_DQ2 */
1281                         0x00090000, /* EMC_DLL_XFORM_DQ3 */
1282                         0x00009000, /* EMC_DLL_XFORM_DQ4 */
1283                         0x00009000, /* EMC_DLL_XFORM_DQ5 */
1284                         0x00009000, /* EMC_DLL_XFORM_DQ6 */
1285                         0x00009000, /* EMC_DLL_XFORM_DQ7 */
1286                         0x10000280, /* EMC_XM2CMDPADCTRL */
1287                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1288                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1289                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
1290                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1291                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1292                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
1293                         0x00000606, /* EMC_XM2CLKPADCTRL2 */
1294                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1295                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1296                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
1297                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1298                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
1299                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1300                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1301                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1302                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
1303                         0x00000066, /* EMC_TXDSRVTTGEN */
1304                         0x00000000, /* EMC_FBIO_SPARE */
1305                         0x00020000, /* EMC_ZCAL_INTERVAL */
1306                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1307                         0x00100010, /* EMC_MRS_WAIT_CNT */
1308                         0x00100010, /* EMC_MRS_WAIT_CNT2 */
1309                         0x00000000, /* EMC_CTT */
1310                         0x00000001, /* EMC_CTT_DURATION */
1311                         0x0000d3b3, /* EMC_CFG_PIPE */
1312                         0x80000d22, /* EMC_DYN_SELF_REF_CONTROL */
1313                         0x00000009, /* EMC_QPOP */
1314                         0x01000003, /* MC_EMEM_ARB_CFG */
1315                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1316                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1317                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
1318                         0x00000004, /* MC_EMEM_ARB_TIMING_RC */
1319                         0x00000002, /* MC_EMEM_ARB_TIMING_RAS */
1320                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
1321                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1322                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1323                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1324                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
1325                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1326                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
1327                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1328                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
1329                         0x000a0404, /* MC_EMEM_ARB_DA_COVERS */
1330                         0x73840a05, /* MC_EMEM_ARB_MISC0 */
1331                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1332                 },
1333                 {
1334                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
1335                         0x00000062, /* MC_PTSA_GRANT_DECREMENT */
1336                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1337                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1338                         0x00ff003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1339                         0x00ff00af, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1340                         0x00ff004f, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1341                         0x00ff00af, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1342                         0x00ff004f, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1343                         0x004e0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1344                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1345                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1346                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1347                         0x00080057, /* MC_LATENCY_ALLOWANCE_HC_0 */
1348                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
1349                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1350                         0x00ff0063, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1351                         0x00ff0036, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1352                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1353                         0x00ff006b, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1354                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1355                         0x00000050, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1356                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1357                         0x00000050, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1358                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1359                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1360                         0x00510050, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1361                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1362                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1363                         0x00ff00c6, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1364                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1365                 },
1366                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1367                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1368                 0x00000802, /* EMC_CTT_TERM_CTRL */
1369                 0x73240000, /* EMC_CFG */
1370                 0x000008cd, /* EMC_CFG_2 */
1371                 0x00040128, /* EMC_SEL_DPD_CTRL */
1372                 0x002c0068, /* EMC_CFG_DIG_DLL */
1373                 0x00000008, /* EMC_BGBIAS_CTL0 */
1374                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1375                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1376                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1377                 0x80001221, /* Mode Register 0 */
1378                 0x80100003, /* Mode Register 1 */
1379                 0x80200008, /* Mode Register 2 */
1380                 0x00000000, /* Mode Register 4 */
1381                 3420,       /* expected dvfs latency (ns) */
1382         },
1383         {
1384                 0x18,       /* V5.0.6 */
1385                 "06_300000_01_V5.0.6_V0.8", /* DVFS table version */
1386                 300000,     /* SDRAM frequency */
1387                 810,        /* min voltage */
1388                 800,        /* gpu min voltage */
1389                 "pllc_out0", /* clock source id */
1390                 0x20000002, /* CLK_SOURCE_EMC */
1391                 164,        /* number of burst_regs */
1392                 31,         /* number of up_down_regs */
1393                 {
1394                         0x0000000c, /* EMC_RC */
1395                         0x0000004c, /* EMC_RFC */
1396                         0x00000000, /* EMC_RFC_SLR */
1397                         0x00000008, /* EMC_RAS */
1398                         0x00000002, /* EMC_RP */
1399                         0x00000004, /* EMC_R2W */
1400                         0x00000008, /* EMC_W2R */
1401                         0x00000002, /* EMC_R2P */
1402                         0x00000009, /* EMC_W2P */
1403                         0x00000002, /* EMC_RD_RCD */
1404                         0x00000002, /* EMC_WR_RCD */
1405                         0x00000002, /* EMC_RRD */
1406                         0x00000002, /* EMC_REXT */
1407                         0x00000000, /* EMC_WEXT */
1408                         0x00000003, /* EMC_WDV */
1409                         0x00000003, /* EMC_WDV_MASK */
1410                         0x00000005, /* EMC_QUSE */
1411                         0x00000002, /* EMC_QUSE_WIDTH */
1412                         0x00000000, /* EMC_IBDLY */
1413                         0x00000003, /* EMC_EINPUT */
1414                         0x00000006, /* EMC_EINPUT_DURATION */
1415                         0x00030000, /* EMC_PUTERM_EXTRA */
1416                         0x00000003, /* EMC_PUTERM_WIDTH */
1417                         0x00000000, /* EMC_PUTERM_ADJ */
1418                         0x00000000, /* EMC_CDB_CNTL_1 */
1419                         0x00000000, /* EMC_CDB_CNTL_2 */
1420                         0x00000000, /* EMC_CDB_CNTL_3 */
1421                         0x00000002, /* EMC_QRST */
1422                         0x0000000d, /* EMC_QSAFE */
1423                         0x0000000e, /* EMC_RDV */
1424                         0x00000010, /* EMC_RDV_MASK */
1425                         0x000008e4, /* EMC_REFRESH */
1426                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1427                         0x00000239, /* EMC_PRE_REFRESH_REQ_CNT */
1428                         0x00000001, /* EMC_PDEX2WR */
1429                         0x00000008, /* EMC_PDEX2RD */
1430                         0x00000001, /* EMC_PCHG2PDEN */
1431                         0x00000000, /* EMC_ACT2PDEN */
1432                         0x0000004a, /* EMC_AR2PDEN */
1433                         0x0000000e, /* EMC_RW2PDEN */
1434                         0x00000051, /* EMC_TXSR */
1435                         0x00000200, /* EMC_TXSRDLL */
1436                         0x00000004, /* EMC_TCKE */
1437                         0x00000005, /* EMC_TCKESR */
1438                         0x00000004, /* EMC_TPD */
1439                         0x00000005, /* EMC_TFAW */
1440                         0x00000000, /* EMC_TRPAB */
1441                         0x00000005, /* EMC_TCLKSTABLE */
1442                         0x00000005, /* EMC_TCLKSTOP */
1443                         0x00000924, /* EMC_TREFBW */
1444                         0x00000000, /* EMC_FBIO_CFG6 */
1445                         0x00000000, /* EMC_ODT_WRITE */
1446                         0x00000000, /* EMC_ODT_READ */
1447                         0x1040b098, /* EMC_FBIO_CFG5 */
1448                         0x002c00a0, /* EMC_CFG_DIG_DLL */
1449                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1450                         0x00030000, /* EMC_DLL_XFORM_DQS0 */
1451                         0x00030000, /* EMC_DLL_XFORM_DQS1 */
1452                         0x00030000, /* EMC_DLL_XFORM_DQS2 */
1453                         0x00030000, /* EMC_DLL_XFORM_DQS3 */
1454                         0x00030000, /* EMC_DLL_XFORM_DQS4 */
1455                         0x00030000, /* EMC_DLL_XFORM_DQS5 */
1456                         0x00030000, /* EMC_DLL_XFORM_DQS6 */
1457                         0x00030000, /* EMC_DLL_XFORM_DQS7 */
1458                         0x00030000, /* EMC_DLL_XFORM_DQS8 */
1459                         0x00030000, /* EMC_DLL_XFORM_DQS9 */
1460                         0x00030000, /* EMC_DLL_XFORM_DQS10 */
1461                         0x00030000, /* EMC_DLL_XFORM_DQS11 */
1462                         0x00030000, /* EMC_DLL_XFORM_DQS12 */
1463                         0x00030000, /* EMC_DLL_XFORM_DQS13 */
1464                         0x00030000, /* EMC_DLL_XFORM_DQS14 */
1465                         0x00030000, /* EMC_DLL_XFORM_DQS15 */
1466                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1467                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1468                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1469                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1470                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1471                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1472                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1473                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1474                         0x0009c000, /* EMC_DLL_XFORM_ADDR0 */
1475                         0x0009c000, /* EMC_DLL_XFORM_ADDR1 */
1476                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1477                         0x0009c000, /* EMC_DLL_XFORM_ADDR3 */
1478                         0x0009c000, /* EMC_DLL_XFORM_ADDR4 */
1479                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1480                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1481                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1482                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1483                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1484                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1485                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1486                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1487                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1488                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1489                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1490                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1491                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1492                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1493                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1494                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1495                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1496                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1497                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1498                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1499                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1500                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1501                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1502                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1503                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1504                         0x00060000, /* EMC_DLL_XFORM_DQ0 */
1505                         0x00060000, /* EMC_DLL_XFORM_DQ1 */
1506                         0x00060000, /* EMC_DLL_XFORM_DQ2 */
1507                         0x00060000, /* EMC_DLL_XFORM_DQ3 */
1508                         0x00006000, /* EMC_DLL_XFORM_DQ4 */
1509                         0x00006000, /* EMC_DLL_XFORM_DQ5 */
1510                         0x00006000, /* EMC_DLL_XFORM_DQ6 */
1511                         0x00006000, /* EMC_DLL_XFORM_DQ7 */
1512                         0x10000280, /* EMC_XM2CMDPADCTRL */
1513                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1514                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1515                         0x01231339, /* EMC_XM2DQSPADCTRL2 */
1516                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1517                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1518                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
1519                         0x00000606, /* EMC_XM2CLKPADCTRL2 */
1520                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1521                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1522                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
1523                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1524                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
1525                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1526                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1527                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1528                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
1529                         0x00000096, /* EMC_TXDSRVTTGEN */
1530                         0x00000000, /* EMC_FBIO_SPARE */
1531                         0x00020000, /* EMC_ZCAL_INTERVAL */
1532                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1533                         0x01740010, /* EMC_MRS_WAIT_CNT */
1534                         0x01740010, /* EMC_MRS_WAIT_CNT2 */
1535                         0x00000000, /* EMC_CTT */
1536                         0x00000003, /* EMC_CTT_DURATION */
1537                         0x0000d3b3, /* EMC_CFG_PIPE */
1538                         0x800012d7, /* EMC_DYN_SELF_REF_CONTROL */
1539                         0x00000009, /* EMC_QPOP */
1540                         0x08000004, /* MC_EMEM_ARB_CFG */
1541                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1542                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1543                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
1544                         0x00000006, /* MC_EMEM_ARB_TIMING_RC */
1545                         0x00000003, /* MC_EMEM_ARB_TIMING_RAS */
1546                         0x00000003, /* MC_EMEM_ARB_TIMING_FAW */
1547                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1548                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1549                         0x00000007, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1550                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1551                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1552                         0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
1553                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1554                         0x06040202, /* MC_EMEM_ARB_DA_TURNS */
1555                         0x000a0506, /* MC_EMEM_ARB_DA_COVERS */
1556                         0x77450e07, /* MC_EMEM_ARB_MISC0 */
1557                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1558                 },
1559                 {
1560                         0x00000004, /* MC_MLL_MPCORER_PTSA_RATE */
1561                         0x00000090, /* MC_PTSA_GRANT_DECREMENT */
1562                         0x00ff004a, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1563                         0x00ff004a, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1564                         0x00ff003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1565                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1566                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1567                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1568                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1569                         0x00350049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1570                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1571                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1572                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1573                         0x0008003b, /* MC_LATENCY_ALLOWANCE_HC_0 */
1574                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
1575                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1576                         0x00ff0043, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1577                         0x00ff002d, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1578                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1579                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1580                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1581                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1582                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1583                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1584                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1585                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1586                         0x00510036, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1587                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1588                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1589                         0x00ff0087, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1590                         0x00ff004a, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1591                 },
1592                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1593                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1594                 0x00000802, /* EMC_CTT_TERM_CTRL */
1595                 0x73340000, /* EMC_CFG */
1596                 0x000008cd, /* EMC_CFG_2 */
1597                 0x00040128, /* EMC_SEL_DPD_CTRL */
1598                 0x002c0068, /* EMC_CFG_DIG_DLL */
1599                 0x00000000, /* EMC_BGBIAS_CTL0 */
1600                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1601                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1602                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1603                 0x80000321, /* Mode Register 0 */
1604                 0x80100002, /* Mode Register 1 */
1605                 0x80200000, /* Mode Register 2 */
1606                 0x00000000, /* Mode Register 4 */
1607                 2680,       /* expected dvfs latency (ns) */
1608         },
1609         {
1610                 0x18,       /* V5.0.6 */
1611                 "06_396000_01_V5.0.6_V0.8", /* DVFS table version */
1612                 396000,     /* SDRAM frequency */
1613                 860,        /* min voltage */
1614                 900,        /* gpu min voltage */
1615                 "pllm_out0", /* clock source id */
1616                 0x00000002, /* CLK_SOURCE_EMC */
1617                 164,        /* number of burst_regs */
1618                 31,         /* number of up_down_regs */
1619                 {
1620                         0x00000011, /* EMC_RC */
1621                         0x00000065, /* EMC_RFC */
1622                         0x00000000, /* EMC_RFC_SLR */
1623                         0x0000000c, /* EMC_RAS */
1624                         0x00000004, /* EMC_RP */
1625                         0x00000005, /* EMC_R2W */
1626                         0x00000008, /* EMC_W2R */
1627                         0x00000002, /* EMC_R2P */
1628                         0x0000000a, /* EMC_W2P */
1629                         0x00000004, /* EMC_RD_RCD */
1630                         0x00000004, /* EMC_WR_RCD */
1631                         0x00000002, /* EMC_RRD */
1632                         0x00000002, /* EMC_REXT */
1633                         0x00000000, /* EMC_WEXT */
1634                         0x00000003, /* EMC_WDV */
1635                         0x00000003, /* EMC_WDV_MASK */
1636                         0x00000005, /* EMC_QUSE */
1637                         0x00000002, /* EMC_QUSE_WIDTH */
1638                         0x00000000, /* EMC_IBDLY */
1639                         0x00000003, /* EMC_EINPUT */
1640                         0x00000006, /* EMC_EINPUT_DURATION */
1641                         0x00030000, /* EMC_PUTERM_EXTRA */
1642                         0x00000003, /* EMC_PUTERM_WIDTH */
1643                         0x00000000, /* EMC_PUTERM_ADJ */
1644                         0x00000000, /* EMC_CDB_CNTL_1 */
1645                         0x00000000, /* EMC_CDB_CNTL_2 */
1646                         0x00000000, /* EMC_CDB_CNTL_3 */
1647                         0x00000002, /* EMC_QRST */
1648                         0x0000000d, /* EMC_QSAFE */
1649                         0x0000000e, /* EMC_RDV */
1650                         0x00000010, /* EMC_RDV_MASK */
1651                         0x00000bd1, /* EMC_REFRESH */
1652                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1653                         0x000002f4, /* EMC_PRE_REFRESH_REQ_CNT */
1654                         0x00000001, /* EMC_PDEX2WR */
1655                         0x00000008, /* EMC_PDEX2RD */
1656                         0x00000001, /* EMC_PCHG2PDEN */
1657                         0x00000000, /* EMC_ACT2PDEN */
1658                         0x00000063, /* EMC_AR2PDEN */
1659                         0x0000000f, /* EMC_RW2PDEN */
1660                         0x0000006b, /* EMC_TXSR */
1661                         0x00000200, /* EMC_TXSRDLL */
1662                         0x00000004, /* EMC_TCKE */
1663                         0x00000005, /* EMC_TCKESR */
1664                         0x00000004, /* EMC_TPD */
1665                         0x00000007, /* EMC_TFAW */
1666                         0x00000000, /* EMC_TRPAB */
1667                         0x00000005, /* EMC_TCLKSTABLE */
1668                         0x00000005, /* EMC_TCLKSTOP */
1669                         0x00000c11, /* EMC_TREFBW */
1670                         0x00000000, /* EMC_FBIO_CFG6 */
1671                         0x00000000, /* EMC_ODT_WRITE */
1672                         0x00000000, /* EMC_ODT_READ */
1673                         0x1040b098, /* EMC_FBIO_CFG5 */
1674                         0x002c00a0, /* EMC_CFG_DIG_DLL */
1675                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1676                         0x00030000, /* EMC_DLL_XFORM_DQS0 */
1677                         0x00030000, /* EMC_DLL_XFORM_DQS1 */
1678                         0x00030000, /* EMC_DLL_XFORM_DQS2 */
1679                         0x00030000, /* EMC_DLL_XFORM_DQS3 */
1680                         0x00030000, /* EMC_DLL_XFORM_DQS4 */
1681                         0x00030000, /* EMC_DLL_XFORM_DQS5 */
1682                         0x00030000, /* EMC_DLL_XFORM_DQS6 */
1683                         0x00030000, /* EMC_DLL_XFORM_DQS7 */
1684                         0x00030000, /* EMC_DLL_XFORM_DQS8 */
1685                         0x00030000, /* EMC_DLL_XFORM_DQS9 */
1686                         0x00030000, /* EMC_DLL_XFORM_DQS10 */
1687                         0x00030000, /* EMC_DLL_XFORM_DQS11 */
1688                         0x00030000, /* EMC_DLL_XFORM_DQS12 */
1689                         0x00030000, /* EMC_DLL_XFORM_DQS13 */
1690                         0x00030000, /* EMC_DLL_XFORM_DQS14 */
1691                         0x00030000, /* EMC_DLL_XFORM_DQS15 */
1692                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1693                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1694                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1695                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1696                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1697                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1698                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1699                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1700                         0x00074000, /* EMC_DLL_XFORM_ADDR0 */
1701                         0x00074000, /* EMC_DLL_XFORM_ADDR1 */
1702                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1703                         0x00074000, /* EMC_DLL_XFORM_ADDR3 */
1704                         0x00074000, /* EMC_DLL_XFORM_ADDR4 */
1705                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1706                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1707                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1708                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1709                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1710                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1711                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1712                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1713                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1714                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1715                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1716                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1717                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1718                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1719                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1720                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1721                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1722                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1723                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1724                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1725                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1726                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1727                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1728                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1729                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1730                         0x00044000, /* EMC_DLL_XFORM_DQ0 */
1731                         0x00044000, /* EMC_DLL_XFORM_DQ1 */
1732                         0x00044000, /* EMC_DLL_XFORM_DQ2 */
1733                         0x00044000, /* EMC_DLL_XFORM_DQ3 */
1734                         0x00004400, /* EMC_DLL_XFORM_DQ4 */
1735                         0x00004400, /* EMC_DLL_XFORM_DQ5 */
1736                         0x00004400, /* EMC_DLL_XFORM_DQ6 */
1737                         0x00004400, /* EMC_DLL_XFORM_DQ7 */
1738                         0x10000280, /* EMC_XM2CMDPADCTRL */
1739                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1740                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1741                         0x01231339, /* EMC_XM2DQSPADCTRL2 */
1742                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1743                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1744                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
1745                         0x00000606, /* EMC_XM2CLKPADCTRL2 */
1746                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1747                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1748                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
1749                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1750                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
1751                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1752                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1753                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1754                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
1755                         0x000000c6, /* EMC_TXDSRVTTGEN */
1756                         0x00000000, /* EMC_FBIO_SPARE */
1757                         0x00020000, /* EMC_ZCAL_INTERVAL */
1758                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1759                         0x015b0010, /* EMC_MRS_WAIT_CNT */
1760                         0x015b0010, /* EMC_MRS_WAIT_CNT2 */
1761                         0x00000000, /* EMC_CTT */
1762                         0x00000003, /* EMC_CTT_DURATION */
1763                         0x0000d3b3, /* EMC_CFG_PIPE */
1764                         0x8000188b, /* EMC_DYN_SELF_REF_CONTROL */
1765                         0x00000009, /* EMC_QPOP */
1766                         0x0f000005, /* MC_EMEM_ARB_CFG */
1767                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1768                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
1769                         0x00000002, /* MC_EMEM_ARB_TIMING_RP */
1770                         0x00000009, /* MC_EMEM_ARB_TIMING_RC */
1771                         0x00000005, /* MC_EMEM_ARB_TIMING_RAS */
1772                         0x00000004, /* MC_EMEM_ARB_TIMING_FAW */
1773                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1774                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1775                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1776                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1777                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1778                         0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
1779                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1780                         0x06040202, /* MC_EMEM_ARB_DA_TURNS */
1781                         0x000d0709, /* MC_EMEM_ARB_DA_COVERS */
1782                         0x7586120a, /* MC_EMEM_ARB_MISC0 */
1783                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1784                 },
1785                 {
1786                         0x0000000a, /* MC_MLL_MPCORER_PTSA_RATE */
1787                         0x000000be, /* MC_PTSA_GRANT_DECREMENT */
1788                         0x00ff0038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1789                         0x00ff0038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1790                         0x00ff003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1791                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1792                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1793                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1794                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1795                         0x00280049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1796                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1797                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1798                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1799                         0x0008002d, /* MC_LATENCY_ALLOWANCE_HC_0 */
1800                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
1801                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1802                         0x00ff0033, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1803                         0x00ff0022, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1804                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1805                         0x00ff0037, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1806                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1807                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1808                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1809                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1810                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1811                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1812                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1813                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1814                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1815                         0x00ff0066, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1816                         0x00ff0038, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1817                 },
1818                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1819                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1820                 0x00000802, /* EMC_CTT_TERM_CTRL */
1821                 0x73340000, /* EMC_CFG */
1822                 0x0000088d, /* EMC_CFG_2 */
1823                 0x00040008, /* EMC_SEL_DPD_CTRL */
1824                 0x002c0068, /* EMC_CFG_DIG_DLL */
1825                 0x00000000, /* EMC_BGBIAS_CTL0 */
1826                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1827                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1828                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1829                 0x80000521, /* Mode Register 0 */
1830                 0x80100002, /* Mode Register 1 */
1831                 0x80200000, /* Mode Register 2 */
1832                 0x00000000, /* Mode Register 4 */
1833                 2180,       /* expected dvfs latency (ns) */
1834         },
1835         {
1836                 0x18,       /* V5.0.6 */
1837                 "06_528000_01_V5.0.6_V0.8", /* DVFS table version */
1838                 528000,     /* SDRAM frequency */
1839                 920,        /* min voltage */
1840                 900,        /* gpu min voltage */
1841                 "pllm_ud",  /* clock source id */
1842                 0x80000000, /* CLK_SOURCE_EMC */
1843                 164,        /* number of burst_regs */
1844                 31,         /* number of up_down_regs */
1845                 {
1846                         0x00000017, /* EMC_RC */
1847                         0x00000088, /* EMC_RFC */
1848                         0x00000000, /* EMC_RFC_SLR */
1849                         0x00000010, /* EMC_RAS */
1850                         0x00000005, /* EMC_RP */
1851                         0x00000006, /* EMC_R2W */
1852                         0x00000009, /* EMC_W2R */
1853                         0x00000002, /* EMC_R2P */
1854                         0x0000000d, /* EMC_W2P */
1855                         0x00000005, /* EMC_RD_RCD */
1856                         0x00000005, /* EMC_WR_RCD */
1857                         0x00000002, /* EMC_RRD */
1858                         0x00000002, /* EMC_REXT */
1859                         0x00000000, /* EMC_WEXT */
1860                         0x00000004, /* EMC_WDV */
1861                         0x00000004, /* EMC_WDV_MASK */
1862                         0x00000008, /* EMC_QUSE */
1863                         0x00000002, /* EMC_QUSE_WIDTH */
1864                         0x00000000, /* EMC_IBDLY */
1865                         0x00000005, /* EMC_EINPUT */
1866                         0x00000007, /* EMC_EINPUT_DURATION */
1867                         0x00060000, /* EMC_PUTERM_EXTRA */
1868                         0x00000003, /* EMC_PUTERM_WIDTH */
1869                         0x00000000, /* EMC_PUTERM_ADJ */
1870                         0x00000000, /* EMC_CDB_CNTL_1 */
1871                         0x00000000, /* EMC_CDB_CNTL_2 */
1872                         0x00000000, /* EMC_CDB_CNTL_3 */
1873                         0x00000004, /* EMC_QRST */
1874                         0x0000000e, /* EMC_QSAFE */
1875                         0x00000013, /* EMC_RDV */
1876                         0x00000015, /* EMC_RDV_MASK */
1877                         0x00000fd6, /* EMC_REFRESH */
1878                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1879                         0x000003f5, /* EMC_PRE_REFRESH_REQ_CNT */
1880                         0x00000002, /* EMC_PDEX2WR */
1881                         0x0000000b, /* EMC_PDEX2RD */
1882                         0x00000001, /* EMC_PCHG2PDEN */
1883                         0x00000000, /* EMC_ACT2PDEN */
1884                         0x00000084, /* EMC_AR2PDEN */
1885                         0x00000012, /* EMC_RW2PDEN */
1886                         0x0000008f, /* EMC_TXSR */
1887                         0x00000200, /* EMC_TXSRDLL */
1888                         0x00000004, /* EMC_TCKE */
1889                         0x00000005, /* EMC_TCKESR */
1890                         0x00000004, /* EMC_TPD */
1891                         0x0000000b, /* EMC_TFAW */
1892                         0x00000000, /* EMC_TRPAB */
1893                         0x00000006, /* EMC_TCLKSTABLE */
1894                         0x00000006, /* EMC_TCLKSTOP */
1895                         0x00001017, /* EMC_TREFBW */
1896                         0x00000000, /* EMC_FBIO_CFG6 */
1897                         0x00000000, /* EMC_ODT_WRITE */
1898                         0x00000000, /* EMC_ODT_READ */
1899                         0x1040b098, /* EMC_FBIO_CFG5 */
1900                         0xe01200b1, /* EMC_CFG_DIG_DLL */
1901                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1902                         0x0000000a, /* EMC_DLL_XFORM_DQS0 */
1903                         0x0000000a, /* EMC_DLL_XFORM_DQS1 */
1904                         0x0000000a, /* EMC_DLL_XFORM_DQS2 */
1905                         0x0000000a, /* EMC_DLL_XFORM_DQS3 */
1906                         0x0000000a, /* EMC_DLL_XFORM_DQS4 */
1907                         0x0000000a, /* EMC_DLL_XFORM_DQS5 */
1908                         0x0000000a, /* EMC_DLL_XFORM_DQS6 */
1909                         0x0000000a, /* EMC_DLL_XFORM_DQS7 */
1910                         0x0000000a, /* EMC_DLL_XFORM_DQS8 */
1911                         0x0000000a, /* EMC_DLL_XFORM_DQS9 */
1912                         0x0000000a, /* EMC_DLL_XFORM_DQS10 */
1913                         0x0000000a, /* EMC_DLL_XFORM_DQS11 */
1914                         0x0000000a, /* EMC_DLL_XFORM_DQS12 */
1915                         0x0000000a, /* EMC_DLL_XFORM_DQS13 */
1916                         0x0000000a, /* EMC_DLL_XFORM_DQS14 */
1917                         0x0000000a, /* EMC_DLL_XFORM_DQS15 */
1918                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1919                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1920                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1921                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1922                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1923                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1924                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1925                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1926                         0x00058000, /* EMC_DLL_XFORM_ADDR0 */
1927                         0x00058000, /* EMC_DLL_XFORM_ADDR1 */
1928                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1929                         0x00058000, /* EMC_DLL_XFORM_ADDR3 */
1930                         0x00058000, /* EMC_DLL_XFORM_ADDR4 */
1931                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1932                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1933                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1934                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1935                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1936                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1937                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1938                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1939                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1940                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1941                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1942                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1943                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1944                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1945                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1946                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1947                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1948                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1949                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1950                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1951                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1952                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1953                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1954                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1955                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1956                         0x0000000e, /* EMC_DLL_XFORM_DQ0 */
1957                         0x0000000e, /* EMC_DLL_XFORM_DQ1 */
1958                         0x0000000e, /* EMC_DLL_XFORM_DQ2 */
1959                         0x0000000e, /* EMC_DLL_XFORM_DQ3 */
1960                         0x0000000e, /* EMC_DLL_XFORM_DQ4 */
1961                         0x0000000e, /* EMC_DLL_XFORM_DQ5 */
1962                         0x0000000e, /* EMC_DLL_XFORM_DQ6 */
1963                         0x0000000e, /* EMC_DLL_XFORM_DQ7 */
1964                         0x100002a0, /* EMC_XM2CMDPADCTRL */
1965                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1966                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1967                         0x0123133d, /* EMC_XM2DQSPADCTRL2 */
1968                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1969                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1970                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
1971                         0x00000606, /* EMC_XM2CLKPADCTRL2 */
1972                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1973                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1974                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
1975                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1976                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
1977                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1978                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1979                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1980                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
1981                         0x00000000, /* EMC_TXDSRVTTGEN */
1982                         0x00000000, /* EMC_FBIO_SPARE */
1983                         0x00020000, /* EMC_ZCAL_INTERVAL */
1984                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1985                         0x013a0010, /* EMC_MRS_WAIT_CNT */
1986                         0x013a0010, /* EMC_MRS_WAIT_CNT2 */
1987                         0x00000000, /* EMC_CTT */
1988                         0x00000003, /* EMC_CTT_DURATION */
1989                         0x000052a0, /* EMC_CFG_PIPE */
1990                         0x80002062, /* EMC_DYN_SELF_REF_CONTROL */
1991                         0x0000000c, /* EMC_QPOP */
1992                         0x0f000007, /* MC_EMEM_ARB_CFG */
1993                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1994                         0x00000002, /* MC_EMEM_ARB_TIMING_RCD */
1995                         0x00000003, /* MC_EMEM_ARB_TIMING_RP */
1996                         0x0000000c, /* MC_EMEM_ARB_TIMING_RC */
1997                         0x00000007, /* MC_EMEM_ARB_TIMING_RAS */
1998                         0x00000006, /* MC_EMEM_ARB_TIMING_FAW */
1999                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
2000                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2001                         0x00000009, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2002                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
2003                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
2004                         0x00000005, /* MC_EMEM_ARB_TIMING_R2W */
2005                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
2006                         0x06050202, /* MC_EMEM_ARB_DA_TURNS */
2007                         0x000f080c, /* MC_EMEM_ARB_DA_COVERS */
2008                         0x7428180d, /* MC_EMEM_ARB_MISC0 */
2009                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2010                 },
2011                 {
2012                         0x0000000d, /* MC_MLL_MPCORER_PTSA_RATE */
2013                         0x000000fd, /* MC_PTSA_GRANT_DECREMENT */
2014                         0x00c10038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
2015                         0x00c10038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
2016                         0x00c1003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
2017                         0x00c10090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
2018                         0x00c10041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
2019                         0x00c10090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
2020                         0x00c10041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
2021                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
2022                         0x00c10080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
2023                         0x00c10004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
2024                         0x00c10004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
2025                         0x00080021, /* MC_LATENCY_ALLOWANCE_HC_0 */
2026                         0x000000c1, /* MC_LATENCY_ALLOWANCE_HC_1 */
2027                         0x00c10004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
2028                         0x00c10026, /* MC_LATENCY_ALLOWANCE_GPU_0 */
2029                         0x00c1001a, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
2030                         0x00c10024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
2031                         0x00c10029, /* MC_LATENCY_ALLOWANCE_VIC_0 */
2032                         0x000000c1, /* MC_LATENCY_ALLOWANCE_VI2_0 */
2033                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
2034                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
2035                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
2036                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
2037                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
2038                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
2039                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_VDE_2 */
2040                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_VDE_3 */
2041                         0x00c10065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
2042                         0x00c1002a, /* MC_LATENCY_ALLOWANCE_AFI_0 */
2043                 },
2044                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
2045                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2046                 0x00000802, /* EMC_CTT_TERM_CTRL */
2047                 0x73300000, /* EMC_CFG */
2048                 0x00000895, /* EMC_CFG_2 */
2049                 0x00040008, /* EMC_SEL_DPD_CTRL */
2050                 0xe0120069, /* EMC_CFG_DIG_DLL */
2051                 0x00000000, /* EMC_BGBIAS_CTL0 */
2052                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
2053                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
2054                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
2055                 0x80000941, /* Mode Register 0 */
2056                 0x80100002, /* Mode Register 1 */
2057                 0x80200008, /* Mode Register 2 */
2058                 0x00000000, /* Mode Register 4 */
2059                 1440,       /* expected dvfs latency (ns) */
2060         },
2061         {
2062                 0x18,       /* V5.0.6 */
2063                 "06_600000_01_V5.0.6_V0.8", /* DVFS table version */
2064                 600000,     /* SDRAM frequency */
2065                 920,        /* min voltage */
2066                 900,        /* gpu min voltage */
2067                 "pllc_ud",  /* clock source id */
2068                 0xe0000000, /* CLK_SOURCE_EMC */
2069                 164,        /* number of burst_regs */
2070                 31,         /* number of up_down_regs */
2071                 {
2072                         0x0000001a, /* EMC_RC */
2073                         0x0000009a, /* EMC_RFC */
2074                         0x00000000, /* EMC_RFC_SLR */
2075                         0x00000012, /* EMC_RAS */
2076                         0x00000006, /* EMC_RP */
2077                         0x00000007, /* EMC_R2W */
2078                         0x0000000b, /* EMC_W2R */
2079                         0x00000003, /* EMC_R2P */
2080                         0x00000010, /* EMC_W2P */
2081                         0x00000006, /* EMC_RD_RCD */
2082                         0x00000006, /* EMC_WR_RCD */
2083                         0x00000002, /* EMC_RRD */
2084                         0x00000002, /* EMC_REXT */
2085                         0x00000000, /* EMC_WEXT */
2086                         0x00000005, /* EMC_WDV */
2087                         0x00000005, /* EMC_WDV_MASK */
2088                         0x0000000a, /* EMC_QUSE */
2089                         0x00000002, /* EMC_QUSE_WIDTH */
2090                         0x00000000, /* EMC_IBDLY */
2091                         0x00000003, /* EMC_EINPUT */
2092                         0x0000000b, /* EMC_EINPUT_DURATION */
2093                         0x00070000, /* EMC_PUTERM_EXTRA */
2094                         0x00000003, /* EMC_PUTERM_WIDTH */
2095                         0x00000000, /* EMC_PUTERM_ADJ */
2096                         0x00000000, /* EMC_CDB_CNTL_1 */
2097                         0x00000000, /* EMC_CDB_CNTL_2 */
2098                         0x00000000, /* EMC_CDB_CNTL_3 */
2099                         0x00000002, /* EMC_QRST */
2100                         0x00000012, /* EMC_QSAFE */
2101                         0x00000016, /* EMC_RDV */
2102                         0x00000018, /* EMC_RDV_MASK */
2103                         0x00001208, /* EMC_REFRESH */
2104                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2105                         0x00000482, /* EMC_PRE_REFRESH_REQ_CNT */
2106                         0x00000002, /* EMC_PDEX2WR */
2107                         0x0000000d, /* EMC_PDEX2RD */
2108                         0x00000001, /* EMC_PCHG2PDEN */
2109                         0x00000000, /* EMC_ACT2PDEN */
2110                         0x00000096, /* EMC_AR2PDEN */
2111                         0x00000015, /* EMC_RW2PDEN */
2112                         0x000000a2, /* EMC_TXSR */
2113                         0x00000200, /* EMC_TXSRDLL */
2114                         0x00000004, /* EMC_TCKE */
2115                         0x00000005, /* EMC_TCKESR */
2116                         0x00000004, /* EMC_TPD */
2117                         0x0000000c, /* EMC_TFAW */
2118                         0x00000000, /* EMC_TRPAB */
2119                         0x00000006, /* EMC_TCLKSTABLE */
2120                         0x00000006, /* EMC_TCLKSTOP */
2121                         0x00001248, /* EMC_TREFBW */
2122                         0x00000000, /* EMC_FBIO_CFG6 */
2123                         0x00000000, /* EMC_ODT_WRITE */
2124                         0x00000000, /* EMC_ODT_READ */
2125                         0x1040b098, /* EMC_FBIO_CFG5 */
2126                         0xe00e00b1, /* EMC_CFG_DIG_DLL */
2127                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2128                         0x0000000a, /* EMC_DLL_XFORM_DQS0 */
2129                         0x0000000a, /* EMC_DLL_XFORM_DQS1 */
2130                         0x0000000a, /* EMC_DLL_XFORM_DQS2 */
2131                         0x0000000a, /* EMC_DLL_XFORM_DQS3 */
2132                         0x0000000a, /* EMC_DLL_XFORM_DQS4 */
2133                         0x0000000a, /* EMC_DLL_XFORM_DQS5 */
2134                         0x0000000a, /* EMC_DLL_XFORM_DQS6 */
2135                         0x0000000a, /* EMC_DLL_XFORM_DQS7 */
2136                         0x0000000a, /* EMC_DLL_XFORM_DQS8 */
2137                         0x0000000a, /* EMC_DLL_XFORM_DQS9 */
2138                         0x0000000a, /* EMC_DLL_XFORM_DQS10 */
2139                         0x0000000a, /* EMC_DLL_XFORM_DQS11 */
2140                         0x0000000a, /* EMC_DLL_XFORM_DQS12 */
2141                         0x0000000a, /* EMC_DLL_XFORM_DQS13 */
2142                         0x0000000a, /* EMC_DLL_XFORM_DQS14 */
2143                         0x0000000a, /* EMC_DLL_XFORM_DQS15 */
2144                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2145                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2146                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2147                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2148                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
2149                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
2150                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
2151                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
2152                         0x0004c000, /* EMC_DLL_XFORM_ADDR0 */
2153                         0x0004c000, /* EMC_DLL_XFORM_ADDR1 */
2154                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
2155                         0x0004c000, /* EMC_DLL_XFORM_ADDR3 */
2156                         0x0004c000, /* EMC_DLL_XFORM_ADDR4 */
2157                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
2158                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
2159                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
2160                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
2161                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
2162                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
2163                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
2164                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
2165                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
2166                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2167                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2168                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2169                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2170                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2171                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2172                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2173                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2174                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
2175                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
2176                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
2177                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
2178                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
2179                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
2180                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
2181                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
2182                         0x0000000d, /* EMC_DLL_XFORM_DQ0 */
2183                         0x0000000d, /* EMC_DLL_XFORM_DQ1 */
2184                         0x0000000d, /* EMC_DLL_XFORM_DQ2 */
2185                         0x0000000d, /* EMC_DLL_XFORM_DQ3 */
2186                         0x0000000d, /* EMC_DLL_XFORM_DQ4 */
2187                         0x0000000d, /* EMC_DLL_XFORM_DQ5 */
2188                         0x0000000d, /* EMC_DLL_XFORM_DQ6 */
2189                         0x0000000d, /* EMC_DLL_XFORM_DQ7 */
2190                         0x100002a0, /* EMC_XM2CMDPADCTRL */
2191                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
2192                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
2193                         0x0121113d, /* EMC_XM2DQSPADCTRL2 */
2194                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2195                         0x00000000, /* EMC_XM2DQPADCTRL3 */
2196                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
2197                         0x00000606, /* EMC_XM2CLKPADCTRL2 */
2198                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
2199                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
2200                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
2201                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
2202                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
2203                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
2204                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
2205                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
2206                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
2207                         0x00000000, /* EMC_TXDSRVTTGEN */
2208                         0x00000000, /* EMC_FBIO_SPARE */
2209                         0x00020000, /* EMC_ZCAL_INTERVAL */
2210                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
2211                         0x01280010, /* EMC_MRS_WAIT_CNT */
2212                         0x01280010, /* EMC_MRS_WAIT_CNT2 */
2213                         0x00000000, /* EMC_CTT */
2214                         0x00000003, /* EMC_CTT_DURATION */
2215                         0x000040a0, /* EMC_CFG_PIPE */
2216                         0x800024aa, /* EMC_DYN_SELF_REF_CONTROL */
2217                         0x0000000e, /* EMC_QPOP */
2218                         0x00000009, /* MC_EMEM_ARB_CFG */
2219                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2220                         0x00000002, /* MC_EMEM_ARB_TIMING_RCD */
2221                         0x00000003, /* MC_EMEM_ARB_TIMING_RP */
2222                         0x0000000d, /* MC_EMEM_ARB_TIMING_RC */
2223                         0x00000008, /* MC_EMEM_ARB_TIMING_RAS */
2224                         0x00000006, /* MC_EMEM_ARB_TIMING_FAW */
2225                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
2226                         0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2227                         0x0000000b, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2228                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
2229                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
2230                         0x00000005, /* MC_EMEM_ARB_TIMING_R2W */
2231                         0x00000007, /* MC_EMEM_ARB_TIMING_W2R */
2232                         0x07050202, /* MC_EMEM_ARB_DA_TURNS */
2233                         0x00120a0d, /* MC_EMEM_ARB_DA_COVERS */
2234                         0x73a91b0e, /* MC_EMEM_ARB_MISC0 */
2235                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2236                 },
2237                 {
2238                         0x0000000f, /* MC_MLL_MPCORER_PTSA_RATE */
2239                         0x00000120, /* MC_PTSA_GRANT_DECREMENT */
2240                         0x00aa0038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
2241                         0x00aa0038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
2242                         0x00aa003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
2243                         0x00aa0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
2244                         0x00aa0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
2245                         0x00aa0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
2246                         0x00aa0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
2247                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
2248                         0x00aa0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
2249                         0x00aa0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
2250                         0x00aa0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
2251                         0x0008001d, /* MC_LATENCY_ALLOWANCE_HC_0 */
2252                         0x000000aa, /* MC_LATENCY_ALLOWANCE_HC_1 */
2253                         0x00aa0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
2254                         0x00aa0022, /* MC_LATENCY_ALLOWANCE_GPU_0 */
2255                         0x00aa0018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
2256                         0x00aa0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
2257                         0x00aa0024, /* MC_LATENCY_ALLOWANCE_VIC_0 */
2258                         0x000000aa, /* MC_LATENCY_ALLOWANCE_VI2_0 */
2259                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
2260                         0x00aa00aa, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
2261                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
2262                         0x00aa00aa, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
2263                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
2264                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
2265                         0x00aa00aa, /* MC_LATENCY_ALLOWANCE_VDE_2 */
2266                         0x00aa00aa, /* MC_LATENCY_ALLOWANCE_VDE_3 */
2267                         0x00aa0065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
2268                         0x00aa0025, /* MC_LATENCY_ALLOWANCE_AFI_0 */
2269                 },
2270                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
2271                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2272                 0x00000802, /* EMC_CTT_TERM_CTRL */
2273                 0x73300000, /* EMC_CFG */
2274                 0x0000089d, /* EMC_CFG_2 */
2275                 0x00040008, /* EMC_SEL_DPD_CTRL */
2276                 0xe00e0069, /* EMC_CFG_DIG_DLL */
2277                 0x00000000, /* EMC_BGBIAS_CTL0 */
2278                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
2279                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
2280                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
2281                 0x80000b61, /* Mode Register 0 */
2282                 0x80100002, /* Mode Register 1 */
2283                 0x80200010, /* Mode Register 2 */
2284                 0x00000000, /* Mode Register 4 */
2285                 1440,       /* expected dvfs latency (ns) */
2286         },
2287         {
2288                 0x18,       /* V5.0.6 */
2289                 "06_792000_01_V5.0.6_V0.8", /* DVFS table version */
2290                 792000,     /* SDRAM frequency */
2291                 1000,       /* min voltage */
2292                 1100,       /* gpu min voltage */
2293                 "pllm_ud",  /* clock source id */
2294                 0x80000000, /* CLK_SOURCE_EMC */
2295                 164,        /* number of burst_regs */
2296                 31,         /* number of up_down_regs */
2297                 {
2298                         0x00000023, /* EMC_RC */
2299                         0x000000cc, /* EMC_RFC */
2300                         0x00000000, /* EMC_RFC_SLR */
2301                         0x00000019, /* EMC_RAS */
2302                         0x00000009, /* EMC_RP */
2303                         0x00000008, /* EMC_R2W */
2304                         0x0000000d, /* EMC_W2R */
2305                         0x00000004, /* EMC_R2P */
2306                         0x00000013, /* EMC_W2P */
2307                         0x00000009, /* EMC_RD_RCD */
2308                         0x00000009, /* EMC_WR_RCD */
2309                         0x00000002, /* EMC_RRD */
2310                         0x00000002, /* EMC_REXT */
2311                         0x00000000, /* EMC_WEXT */
2312                         0x00000006, /* EMC_WDV */
2313                         0x00000006, /* EMC_WDV_MASK */
2314                         0x0000000b, /* EMC_QUSE */
2315                         0x00000002, /* EMC_QUSE_WIDTH */
2316                         0x00000000, /* EMC_IBDLY */
2317                         0x00000002, /* EMC_EINPUT */
2318                         0x0000000d, /* EMC_EINPUT_DURATION */
2319                         0x00080000, /* EMC_PUTERM_EXTRA */
2320                         0x00000004, /* EMC_PUTERM_WIDTH */
2321                         0x00000000, /* EMC_PUTERM_ADJ */
2322                         0x00000000, /* EMC_CDB_CNTL_1 */
2323                         0x00000000, /* EMC_CDB_CNTL_2 */
2324                         0x00000000, /* EMC_CDB_CNTL_3 */
2325                         0x00000001, /* EMC_QRST */
2326                         0x00000014, /* EMC_QSAFE */
2327                         0x00000017, /* EMC_RDV */
2328                         0x00000019, /* EMC_RDV_MASK */
2329                         0x000017e2, /* EMC_REFRESH */
2330                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2331                         0x000005f8, /* EMC_PRE_REFRESH_REQ_CNT */
2332                         0x00000003, /* EMC_PDEX2WR */
2333                         0x00000011, /* EMC_PDEX2RD */
2334                         0x00000001, /* EMC_PCHG2PDEN */
2335                         0x00000000, /* EMC_ACT2PDEN */
2336                         0x000000c6, /* EMC_AR2PDEN */
2337                         0x00000018, /* EMC_RW2PDEN */
2338                         0x000000d6, /* EMC_TXSR */
2339                         0x00000200, /* EMC_TXSRDLL */
2340                         0x00000005, /* EMC_TCKE */
2341                         0x00000006, /* EMC_TCKESR */
2342                         0x00000005, /* EMC_TPD */
2343                         0x00000011, /* EMC_TFAW */
2344                         0x00000000, /* EMC_TRPAB */
2345                         0x00000008, /* EMC_TCLKSTABLE */
2346                         0x00000008, /* EMC_TCLKSTOP */
2347                         0x00001822, /* EMC_TREFBW */
2348                         0x00000000, /* EMC_FBIO_CFG6 */
2349                         0x00000000, /* EMC_ODT_WRITE */
2350                         0x00000000, /* EMC_ODT_READ */
2351                         0x1040b098, /* EMC_FBIO_CFG5 */
2352                         0xe00700b1, /* EMC_CFG_DIG_DLL */
2353                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2354                         0x00000008, /* EMC_DLL_XFORM_DQS0 */
2355                         0x00000008, /* EMC_DLL_XFORM_DQS1 */
2356                         0x00000008, /* EMC_DLL_XFORM_DQS2 */
2357                         0x00000008, /* EMC_DLL_XFORM_DQS3 */
2358                         0x00000008, /* EMC_DLL_XFORM_DQS4 */
2359                         0x00000008, /* EMC_DLL_XFORM_DQS5 */
2360                         0x00000008, /* EMC_DLL_XFORM_DQS6 */
2361                         0x00000008, /* EMC_DLL_XFORM_DQS7 */
2362                         0x00000008, /* EMC_DLL_XFORM_DQS8 */
2363                         0x00000008, /* EMC_DLL_XFORM_DQS9 */
2364                         0x00000008, /* EMC_DLL_XFORM_DQS10 */
2365                         0x00000008, /* EMC_DLL_XFORM_DQS11 */
2366                         0x00000008, /* EMC_DLL_XFORM_DQS12 */
2367                         0x00000008, /* EMC_DLL_XFORM_DQS13 */
2368                         0x00000008, /* EMC_DLL_XFORM_DQS14 */
2369                         0x00000008, /* EMC_DLL_XFORM_DQS15 */
2370                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2371                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2372                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2373                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2374                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
2375                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
2376                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
2377                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
2378                         0x00038000, /* EMC_DLL_XFORM_ADDR0 */
2379                         0x00038000, /* EMC_DLL_XFORM_ADDR1 */
2380                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
2381                         0x00038000, /* EMC_DLL_XFORM_ADDR3 */
2382                         0x00038000, /* EMC_DLL_XFORM_ADDR4 */
2383                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
2384                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
2385                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
2386                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
2387                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
2388                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
2389                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
2390                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
2391                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
2392                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2393                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2394                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2395                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2396                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2397                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2398                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2399                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2400                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
2401                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
2402                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
2403                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
2404                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
2405                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
2406                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
2407                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
2408                         0x0000000d, /* EMC_DLL_XFORM_DQ0 */
2409                         0x0000000d, /* EMC_DLL_XFORM_DQ1 */
2410                         0x0000000d, /* EMC_DLL_XFORM_DQ2 */
2411                         0x0000000d, /* EMC_DLL_XFORM_DQ3 */
2412                         0x0000000d, /* EMC_DLL_XFORM_DQ4 */
2413                         0x0000000d, /* EMC_DLL_XFORM_DQ5 */
2414                         0x0000000d, /* EMC_DLL_XFORM_DQ6 */
2415                         0x0000000d, /* EMC_DLL_XFORM_DQ7 */
2416                         0x100002a0, /* EMC_XM2CMDPADCTRL */
2417                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
2418                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
2419                         0x0120113d, /* EMC_XM2DQSPADCTRL2 */
2420                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2421                         0x00000000, /* EMC_XM2DQPADCTRL3 */
2422                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
2423                         0x00000606, /* EMC_XM2CLKPADCTRL2 */
2424                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
2425                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
2426                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
2427                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
2428                         0x61861820, /* EMC_XM2DQSPADCTRL3 */
2429                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
2430                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
2431                         0x61861800, /* EMC_XM2DQSPADCTRL6 */
2432                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
2433                         0x00000000, /* EMC_TXDSRVTTGEN */
2434                         0x00000000, /* EMC_FBIO_SPARE */
2435                         0x00020000, /* EMC_ZCAL_INTERVAL */
2436                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
2437                         0x00f80010, /* EMC_MRS_WAIT_CNT */
2438                         0x00f80010, /* EMC_MRS_WAIT_CNT2 */
2439                         0x00000000, /* EMC_CTT */
2440                         0x00000004, /* EMC_CTT_DURATION */
2441                         0x000040a0, /* EMC_CFG_PIPE */
2442                         0x80003012, /* EMC_DYN_SELF_REF_CONTROL */
2443                         0x0000000f, /* EMC_QPOP */
2444                         0x0e00000b, /* MC_EMEM_ARB_CFG */
2445                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2446                         0x00000004, /* MC_EMEM_ARB_TIMING_RCD */
2447                         0x00000005, /* MC_EMEM_ARB_TIMING_RP */
2448                         0x00000012, /* MC_EMEM_ARB_TIMING_RC */
2449                         0x0000000c, /* MC_EMEM_ARB_TIMING_RAS */
2450                         0x00000009, /* MC_EMEM_ARB_TIMING_FAW */
2451                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
2452                         0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2453                         0x0000000c, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2454                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
2455                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
2456                         0x00000006, /* MC_EMEM_ARB_TIMING_R2W */
2457                         0x00000008, /* MC_EMEM_ARB_TIMING_W2R */
2458                         0x08060202, /* MC_EMEM_ARB_DA_TURNS */
2459                         0x00160d12, /* MC_EMEM_ARB_DA_COVERS */
2460                         0x734c2413, /* MC_EMEM_ARB_MISC0 */
2461                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2462                 },
2463                 {
2464                         0x00000013, /* MC_MLL_MPCORER_PTSA_RATE */
2465                         0x0000017c, /* MC_PTSA_GRANT_DECREMENT */
2466                         0x00810038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
2467                         0x00810038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
2468                         0x0081003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
2469                         0x00810090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
2470                         0x00810041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
2471                         0x00810090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
2472                         0x00810041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
2473                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
2474                         0x00810080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
2475                         0x00810004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
2476                         0x00810004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
2477                         0x00080016, /* MC_LATENCY_ALLOWANCE_HC_0 */
2478                         0x00000081, /* MC_LATENCY_ALLOWANCE_HC_1 */
2479                         0x00810004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
2480                         0x00810019, /* MC_LATENCY_ALLOWANCE_GPU_0 */
2481                         0x00810018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
2482                         0x00810024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
2483                         0x0081001c, /* MC_LATENCY_ALLOWANCE_VIC_0 */
2484                         0x00000081, /* MC_LATENCY_ALLOWANCE_VI2_0 */
2485                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
2486                         0x00810081, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
2487                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
2488                         0x00810081, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
2489                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
2490                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
2491                         0x00810081, /* MC_LATENCY_ALLOWANCE_VDE_2 */
2492                         0x00810081, /* MC_LATENCY_ALLOWANCE_VDE_3 */
2493                         0x00810065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
2494                         0x0081001c, /* MC_LATENCY_ALLOWANCE_AFI_0 */
2495                 },
2496                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
2497                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2498                 0x00000802, /* EMC_CTT_TERM_CTRL */
2499                 0x73300000, /* EMC_CFG */
2500                 0x0000089d, /* EMC_CFG_2 */
2501                 0x00040000, /* EMC_SEL_DPD_CTRL */
2502                 0xe0070069, /* EMC_CFG_DIG_DLL */
2503                 0x00000000, /* EMC_BGBIAS_CTL0 */
2504                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
2505                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
2506                 0xa1430606, /* EMC_AUTO_CAL_CONFIG */
2507                 0x80000d71, /* Mode Register 0 */
2508                 0x80100002, /* Mode Register 1 */
2509                 0x80200018, /* Mode Register 2 */
2510                 0x00000000, /* Mode Register 4 */
2511                 1200,       /* expected dvfs latency (ns) */
2512         },
2513         {
2514                 0x18,       /* V5.0.6 */
2515                 "06_924000_01_V5.0.6_V0.8", /* DVFS table version */
2516                 924000,     /* SDRAM frequency */
2517                 1010,       /* min voltage */
2518                 1100,       /* gpu min voltage */
2519                 "pllm_ud",  /* clock source id */
2520                 0x80000000, /* CLK_SOURCE_EMC */
2521                 164,        /* number of burst_regs */
2522                 31,         /* number of up_down_regs */
2523                 {
2524                         0x00000029, /* EMC_RC */
2525                         0x000000ef, /* EMC_RFC */
2526                         0x00000000, /* EMC_RFC_SLR */
2527                         0x0000001d, /* EMC_RAS */
2528                         0x0000000b, /* EMC_RP */
2529                         0x0000000a, /* EMC_R2W */
2530                         0x0000000f, /* EMC_W2R */
2531                         0x00000005, /* EMC_R2P */
2532                         0x00000016, /* EMC_W2P */
2533                         0x0000000b, /* EMC_RD_RCD */
2534                         0x0000000b, /* EMC_WR_RCD */
2535                         0x00000003, /* EMC_RRD */
2536                         0x00000002, /* EMC_REXT */
2537                         0x00000000, /* EMC_WEXT */
2538                         0x00000007, /* EMC_WDV */
2539                         0x00000007, /* EMC_WDV_MASK */
2540                         0x0000000d, /* EMC_QUSE */
2541                         0x00000002, /* EMC_QUSE_WIDTH */
2542                         0x00000000, /* EMC_IBDLY */
2543                         0x00000002, /* EMC_EINPUT */
2544                         0x0000000f, /* EMC_EINPUT_DURATION */
2545                         0x000a0000, /* EMC_PUTERM_EXTRA */
2546                         0x00000004, /* EMC_PUTERM_WIDTH */
2547                         0x00000000, /* EMC_PUTERM_ADJ */
2548                         0x00000000, /* EMC_CDB_CNTL_1 */
2549                         0x00000000, /* EMC_CDB_CNTL_2 */
2550                         0x00000000, /* EMC_CDB_CNTL_3 */
2551                         0x00000001, /* EMC_QRST */
2552                         0x00000016, /* EMC_QSAFE */
2553                         0x0000001a, /* EMC_RDV */
2554                         0x0000001c, /* EMC_RDV_MASK */
2555                         0x00001be7, /* EMC_REFRESH */
2556                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2557                         0x000006f9, /* EMC_PRE_REFRESH_REQ_CNT */
2558                         0x00000004, /* EMC_PDEX2WR */
2559                         0x00000015, /* EMC_PDEX2RD */
2560                         0x00000001, /* EMC_PCHG2PDEN */
2561                         0x00000000, /* EMC_ACT2PDEN */
2562                         0x000000e6, /* EMC_AR2PDEN */
2563                         0x0000001b, /* EMC_RW2PDEN */
2564                         0x000000fa, /* EMC_TXSR */
2565                         0x00000200, /* EMC_TXSRDLL */
2566                         0x00000006, /* EMC_TCKE */
2567                         0x00000007, /* EMC_TCKESR */
2568                         0x00000006, /* EMC_TPD */
2569                         0x00000015, /* EMC_TFAW */
2570                         0x00000000, /* EMC_TRPAB */
2571                         0x0000000a, /* EMC_TCLKSTABLE */
2572                         0x0000000a, /* EMC_TCLKSTOP */
2573                         0x00001c28, /* EMC_TREFBW */
2574                         0x00000000, /* EMC_FBIO_CFG6 */
2575                         0x00000000, /* EMC_ODT_WRITE */
2576                         0x00000000, /* EMC_ODT_READ */
2577                         0x1040b898, /* EMC_FBIO_CFG5 */
2578                         0xe00400b1, /* EMC_CFG_DIG_DLL */
2579                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2580                         0x007f400a, /* EMC_DLL_XFORM_DQS0 */
2581                         0x007f400a, /* EMC_DLL_XFORM_DQS1 */
2582                         0x007f400a, /* EMC_DLL_XFORM_DQS2 */
2583                         0x007f400a, /* EMC_DLL_XFORM_DQS3 */
2584                         0x007f400a, /* EMC_DLL_XFORM_DQS4 */
2585                         0x007f400a, /* EMC_DLL_XFORM_DQS5 */
2586                         0x007f400a, /* EMC_DLL_XFORM_DQS6 */
2587                         0x007f400a, /* EMC_DLL_XFORM_DQS7 */
2588                         0x007f400a, /* EMC_DLL_XFORM_DQS8 */
2589                         0x007f400a, /* EMC_DLL_XFORM_DQS9 */
2590                         0x007f400a, /* EMC_DLL_XFORM_DQS10 */
2591                         0x007f400a, /* EMC_DLL_XFORM_DQS11 */
2592                         0x007f400a, /* EMC_DLL_XFORM_DQS12 */
2593                         0x007f400a, /* EMC_DLL_XFORM_DQS13 */
2594                         0x007f400a, /* EMC_DLL_XFORM_DQS14 */
2595                         0x007f400a, /* EMC_DLL_XFORM_DQS15 */
2596                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2597                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2598                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2599                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2600                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
2601                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
2602                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
2603                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
2604                         0x00028000, /* EMC_DLL_XFORM_ADDR0 */
2605                         0x00028000, /* EMC_DLL_XFORM_ADDR1 */
2606                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
2607                         0x00028000, /* EMC_DLL_XFORM_ADDR3 */
2608                         0x00028000, /* EMC_DLL_XFORM_ADDR4 */
2609                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
2610                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
2611                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
2612                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
2613                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
2614                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
2615                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
2616                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
2617                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
2618                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2619                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2620                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2621                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2622                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2623                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2624                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2625                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2626                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
2627                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
2628                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
2629                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
2630                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
2631                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
2632                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
2633                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
2634                         0x007f800d, /* EMC_DLL_XFORM_DQ0 */
2635                         0x007f800d, /* EMC_DLL_XFORM_DQ1 */
2636                         0x007f800d, /* EMC_DLL_XFORM_DQ2 */
2637                         0x007f800d, /* EMC_DLL_XFORM_DQ3 */
2638                         0x0007f80d, /* EMC_DLL_XFORM_DQ4 */
2639                         0x0007f80d, /* EMC_DLL_XFORM_DQ5 */
2640                         0x0007f80d, /* EMC_DLL_XFORM_DQ6 */
2641                         0x0007f80d, /* EMC_DLL_XFORM_DQ7 */
2642                         0x100002a0, /* EMC_XM2CMDPADCTRL */
2643                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
2644                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
2645                         0x0120113d, /* EMC_XM2DQSPADCTRL2 */
2646                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2647                         0x00000000, /* EMC_XM2DQPADCTRL3 */
2648                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
2649                         0x00000808, /* EMC_XM2CLKPADCTRL2 */
2650                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
2651                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
2652                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
2653                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
2654                         0x55555520, /* EMC_XM2DQSPADCTRL3 */
2655                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
2656                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
2657                         0x55555500, /* EMC_XM2DQSPADCTRL6 */
2658                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
2659                         0x00000000, /* EMC_TXDSRVTTGEN */
2660                         0x00000000, /* EMC_FBIO_SPARE */
2661                         0x00020000, /* EMC_ZCAL_INTERVAL */
2662                         0x00000128, /* EMC_ZCAL_WAIT_CNT */
2663                         0x00ce0010, /* EMC_MRS_WAIT_CNT */
2664                         0x00ce0010, /* EMC_MRS_WAIT_CNT2 */
2665                         0x00000000, /* EMC_CTT */
2666                         0x00000004, /* EMC_CTT_DURATION */
2667                         0x00004080, /* EMC_CFG_PIPE */
2668                         0x800037ea, /* EMC_DYN_SELF_REF_CONTROL */
2669                         0x00000011, /* EMC_QPOP */
2670                         0x0e00000d, /* MC_EMEM_ARB_CFG */
2671                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2672                         0x00000005, /* MC_EMEM_ARB_TIMING_RCD */
2673                         0x00000006, /* MC_EMEM_ARB_TIMING_RP */
2674                         0x00000015, /* MC_EMEM_ARB_TIMING_RC */
2675                         0x0000000e, /* MC_EMEM_ARB_TIMING_RAS */
2676                         0x0000000b, /* MC_EMEM_ARB_TIMING_FAW */
2677                         0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
2678                         0x00000004, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2679                         0x0000000e, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2680                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
2681                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
2682                         0x00000007, /* MC_EMEM_ARB_TIMING_R2W */
2683                         0x00000009, /* MC_EMEM_ARB_TIMING_W2R */
2684                         0x09070202, /* MC_EMEM_ARB_DA_TURNS */
2685                         0x001a1015, /* MC_EMEM_ARB_DA_COVERS */
2686                         0x734e2a16, /* MC_EMEM_ARB_MISC0 */
2687                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2688                 },
2689                 {
2690                         0x00000017, /* MC_MLL_MPCORER_PTSA_RATE */
2691                         0x000001bb, /* MC_PTSA_GRANT_DECREMENT */
2692                         0x006e0038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
2693                         0x006e0038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
2694                         0x006e003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
2695                         0x006e0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
2696                         0x006e0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
2697                         0x006e0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
2698                         0x006e0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
2699                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
2700                         0x006e0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
2701                         0x006e0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
2702                         0x006e0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
2703                         0x00080016, /* MC_LATENCY_ALLOWANCE_HC_0 */
2704                         0x0000006e, /* MC_LATENCY_ALLOWANCE_HC_1 */
2705                         0x006e0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
2706                         0x006e0019, /* MC_LATENCY_ALLOWANCE_GPU_0 */
2707                         0x006e0018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
2708                         0x006e0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
2709                         0x006e001b, /* MC_LATENCY_ALLOWANCE_VIC_0 */
2710                         0x0000006e, /* MC_LATENCY_ALLOWANCE_VI2_0 */
2711                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
2712                         0x006e006e, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
2713                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
2714                         0x006e006e, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
2715                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
2716                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
2717                         0x006e006e, /* MC_LATENCY_ALLOWANCE_VDE_2 */
2718                         0x006e006e, /* MC_LATENCY_ALLOWANCE_VDE_3 */
2719                         0x006e0065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
2720                         0x006e001c, /* MC_LATENCY_ALLOWANCE_AFI_0 */
2721                 },
2722                 0x0000004c, /* EMC_ZCAL_WAIT_CNT after clock change */
2723                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2724                 0x00000802, /* EMC_CTT_TERM_CTRL */
2725                 0x73300000, /* EMC_CFG */
2726                 0x0000089d, /* EMC_CFG_2 */
2727                 0x00040000, /* EMC_SEL_DPD_CTRL */
2728                 0xe0040069, /* EMC_CFG_DIG_DLL */
2729                 0x00000000, /* EMC_BGBIAS_CTL0 */
2730                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
2731                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
2732                 0xa1430606, /* EMC_AUTO_CAL_CONFIG */
2733                 0x80000f15, /* Mode Register 0 */
2734                 0x80100002, /* Mode Register 1 */
2735                 0x80200020, /* Mode Register 2 */
2736                 0x00000000, /* Mode Register 4 */
2737                 1180,       /* expected dvfs latency (ns) */
2738         },
2739         {
2740                 0x18,       /* V5.0.6 */
2741                 "06_1056000_01_V5.0.6_V0.8", /* DVFS table version */
2742                 1056000,    /* SDRAM frequency */
2743                 1100,       /* min voltage */
2744                 1100,       /* gpu min voltage */
2745                 "pllm_ud",  /* clock source id */
2746                 0x80000000, /* CLK_SOURCE_EMC */
2747                 164,        /* number of burst_regs */
2748                 31,         /* number of up_down_regs */
2749                 {
2750                         0x0000002f, /* EMC_RC */
2751                         0x00000111, /* EMC_RFC */
2752                         0x00000000, /* EMC_RFC_SLR */
2753                         0x00000021, /* EMC_RAS */
2754                         0x0000000c, /* EMC_RP */
2755                         0x0000000a, /* EMC_R2W */
2756                         0x00000011, /* EMC_W2R */
2757                         0x00000006, /* EMC_R2P */
2758                         0x00000019, /* EMC_W2P */
2759                         0x0000000c, /* EMC_RD_RCD */
2760                         0x0000000c, /* EMC_WR_RCD */
2761                         0x00000004, /* EMC_RRD */
2762                         0x00000002, /* EMC_REXT */
2763                         0x00000000, /* EMC_WEXT */
2764                         0x00000007, /* EMC_WDV */
2765                         0x00000007, /* EMC_WDV_MASK */
2766                         0x0000000e, /* EMC_QUSE */
2767                         0x00000002, /* EMC_QUSE_WIDTH */
2768                         0x00000000, /* EMC_IBDLY */
2769                         0x00000002, /* EMC_EINPUT */
2770                         0x00000010, /* EMC_EINPUT_DURATION */
2771                         0x000b0000, /* EMC_PUTERM_EXTRA */
2772                         0x00000004, /* EMC_PUTERM_WIDTH */
2773                         0x00000000, /* EMC_PUTERM_ADJ */
2774                         0x00000000, /* EMC_CDB_CNTL_1 */
2775                         0x00000000, /* EMC_CDB_CNTL_2 */
2776                         0x00000000, /* EMC_CDB_CNTL_3 */
2777                         0x00000001, /* EMC_QRST */
2778                         0x00000017, /* EMC_QSAFE */
2779                         0x0000001d, /* EMC_RDV */
2780                         0x0000001f, /* EMC_RDV_MASK */
2781                         0x00001fed, /* EMC_REFRESH */
2782                         0x00000000, /* EMC_BURST_REFRESH_NUM */
2783                         0x000007fb, /* EMC_PRE_REFRESH_REQ_CNT */
2784                         0x00000005, /* EMC_PDEX2WR */
2785                         0x00000018, /* EMC_PDEX2RD */
2786                         0x00000002, /* EMC_PCHG2PDEN */
2787                         0x00000000, /* EMC_ACT2PDEN */
2788                         0x00000106, /* EMC_AR2PDEN */
2789                         0x0000001e, /* EMC_RW2PDEN */
2790                         0x0000011e, /* EMC_TXSR */
2791                         0x00000200, /* EMC_TXSRDLL */
2792                         0x00000007, /* EMC_TCKE */
2793                         0x00000008, /* EMC_TCKESR */
2794                         0x00000007, /* EMC_TPD */
2795                         0x00000018, /* EMC_TFAW */
2796                         0x00000000, /* EMC_TRPAB */
2797                         0x0000000b, /* EMC_TCLKSTABLE */
2798                         0x0000000b, /* EMC_TCLKSTOP */
2799                         0x0000202d, /* EMC_TREFBW */
2800                         0x00000000, /* EMC_FBIO_CFG6 */
2801                         0x00000000, /* EMC_ODT_WRITE */
2802                         0x00000000, /* EMC_ODT_READ */
2803                         0x1040b898, /* EMC_FBIO_CFG5 */
2804                         0xe00400b1, /* EMC_CFG_DIG_DLL */
2805                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
2806                         0x00000002, /* EMC_DLL_XFORM_DQS0 */
2807                         0x00000002, /* EMC_DLL_XFORM_DQS1 */
2808                         0x00000002, /* EMC_DLL_XFORM_DQS2 */
2809                         0x00000002, /* EMC_DLL_XFORM_DQS3 */
2810                         0x00000002, /* EMC_DLL_XFORM_DQS4 */
2811                         0x00000002, /* EMC_DLL_XFORM_DQS5 */
2812                         0x00000002, /* EMC_DLL_XFORM_DQS6 */
2813                         0x00000002, /* EMC_DLL_XFORM_DQS7 */
2814                         0x00000002, /* EMC_DLL_XFORM_DQS8 */
2815                         0x00000002, /* EMC_DLL_XFORM_DQS9 */
2816                         0x00000002, /* EMC_DLL_XFORM_DQS10 */
2817                         0x00000002, /* EMC_DLL_XFORM_DQS11 */
2818                         0x00000002, /* EMC_DLL_XFORM_DQS12 */
2819                         0x00000002, /* EMC_DLL_XFORM_DQS13 */
2820                         0x00000002, /* EMC_DLL_XFORM_DQS14 */
2821                         0x00000002, /* EMC_DLL_XFORM_DQS15 */
2822                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
2823                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
2824                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
2825                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
2826                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
2827                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
2828                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
2829                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
2830                         0x0000000a, /* EMC_DLL_XFORM_ADDR0 */
2831                         0x0000000a, /* EMC_DLL_XFORM_ADDR1 */
2832                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
2833                         0x0000000a, /* EMC_DLL_XFORM_ADDR3 */
2834                         0x0000000a, /* EMC_DLL_XFORM_ADDR4 */
2835                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
2836                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
2837                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
2838                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
2839                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
2840                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
2841                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
2842                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
2843                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
2844                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
2845                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
2846                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
2847                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
2848                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
2849                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
2850                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
2851                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
2852                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
2853                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
2854                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
2855                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
2856                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
2857                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
2858                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
2859                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
2860                         0x0000000a, /* EMC_DLL_XFORM_DQ0 */
2861                         0x0000000a, /* EMC_DLL_XFORM_DQ1 */
2862                         0x0000000a, /* EMC_DLL_XFORM_DQ2 */
2863                         0x0000000a, /* EMC_DLL_XFORM_DQ3 */
2864                         0x0000000a, /* EMC_DLL_XFORM_DQ4 */
2865                         0x0000000a, /* EMC_DLL_XFORM_DQ5 */
2866                         0x0000000a, /* EMC_DLL_XFORM_DQ6 */
2867                         0x0000000a, /* EMC_DLL_XFORM_DQ7 */
2868                         0x100002a0, /* EMC_XM2CMDPADCTRL */
2869                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
2870                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
2871                         0x0120113d, /* EMC_XM2DQSPADCTRL2 */
2872                         0x00000000, /* EMC_XM2DQPADCTRL2 */
2873                         0x00000000, /* EMC_XM2DQPADCTRL3 */
2874                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
2875                         0x00000808, /* EMC_XM2CLKPADCTRL2 */
2876                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
2877                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
2878                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
2879                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
2880                         0x55555520, /* EMC_XM2DQSPADCTRL3 */
2881                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
2882                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
2883                         0x55555500, /* EMC_XM2DQSPADCTRL6 */
2884                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
2885                         0x00000000, /* EMC_TXDSRVTTGEN */
2886                         0x00000000, /* EMC_FBIO_SPARE */
2887                         0x00020000, /* EMC_ZCAL_INTERVAL */
2888                         0x00000152, /* EMC_ZCAL_WAIT_CNT */
2889                         0x00a30010, /* EMC_MRS_WAIT_CNT */
2890                         0x00a30010, /* EMC_MRS_WAIT_CNT2 */
2891                         0x0000000a, /* EMC_CTT */
2892                         0x00000004, /* EMC_CTT_DURATION */
2893                         0x00000000, /* EMC_CFG_PIPE */
2894                         0x80003fc1, /* EMC_DYN_SELF_REF_CONTROL */
2895                         0x00000012, /* EMC_QPOP */
2896                         0x0d00000f, /* MC_EMEM_ARB_CFG */
2897                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
2898                         0x00000005, /* MC_EMEM_ARB_TIMING_RCD */
2899                         0x00000006, /* MC_EMEM_ARB_TIMING_RP */
2900                         0x00000018, /* MC_EMEM_ARB_TIMING_RC */
2901                         0x00000010, /* MC_EMEM_ARB_TIMING_RAS */
2902                         0x0000000c, /* MC_EMEM_ARB_TIMING_FAW */
2903                         0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
2904                         0x00000004, /* MC_EMEM_ARB_TIMING_RAP2PRE */
2905                         0x0000000f, /* MC_EMEM_ARB_TIMING_WAP2PRE */
2906                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
2907                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
2908                         0x00000007, /* MC_EMEM_ARB_TIMING_R2W */
2909                         0x0000000a, /* MC_EMEM_ARB_TIMING_W2R */
2910                         0x0a070202, /* MC_EMEM_ARB_DA_TURNS */
2911                         0x001c1118, /* MC_EMEM_ARB_DA_COVERS */
2912                         0x73503019, /* MC_EMEM_ARB_MISC0 */
2913                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
2914                 },
2915                 {
2916                         0x0000001a, /* MC_MLL_MPCORER_PTSA_RATE */
2917                         0x000001fa, /* MC_PTSA_GRANT_DECREMENT */
2918                         0x00600038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
2919                         0x00600038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
2920                         0x0060003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
2921                         0x00600090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
2922                         0x00600041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
2923                         0x00600090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
2924                         0x00600041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
2925                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
2926                         0x00600080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
2927                         0x00600004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
2928                         0x00600004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
2929                         0x00080016, /* MC_LATENCY_ALLOWANCE_HC_0 */
2930                         0x00000060, /* MC_LATENCY_ALLOWANCE_HC_1 */
2931                         0x00600004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
2932                         0x00600019, /* MC_LATENCY_ALLOWANCE_GPU_0 */
2933                         0x00600018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
2934                         0x00600024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
2935                         0x0060001b, /* MC_LATENCY_ALLOWANCE_VIC_0 */
2936                         0x00000060, /* MC_LATENCY_ALLOWANCE_VI2_0 */
2937                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
2938                         0x00600060, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
2939                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
2940                         0x00600060, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
2941                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
2942                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
2943                         0x00600060, /* MC_LATENCY_ALLOWANCE_VDE_2 */
2944                         0x00600060, /* MC_LATENCY_ALLOWANCE_VDE_3 */
2945                         0x00600065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
2946                         0x0060001c, /* MC_LATENCY_ALLOWANCE_AFI_0 */
2947                 },
2948                 0x00000057, /* EMC_ZCAL_WAIT_CNT after clock change */
2949                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
2950                 0x00000802, /* EMC_CTT_TERM_CTRL */
2951                 0x73300000, /* EMC_CFG */
2952                 0x000008a5, /* EMC_CFG_2 */
2953                 0x00040000, /* EMC_SEL_DPD_CTRL */
2954                 0xe0040069, /* EMC_CFG_DIG_DLL */
2955                 0x00000000, /* EMC_BGBIAS_CTL0 */
2956                 0x06060606, /* EMC_AUTO_CAL_CONFIG2 */
2957                 0x00000606, /* EMC_AUTO_CAL_CONFIG3 */
2958                 0xa1430606, /* EMC_AUTO_CAL_CONFIG */
2959                 0x80000125, /* Mode Register 0 */
2960                 0x80100002, /* Mode Register 1 */
2961                 0x80200028, /* Mode Register 2 */
2962                 0x00000000, /* Mode Register 4 */
2963                 1180,       /* expected dvfs latency (ns) */
2964         },
2965 };
2966
2967 static struct tegra12_emc_table loki_b00_sku100_emc_table[] = {
2968         {
2969                 0x18,       /* V5.0.6 */
2970                 "01_12750_01_V5.0.6_V0.8", /* DVFS table version */
2971                 12750,      /* SDRAM frequency */
2972                 800,        /* min voltage */
2973                 800,        /* gpu min voltage */
2974                 "pllp_out0", /* clock source id */
2975                 0x4000003e, /* CLK_SOURCE_EMC */
2976                 164,        /* number of burst_regs */
2977                 31,         /* number of up_down_regs */
2978                 {
2979                         0x00000000, /* EMC_RC */
2980                         0x00000003, /* EMC_RFC */
2981                         0x00000000, /* EMC_RFC_SLR */
2982                         0x00000000, /* EMC_RAS */
2983                         0x00000000, /* EMC_RP */
2984                         0x00000003, /* EMC_R2W */
2985                         0x0000000a, /* EMC_W2R */
2986                         0x00000003, /* EMC_R2P */
2987                         0x0000000b, /* EMC_W2P */
2988                         0x00000000, /* EMC_RD_RCD */
2989                         0x00000000, /* EMC_WR_RCD */
2990                         0x00000003, /* EMC_RRD */
2991                         0x00000003, /* EMC_REXT */
2992                         0x00000000, /* EMC_WEXT */
2993                         0x00000005, /* EMC_WDV */
2994                         0x00000005, /* EMC_WDV_MASK */
2995                         0x00000005, /* EMC_QUSE */
2996                         0x00000000, /* EMC_QUSE_WIDTH */
2997                         0x00000000, /* EMC_IBDLY */
2998                         0x00000004, /* EMC_EINPUT */
2999                         0x00000004, /* EMC_EINPUT_DURATION */
3000                         0x00010000, /* EMC_PUTERM_EXTRA */
3001                         0x00000001, /* EMC_PUTERM_WIDTH */
3002                         0x00000000, /* EMC_PUTERM_ADJ */
3003                         0x00000000, /* EMC_CDB_CNTL_1 */
3004                         0x00000000, /* EMC_CDB_CNTL_2 */
3005                         0x00000000, /* EMC_CDB_CNTL_3 */
3006                         0x00000003, /* EMC_QRST */
3007                         0x0000000c, /* EMC_QSAFE */
3008                         0x0000000c, /* EMC_RDV */
3009                         0x0000000e, /* EMC_RDV_MASK */
3010                         0x00000060, /* EMC_REFRESH */
3011                         0x00000000, /* EMC_BURST_REFRESH_NUM */
3012                         0x00000018, /* EMC_PRE_REFRESH_REQ_CNT */
3013                         0x00000002, /* EMC_PDEX2WR */
3014                         0x00000002, /* EMC_PDEX2RD */
3015                         0x00000001, /* EMC_PCHG2PDEN */
3016                         0x00000000, /* EMC_ACT2PDEN */
3017                         0x00000007, /* EMC_AR2PDEN */
3018                         0x0000000f, /* EMC_RW2PDEN */
3019                         0x00000005, /* EMC_TXSR */
3020                         0x00000005, /* EMC_TXSRDLL */
3021                         0x00000004, /* EMC_TCKE */
3022                         0x00000005, /* EMC_TCKESR */
3023                         0x00000004, /* EMC_TPD */
3024                         0x00000000, /* EMC_TFAW */
3025                         0x00000000, /* EMC_TRPAB */
3026                         0x00000005, /* EMC_TCLKSTABLE */
3027                         0x00000005, /* EMC_TCLKSTOP */
3028                         0x00000064, /* EMC_TREFBW */
3029                         0x00000000, /* EMC_FBIO_CFG6 */
3030                         0x00000000, /* EMC_ODT_WRITE */
3031                         0x00000000, /* EMC_ODT_READ */
3032                         0x10604098, /* EMC_FBIO_CFG5 */
3033                         0x002c00a0, /* EMC_CFG_DIG_DLL */
3034                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
3035                         0x00078000, /* EMC_DLL_XFORM_DQS0 */
3036                         0x00078000, /* EMC_DLL_XFORM_DQS1 */
3037                         0x00078000, /* EMC_DLL_XFORM_DQS2 */
3038                         0x00078000, /* EMC_DLL_XFORM_DQS3 */
3039                         0x00078000, /* EMC_DLL_XFORM_DQS4 */
3040                         0x00078000, /* EMC_DLL_XFORM_DQS5 */
3041                         0x00078000, /* EMC_DLL_XFORM_DQS6 */
3042                         0x00078000, /* EMC_DLL_XFORM_DQS7 */
3043                         0x00078000, /* EMC_DLL_XFORM_DQS8 */
3044                         0x00078000, /* EMC_DLL_XFORM_DQS9 */
3045                         0x00078000, /* EMC_DLL_XFORM_DQS10 */
3046                         0x00078000, /* EMC_DLL_XFORM_DQS11 */
3047                         0x00078000, /* EMC_DLL_XFORM_DQS12 */
3048                         0x00078000, /* EMC_DLL_XFORM_DQS13 */
3049                         0x00078000, /* EMC_DLL_XFORM_DQS14 */
3050                         0x00078000, /* EMC_DLL_XFORM_DQS15 */
3051                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
3052                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
3053                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
3054                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
3055                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
3056                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
3057                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
3058                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
3059                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
3060                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
3061                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
3062                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
3063                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
3064                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
3065                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
3066                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
3067                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
3068                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
3069                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
3070                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
3071                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
3072                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
3073                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
3074                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
3075                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
3076                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
3077                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
3078                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
3079                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
3080                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
3081                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
3082                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
3083                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
3084                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
3085                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
3086                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
3087                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
3088                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
3089                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
3090                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
3091                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
3092                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
3093                         0x00008000, /* EMC_DLL_XFORM_DQ4 */
3094                         0x00008000, /* EMC_DLL_XFORM_DQ5 */
3095                         0x00008000, /* EMC_DLL_XFORM_DQ6 */
3096                         0x00008000, /* EMC_DLL_XFORM_DQ7 */
3097                         0x10000280, /* EMC_XM2CMDPADCTRL */
3098                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
3099                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
3100                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
3101                         0x00000000, /* EMC_XM2DQPADCTRL2 */
3102                         0x00000000, /* EMC_XM2DQPADCTRL3 */
3103                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
3104                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
3105                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
3106                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
3107                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
3108                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
3109                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
3110                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
3111                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
3112                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
3113                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
3114                         0x00000007, /* EMC_TXDSRVTTGEN */
3115                         0x00000000, /* EMC_FBIO_SPARE */
3116                         0x00000000, /* EMC_ZCAL_INTERVAL */
3117                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
3118                         0x000f000f, /* EMC_MRS_WAIT_CNT */
3119                         0x000f000f, /* EMC_MRS_WAIT_CNT2 */
3120                         0x00000000, /* EMC_CTT */
3121                         0x00000001, /* EMC_CTT_DURATION */
3122                         0x0000f3f3, /* EMC_CFG_PIPE */
3123                         0x800001c5, /* EMC_DYN_SELF_REF_CONTROL */
3124                         0x00000009, /* EMC_QPOP */
3125                         0x40040001, /* MC_EMEM_ARB_CFG */
3126                         0x8000000a, /* MC_EMEM_ARB_OUTSTANDING_REQ */
3127                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
3128                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
3129                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
3130                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
3131                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
3132                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
3133                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
3134                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
3135                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
3136                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
3137                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
3138                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
3139                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
3140                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
3141                         0x77e30303, /* MC_EMEM_ARB_MISC0 */
3142                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
3143                 },
3144                 {
3145                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
3146                         0x00000007, /* MC_PTSA_GRANT_DECREMENT */
3147                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
3148                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
3149                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
3150                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
3151                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
3152                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
3153                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
3154                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
3155                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
3156                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
3157                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
3158                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
3159                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
3160                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
3161                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
3162                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
3163                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
3164                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
3165                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
3166                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
3167                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
3168                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
3169                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
3170                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
3171                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_1 */
3172                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
3173                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
3174                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
3175                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
3176                 },
3177                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
3178                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
3179                 0x00000802, /* EMC_CTT_TERM_CTRL */
3180                 0x73240000, /* EMC_CFG */
3181                 0x000008c5, /* EMC_CFG_2 */
3182                 0x00040128, /* EMC_SEL_DPD_CTRL */
3183                 0x002c0068, /* EMC_CFG_DIG_DLL */
3184                 0x00000008, /* EMC_BGBIAS_CTL0 */
3185                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
3186                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
3187                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
3188                 0x80001221, /* Mode Register 0 */
3189                 0x80100003, /* Mode Register 1 */
3190                 0x80200008, /* Mode Register 2 */
3191                 0x00000000, /* Mode Register 4 */
3192                 57820,      /* expected dvfs latency (ns) */
3193         },
3194         {
3195                 0x18,       /* V5.0.6 */
3196                 "01_20400_01_V5.0.6_V0.8", /* DVFS table version */
3197                 20400,      /* SDRAM frequency */
3198                 800,        /* min voltage */
3199                 800,        /* gpu min voltage */
3200                 "pllp_out0", /* clock source id */
3201                 0x40000026, /* CLK_SOURCE_EMC */
3202                 164,        /* number of burst_regs */
3203                 31,         /* number of up_down_regs */
3204                 {
3205                         0x00000000, /* EMC_RC */
3206                         0x00000005, /* EMC_RFC */
3207                         0x00000000, /* EMC_RFC_SLR */
3208                         0x00000000, /* EMC_RAS */
3209                         0x00000000, /* EMC_RP */
3210                         0x00000003, /* EMC_R2W */
3211                         0x0000000a, /* EMC_W2R */
3212                         0x00000003, /* EMC_R2P */
3213                         0x0000000b, /* EMC_W2P */
3214                         0x00000000, /* EMC_RD_RCD */
3215                         0x00000000, /* EMC_WR_RCD */
3216                         0x00000003, /* EMC_RRD */
3217                         0x00000003, /* EMC_REXT */
3218                         0x00000000, /* EMC_WEXT */
3219                         0x00000005, /* EMC_WDV */
3220                         0x00000005, /* EMC_WDV_MASK */
3221                         0x00000005, /* EMC_QUSE */
3222                         0x00000000, /* EMC_QUSE_WIDTH */
3223                         0x00000000, /* EMC_IBDLY */
3224                         0x00000004, /* EMC_EINPUT */
3225                         0x00000004, /* EMC_EINPUT_DURATION */
3226                         0x00010000, /* EMC_PUTERM_EXTRA */
3227                         0x00000001, /* EMC_PUTERM_WIDTH */
3228                         0x00000000, /* EMC_PUTERM_ADJ */
3229                         0x00000000, /* EMC_CDB_CNTL_1 */
3230                         0x00000000, /* EMC_CDB_CNTL_2 */
3231                         0x00000000, /* EMC_CDB_CNTL_3 */
3232                         0x00000003, /* EMC_QRST */
3233                         0x0000000c, /* EMC_QSAFE */
3234                         0x0000000c, /* EMC_RDV */
3235                         0x0000000e, /* EMC_RDV_MASK */
3236                         0x0000009a, /* EMC_REFRESH */
3237                         0x00000000, /* EMC_BURST_REFRESH_NUM */
3238                         0x00000026, /* EMC_PRE_REFRESH_REQ_CNT */
3239                         0x00000002, /* EMC_PDEX2WR */
3240                         0x00000002, /* EMC_PDEX2RD */
3241                         0x00000001, /* EMC_PCHG2PDEN */
3242                         0x00000000, /* EMC_ACT2PDEN */
3243                         0x00000007, /* EMC_AR2PDEN */
3244                         0x0000000f, /* EMC_RW2PDEN */
3245                         0x00000006, /* EMC_TXSR */
3246                         0x00000006, /* EMC_TXSRDLL */
3247                         0x00000004, /* EMC_TCKE */
3248                         0x00000005, /* EMC_TCKESR */
3249                         0x00000004, /* EMC_TPD */
3250                         0x00000000, /* EMC_TFAW */
3251                         0x00000000, /* EMC_TRPAB */
3252                         0x00000005, /* EMC_TCLKSTABLE */
3253                         0x00000005, /* EMC_TCLKSTOP */
3254                         0x000000a0, /* EMC_TREFBW */
3255                         0x00000000, /* EMC_FBIO_CFG6 */
3256                         0x00000000, /* EMC_ODT_WRITE */
3257                         0x00000000, /* EMC_ODT_READ */
3258                         0x10604098, /* EMC_FBIO_CFG5 */
3259                         0x002c00a0, /* EMC_CFG_DIG_DLL */
3260                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
3261                         0x00078000, /* EMC_DLL_XFORM_DQS0 */
3262                         0x00078000, /* EMC_DLL_XFORM_DQS1 */
3263                         0x00078000, /* EMC_DLL_XFORM_DQS2 */
3264                         0x00078000, /* EMC_DLL_XFORM_DQS3 */
3265                         0x00078000, /* EMC_DLL_XFORM_DQS4 */
3266                         0x00078000, /* EMC_DLL_XFORM_DQS5 */
3267                         0x00078000, /* EMC_DLL_XFORM_DQS6 */
3268                         0x00078000, /* EMC_DLL_XFORM_DQS7 */
3269                         0x00078000, /* EMC_DLL_XFORM_DQS8 */
3270                         0x00078000, /* EMC_DLL_XFORM_DQS9 */
3271                         0x00078000, /* EMC_DLL_XFORM_DQS10 */
3272                         0x00078000, /* EMC_DLL_XFORM_DQS11 */
3273                         0x00078000, /* EMC_DLL_XFORM_DQS12 */
3274                         0x00078000, /* EMC_DLL_XFORM_DQS13 */
3275                         0x00078000, /* EMC_DLL_XFORM_DQS14 */
3276                         0x00078000, /* EMC_DLL_XFORM_DQS15 */
3277                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
3278                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
3279                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
3280                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
3281                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
3282                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
3283                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
3284                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
3285                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
3286                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
3287                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
3288                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
3289                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
3290                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
3291                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
3292                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
3293                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
3294                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
3295                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
3296                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
3297                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
3298                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
3299                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
3300                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
3301                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
3302                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
3303                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
3304                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
3305                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
3306                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
3307                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
3308                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
3309                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
3310                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
3311                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
3312                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
3313                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
3314                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
3315                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
3316                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
3317                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
3318                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
3319                         0x00008000, /* EMC_DLL_XFORM_DQ4 */
3320                         0x00008000, /* EMC_DLL_XFORM_DQ5 */
3321                         0x00008000, /* EMC_DLL_XFORM_DQ6 */
3322                         0x00008000, /* EMC_DLL_XFORM_DQ7 */
3323                         0x10000280, /* EMC_XM2CMDPADCTRL */
3324                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
3325                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
3326                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
3327                         0x00000000, /* EMC_XM2DQPADCTRL2 */
3328                         0x00000000, /* EMC_XM2DQPADCTRL3 */
3329                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
3330                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
3331                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
3332                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
3333                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
3334                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
3335                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
3336                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
3337                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
3338                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
3339                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
3340                         0x0000000b, /* EMC_TXDSRVTTGEN */
3341                         0x00000000, /* EMC_FBIO_SPARE */
3342                         0x00000000, /* EMC_ZCAL_INTERVAL */
3343                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
3344                         0x000f000f, /* EMC_MRS_WAIT_CNT */
3345                         0x000f000f, /* EMC_MRS_WAIT_CNT2 */
3346                         0x00000000, /* EMC_CTT */
3347                         0x00000001, /* EMC_CTT_DURATION */
3348                         0x0000f3f3, /* EMC_CFG_PIPE */
3349                         0x8000023a, /* EMC_DYN_SELF_REF_CONTROL */
3350                         0x00000009, /* EMC_QPOP */
3351                         0x40020001, /* MC_EMEM_ARB_CFG */
3352                         0x80000012, /* MC_EMEM_ARB_OUTSTANDING_REQ */
3353                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
3354                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
3355                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
3356                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
3357                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
3358                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
3359                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
3360                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
3361                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
3362                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
3363                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
3364                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
3365                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
3366                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
3367                         0x76230303, /* MC_EMEM_ARB_MISC0 */
3368                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
3369                 },
3370                 {
3371                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
3372                         0x0000000a, /* MC_PTSA_GRANT_DECREMENT */
3373                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
3374                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
3375                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
3376                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
3377                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
3378                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
3379                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
3380                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
3381                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
3382                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
3383                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
3384                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
3385                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
3386                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
3387                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
3388                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
3389                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
3390                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
3391                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
3392                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
3393                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
3394                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
3395                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
3396                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
3397                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_1 */
3398                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
3399                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
3400                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
3401                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
3402                 },
3403                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
3404                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
3405                 0x00000802, /* EMC_CTT_TERM_CTRL */
3406                 0x73240000, /* EMC_CFG */
3407                 0x000008c5, /* EMC_CFG_2 */
3408                 0x00040128, /* EMC_SEL_DPD_CTRL */
3409                 0x002c0068, /* EMC_CFG_DIG_DLL */
3410                 0x00000008, /* EMC_BGBIAS_CTL0 */
3411                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
3412                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
3413                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
3414                 0x80001221, /* Mode Register 0 */
3415                 0x80100003, /* Mode Register 1 */
3416                 0x80200008, /* Mode Register 2 */
3417                 0x00000000, /* Mode Register 4 */
3418                 35610,      /* expected dvfs latency (ns) */
3419         },
3420         {
3421                 0x18,       /* V5.0.6 */
3422                 "01_40800_01_V5.0.6_V0.8", /* DVFS table version */
3423                 40800,      /* SDRAM frequency */
3424                 800,        /* min voltage */
3425                 800,        /* gpu min voltage */
3426                 "pllp_out0", /* clock source id */
3427                 0x40000012, /* CLK_SOURCE_EMC */
3428                 164,        /* number of burst_regs */
3429                 31,         /* number of up_down_regs */
3430                 {
3431                         0x00000001, /* EMC_RC */
3432                         0x0000000a, /* EMC_RFC */
3433                         0x00000000, /* EMC_RFC_SLR */
3434                         0x00000001, /* EMC_RAS */
3435                         0x00000000, /* EMC_RP */
3436                         0x00000003, /* EMC_R2W */
3437                         0x0000000a, /* EMC_W2R */
3438                         0x00000003, /* EMC_R2P */
3439                         0x0000000b, /* EMC_W2P */
3440                         0x00000000, /* EMC_RD_RCD */
3441                         0x00000000, /* EMC_WR_RCD */
3442                         0x00000003, /* EMC_RRD */
3443                         0x00000003, /* EMC_REXT */
3444                         0x00000000, /* EMC_WEXT */
3445                         0x00000005, /* EMC_WDV */
3446                         0x00000005, /* EMC_WDV_MASK */
3447                         0x00000005, /* EMC_QUSE */
3448                         0x00000000, /* EMC_QUSE_WIDTH */
3449                         0x00000000, /* EMC_IBDLY */
3450                         0x00000004, /* EMC_EINPUT */
3451                         0x00000004, /* EMC_EINPUT_DURATION */
3452                         0x00010000, /* EMC_PUTERM_EXTRA */
3453                         0x00000001, /* EMC_PUTERM_WIDTH */
3454                         0x00000000, /* EMC_PUTERM_ADJ */
3455                         0x00000000, /* EMC_CDB_CNTL_1 */
3456                         0x00000000, /* EMC_CDB_CNTL_2 */
3457                         0x00000000, /* EMC_CDB_CNTL_3 */
3458                         0x00000003, /* EMC_QRST */
3459                         0x0000000c, /* EMC_QSAFE */
3460                         0x0000000c, /* EMC_RDV */
3461                         0x0000000e, /* EMC_RDV_MASK */
3462                         0x00000134, /* EMC_REFRESH */
3463                         0x00000000, /* EMC_BURST_REFRESH_NUM */
3464                         0x0000004d, /* EMC_PRE_REFRESH_REQ_CNT */
3465                         0x00000002, /* EMC_PDEX2WR */
3466                         0x00000002, /* EMC_PDEX2RD */
3467                         0x00000001, /* EMC_PCHG2PDEN */
3468                         0x00000000, /* EMC_ACT2PDEN */
3469                         0x00000008, /* EMC_AR2PDEN */
3470                         0x0000000f, /* EMC_RW2PDEN */
3471                         0x0000000c, /* EMC_TXSR */
3472                         0x0000000c, /* EMC_TXSRDLL */
3473                         0x00000004, /* EMC_TCKE */
3474                         0x00000005, /* EMC_TCKESR */
3475                         0x00000004, /* EMC_TPD */
3476                         0x00000000, /* EMC_TFAW */
3477                         0x00000000, /* EMC_TRPAB */
3478                         0x00000005, /* EMC_TCLKSTABLE */
3479                         0x00000005, /* EMC_TCLKSTOP */
3480                         0x0000013f, /* EMC_TREFBW */
3481                         0x00000000, /* EMC_FBIO_CFG6 */
3482                         0x00000000, /* EMC_ODT_WRITE */
3483                         0x00000000, /* EMC_ODT_READ */
3484                         0x10604098, /* EMC_FBIO_CFG5 */
3485                         0x002c00a0, /* EMC_CFG_DIG_DLL */
3486                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
3487                         0x00078000, /* EMC_DLL_XFORM_DQS0 */
3488                         0x00078000, /* EMC_DLL_XFORM_DQS1 */
3489                         0x00078000, /* EMC_DLL_XFORM_DQS2 */
3490                         0x00078000, /* EMC_DLL_XFORM_DQS3 */
3491                         0x00078000, /* EMC_DLL_XFORM_DQS4 */
3492                         0x00078000, /* EMC_DLL_XFORM_DQS5 */
3493                         0x00078000, /* EMC_DLL_XFORM_DQS6 */
3494                         0x00078000, /* EMC_DLL_XFORM_DQS7 */
3495                         0x00078000, /* EMC_DLL_XFORM_DQS8 */
3496                         0x00078000, /* EMC_DLL_XFORM_DQS9 */
3497                         0x00078000, /* EMC_DLL_XFORM_DQS10 */
3498                         0x00078000, /* EMC_DLL_XFORM_DQS11 */
3499                         0x00078000, /* EMC_DLL_XFORM_DQS12 */
3500                         0x00078000, /* EMC_DLL_XFORM_DQS13 */
3501                         0x00078000, /* EMC_DLL_XFORM_DQS14 */
3502                         0x00078000, /* EMC_DLL_XFORM_DQS15 */
3503                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
3504                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
3505                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
3506                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
3507                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
3508                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
3509                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
3510                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
3511                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
3512                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
3513                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
3514                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
3515                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
3516                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
3517                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
3518                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
3519                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
3520                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
3521                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
3522                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
3523                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
3524                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
3525                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
3526                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
3527                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
3528                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
3529                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
3530                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
3531                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
3532                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
3533                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
3534                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
3535                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
3536                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
3537                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
3538                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
3539                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
3540                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
3541                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
3542                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
3543                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
3544                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
3545                         0x00008000, /* EMC_DLL_XFORM_DQ4 */
3546                         0x00008000, /* EMC_DLL_XFORM_DQ5 */
3547                         0x00008000, /* EMC_DLL_XFORM_DQ6 */
3548                         0x00008000, /* EMC_DLL_XFORM_DQ7 */
3549                         0x10000280, /* EMC_XM2CMDPADCTRL */
3550                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
3551                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
3552                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
3553                         0x00000000, /* EMC_XM2DQPADCTRL2 */
3554                         0x00000000, /* EMC_XM2DQPADCTRL3 */
3555                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
3556                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
3557                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
3558                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
3559                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
3560                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
3561                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
3562                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
3563                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
3564                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
3565                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
3566                         0x00000015, /* EMC_TXDSRVTTGEN */
3567                         0x00000000, /* EMC_FBIO_SPARE */
3568                         0x00000000, /* EMC_ZCAL_INTERVAL */
3569                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
3570                         0x000f000f, /* EMC_MRS_WAIT_CNT */
3571                         0x000f000f, /* EMC_MRS_WAIT_CNT2 */
3572                         0x00000000, /* EMC_CTT */
3573                         0x00000001, /* EMC_CTT_DURATION */
3574                         0x0000f3f3, /* EMC_CFG_PIPE */
3575                         0x80000370, /* EMC_DYN_SELF_REF_CONTROL */
3576                         0x00000009, /* EMC_QPOP */
3577                         0xa0000001, /* MC_EMEM_ARB_CFG */
3578                         0x80000017, /* MC_EMEM_ARB_OUTSTANDING_REQ */
3579                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
3580                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
3581                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
3582                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
3583                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
3584                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
3585                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
3586                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
3587                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
3588                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
3589                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
3590                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
3591                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
3592                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
3593                         0x74a30303, /* MC_EMEM_ARB_MISC0 */
3594                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
3595                 },
3596                 {
3597                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
3598                         0x00000014, /* MC_PTSA_GRANT_DECREMENT */
3599                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
3600                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
3601                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
3602                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
3603                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
3604                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
3605                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
3606                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
3607                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
3608                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
3609                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
3610                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
3611                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
3612                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
3613                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
3614                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
3615                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
3616                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
3617                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
3618                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
3619                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
3620                         0x000000ff, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
3621                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
3622                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
3623                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_1 */
3624                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
3625                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
3626                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
3627                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
3628                 },
3629                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
3630                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
3631                 0x00000802, /* EMC_CTT_TERM_CTRL */
3632                 0x73240000, /* EMC_CFG */
3633                 0x000008c5, /* EMC_CFG_2 */
3634                 0x00040128, /* EMC_SEL_DPD_CTRL */
3635                 0x002c0068, /* EMC_CFG_DIG_DLL */
3636                 0x00000008, /* EMC_BGBIAS_CTL0 */
3637                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
3638                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
3639                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
3640                 0x80001221, /* Mode Register 0 */
3641                 0x80100003, /* Mode Register 1 */
3642                 0x80200008, /* Mode Register 2 */
3643                 0x00000000, /* Mode Register 4 */
3644                 20850,      /* expected dvfs latency (ns) */
3645         },
3646         {
3647                 0x18,       /* V5.0.6 */
3648                 "01_68000_01_V5.0.6_V0.8", /* DVFS table version */
3649                 68000,      /* SDRAM frequency */
3650                 800,        /* min voltage */
3651                 800,        /* gpu min voltage */
3652                 "pllp_out0", /* clock source id */
3653                 0x4000000a, /* CLK_SOURCE_EMC */
3654                 164,        /* number of burst_regs */
3655                 31,         /* number of up_down_regs */
3656                 {
3657                         0x00000003, /* EMC_RC */
3658                         0x00000011, /* EMC_RFC */
3659                         0x00000000, /* EMC_RFC_SLR */
3660                         0x00000002, /* EMC_RAS */
3661                         0x00000000, /* EMC_RP */
3662                         0x00000003, /* EMC_R2W */
3663                         0x0000000a, /* EMC_W2R */
3664                         0x00000003, /* EMC_R2P */
3665                         0x0000000b, /* EMC_W2P */
3666                         0x00000000, /* EMC_RD_RCD */
3667                         0x00000000, /* EMC_WR_RCD */
3668                         0x00000003, /* EMC_RRD */
3669                         0x00000003, /* EMC_REXT */
3670                         0x00000000, /* EMC_WEXT */
3671                         0x00000005, /* EMC_WDV */
3672                         0x00000005, /* EMC_WDV_MASK */
3673                         0x00000005, /* EMC_QUSE */
3674                         0x00000000, /* EMC_QUSE_WIDTH */
3675                         0x00000000, /* EMC_IBDLY */
3676                         0x00000004, /* EMC_EINPUT */
3677                         0x00000004, /* EMC_EINPUT_DURATION */
3678                         0x00010000, /* EMC_PUTERM_EXTRA */
3679                         0x00000001, /* EMC_PUTERM_WIDTH */
3680                         0x00000000, /* EMC_PUTERM_ADJ */
3681                         0x00000000, /* EMC_CDB_CNTL_1 */
3682                         0x00000000, /* EMC_CDB_CNTL_2 */
3683                         0x00000000, /* EMC_CDB_CNTL_3 */
3684                         0x00000003, /* EMC_QRST */
3685                         0x0000000c, /* EMC_QSAFE */
3686                         0x0000000c, /* EMC_RDV */
3687                         0x0000000e, /* EMC_RDV_MASK */
3688                         0x00000202, /* EMC_REFRESH */
3689                         0x00000000, /* EMC_BURST_REFRESH_NUM */
3690                         0x00000080, /* EMC_PRE_REFRESH_REQ_CNT */
3691                         0x00000002, /* EMC_PDEX2WR */
3692                         0x00000002, /* EMC_PDEX2RD */
3693                         0x00000001, /* EMC_PCHG2PDEN */
3694                         0x00000000, /* EMC_ACT2PDEN */
3695                         0x0000000f, /* EMC_AR2PDEN */
3696                         0x0000000f, /* EMC_RW2PDEN */
3697                         0x00000013, /* EMC_TXSR */
3698                         0x00000013, /* EMC_TXSRDLL */
3699                         0x00000004, /* EMC_TCKE */
3700                         0x00000005, /* EMC_TCKESR */
3701                         0x00000004, /* EMC_TPD */
3702                         0x00000000, /* EMC_TFAW */
3703                         0x00000000, /* EMC_TRPAB */
3704                         0x00000005, /* EMC_TCLKSTABLE */
3705                         0x00000005, /* EMC_TCLKSTOP */
3706                         0x00000213, /* EMC_TREFBW */
3707                         0x00000002, /* EMC_FBIO_CFG6 */
3708                         0x00000000, /* EMC_ODT_WRITE */
3709                         0x00000000, /* EMC_ODT_READ */
3710                         0x10604098, /* EMC_FBIO_CFG5 */
3711                         0x002c00a0, /* EMC_CFG_DIG_DLL */
3712                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
3713                         0x00078000, /* EMC_DLL_XFORM_DQS0 */
3714                         0x00078000, /* EMC_DLL_XFORM_DQS1 */
3715                         0x00078000, /* EMC_DLL_XFORM_DQS2 */
3716                         0x00078000, /* EMC_DLL_XFORM_DQS3 */
3717                         0x00078000, /* EMC_DLL_XFORM_DQS4 */
3718                         0x00078000, /* EMC_DLL_XFORM_DQS5 */
3719                         0x00078000, /* EMC_DLL_XFORM_DQS6 */
3720                         0x00078000, /* EMC_DLL_XFORM_DQS7 */
3721                         0x00078000, /* EMC_DLL_XFORM_DQS8 */
3722                         0x00078000, /* EMC_DLL_XFORM_DQS9 */
3723                         0x00078000, /* EMC_DLL_XFORM_DQS10 */
3724                         0x00078000, /* EMC_DLL_XFORM_DQS11 */
3725                         0x00078000, /* EMC_DLL_XFORM_DQS12 */
3726                         0x00078000, /* EMC_DLL_XFORM_DQS13 */
3727                         0x00078000, /* EMC_DLL_XFORM_DQS14 */
3728                         0x00078000, /* EMC_DLL_XFORM_DQS15 */
3729                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
3730                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
3731                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
3732                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
3733                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
3734                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
3735                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
3736                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
3737                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
3738                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
3739                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
3740                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
3741                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
3742                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
3743                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
3744                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
3745                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
3746                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
3747                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
3748                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
3749                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
3750                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
3751                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
3752                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
3753                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
3754                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
3755                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
3756                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
3757                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
3758                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
3759                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
3760                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
3761                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
3762                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
3763                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
3764                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
3765                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
3766                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
3767                         0x00080000, /* EMC_DLL_XFORM_DQ0 */
3768                         0x00080000, /* EMC_DLL_XFORM_DQ1 */
3769                         0x00080000, /* EMC_DLL_XFORM_DQ2 */
3770                         0x00080000, /* EMC_DLL_XFORM_DQ3 */
3771                         0x00008000, /* EMC_DLL_XFORM_DQ4 */
3772                         0x00008000, /* EMC_DLL_XFORM_DQ5 */
3773                         0x00008000, /* EMC_DLL_XFORM_DQ6 */
3774                         0x00008000, /* EMC_DLL_XFORM_DQ7 */
3775                         0x10000280, /* EMC_XM2CMDPADCTRL */
3776                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
3777                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
3778                         0x0030a118, /* EMC_XM2DQSPADCTRL2 */
3779                         0x00000000, /* EMC_XM2DQPADCTRL2 */
3780                         0x00000000, /* EMC_XM2DQPADCTRL3 */
3781                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
3782                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
3783                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
3784                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
3785                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
3786                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
3787                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
3788                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
3789                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
3790                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
3791                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
3792                         0x00000022, /* EMC_TXDSRVTTGEN */
3793                         0x00000000, /* EMC_FBIO_SPARE */
3794                         0x00000000, /* EMC_ZCAL_INTERVAL */
3795                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
3796                         0x000f000f, /* EMC_MRS_WAIT_CNT */
3797                         0x000f000f, /* EMC_MRS_WAIT_CNT2 */
3798                         0x00000000, /* EMC_CTT */
3799                         0x00000001, /* EMC_CTT_DURATION */
3800                         0x0000f3f3, /* EMC_CFG_PIPE */
3801                         0x8000050e, /* EMC_DYN_SELF_REF_CONTROL */
3802                         0x00000009, /* EMC_QPOP */
3803                         0x00000001, /* MC_EMEM_ARB_CFG */
3804                         0x8000001e, /* MC_EMEM_ARB_OUTSTANDING_REQ */
3805                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
3806                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
3807                         0x00000002, /* MC_EMEM_ARB_TIMING_RC */
3808                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
3809                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
3810                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
3811                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
3812                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
3813                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
3814                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
3815                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
3816                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
3817                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
3818                         0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
3819                         0x74230403, /* MC_EMEM_ARB_MISC0 */
3820                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
3821                 },
3822                 {
3823                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
3824                         0x00000021, /* MC_PTSA_GRANT_DECREMENT */
3825                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
3826                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
3827                         0x00ff00b0, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
3828                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
3829                         0x00ff00ec, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
3830                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
3831                         0x00ff00ec, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
3832                         0x00e90049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
3833                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
3834                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
3835                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
3836                         0x000800ff, /* MC_LATENCY_ALLOWANCE_HC_0 */
3837                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
3838                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
3839                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_GPU_0 */
3840                         0x00ff00a3, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
3841                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
3842                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VIC_0 */
3843                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
3844                         0x000000ef, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
3845                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
3846                         0x000000ef, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
3847                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
3848                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
3849                         0x00ee00ef, /* MC_LATENCY_ALLOWANCE_VDE_1 */
3850                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
3851                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
3852                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
3853                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_AFI_0 */
3854                 },
3855                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
3856                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
3857                 0x00000802, /* EMC_CTT_TERM_CTRL */
3858                 0x73240000, /* EMC_CFG */
3859                 0x000008c5, /* EMC_CFG_2 */
3860                 0x00040128, /* EMC_SEL_DPD_CTRL */
3861                 0x002c0068, /* EMC_CFG_DIG_DLL */
3862                 0x00000008, /* EMC_BGBIAS_CTL0 */
3863                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
3864                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
3865                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
3866                 0x80001221, /* Mode Register 0 */
3867                 0x80100003, /* Mode Register 1 */
3868                 0x80200008, /* Mode Register 2 */
3869                 0x00000000, /* Mode Register 4 */
3870                 10720,      /* expected dvfs latency (ns) */
3871         },
3872         {
3873                 0x18,       /* V5.0.6 */
3874                 "01_102000_01_V5.0.6_V0.8", /* DVFS table version */
3875                 102000,     /* SDRAM frequency */
3876                 800,        /* min voltage */
3877                 800,        /* gpu min voltage */
3878                 "pllp_out0", /* clock source id */
3879                 0x40000006, /* CLK_SOURCE_EMC */
3880                 164,        /* number of burst_regs */
3881                 31,         /* number of up_down_regs */
3882                 {
3883                         0x00000004, /* EMC_RC */
3884                         0x0000001a, /* EMC_RFC */
3885                         0x00000000, /* EMC_RFC_SLR */
3886                         0x00000003, /* EMC_RAS */
3887                         0x00000001, /* EMC_RP */
3888                         0x00000003, /* EMC_R2W */
3889                         0x0000000a, /* EMC_W2R */
3890                         0x00000003, /* EMC_R2P */
3891                         0x0000000b, /* EMC_W2P */
3892                         0x00000001, /* EMC_RD_RCD */
3893                         0x00000001, /* EMC_WR_RCD */
3894                         0x00000003, /* EMC_RRD */
3895                         0x00000003, /* EMC_REXT */
3896                         0x00000000, /* EMC_WEXT */
3897                         0x00000005, /* EMC_WDV */
3898                         0x00000005, /* EMC_WDV_MASK */
3899                         0x00000005, /* EMC_QUSE */
3900                         0x00000000, /* EMC_QUSE_WIDTH */
3901                         0x00000000, /* EMC_IBDLY */
3902                         0x00000004, /* EMC_EINPUT */
3903                         0x00000004, /* EMC_EINPUT_DURATION */
3904                         0x00010000, /* EMC_PUTERM_EXTRA */
3905                         0x00000001, /* EMC_PUTERM_WIDTH */
3906                         0x00000000, /* EMC_PUTERM_ADJ */
3907                         0x00000000, /* EMC_CDB_CNTL_1 */
3908                         0x00000000, /* EMC_CDB_CNTL_2 */
3909                         0x00000000, /* EMC_CDB_CNTL_3 */
3910                         0x00000003, /* EMC_QRST */
3911                         0x0000000c, /* EMC_QSAFE */
3912                         0x0000000c, /* EMC_RDV */
3913                         0x0000000e, /* EMC_RDV_MASK */
3914                         0x00000304, /* EMC_REFRESH */
3915                         0x00000000, /* EMC_BURST_REFRESH_NUM */
3916                         0x000000c1, /* EMC_PRE_REFRESH_REQ_CNT */
3917                         0x00000002, /* EMC_PDEX2WR */
3918                         0x00000002, /* EMC_PDEX2RD */
3919                         0x00000001, /* EMC_PCHG2PDEN */
3920                         0x00000000, /* EMC_ACT2PDEN */
3921                         0x00000018, /* EMC_AR2PDEN */
3922                         0x0000000f, /* EMC_RW2PDEN */
3923                         0x0000001c, /* EMC_TXSR */
3924                         0x0000001c, /* EMC_TXSRDLL */
3925                         0x00000004, /* EMC_TCKE */
3926                         0x00000005, /* EMC_TCKESR */
3927                         0x00000004, /* EMC_TPD */
3928                         0x00000001, /* EMC_TFAW */
3929                         0x00000000, /* EMC_TRPAB */
3930                         0x00000005, /* EMC_TCLKSTABLE */
3931                         0x00000005, /* EMC_TCLKSTOP */
3932                         0x0000031c, /* EMC_TREFBW */
3933                         0x00000002, /* EMC_FBIO_CFG6 */
3934                         0x00000000, /* EMC_ODT_WRITE */
3935                         0x00000000, /* EMC_ODT_READ */
3936                         0x10604098, /* EMC_FBIO_CFG5 */
3937                         0x002c00a0, /* EMC_CFG_DIG_DLL */
3938                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
3939                         0x00078000, /* EMC_DLL_XFORM_DQS0 */
3940                         0x00078000, /* EMC_DLL_XFORM_DQS1 */
3941                         0x00078000, /* EMC_DLL_XFORM_DQS2 */
3942                         0x00078000, /* EMC_DLL_XFORM_DQS3 */
3943                         0x00078000, /* EMC_DLL_XFORM_DQS4 */
3944                         0x00078000, /* EMC_DLL_XFORM_DQS5 */
3945                         0x00078000, /* EMC_DLL_XFORM_DQS6 */
3946                         0x00078000, /* EMC_DLL_XFORM_DQS7 */
3947                         0x00078000, /* EMC_DLL_XFORM_DQS8 */
3948                         0x00078000, /* EMC_DLL_XFORM_DQS9 */
3949                         0x00078000, /* EMC_DLL_XFORM_DQS10 */
3950                         0x00078000, /* EMC_DLL_XFORM_DQS11 */
3951                         0x00078000, /* EMC_DLL_XFORM_DQS12 */
3952                         0x00078000, /* EMC_DLL_XFORM_DQS13 */
3953                         0x00078000, /* EMC_DLL_XFORM_DQS14 */
3954                         0x00078000, /* EMC_DLL_XFORM_DQS15 */
3955                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
3956                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
3957                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
3958                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
3959                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
3960                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
3961                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
3962                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
3963                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
3964                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
3965                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
3966                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
3967                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
3968                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
3969                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
3970                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
3971                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
3972                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
3973                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
3974                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
3975                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
3976      &nbs