ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
[linux-3.10.git] / arch / arm / mach-tegra / board-laguna-powermon.c
1 /*
2  * arch/arm/mach-tegra/board-laguna-powermon.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/platform_data/ina230.h>
22
23 #include "board.h"
24 #include "board-ardbeg.h"
25
26 #define PRECISION_MULTIPLIER_LAGUNA     1000
27
28 #define AVG_SAMPLES (2 << 9) /* 16 samples */
29
30 /* AVG is specified from platform data */
31 #define INA230_CONT_CONFIG      (AVG_SAMPLES | INA230_VBUS_CT | \
32                                 INA230_VSH_CT | INA230_CONT_MODE)
33 #define INA230_TRIG_CONFIG      (AVG_SAMPLES | INA230_VBUS_CT | \
34                                  INA230_VSH_CT | INA230_TRIG_MODE)
35
36 enum {
37         VDD_MUX,
38         VDD_CPU,
39         VDDIO_DDR_AP_1V35,
40         VDD_CORE,
41         COM_1V8,
42         VDDIO_DDR_1V35,
43         AVDDIO_PEX_AP_1V05,
44         PEX_PLL_AP_3V3,
45         VDD_USB_AP_3V3,
46         VDD_GPU,
47         HVDD_SATA_AP_3V3,
48         VDDIO_SYS_AP_1V8,
49         VDDIO_BB_AP,
50         AVDD_LVDS_AP_1V05,
51         AVDD_HDMI_AP_3V3,
52 };
53
54 /* power monitor parameters for Laguna PM358*/
55 static struct ina230_platform_data laguna_pm358_power_mon_info[] = {
56         [VDD_MUX] = {
57                 .calibration_data  = 0x7FFF,
58                 .power_lsb = 3.63304501 * PRECISION_MULTIPLIER_LAGUNA,
59                 .rail_name = "VDD_MUX",
60                 .trig_conf = INA230_TRIG_CONFIG,
61                 .cont_conf = INA230_CONT_CONFIG,
62                 .divisor = 25,
63                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
64         },
65         [VDD_CPU] = {
66                 .calibration_data  = 0x3E6A,
67                 .power_lsb = 16.02172852 * PRECISION_MULTIPLIER_LAGUNA,
68                 .rail_name = "VDD_CPU",
69                 .trig_conf = INA230_TRIG_CONFIG,
70                 .cont_conf = INA230_CONT_CONFIG,
71                 .divisor = 25,
72                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
73         },
74         [VDDIO_DDR_AP_1V35] = {
75                 .calibration_data  = 0x7FFF,
76                 .power_lsb = 0.550446687 * PRECISION_MULTIPLIER_LAGUNA,
77                 .rail_name = "VDDIO_DDR_AP_1V35",
78                 .trig_conf = INA230_TRIG_CONFIG,
79                 .cont_conf = INA230_CONT_CONFIG,
80                 .divisor = 25,
81                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
82         },
83         [VDD_CORE] = {
84                 .calibration_data  = 0x369D,
85                 .power_lsb = 4.577636719 * PRECISION_MULTIPLIER_LAGUNA,
86                 .rail_name = "VDD_CORE",
87                 .trig_conf = INA230_TRIG_CONFIG,
88                 .cont_conf = INA230_CONT_CONFIG,
89                 .divisor = 25,
90                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
91         },
92         [COM_1V8] = {
93                 .calibration_data  = 0x7FFF,
94                 .power_lsb = 0.053405762 * PRECISION_MULTIPLIER_LAGUNA,
95                 .rail_name = "COM_1V8",
96                 .trig_conf = INA230_TRIG_CONFIG,
97                 .cont_conf = INA230_CONT_CONFIG,
98                 .divisor = 25,
99                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
100         },
101         [VDDIO_DDR_1V35] = {
102                 .calibration_data  = 0x7FFF,
103                 .power_lsb = 0.762939453 * PRECISION_MULTIPLIER_LAGUNA,
104                 .rail_name = "VDDIO_DDR_1V35",
105                 .trig_conf = INA230_TRIG_CONFIG,
106                 .cont_conf = INA230_CONT_CONFIG,
107                 .divisor = 25,
108                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
109         },
110         [AVDDIO_PEX_AP_1V05] = {
111                 .calibration_data  = 0x7FFF,
112                 .power_lsb = 0.356038411 * PRECISION_MULTIPLIER_LAGUNA,
113                 .rail_name = "AVDDIO_PEX_AP_1V05",
114                 .trig_conf = INA230_TRIG_CONFIG,
115                 .cont_conf = INA230_CONT_CONFIG,
116                 .divisor = 25,
117                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
118         },
119         [PEX_PLL_AP_3V3] = {
120                 .calibration_data  = 0x7FFF,
121                 .power_lsb = 0.027743253 * PRECISION_MULTIPLIER_LAGUNA,
122                 .rail_name = "PEX_PLL_AP_3V3",
123                 .trig_conf = INA230_TRIG_CONFIG,
124                 .cont_conf = INA230_CONT_CONFIG,
125                 .divisor = 25,
126                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
127         },
128         [VDD_USB_AP_3V3] = {
129                 .calibration_data  = 0x7FFF,
130                 .power_lsb = 0.023119377 * PRECISION_MULTIPLIER_LAGUNA,
131                 .rail_name = "VDD_USB_AP_3V3",
132                 .trig_conf = INA230_TRIG_CONFIG,
133                 .cont_conf = INA230_CONT_CONFIG,
134                 .divisor = 25,
135                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
136         },
137         [VDD_GPU] = {
138                 .calibration_data  = 0x4EF5,
139                 .power_lsb = 6.332397461 * PRECISION_MULTIPLIER_LAGUNA,
140                 .rail_name = "VDD_GPU",
141                 .trig_conf = INA230_TRIG_CONFIG,
142                 .cont_conf = INA230_CONT_CONFIG,
143                 .divisor = 25,
144                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
145         },
146         [HVDD_SATA_AP_3V3] = {
147                 .calibration_data  = 0x7FFF,
148                 .power_lsb = 0.003467907 * PRECISION_MULTIPLIER_LAGUNA,
149                 .rail_name = "HVDD_SATA_AP_3V3",
150                 .trig_conf = INA230_TRIG_CONFIG,
151                 .cont_conf = INA230_CONT_CONFIG,
152                 .divisor = 25,
153                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
154         },
155         [VDDIO_SYS_AP_1V8] = {
156                 .calibration_data  = 0x7FFF,
157                 .power_lsb = 0.023312039 * PRECISION_MULTIPLIER_LAGUNA,
158                 .rail_name = "VDDIO_SYS_AP_1V8",
159                 .trig_conf = INA230_TRIG_CONFIG,
160                 .cont_conf = INA230_CONT_CONFIG,
161                 .divisor = 25,
162                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
163         },
164         [VDDIO_BB_AP] = {
165                 .calibration_data  = 0x7FFF,
166                 .power_lsb = 0.002288818 * PRECISION_MULTIPLIER_LAGUNA,
167                 .rail_name = "VDDIO_BB_AP",
168                 .trig_conf = INA230_TRIG_CONFIG,
169                 .cont_conf = INA230_CONT_CONFIG,
170                 .divisor = 25,
171                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
172         },
173         [AVDD_LVDS_AP_1V05] = {
174                 .calibration_data  = 0x7FFF,
175                 .power_lsb = 0.007629395 * PRECISION_MULTIPLIER_LAGUNA,
176                 .rail_name = "AVDD_LVDS_AP_1V05",
177                 .trig_conf = INA230_TRIG_CONFIG,
178                 .cont_conf = INA230_CONT_CONFIG,
179                 .divisor = 25,
180                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
181         },
182         [AVDD_HDMI_AP_3V3] = {
183                 .calibration_data  = 0x7FFF,
184                 .power_lsb = 0.070514101 * PRECISION_MULTIPLIER_LAGUNA,
185                 .rail_name = "AVDD_HDMI_AP_3V3",
186                 .trig_conf = INA230_TRIG_CONFIG,
187                 .cont_conf = INA230_CONT_CONFIG,
188                 .divisor = 25,
189                 .precision_multiplier = PRECISION_MULTIPLIER_LAGUNA,
190         },
191
192 };
193
194 enum {
195         INA_I2C_ADDR_40,
196         INA_I2C_ADDR_41,
197         INA_I2C_ADDR_42,
198         INA_I2C_ADDR_43,
199         INA_I2C_ADDR_44,
200         INA_I2C_ADDR_45,
201         INA_I2C_ADDR_46,
202         INA_I2C_ADDR_47,
203         INA_I2C_ADDR_48,
204         INA_I2C_ADDR_49,
205         INA_I2C_ADDR_4A,
206         INA_I2C_ADDR_4B,
207         INA_I2C_ADDR_4D,
208         INA_I2C_ADDR_4E,
209         INA_I2C_ADDR_4F,
210 };
211
212 static struct i2c_board_info laguna_pm358_i2c_ina230_board_info[] = {
213         [INA_I2C_ADDR_40] = {
214                 I2C_BOARD_INFO("ina230", 0x40),
215                 .platform_data = &laguna_pm358_power_mon_info[VDD_MUX],
216                 .irq = -1,
217         },
218         [INA_I2C_ADDR_41] = {
219                 I2C_BOARD_INFO("ina230", 0x41),
220                 .platform_data = &laguna_pm358_power_mon_info[VDD_CPU],
221                 .irq = -1,
222         },
223         [INA_I2C_ADDR_42] = {
224                 I2C_BOARD_INFO("ina230", 0x42),
225                 .platform_data =
226                 &laguna_pm358_power_mon_info[VDDIO_DDR_AP_1V35],
227                 .irq = -1,
228         },
229         [INA_I2C_ADDR_43] = {
230                 I2C_BOARD_INFO("ina230", 0x43),
231                 .platform_data = &laguna_pm358_power_mon_info[VDD_CORE],
232                 .irq = -1,
233         },
234         [INA_I2C_ADDR_44] = {
235                 I2C_BOARD_INFO("ina230", 0x44),
236                 .platform_data = &laguna_pm358_power_mon_info[COM_1V8],
237                 .irq = -1,
238         },
239         [INA_I2C_ADDR_45] = {
240                 I2C_BOARD_INFO("ina230", 0x45),
241                 .platform_data = &laguna_pm358_power_mon_info[VDDIO_DDR_1V35],
242                 .irq = -1,
243         },
244         [INA_I2C_ADDR_46] = {
245                 I2C_BOARD_INFO("ina230", 0x46),
246                 .platform_data =
247                 &laguna_pm358_power_mon_info[AVDDIO_PEX_AP_1V05],
248                 .irq = -1,
249         },
250         [INA_I2C_ADDR_47] = {
251                 I2C_BOARD_INFO("ina230", 0x47),
252                 .platform_data = &laguna_pm358_power_mon_info[PEX_PLL_AP_3V3],
253                 .irq = -1,
254         },
255         [INA_I2C_ADDR_48] = {
256                 I2C_BOARD_INFO("ina230", 0x48),
257                 .platform_data = &laguna_pm358_power_mon_info[VDD_USB_AP_3V3],
258                 .irq = -1,
259         },
260         [INA_I2C_ADDR_49] = {
261                 I2C_BOARD_INFO("ina230", 0x49),
262                 .platform_data = &laguna_pm358_power_mon_info[VDD_GPU],
263                 .irq = -1,
264         },
265         [INA_I2C_ADDR_4A] = {
266                 I2C_BOARD_INFO("ina230", 0x4A),
267                 .platform_data =
268                 &laguna_pm358_power_mon_info[HVDD_SATA_AP_3V3],
269                 .irq = -1,
270         },
271         [INA_I2C_ADDR_4B] = {
272                 I2C_BOARD_INFO("ina230", 0x4B),
273                 .platform_data =
274                 &laguna_pm358_power_mon_info[VDDIO_SYS_AP_1V8],
275                 .irq = -1,
276         },
277         [INA_I2C_ADDR_4D] = {
278                 I2C_BOARD_INFO("ina230", 0x4D),
279                 .platform_data = &laguna_pm358_power_mon_info[VDDIO_BB_AP],
280                 .irq = -1,
281         },
282         [INA_I2C_ADDR_4E] = {
283                 I2C_BOARD_INFO("ina230", 0x4E),
284                 .platform_data =
285                 &laguna_pm358_power_mon_info[AVDD_LVDS_AP_1V05],
286                 .irq = -1,
287         },
288         [INA_I2C_ADDR_4F] = {
289                 I2C_BOARD_INFO("ina230", 0x4F),
290                 .platform_data =
291                 &laguna_pm358_power_mon_info[AVDD_HDMI_AP_3V3],
292                 .irq = -1,
293         },
294
295 };
296
297 int __init laguna_pm358_pmon_init(void)
298 {
299         i2c_register_board_info(1, laguna_pm358_i2c_ina230_board_info,
300                 ARRAY_SIZE(laguna_pm358_i2c_ina230_board_info));
301         return 0;
302 }
303