ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
[linux-3.10.git] / arch / arm / mach-tegra / board-dt-tegra20.c
1 /*
2  * nVidia Tegra device tree board support
3  *
4  * Copyright (C) 2010 Secret Lab Technologies, Ltd.
5  * Copyright (C) 2010 Google, Inc.
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/platform_device.h>
21 #include <linux/serial_8250.h>
22 #include <linux/clk.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/irqdomain.h>
25 #include <linux/of.h>
26 #include <linux/of_address.h>
27 #include <linux/of_fdt.h>
28 #include <linux/of_platform.h>
29 #include <linux/pda_power.h>
30 #include <linux/io.h>
31 #include <linux/i2c.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/clk/tegra.h>
34 #include <linux/irqchip.h>
35
36 #include <asm/mach-types.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/time.h>
39 #include <asm/setup.h>
40
41 #include "board.h"
42 #include "devices.h"
43 #include "common.h"
44 #include "iomap.h"
45
46 struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
47         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
48         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
49         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
50         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
51         OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
52         OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
53         OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
54         OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
55         OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra20-i2s.0", NULL),
56         OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra20-i2s.1", NULL),
57         OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra20-das", NULL),
58         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0", NULL),
59         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1", NULL),
60         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2", NULL),
61         OF_DEV_AUXDATA("nvidia,tegra20-apbdma", TEGRA_APB_DMA_BASE, "tegra-apbdma", NULL),
62         OF_DEV_AUXDATA("nvidia,tegra20-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL),
63         OF_DEV_AUXDATA("nvidia,tegra20-sflash", 0x7000c380, "spi", NULL),
64         OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D400, "spi_tegra.0", NULL),
65         OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D600, "spi_tegra.1", NULL),
66         OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D800, "spi_tegra.2", NULL),
67         OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000DA00, "spi_tegra.3", NULL),
68         OF_DEV_AUXDATA("nvidia,tegra20-host1x", 0x50000000, "host1x", NULL),
69         OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54200000, "tegradc.0", NULL),
70         OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54240000, "tegradc.1", NULL),
71         OF_DEV_AUXDATA("nvidia,tegra20-hdmi", 0x54280000, "hdmi", NULL),
72         OF_DEV_AUXDATA("nvidia,tegra20-dsi", 0x54300000, "dsi", NULL),
73         OF_DEV_AUXDATA("nvidia,tegra20-tvo", 0x542c0000, "tvo", NULL),
74         {}
75 };
76
77 static void __init tegra_dt_init(void)
78 {
79         tegra_clocks_apply_init_table();
80
81         /*
82          * Finished with the static registrations now; fill in the missing
83          * devices
84          */
85         of_platform_populate(NULL, of_default_bus_match_table,
86                                 tegra20_auxdata_lookup, NULL);
87 }
88
89 static void __init trimslice_init(void)
90 {
91 #ifdef CONFIG_TEGRA_PCI
92         int ret;
93
94         ret = tegra_pcie_init(true, true);
95         if (ret)
96                 pr_err("tegra_pci_init() failed: %d\n", ret);
97 #endif
98 }
99
100 static void __init harmony_init(void)
101 {
102 #ifdef CONFIG_TEGRA_PCI
103         int ret;
104
105         ret = harmony_pcie_init();
106         if (ret)
107                 pr_err("harmony_pcie_init() failed: %d\n", ret);
108 #endif
109 }
110
111 static void __init paz00_init(void)
112 {
113         tegra_paz00_wifikill_init();
114 }
115
116 static struct {
117         char *machine;
118         void (*init)(void);
119 } board_init_funcs[] = {
120         { "compulab,trimslice", trimslice_init },
121         { "nvidia,harmony", harmony_init },
122         { "compal,paz00", paz00_init },
123 };
124
125 static void __init tegra_dt_init_late(void)
126 {
127         int i;
128
129         tegra_init_late();
130
131         for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
132                 if (of_machine_is_compatible(board_init_funcs[i].machine)) {
133                         board_init_funcs[i].init();
134                         break;
135                 }
136         }
137 }
138
139 static const char *tegra20_dt_board_compat[] = {
140         "nvidia,tegra20",
141         NULL
142 };
143
144 DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
145         .map_io         = tegra_map_common_io,
146         .smp            = smp_ops(tegra_smp_ops),
147         .init_early     = tegra20_init_early,
148         .init_irq       = irqchip_init,
149         .init_time      = tegra_init_timer,
150         .init_machine   = tegra_dt_init,
151         .init_late      = tegra_dt_init_late,
152         .restart        = tegra_assert_system_reset,
153         .dt_compat      = tegra20_dt_board_compat,
154 MACHINE_END