ARM: tegra: dalmore/pluto: fix palmas init
[linux-3.10.git] / arch / arm / mach-tegra / board-dalmore-power.c
1 /*
2  * arch/arm/mach-tegra/board-dalmore-power.c
3  *
4  * Copyright (C) 2012 NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/io.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/regulator/fixed.h>
28 #include <linux/mfd/max77663-core.h>
29 #include <linux/mfd/palmas.h>
30 #include <linux/mfd/tps65090.h>
31 #include <linux/regulator/max77663-regulator.h>
32 #include <linux/regulator/tps65090-regulator.h>
33 #include <linux/regulator/tps51632-regulator.h>
34 #include <linux/gpio.h>
35 #include <linux/regulator/userspace-consumer.h>
36
37 #include <asm/mach-types.h>
38
39 #include <mach/iomap.h>
40 #include <mach/irqs.h>
41 #include <mach/gpio-tegra.h>
42
43 #include "pm.h"
44 #include "tegra-board-id.h"
45 #include "board.h"
46 #include "gpio-names.h"
47 #include "board-dalmore.h"
48 #include "tegra_cl_dvfs.h"
49
50 #define PMC_CTRL                0x0
51 #define PMC_CTRL_INTR_LOW       (1 << 17)
52
53 /*TPS65090 consumer rails */
54 static struct regulator_consumer_supply tps65090_dcdc1_supply[] = {
55         REGULATOR_SUPPLY("vdd_sys_5v0", NULL),
56         REGULATOR_SUPPLY("vdd_spk", NULL),
57         REGULATOR_SUPPLY("vdd_sys_modem_5v0", NULL),
58         REGULATOR_SUPPLY("vdd_sys_cam_5v0", NULL),
59 };
60
61 static struct regulator_consumer_supply tps65090_dcdc2_supply[] = {
62         REGULATOR_SUPPLY("vdd_sys_3v3", NULL),
63         REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
64         REGULATOR_SUPPLY("pwrdet_hv", NULL),
65         REGULATOR_SUPPLY("vdd_sys_ds_3v3", NULL),
66         REGULATOR_SUPPLY("vdd_sys_nfc_3v3", NULL),
67         REGULATOR_SUPPLY("vdd_hv_nfc_3v3", NULL),
68         REGULATOR_SUPPLY("vdd_sys_cam_3v3", NULL),
69         REGULATOR_SUPPLY("vdd_sys_sensor_3v3", NULL),
70         REGULATOR_SUPPLY("vdd_sys_audio_3v3", NULL),
71         REGULATOR_SUPPLY("vdd_sys_dtv_3v3", NULL),
72         REGULATOR_SUPPLY("vcc", "0-007c"),
73         REGULATOR_SUPPLY("vcc", "0-0030"),
74 };
75
76 static struct regulator_consumer_supply tps65090_dcdc3_supply[] = {
77         REGULATOR_SUPPLY("vdd_ao", NULL),
78 };
79
80 static struct regulator_consumer_supply tps65090_ldo1_supply[] = {
81         REGULATOR_SUPPLY("vdd_sby_5v0", NULL),
82 };
83
84 static struct regulator_consumer_supply tps65090_ldo2_supply[] = {
85         REGULATOR_SUPPLY("vdd_sby_3v3", NULL),
86 };
87
88 static struct regulator_consumer_supply tps65090_fet1_supply[] = {
89         REGULATOR_SUPPLY("vdd_lcd_bl", NULL),
90 };
91
92 static struct regulator_consumer_supply tps65090_fet3_supply[] = {
93         REGULATOR_SUPPLY("vdd_modem_3v3", NULL),
94 };
95
96 static struct regulator_consumer_supply tps65090_fet4_supply[] = {
97         REGULATOR_SUPPLY("avdd_lcd", NULL),
98         REGULATOR_SUPPLY("vdd_ts_3v3", NULL),
99 };
100
101 static struct regulator_consumer_supply tps65090_fet5_supply[] = {
102         REGULATOR_SUPPLY("vdd_lvds", NULL),
103 };
104
105 static struct regulator_consumer_supply tps65090_fet6_supply[] = {
106         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.2"),
107 };
108
109 static struct regulator_consumer_supply tps65090_fet7_supply[] = {
110         REGULATOR_SUPPLY("vdd_wifi_3v3", NULL),
111         REGULATOR_SUPPLY("vdd_gps_3v3", NULL),
112         REGULATOR_SUPPLY("vdd_bt_3v3", NULL),
113 };
114
115 #define TPS65090_PDATA_INIT(_id, _name, _supply_reg,                    \
116                 _always_on, _boot_on, _apply_uV, _en_ext_ctrl, _gpio)   \
117 static struct regulator_init_data ri_data_##_name =                     \
118 {                                                                       \
119         .supply_regulator = _supply_reg,                                \
120         .constraints = {                                                \
121                 .name = tps65090_rails(_id),                            \
122                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
123                                      REGULATOR_MODE_STANDBY),           \
124                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
125                                    REGULATOR_CHANGE_STATUS |            \
126                                    REGULATOR_CHANGE_VOLTAGE),           \
127                 .always_on = _always_on,                                \
128                 .boot_on = _boot_on,                                    \
129                 .apply_uV = _apply_uV,                                  \
130         },                                                              \
131         .num_consumer_supplies =                                        \
132                 ARRAY_SIZE(tps65090_##_name##_supply),                  \
133         .consumer_supplies = tps65090_##_name##_supply,                 \
134 };                                                                      \
135 static struct tps65090_regulator_platform_data                          \
136                         tps65090_regulator_pdata_##_name =              \
137 {                                                                       \
138         .id = TPS65090_REGULATOR_##_id,                                 \
139         .enable_ext_control = _en_ext_ctrl,                             \
140         .gpio = _gpio,                                                  \
141         .reg_init_data = &ri_data_##_name ,                             \
142 }
143
144 TPS65090_PDATA_INIT(DCDC1, dcdc1, NULL, 1, 1, 0, false, -1);
145 TPS65090_PDATA_INIT(DCDC2, dcdc2, NULL, 1, 1, 0, false, -1);
146 TPS65090_PDATA_INIT(DCDC3, dcdc3, NULL, 1, 1, 0, false, -1);
147 TPS65090_PDATA_INIT(LDO1, ldo1, NULL, 1, 1, 0, false, -1);
148 TPS65090_PDATA_INIT(LDO2, ldo2, NULL, 1, 1, 0, false, -1);
149 TPS65090_PDATA_INIT(FET1, fet1, NULL, 0, 0, 0, false, -1);
150 TPS65090_PDATA_INIT(FET3, fet3, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
151 TPS65090_PDATA_INIT(FET4, fet4, tps65090_rails(DCDC2), 1, 1, 0, false, -1); /* always_on and boot_on */
152 TPS65090_PDATA_INIT(FET5, fet5, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
153 TPS65090_PDATA_INIT(FET6, fet6, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
154 TPS65090_PDATA_INIT(FET7, fet7, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
155
156 #define ADD_TPS65090_REG(_name) (&tps65090_regulator_pdata_##_name)
157 static struct tps65090_regulator_platform_data *tps65090_reg_pdata[] = {
158         ADD_TPS65090_REG(dcdc1),
159         ADD_TPS65090_REG(dcdc2),
160         ADD_TPS65090_REG(dcdc3),
161         ADD_TPS65090_REG(ldo1),
162         ADD_TPS65090_REG(ldo2),
163         ADD_TPS65090_REG(fet1),
164         ADD_TPS65090_REG(fet3),
165         ADD_TPS65090_REG(fet4),
166         ADD_TPS65090_REG(fet5),
167         ADD_TPS65090_REG(fet6),
168         ADD_TPS65090_REG(fet7),
169 };
170
171 static struct tps65090_platform_data tps65090_pdata = {
172         .irq_base = -1,
173         .num_reg_pdata =  ARRAY_SIZE(tps65090_reg_pdata),
174         .reg_pdata = tps65090_reg_pdata
175 };
176
177 /* MAX77663 consumer rails */
178 static struct regulator_consumer_supply max77663_sd0_supply[] = {
179         REGULATOR_SUPPLY("vdd_core", NULL),
180 };
181
182 static struct regulator_consumer_supply max77663_sd1_supply[] = {
183         REGULATOR_SUPPLY("vddio_ddr", NULL),
184         REGULATOR_SUPPLY("vddio_ddr0", NULL),
185         REGULATOR_SUPPLY("vddio_ddr1", NULL),
186 };
187
188 static struct regulator_consumer_supply max77663_sd2_supply[] = {
189         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
190         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
191         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
192         REGULATOR_SUPPLY("vddio_cam", "tegrra_camera"),
193         REGULATOR_SUPPLY("pwrdet_cam", NULL),
194         REGULATOR_SUPPLY("avdd_osc", NULL),
195         REGULATOR_SUPPLY("vddio_sys", NULL),
196         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
197         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
198         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
199         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
200         REGULATOR_SUPPLY("vdd_emmc", NULL),
201         REGULATOR_SUPPLY("vddio_audio", NULL),
202         REGULATOR_SUPPLY("pwrdet_audio", NULL),
203         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
204         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
205         REGULATOR_SUPPLY("vddio_modem", NULL),
206         REGULATOR_SUPPLY("vddio_modem_1v8", NULL),
207         REGULATOR_SUPPLY("vddio_bb", NULL),
208         REGULATOR_SUPPLY("pwrdet_bb", NULL),
209         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
210         REGULATOR_SUPPLY("vddio_uart", NULL),
211         REGULATOR_SUPPLY("pwrdet_uart", NULL),
212         REGULATOR_SUPPLY("vddio_gmi", NULL),
213         REGULATOR_SUPPLY("pwrdet_nand", NULL),
214         REGULATOR_SUPPLY("vdd_sensor_1v8", NULL),
215         REGULATOR_SUPPLY("vdd_mic_1v8", NULL),
216         REGULATOR_SUPPLY("vdd_nfc_1v8", NULL),
217         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
218         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
219         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
220         REGULATOR_SUPPLY("dvdd_lcd", NULL),
221         REGULATOR_SUPPLY("vdd_com_1v8", NULL),
222         REGULATOR_SUPPLY("vddio_wifi_1v8", NULL),
223         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
224         REGULATOR_SUPPLY("vddio_bt_1v8", NULL),
225         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
226 };
227
228 static struct regulator_consumer_supply max77663_sd3_supply[] = {
229         REGULATOR_SUPPLY("vcore_emmc", NULL),
230 };
231
232 static struct regulator_consumer_supply max77663_ldo0_supply[] = {
233         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
234         REGULATOR_SUPPLY("avdd_pllx", NULL),
235         REGULATOR_SUPPLY("avdd_plle", NULL),
236         REGULATOR_SUPPLY("avdd_pllm", NULL),
237         REGULATOR_SUPPLY("avdd_pllu", NULL),
238         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
239         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
240         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
241 };
242
243 static struct regulator_consumer_supply max77663_ldo1_supply[] = {
244         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
245 };
246
247 static struct regulator_consumer_supply max77663_ldo2_supply[] = {
248         REGULATOR_SUPPLY("vdd_sensor_2v85", NULL),
249         REGULATOR_SUPPLY("vdd_als", NULL),
250         REGULATOR_SUPPLY("vdd", "1-004c"),
251 };
252
253 static struct regulator_consumer_supply max77663_ldo3_supply[] = {
254         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
255         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
256         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
257 };
258
259 static struct regulator_consumer_supply max77663_ldo4_supply[] = {
260         REGULATOR_SUPPLY("vdd_rtc", NULL),
261 };
262
263 static struct regulator_consumer_supply max77663_ldo5_supply[] = {
264         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
265         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
266         REGULATOR_SUPPLY("avdd_dsi_csi", "tegra_camera"),
267         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
268         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.2"),
269         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
270         REGULATOR_SUPPLY("vddio_bb_hsic", NULL),
271 };
272
273 static struct regulator_consumer_supply max77663_ldo6_supply[] = {
274         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
275         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
276 };
277
278 /* FIXME!! Put the device address of camera */
279 static struct regulator_consumer_supply max77663_ldo7_supply[] = {
280         REGULATOR_SUPPLY("avdd_cam1", NULL),
281         REGULATOR_SUPPLY("avdd_2v8_cam_af", NULL),
282 };
283
284 /* FIXME!! Put the device address of camera */
285 static struct regulator_consumer_supply max77663_ldo8_supply[] = {
286         REGULATOR_SUPPLY("avdd_cam2", NULL),
287 };
288
289 static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
290         {
291                 .src = FPS_SRC_0,
292                 .en_src = FPS_EN_SRC_EN0,
293                 .time_period = FPS_TIME_PERIOD_DEF,
294         },
295         {
296                 .src = FPS_SRC_1,
297                 .en_src = FPS_EN_SRC_EN1,
298                 .time_period = FPS_TIME_PERIOD_DEF,
299         },
300         {
301                 .src = FPS_SRC_2,
302                 .en_src = FPS_EN_SRC_EN0,
303                 .time_period = FPS_TIME_PERIOD_DEF,
304         },
305 };
306
307 #define MAX77663_PDATA_INIT(_rid, _id, _min_uV, _max_uV, _supply_reg,   \
308                 _always_on, _boot_on, _apply_uV,                        \
309                 _fps_src, _fps_pu_period, _fps_pd_period, _flags)       \
310         static struct regulator_init_data max77663_regulator_idata_##_id = {   \
311                 .supply_regulator = _supply_reg,                        \
312                 .constraints = {                                        \
313                         .name = max77663_rails(_id),                    \
314                         .min_uV = _min_uV,                              \
315                         .max_uV = _max_uV,                              \
316                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
317                                              REGULATOR_MODE_STANDBY),   \
318                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
319                                            REGULATOR_CHANGE_STATUS |    \
320                                            REGULATOR_CHANGE_VOLTAGE),   \
321                         .always_on = _always_on,                        \
322                         .boot_on = _boot_on,                            \
323                         .apply_uV = _apply_uV,                          \
324                 },                                                      \
325                 .num_consumer_supplies =                                \
326                         ARRAY_SIZE(max77663_##_id##_supply),            \
327                 .consumer_supplies = max77663_##_id##_supply,           \
328         };                                                              \
329 static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id =\
330 {                                                                       \
331                 .reg_init_data = &max77663_regulator_idata_##_id,       \
332                 .id = MAX77663_REGULATOR_ID_##_rid,                     \
333                 .fps_src = _fps_src,                                    \
334                 .fps_pu_period = _fps_pu_period,                        \
335                 .fps_pd_period = _fps_pd_period,                        \
336                 .fps_cfgs = max77663_fps_cfgs,                          \
337                 .flags = _flags,                                        \
338         }
339
340 MAX77663_PDATA_INIT(SD0, sd0,  900000, 1400000, tps65090_rails(DCDC3), 1, 1, 0,
341                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
342
343 MAX77663_PDATA_INIT(SD1, sd1,  1200000, 1200000, tps65090_rails(DCDC3), 1, 1, 1,
344                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
345
346 MAX77663_PDATA_INIT(SD2, sd2,  1800000, 1800000, tps65090_rails(DCDC3), 1, 1, 1,
347                     FPS_SRC_0, -1, -1, 0);
348
349 MAX77663_PDATA_INIT(SD3, sd3,  2850000, 2850000, tps65090_rails(DCDC3), 1, 1, 1,
350                     FPS_SRC_NONE, -1, -1, 0);
351
352 MAX77663_PDATA_INIT(LDO0, ldo0, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
353                     FPS_SRC_1, -1, -1, 0);
354
355 MAX77663_PDATA_INIT(LDO1, ldo1, 1050000, 1050000, max77663_rails(sd2), 0, 0, 1,
356                     FPS_SRC_NONE, -1, -1, 0);
357
358 MAX77663_PDATA_INIT(LDO2, ldo2, 2850000, 2850000, tps65090_rails(DCDC2), 1, 1,
359                     1, FPS_SRC_1, -1, -1, 0);
360
361 MAX77663_PDATA_INIT(LDO3, ldo3, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
362                     FPS_SRC_NONE, -1, -1, 0);
363
364 MAX77663_PDATA_INIT(LDO4, ldo4, 1100000, 1100000, tps65090_rails(DCDC2), 1, 1,
365                     1, FPS_SRC_NONE, -1, -1, 0);
366
367 MAX77663_PDATA_INIT(LDO5, ldo5, 1200000, 1200000, max77663_rails(sd2), 0, 1, 1,
368                     FPS_SRC_NONE, -1, -1, 0);
369
370 MAX77663_PDATA_INIT(LDO6, ldo6, 1800000, 3300000, tps65090_rails(DCDC2), 0, 0, 0,
371                     FPS_SRC_NONE, -1, -1, 0);
372
373 MAX77663_PDATA_INIT(LDO7, ldo7, 2800000, 2800000, tps65090_rails(DCDC2), 0, 0, 1,
374                     FPS_SRC_NONE, -1, -1, 0);
375
376 MAX77663_PDATA_INIT(LDO8, ldo8, 2800000, 2800000, tps65090_rails(DCDC2), 0, 1, 1,
377                     FPS_SRC_1, -1, -1, 0);
378
379 #define MAX77663_REG(_id, _data) (&max77663_regulator_pdata_##_data)
380
381 static struct max77663_regulator_platform_data *max77663_reg_pdata[] = {
382         MAX77663_REG(SD0, sd0),
383         MAX77663_REG(SD1, sd1),
384         MAX77663_REG(SD2, sd2),
385         MAX77663_REG(SD3, sd3),
386         MAX77663_REG(LDO0, ldo0),
387         MAX77663_REG(LDO1, ldo1),
388         MAX77663_REG(LDO2, ldo2),
389         MAX77663_REG(LDO3, ldo3),
390         MAX77663_REG(LDO4, ldo4),
391         MAX77663_REG(LDO5, ldo5),
392         MAX77663_REG(LDO6, ldo6),
393         MAX77663_REG(LDO7, ldo7),
394         MAX77663_REG(LDO8, ldo8),
395 };
396
397 static struct max77663_gpio_config max77663_gpio_cfgs[] = {
398         {
399                 .gpio = MAX77663_GPIO0,
400                 .dir = GPIO_DIR_OUT,
401                 .dout = GPIO_DOUT_LOW,
402                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
403                 .alternate = GPIO_ALT_DISABLE,
404         },
405         {
406                 .gpio = MAX77663_GPIO1,
407                 .dir = GPIO_DIR_IN,
408                 .dout = GPIO_DOUT_HIGH,
409                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
410                 .pull_up = GPIO_PU_ENABLE,
411                 .alternate = GPIO_ALT_DISABLE,
412         },
413         {
414                 .gpio = MAX77663_GPIO2,
415                 .dir = GPIO_DIR_OUT,
416                 .dout = GPIO_DOUT_HIGH,
417                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
418                 .pull_up = GPIO_PU_ENABLE,
419                 .alternate = GPIO_ALT_DISABLE,
420         },
421         {
422                 .gpio = MAX77663_GPIO3,
423                 .dir = GPIO_DIR_OUT,
424                 .dout = GPIO_DOUT_HIGH,
425                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
426                 .pull_up = GPIO_PU_ENABLE,
427                 .alternate = GPIO_ALT_DISABLE,
428         },
429         {
430                 .gpio = MAX77663_GPIO4,
431                 .dir = GPIO_DIR_OUT,
432                 .dout = GPIO_DOUT_HIGH,
433                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
434                 .alternate = GPIO_ALT_ENABLE,
435         },
436         {
437                 .gpio = MAX77663_GPIO5,
438                 .dir = GPIO_DIR_OUT,
439                 .dout = GPIO_DOUT_LOW,
440                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
441                 .alternate = GPIO_ALT_DISABLE,
442         },
443         {
444                 .gpio = MAX77663_GPIO6,
445                 .dir = GPIO_DIR_OUT,
446                 .dout = GPIO_DOUT_LOW,
447                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
448                 .alternate = GPIO_ALT_DISABLE,
449         },
450         {
451                 .gpio = MAX77663_GPIO7,
452                 .dir = GPIO_DIR_OUT,
453                 .dout = GPIO_DOUT_LOW,
454                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
455                 .alternate = GPIO_ALT_DISABLE,
456         },
457 };
458
459 static struct max77663_platform_data max77663_pdata = {
460         .irq_base       = MAX77663_IRQ_BASE,
461         .gpio_base      = MAX77663_GPIO_BASE,
462
463         .num_gpio_cfgs  = ARRAY_SIZE(max77663_gpio_cfgs),
464         .gpio_cfgs      = max77663_gpio_cfgs,
465
466         .regulator_pdata = max77663_reg_pdata,
467         .num_regulator_pdata = ARRAY_SIZE(max77663_reg_pdata),
468
469         .rtc_i2c_addr   = 0x68,
470
471         .use_power_off  = false,
472 };
473
474 static struct i2c_board_info __initdata max77663_regulators[] = {
475         {
476                 /* The I2C address was determined by OTP factory setting */
477                 I2C_BOARD_INFO("max77663", 0x3c),
478                 .irq            = INT_EXTERNAL_PMU,
479                 .platform_data  = &max77663_pdata,
480         },
481 };
482
483 static struct i2c_board_info __initdata tps65090_regulators[] = {
484         {
485                 I2C_BOARD_INFO("tps65090", 0x48),
486                 .platform_data  = &tps65090_pdata,
487         },
488 };
489
490 /* TPS51632 DC-DC converter */
491 static struct regulator_consumer_supply tps51632_dcdc_supply[] = {
492         REGULATOR_SUPPLY("vdd_cpu", NULL),
493 };
494
495 static struct regulator_init_data tps51632_init_data = {
496         .constraints = {                                                \
497                 .min_uV = 500000,                                       \
498                 .max_uV = 1520000,                                      \
499                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
500                                         REGULATOR_MODE_STANDBY),        \
501                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
502                                         REGULATOR_CHANGE_STATUS |       \
503                                         REGULATOR_CHANGE_VOLTAGE),      \
504                 .always_on = 1,                                         \
505                 .boot_on =  1,                                          \
506                 .apply_uV = 0,                                          \
507         },                                                              \
508         .num_consumer_supplies = ARRAY_SIZE(tps51632_dcdc_supply),      \
509                 .consumer_supplies = tps51632_dcdc_supply,              \
510 };
511
512 static struct tps51632_regulator_platform_data tps51632_pdata = {
513         .reg_init_data = &tps51632_init_data,           \
514         .enable_pwm = false,                            \
515         .max_voltage_uV = 1520000,                      \
516         .base_voltage_uV = 500000,                      \
517         .slew_rate_uv_per_us = 6000,                    \
518 };
519
520 static struct i2c_board_info __initdata tps51632_boardinfo[] = {
521         {
522                 I2C_BOARD_INFO("tps51632", 0x43),
523                 .platform_data  = &tps51632_pdata,
524         },
525 };
526
527 /************************ Palmas based regulator ****************/
528 static struct regulator_consumer_supply palmas_smps12_supply[] = {
529         REGULATOR_SUPPLY("vddio_ddr3l", NULL),
530         REGULATOR_SUPPLY("vcore_ddr3l", NULL),
531         REGULATOR_SUPPLY("vref2_ddr3l", NULL),
532 };
533
534 static struct regulator_consumer_supply palmas_smps3_supply[] = {
535         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
536         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
537         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
538         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
539         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
540         REGULATOR_SUPPLY("vdd_emmc", "sdhci-tegra.3"),
541         REGULATOR_SUPPLY("avdd_osc", NULL),
542         REGULATOR_SUPPLY("vddio_sys", NULL),
543         REGULATOR_SUPPLY("vddio_audio", NULL),
544         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
545         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
546         REGULATOR_SUPPLY("vddio_uart", NULL),
547         REGULATOR_SUPPLY("vddio_gmi", NULL),
548         REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
549         REGULATOR_SUPPLY("vddio_bb", NULL),
550         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
551         REGULATOR_SUPPLY("vddio_wifi_1v8", NULL),
552         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
553         REGULATOR_SUPPLY("vddio_bt_1v8", NULL),
554         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
555         REGULATOR_SUPPLY("vdd_modem", NULL),
556         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
557         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
558         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
559         REGULATOR_SUPPLY("dvdd_lcd", NULL),
560
561 };
562
563 static struct regulator_consumer_supply palmas_smps45_supply[] = {
564         REGULATOR_SUPPLY("vdd_core", NULL),
565 };
566
567 static struct regulator_consumer_supply palmas_smps8_supply[] = {
568         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
569         REGULATOR_SUPPLY("avdd_pllm", NULL),
570         REGULATOR_SUPPLY("avdd_pllu", NULL),
571         REGULATOR_SUPPLY("avdd_pllx", NULL),
572         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
573         REGULATOR_SUPPLY("avdd_plle", NULL),
574         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
575         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
576         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
577         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
578         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
579         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
580
581 };
582
583 static struct regulator_consumer_supply palmas_smps9_supply[] = {
584         REGULATOR_SUPPLY("vcore_emmc", "sdhci-tegra.3"),
585 };
586
587 static struct regulator_consumer_supply palmas_ldo1_supply[] = {
588         REGULATOR_SUPPLY("avdd_cam1", NULL),
589 };
590
591 static struct regulator_consumer_supply palmas_ldo2_supply[] = {
592         REGULATOR_SUPPLY("avdd_cam2", NULL),
593 };
594
595 static struct regulator_consumer_supply palmas_ldo3_supply[] = {
596         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
597         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.2"),
598         REGULATOR_SUPPLY("vddio_hsic_bb", NULL),
599         REGULATOR_SUPPLY("avdd_csi_dsi", "tegradc.0"),
600         REGULATOR_SUPPLY("avdd_csi_dsi", "tegradc.1"),
601         REGULATOR_SUPPLY("avdd_csi_dsi", "tegra_camera"),
602 };
603
604 static struct regulator_consumer_supply palmas_ldo4_supply[] = {
605         REGULATOR_SUPPLY("vpp_fuse", NULL),
606 };
607
608 static struct regulator_consumer_supply palmas_ldo6_supply[] = {
609         REGULATOR_SUPPLY("vdd_temp", NULL),
610         REGULATOR_SUPPLY("vdd_sensor", NULL),
611 };
612
613 static struct regulator_consumer_supply palmas_ldo7_supply[] = {
614         REGULATOR_SUPPLY("vdd_af_cam1", NULL),
615 };
616 static struct regulator_consumer_supply palmas_ldo8_supply[] = {
617         REGULATOR_SUPPLY("vdd_rtc", NULL),
618 };
619 static struct regulator_consumer_supply palmas_ldo9_supply[] = {
620         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
621 };
622
623 static struct regulator_consumer_supply palmas_ldoln_supply[] = {
624         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
625 };
626
627 static struct regulator_consumer_supply palmas_ldousb_supply[] = {
628         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
629         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
630         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
631         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
632         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
633 };
634
635 #define PALMAS_PDATA_INIT(_name, _minmv, _maxmv, _supply_reg, _always_on, \
636         _boot_on, _apply_uv)                                            \
637         static struct regulator_init_data reg_idata_##_name = {         \
638                 .constraints = {                                        \
639                         .name = palmas_rails(_name),                    \
640                         .min_uV = (_minmv)*1000,                        \
641                         .max_uV = (_maxmv)*1000,                        \
642                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
643                                         REGULATOR_MODE_STANDBY),        \
644                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
645                                         REGULATOR_CHANGE_STATUS |       \
646                                         REGULATOR_CHANGE_VOLTAGE),      \
647                         .always_on = _always_on,                        \
648                         .boot_on = _boot_on,                            \
649                         .apply_uV = _apply_uv,                          \
650                 },                                                      \
651                 .num_consumer_supplies =                                \
652                         ARRAY_SIZE(palmas_##_name##_supply),            \
653                 .consumer_supplies = palmas_##_name##_supply,           \
654                 .supply_regulator = _supply_reg,                        \
655         }
656
657 PALMAS_PDATA_INIT(smps12, 1350,  1350, tps65090_rails(DCDC3), 0, 0, 0);
658 PALMAS_PDATA_INIT(smps3, 1800,  1800, tps65090_rails(DCDC3), 0, 0, 0);
659 PALMAS_PDATA_INIT(smps45, 900,  1400, tps65090_rails(DCDC2), 1, 1, 0);
660 PALMAS_PDATA_INIT(smps8, 1050,  1050, tps65090_rails(DCDC2), 0, 1, 1);
661 PALMAS_PDATA_INIT(smps9, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 0);
662 PALMAS_PDATA_INIT(ldo1, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
663 PALMAS_PDATA_INIT(ldo2, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
664 PALMAS_PDATA_INIT(ldo3, 1200,  1200, palmas_rails(smps3), 0, 0, 1);
665 PALMAS_PDATA_INIT(ldo4, 1800,  1800, tps65090_rails(DCDC2), 0, 0, 0);
666 PALMAS_PDATA_INIT(ldo6, 2850,  2850, tps65090_rails(DCDC2), 0, 0, 1);
667 PALMAS_PDATA_INIT(ldo7, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
668 PALMAS_PDATA_INIT(ldo8, 1100,  1100, tps65090_rails(DCDC3), 1, 1, 1);
669 PALMAS_PDATA_INIT(ldo9, 1800,  3300, palmas_rails(smps9), 0, 0, 1);
670 PALMAS_PDATA_INIT(ldoln, 3300, 3300, tps65090_rails(DCDC1), 0, 0, 1);
671 PALMAS_PDATA_INIT(ldousb, 3300,  3300, tps65090_rails(DCDC1), 0, 0, 1);
672
673 #define PALMAS_REG_PDATA(_sname) &reg_idata_##_sname
674
675 static struct regulator_init_data *dalmore_e1611_reg_data[PALMAS_NUM_REGS] = {
676         PALMAS_REG_PDATA(smps12),
677         NULL,
678         PALMAS_REG_PDATA(smps3),
679         PALMAS_REG_PDATA(smps45),
680         NULL,
681         NULL,
682         NULL,
683         PALMAS_REG_PDATA(smps8),
684         PALMAS_REG_PDATA(smps9),
685         NULL,
686         PALMAS_REG_PDATA(ldo1),
687         PALMAS_REG_PDATA(ldo2),
688         PALMAS_REG_PDATA(ldo3),
689         PALMAS_REG_PDATA(ldo4),
690         NULL,
691         PALMAS_REG_PDATA(ldo6),
692         PALMAS_REG_PDATA(ldo7),
693         PALMAS_REG_PDATA(ldo8),
694         PALMAS_REG_PDATA(ldo9),
695         PALMAS_REG_PDATA(ldoln),
696         PALMAS_REG_PDATA(ldousb),
697         NULL,
698         NULL,
699         NULL,
700         NULL,
701         NULL,
702 };
703
704 #define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep,   \
705                 _tstep, _vsel)                                          \
706         static struct palmas_reg_init reg_init_data_##_name = {         \
707                 .warm_reset = _warm_reset,                              \
708                 .roof_floor =   _roof_floor,                            \
709                 .mode_sleep = _mode_sleep,                              \
710                 .tstep = _tstep,                                        \
711                 .vsel = _vsel,                                          \
712         }
713
714 PALMAS_REG_INIT(smps12, 0, 0, 0, 0, 0);
715 PALMAS_REG_INIT(smps123, 0, 0, 0, 0, 0);
716 PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
717 PALMAS_REG_INIT(smps45, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
718 PALMAS_REG_INIT(smps457, 0, 0, 0, 0, 0);
719 PALMAS_REG_INIT(smps6, 0, 0, 0, 0, 0);
720 PALMAS_REG_INIT(smps7, 0, 0, 0, 0, 0);
721 PALMAS_REG_INIT(smps8, 0, 0, 0, 0, 0);
722 PALMAS_REG_INIT(smps9, 0, 0, 0, 0, 0);
723 PALMAS_REG_INIT(smps10, 0, 0, 0, 0, 0);
724 PALMAS_REG_INIT(ldo1, 0, 0, 0, 0, 0);
725 PALMAS_REG_INIT(ldo2, 0, 0, 0, 0, 0);
726 PALMAS_REG_INIT(ldo3, 0, 0, 0, 0, 0);
727 PALMAS_REG_INIT(ldo4, 0, 0, 0, 0, 0);
728 PALMAS_REG_INIT(ldo5, 0, 0, 0, 0, 0);
729 PALMAS_REG_INIT(ldo6, 0, 0, 0, 0, 0);
730 PALMAS_REG_INIT(ldo7, 0, 0, 0, 0, 0);
731 PALMAS_REG_INIT(ldo8, 0, 0, 0, 0, 0);
732 PALMAS_REG_INIT(ldo9, 0, 0, 0, 0, 0);
733 PALMAS_REG_INIT(ldoln, 0, 0, 0, 0, 0);
734 PALMAS_REG_INIT(ldousb, 0, 0, 0, 0, 0);
735 PALMAS_REG_INIT(regen1, 0, 0, 0, 0, 0);
736 PALMAS_REG_INIT(regen2, 0, 0, 0, 0, 0);
737 PALMAS_REG_INIT(regen3, 0, 0, 0, 0, 0);
738 PALMAS_REG_INIT(sysen1, 0, 0, 0, 0, 0);
739 PALMAS_REG_INIT(sysen2, 0, 0, 0, 0, 0);
740
741 #define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
742 static struct palmas_reg_init *dalmore_e1611_reg_init[PALMAS_NUM_REGS] = {
743         PALMAS_REG_INIT_DATA(smps12),
744         PALMAS_REG_INIT_DATA(smps123),
745         PALMAS_REG_INIT_DATA(smps3),
746         PALMAS_REG_INIT_DATA(smps45),
747         PALMAS_REG_INIT_DATA(smps457),
748         PALMAS_REG_INIT_DATA(smps6),
749         PALMAS_REG_INIT_DATA(smps7),
750         PALMAS_REG_INIT_DATA(smps8),
751         PALMAS_REG_INIT_DATA(smps9),
752         PALMAS_REG_INIT_DATA(smps10),
753         PALMAS_REG_INIT_DATA(ldo1),
754         PALMAS_REG_INIT_DATA(ldo2),
755         PALMAS_REG_INIT_DATA(ldo3),
756         PALMAS_REG_INIT_DATA(ldo4),
757         PALMAS_REG_INIT_DATA(ldo5),
758         PALMAS_REG_INIT_DATA(ldo6),
759         PALMAS_REG_INIT_DATA(ldo7),
760         PALMAS_REG_INIT_DATA(ldo8),
761         PALMAS_REG_INIT_DATA(ldo9),
762         PALMAS_REG_INIT_DATA(ldoln),
763         PALMAS_REG_INIT_DATA(ldousb),
764         PALMAS_REG_INIT_DATA(regen1),
765         PALMAS_REG_INIT_DATA(regen2),
766         PALMAS_REG_INIT_DATA(regen3),
767         PALMAS_REG_INIT_DATA(sysen1),
768         PALMAS_REG_INIT_DATA(sysen2),
769 };
770
771 static struct palmas_pmic_platform_data pmic_platform = {
772         .enable_ldo8_tracking = true,
773 };
774
775 static struct palmas_platform_data palmas_pdata = {
776         .gpio_base = PALMAS_TEGRA_GPIO_BASE,
777         .irq_base = PALMAS_TEGRA_IRQ_BASE,
778         .pmic_pdata = &pmic_platform,
779         .mux_from_pdata = true,
780         .pad1 = 0,
781         .pad2 = 0,
782 };
783
784 static struct i2c_board_info palma_device[] = {
785         {
786                 I2C_BOARD_INFO("tps65913", 0x58),
787                 .irq            = INT_EXTERNAL_PMU,
788                 .platform_data  = &palmas_pdata,
789         },
790 };
791
792 /* EN_AVDD_USB_HDMI From PMU GP1 */
793 static struct regulator_consumer_supply fixed_reg_avdd_usb_hdmi_supply[] = {
794         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
795         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
796         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
797         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
798         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
799         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
800 };
801
802 /* EN_CAM_1v8 From PMU GP5 */
803 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
804         REGULATOR_SUPPLY("dvdd_cam", NULL),
805         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
806 };
807
808 /* EN_CAM_1v8 on e1611 From PMU GP6 */
809 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_e1611_supply[] = {
810         REGULATOR_SUPPLY("dvdd_cam", NULL),
811         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
812 };
813
814 static struct regulator_consumer_supply fixed_reg_vdd_hdmi_5v0_supply[] = {
815         REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
816 };
817
818 /* EN_USB1_VBUS From TEGRA GPIO PN4 PR3(T30) */
819 static struct regulator_consumer_supply fixed_reg_usb1_vbus_supply[] = {
820         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
821 };
822
823 /* EN_3V3_FUSE From TEGRA GPIO PX4 */
824 static struct regulator_consumer_supply fixed_reg_vpp_fuse_supply[] = {
825         REGULATOR_SUPPLY("vpp_fuse", NULL),
826 };
827
828 /* EN_USB3_VBUS From TEGRA GPIO PM5 */
829 static struct regulator_consumer_supply fixed_reg_usb3_vbus_supply[] = {
830         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.2"),
831 };
832
833 /* Macro for defining fixed regulator sub device data */
834 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
835 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
836         _gpio_nr, _open_drain, _active_high, _boot_state, _millivolts)  \
837         static struct regulator_init_data ri_data_##_var =              \
838         {                                                               \
839                 .supply_regulator = _in_supply,                         \
840                 .num_consumer_supplies =                                \
841                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
842                 .consumer_supplies = fixed_reg_##_name##_supply,        \
843                 .constraints = {                                        \
844                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
845                                         REGULATOR_MODE_STANDBY),        \
846                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
847                                         REGULATOR_CHANGE_STATUS |       \
848                                         REGULATOR_CHANGE_VOLTAGE),      \
849                         .always_on = _always_on,                        \
850                         .boot_on = _boot_on,                            \
851                 },                                                      \
852         };                                                              \
853         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
854         {                                                               \
855                 .supply_name = FIXED_SUPPLY(_name),                     \
856                 .microvolts = _millivolts * 1000,                       \
857                 .gpio = _gpio_nr,                                       \
858                 .gpio_is_open_drain = _open_drain,                      \
859                 .enable_high = _active_high,                            \
860                 .enabled_at_boot = _boot_state,                         \
861                 .init_data = &ri_data_##_var,                           \
862         };                                                              \
863         static struct platform_device fixed_reg_##_var##_dev = {        \
864                 .name = "reg-fixed-voltage",                            \
865                 .id = _id,                                              \
866                 .dev = {                                                \
867                         .platform_data = &fixed_reg_##_var##_pdata,     \
868                 },                                                      \
869         }
870
871 FIXED_REG(1,    avdd_usb_hdmi,  avdd_usb_hdmi,
872         tps65090_rails(DCDC2),  0,      0,
873         MAX77663_GPIO_BASE + MAX77663_GPIO1,    true,   true,   1,      3300);
874
875 FIXED_REG(2,    en_1v8_cam,     en_1v8_cam,
876         max77663_rails(sd2),    0,      0,
877         MAX77663_GPIO_BASE + MAX77663_GPIO5,    false,  true,   0,      1800);
878
879 FIXED_REG(3,    vdd_hdmi_5v0,   vdd_hdmi_5v0,
880         tps65090_rails(DCDC1),  0,      0,
881         TEGRA_GPIO_PK1, false,  true,   0,      5000);
882
883 FIXED_REG(4,    vpp_fuse,       vpp_fuse,
884         max77663_rails(sd2),    0,      0,
885         TEGRA_GPIO_PX4, false,  true,   0,      3300);
886
887 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
888 FIXED_REG(5,    usb1_vbus,      usb1_vbus,
889         tps65090_rails(DCDC1),  0,      0,
890         TEGRA_GPIO_PN4, true,   true,   0,      5000);
891 #else
892 FIXED_REG(5,    usb1_vbus,      usb1_vbus,
893         tps65090_rails(DCDC1),  0,      0,
894         TEGRA_GPIO_PR3, true,   true,   0,      5000);
895 #endif
896
897 FIXED_REG(6,    usb3_vbus,      usb3_vbus,
898         tps65090_rails(DCDC1),  0,      0,
899         TEGRA_GPIO_PK6, true,   true,   0,      5000);
900
901 FIXED_REG(7,    en_1v8_cam_e1611,       en_1v8_cam_e1611,
902         palmas_rails(smps3),    0,      0,
903         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO6,  false,  true,   0,      1800);
904
905 /*
906  * Creating the fixed regulator device tables
907  */
908
909 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
910
911 #define DALMORE_COMMON_FIXED_REG                \
912         ADD_FIXED_REG(usb1_vbus),               \
913         ADD_FIXED_REG(usb3_vbus),               \
914         ADD_FIXED_REG(vdd_hdmi_5v0),
915
916 #define E1612_FIXED_REG                         \
917         ADD_FIXED_REG(avdd_usb_hdmi),           \
918         ADD_FIXED_REG(en_1v8_cam),              \
919         ADD_FIXED_REG(vpp_fuse),                \
920
921 #define E1611_FIXED_REG                         \
922         ADD_FIXED_REG(en_1v8_cam_e1611),
923
924 /* Gpio switch regulator platform data for Dalmore E1611 */
925 static struct platform_device *fixed_reg_devs_e1611_a00[] = {
926         DALMORE_COMMON_FIXED_REG
927         E1611_FIXED_REG
928 };
929
930 /* Gpio switch regulator platform data for Dalmore E1612 */
931 static struct platform_device *fixed_reg_devs_e1612_a00[] = {
932         DALMORE_COMMON_FIXED_REG
933         E1612_FIXED_REG
934 };
935
936 int __init dalmore_palmas_regulator_init(void)
937 {
938         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
939         u32 pmc_ctrl;
940         int i;
941 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
942         int ret;
943
944         ret = gpio_request(TEGRA_GPIO_PCC3, "pmic_nreswarm");
945         if (ret < 0)
946                 pr_err("%s: gpio_request failed for gpio %d\n",
947                                 __func__, TEGRA_GPIO_PCC3);
948         else
949                 gpio_direction_output(TEGRA_GPIO_PCC3, 1);
950 #endif
951         /* TPS65913: Normal state of INT request line is LOW.
952          * configure the power management controller to trigger PMU
953          * interrupts when HIGH.
954          */
955         pmc_ctrl = readl(pmc + PMC_CTRL);
956         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
957         for (i = 0; i < PALMAS_NUM_REGS ; i++) {
958                 pmic_platform.reg_data[i] = dalmore_e1611_reg_data[i];
959                 pmic_platform.reg_init[i] = dalmore_e1611_reg_init[i];
960         }
961
962         i2c_register_board_info(4, palma_device,
963                         ARRAY_SIZE(palma_device));
964         return 0;
965 }
966
967 static int ac_online(void)
968 {
969         return 1;
970 }
971
972 static struct resource dalmore_pda_resources[] = {
973         [0] = {
974                 .name   = "ac",
975         },
976 };
977
978 static struct pda_power_pdata dalmore_pda_data = {
979         .is_ac_online   = ac_online,
980 };
981
982 static struct platform_device dalmore_pda_power_device = {
983         .name           = "pda-power",
984         .id             = -1,
985         .resource       = dalmore_pda_resources,
986         .num_resources  = ARRAY_SIZE(dalmore_pda_resources),
987         .dev    = {
988                 .platform_data  = &dalmore_pda_data,
989         },
990 };
991
992 static struct tegra_suspend_platform_data dalmore_suspend_data = {
993         .cpu_timer      = 2000,
994         .cpu_off_timer  = 2000,
995         .suspend_mode   = TEGRA_SUSPEND_LP0,
996         .core_timer     = 0x7e7e,
997         .core_off_timer = 2000,
998         .corereq_high   = true,
999         .sysclkreq_high = true,
1000 };
1001
1002 /* board parameters for cpu dfll */
1003 static struct tegra_cl_dvfs_cfg_param dalmore_cl_dvfs_param = {
1004         .sample_rate = 12500,
1005
1006         .force_mode = TEGRA_CL_DVFS_FORCE_FIXED,
1007         .cf = 10,
1008         .ci = 0,
1009         .cg = 2,
1010
1011         .droop_cut_value = 0xF,
1012         .droop_restore_ramp = 0x0,
1013         .scale_out_ramp = 0x0,
1014 };
1015
1016 /* TPS51632: fixed 10mV steps from 600mV to 1400mV, with offset 0x23 */
1017 #define PMU_CPU_VDD_MAP_SIZE ((1400000 - 600000) / 10000 + 1)
1018 static struct voltage_reg_map pmu_cpu_vdd_map[PMU_CPU_VDD_MAP_SIZE];
1019 static inline void fill_reg_map(void)
1020 {
1021         int i;
1022         for (i = 0; i < PMU_CPU_VDD_MAP_SIZE; i++) {
1023                 pmu_cpu_vdd_map[i].reg_value = i + 0x23;
1024                 pmu_cpu_vdd_map[i].reg_uV = 600000 + 10000 * i;
1025         }
1026 }
1027
1028 static struct tegra_cl_dvfs_platform_data dalmore_dfll_cpu_data = {
1029         .dfll_clk_name = "dfll_cpu",
1030         .pmu_if = TEGRA_CL_DVFS_PMU_I2C,
1031         .u.pmu_i2c = {
1032                 .fs_rate = 400000,
1033                 .slave_addr = 0x86,
1034                 .reg = 0x00,
1035         },
1036         .vdd_map = pmu_cpu_vdd_map,
1037         .vdd_map_size = PMU_CPU_VDD_MAP_SIZE,
1038
1039         .cfg_param = &dalmore_cl_dvfs_param,
1040 };
1041
1042 static int __init dalmore_max77663_regulator_init(void)
1043 {
1044         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
1045         u32 pmc_ctrl;
1046
1047         /* configure the power management controller to trigger PMU
1048          * interrupts when low */
1049         pmc_ctrl = readl(pmc + PMC_CTRL);
1050         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
1051
1052         i2c_register_board_info(4, max77663_regulators,
1053                                 ARRAY_SIZE(max77663_regulators));
1054
1055         return 0;
1056 }
1057
1058 static struct regulator_bulk_data dalmore_bt_regulator_supply[] = {
1059         [0] = {
1060                 .supply = "vdd_bt_3v3",
1061         },
1062         [1] = {
1063                 .supply = "vddio_bt_1v8",
1064         },
1065 };
1066
1067 static struct regulator_userspace_consumer_data dalmore_bt_regulator_pdata = {
1068         .num_supplies   = ARRAY_SIZE(dalmore_bt_regulator_supply),
1069         .supplies       = dalmore_bt_regulator_supply,
1070 };
1071
1072 static struct platform_device dalmore_bt_regulator_device = {
1073         .name   = "reg-userspace-consumer",
1074         .id     = 1,
1075         .dev    = {
1076                         .platform_data = &dalmore_bt_regulator_pdata,
1077         },
1078 };
1079
1080 static int __init dalmore_fixed_regulator_init(void)
1081 {
1082         struct board_info board_info;
1083
1084         if (!machine_is_dalmore())
1085                 return 0;
1086
1087         tegra_get_board_info(&board_info);
1088
1089         if (board_info.board_id == BOARD_E1611)
1090                 return platform_add_devices(fixed_reg_devs_e1611_a00,
1091                                 ARRAY_SIZE(fixed_reg_devs_e1611_a00));
1092         else
1093                 return platform_add_devices(fixed_reg_devs_e1612_a00,
1094                                 ARRAY_SIZE(fixed_reg_devs_e1612_a00));
1095 }
1096 subsys_initcall_sync(dalmore_fixed_regulator_init);
1097
1098 int __init dalmore_regulator_init(void)
1099 {
1100         struct board_info board_info;
1101         i2c_register_board_info(4, tps65090_regulators,
1102                         ARRAY_SIZE(tps65090_regulators));
1103
1104         fill_reg_map();
1105         tegra_cl_dvfs_set_platform_data(&dalmore_dfll_cpu_data);
1106
1107         tegra_get_board_info(&board_info);
1108         if (board_info.board_id == BOARD_E1611)
1109                 dalmore_palmas_regulator_init();
1110         else
1111                 dalmore_max77663_regulator_init();
1112
1113         i2c_register_board_info(4, tps51632_boardinfo, 1);
1114         platform_device_register(&dalmore_pda_power_device);
1115         platform_device_register(&dalmore_bt_regulator_device);
1116         return 0;
1117 }
1118
1119 int __init dalmore_suspend_init(void)
1120 {
1121         tegra_init_suspend(&dalmore_suspend_data);
1122         return 0;
1123 }
1124