ARM: tegra: Dalmore: add device entry for avdd_usb
[linux-3.10.git] / arch / arm / mach-tegra / board-dalmore-power.c
1 /*
2  * arch/arm/mach-tegra/board-dalmore-power.c
3  *
4  * Copyright (C) 2012 NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/io.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/regulator/fixed.h>
28 #include <linux/mfd/max77663-core.h>
29 #include <linux/mfd/palmas.h>
30 #include <linux/mfd/tps65090.h>
31 #include <linux/regulator/max77663-regulator.h>
32 #include <linux/regulator/tps65090-regulator.h>
33 #include <linux/regulator/tps51632-regulator.h>
34 #include <linux/gpio.h>
35
36 #include <asm/mach-types.h>
37
38 #include <mach/iomap.h>
39 #include <mach/irqs.h>
40 #include <mach/gpio-tegra.h>
41
42 #include "pm.h"
43 #include "tegra-board-id.h"
44 #include "board.h"
45 #include "gpio-names.h"
46 #include "board-dalmore.h"
47 #include "tegra_cl_dvfs.h"
48
49 #define PMC_CTRL                0x0
50 #define PMC_CTRL_INTR_LOW       (1 << 17)
51
52 /*TPS65090 consumer rails */
53 static struct regulator_consumer_supply tps65090_dcdc1_supply[] = {
54         REGULATOR_SUPPLY("vdd_sys_5v0", NULL),
55         REGULATOR_SUPPLY("vdd_spk", NULL),
56         REGULATOR_SUPPLY("vdd_sys_modem_5v0", NULL),
57         REGULATOR_SUPPLY("vdd_sys_cam_5v0", NULL),
58 };
59
60 static struct regulator_consumer_supply tps65090_dcdc2_supply[] = {
61         REGULATOR_SUPPLY("vdd_sys_3v3", NULL),
62         REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
63         REGULATOR_SUPPLY("vdd_sys_ds_3v3", NULL),
64         REGULATOR_SUPPLY("vdd_sys_nfc_3v3", NULL),
65         REGULATOR_SUPPLY("vdd_hv_nfc_3v3", NULL),
66         REGULATOR_SUPPLY("vdd_sys_cam_3v3", NULL),
67         REGULATOR_SUPPLY("vdd_sys_sensor_3v3", NULL),
68         REGULATOR_SUPPLY("vdd_sys_audio_3v3", NULL),
69         REGULATOR_SUPPLY("vdd_sys_dtv_3v3", NULL),
70         REGULATOR_SUPPLY("vcc", "0-007c"),
71         REGULATOR_SUPPLY("vcc", "0-0030"),
72 };
73
74 static struct regulator_consumer_supply tps65090_dcdc3_supply[] = {
75         REGULATOR_SUPPLY("vdd_ao", NULL),
76 };
77
78 static struct regulator_consumer_supply tps65090_ldo1_supply[] = {
79         REGULATOR_SUPPLY("vdd_sby_5v0", NULL),
80 };
81
82 static struct regulator_consumer_supply tps65090_ldo2_supply[] = {
83         REGULATOR_SUPPLY("vdd_sby_3v3", NULL),
84 };
85
86 static struct regulator_consumer_supply tps65090_fet1_supply[] = {
87         REGULATOR_SUPPLY("vdd_lcd_bl", NULL),
88 };
89
90 static struct regulator_consumer_supply tps65090_fet3_supply[] = {
91         REGULATOR_SUPPLY("vdd_modem_3v3", NULL),
92 };
93
94 static struct regulator_consumer_supply tps65090_fet4_supply[] = {
95         REGULATOR_SUPPLY("avdd_lcd", NULL),
96         REGULATOR_SUPPLY("vdd_ts_3v3", NULL),
97 };
98
99 static struct regulator_consumer_supply tps65090_fet5_supply[] = {
100         REGULATOR_SUPPLY("vdd_lvds", NULL),
101 };
102
103 static struct regulator_consumer_supply tps65090_fet6_supply[] = {
104         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.2"),
105 };
106
107 static struct regulator_consumer_supply tps65090_fet7_supply[] = {
108         REGULATOR_SUPPLY("vdd_com_3v3", NULL),
109         REGULATOR_SUPPLY("vdd_gps_3v3", NULL),
110 };
111
112 #define TPS65090_PDATA_INIT(_id, _name, _supply_reg,                    \
113                 _always_on, _boot_on, _apply_uV, _en_ext_ctrl, _gpio)   \
114 static struct regulator_init_data ri_data_##_name =                     \
115 {                                                                       \
116         .supply_regulator = _supply_reg,                                \
117         .constraints = {                                                \
118                 .name = tps65090_rails(_id),                            \
119                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
120                                      REGULATOR_MODE_STANDBY),           \
121                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
122                                    REGULATOR_CHANGE_STATUS |            \
123                                    REGULATOR_CHANGE_VOLTAGE),           \
124                 .always_on = _always_on,                                \
125                 .boot_on = _boot_on,                                    \
126                 .apply_uV = _apply_uV,                                  \
127         },                                                              \
128         .num_consumer_supplies =                                        \
129                 ARRAY_SIZE(tps65090_##_name##_supply),                  \
130         .consumer_supplies = tps65090_##_name##_supply,                 \
131 };                                                                      \
132 static struct tps65090_regulator_platform_data                          \
133                         tps65090_regulator_pdata_##_name =              \
134 {                                                                       \
135         .id = TPS65090_REGULATOR_##_id,                                 \
136         .enable_ext_control = _en_ext_ctrl,                             \
137         .gpio = _gpio,                                                  \
138         .reg_init_data = &ri_data_##_name ,                             \
139 }
140
141 TPS65090_PDATA_INIT(DCDC1, dcdc1, NULL, 1, 1, 0, false, -1);
142 TPS65090_PDATA_INIT(DCDC2, dcdc2, NULL, 1, 1, 0, false, -1);
143 TPS65090_PDATA_INIT(DCDC3, dcdc3, NULL, 1, 1, 0, false, -1);
144 TPS65090_PDATA_INIT(LDO1, ldo1, NULL, 1, 1, 0, false, -1);
145 TPS65090_PDATA_INIT(LDO2, ldo2, NULL, 1, 1, 0, false, -1);
146 TPS65090_PDATA_INIT(FET1, fet1, NULL, 0, 0, 0, false, -1);
147 TPS65090_PDATA_INIT(FET3, fet3, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
148 TPS65090_PDATA_INIT(FET4, fet4, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
149 TPS65090_PDATA_INIT(FET5, fet5, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
150 TPS65090_PDATA_INIT(FET6, fet6, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
151 TPS65090_PDATA_INIT(FET7, fet7, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
152
153 #define ADD_TPS65090_REG(_name) (&tps65090_regulator_pdata_##_name)
154 static struct tps65090_regulator_platform_data *tps65090_reg_pdata[] = {
155         ADD_TPS65090_REG(dcdc1),
156         ADD_TPS65090_REG(dcdc2),
157         ADD_TPS65090_REG(dcdc3),
158         ADD_TPS65090_REG(ldo1),
159         ADD_TPS65090_REG(ldo2),
160         ADD_TPS65090_REG(fet1),
161         ADD_TPS65090_REG(fet3),
162         ADD_TPS65090_REG(fet4),
163         ADD_TPS65090_REG(fet5),
164         ADD_TPS65090_REG(fet6),
165         ADD_TPS65090_REG(fet7),
166 };
167
168 static struct tps65090_platform_data tps65090_pdata = {
169         .irq_base = -1,
170         .num_reg_pdata =  ARRAY_SIZE(tps65090_reg_pdata),
171         .reg_pdata = tps65090_reg_pdata
172 };
173
174 /* MAX77663 consumer rails */
175 static struct regulator_consumer_supply max77663_sd0_supply[] = {
176         REGULATOR_SUPPLY("vdd_core", NULL),
177 };
178
179 static struct regulator_consumer_supply max77663_sd1_supply[] = {
180         REGULATOR_SUPPLY("vddio_ddr", NULL),
181         REGULATOR_SUPPLY("vddio_ddr0", NULL),
182         REGULATOR_SUPPLY("vddio_ddr1", NULL),
183 };
184
185 static struct regulator_consumer_supply max77663_sd2_supply[] = {
186         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
187         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
188         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
189         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
190         REGULATOR_SUPPLY("vddio_cam", "tegrra_camera"),
191         REGULATOR_SUPPLY("pwrdet_cam", NULL),
192         REGULATOR_SUPPLY("avdd_osc", NULL),
193         REGULATOR_SUPPLY("vddio_sys", NULL),
194         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
195         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
196         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
197         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
198         REGULATOR_SUPPLY("vdd_emmc", NULL),
199         REGULATOR_SUPPLY("vddio_audio", NULL),
200         REGULATOR_SUPPLY("pwrdet_audio", NULL),
201         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
202         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
203         REGULATOR_SUPPLY("vddio_modem", NULL),
204         REGULATOR_SUPPLY("vddio_modem_1v8", NULL),
205         REGULATOR_SUPPLY("vddio_bb", NULL),
206         REGULATOR_SUPPLY("pwrdet_bb", NULL),
207         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
208         REGULATOR_SUPPLY("vddio_uart", NULL),
209         REGULATOR_SUPPLY("pwrdet_uart", NULL),
210         REGULATOR_SUPPLY("vddio_gmi", NULL),
211         REGULATOR_SUPPLY("pwrdet_nand", NULL),
212         REGULATOR_SUPPLY("vdd_sensor_1v8", NULL),
213         REGULATOR_SUPPLY("vdd_mic_1v8", NULL),
214         REGULATOR_SUPPLY("vdd_nfc_1v8", NULL),
215         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
216         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
217         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
218         REGULATOR_SUPPLY("dvdd_lcd", NULL),
219         REGULATOR_SUPPLY("vdd_com_1v8", NULL),
220         REGULATOR_SUPPLY("vddio_com_1v8", NULL),
221         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
222         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
223 };
224
225 static struct regulator_consumer_supply max77663_sd3_supply[] = {
226         REGULATOR_SUPPLY("vcore_emmc", NULL),
227 };
228
229 static struct regulator_consumer_supply max77663_ldo0_supply[] = {
230         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
231         REGULATOR_SUPPLY("avdd_pllx", NULL),
232         REGULATOR_SUPPLY("avdd_plle", NULL),
233         REGULATOR_SUPPLY("avdd_pllm", NULL),
234         REGULATOR_SUPPLY("avdd_pllu", NULL),
235         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
236         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
237         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
238 };
239
240 static struct regulator_consumer_supply max77663_ldo1_supply[] = {
241         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
242 };
243
244 static struct regulator_consumer_supply max77663_ldo2_supply[] = {
245         REGULATOR_SUPPLY("vdd_sensor_2v85", NULL),
246         REGULATOR_SUPPLY("vdd_als", NULL),
247         REGULATOR_SUPPLY("vdd", "1-004c"),
248 };
249
250 static struct regulator_consumer_supply max77663_ldo3_supply[] = {
251         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
252         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
253         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
254 };
255
256 static struct regulator_consumer_supply max77663_ldo4_supply[] = {
257         REGULATOR_SUPPLY("vdd_rtc", NULL),
258 };
259
260 static struct regulator_consumer_supply max77663_ldo5_supply[] = {
261         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
262         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
263         REGULATOR_SUPPLY("avdd_dsi_csi", "tegra_camera"),
264         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.0"),
265         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
266         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
267         REGULATOR_SUPPLY("vddio_bb_hsic", NULL),
268 };
269
270 static struct regulator_consumer_supply max77663_ldo6_supply[] = {
271         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
272         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
273 };
274
275 /* FIXME!! Put the device address of camera */
276 static struct regulator_consumer_supply max77663_ldo7_supply[] = {
277         REGULATOR_SUPPLY("avdd_cam1", NULL),
278         REGULATOR_SUPPLY("avdd_2v8_cam_af", NULL),
279 };
280
281 /* FIXME!! Put the device address of camera */
282 static struct regulator_consumer_supply max77663_ldo8_supply[] = {
283         REGULATOR_SUPPLY("avdd_cam2", NULL),
284 };
285
286 static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
287         {
288                 .src = FPS_SRC_0,
289                 .en_src = FPS_EN_SRC_EN0,
290                 .time_period = FPS_TIME_PERIOD_DEF,
291         },
292         {
293                 .src = FPS_SRC_1,
294                 .en_src = FPS_EN_SRC_EN1,
295                 .time_period = FPS_TIME_PERIOD_DEF,
296         },
297         {
298                 .src = FPS_SRC_2,
299                 .en_src = FPS_EN_SRC_EN0,
300                 .time_period = FPS_TIME_PERIOD_DEF,
301         },
302 };
303
304 #define MAX77663_PDATA_INIT(_rid, _id, _min_uV, _max_uV, _supply_reg,   \
305                 _always_on, _boot_on, _apply_uV,                        \
306                 _fps_src, _fps_pu_period, _fps_pd_period, _flags)       \
307         static struct regulator_init_data max77663_regulator_idata_##_id = {   \
308                 .supply_regulator = _supply_reg,                        \
309                 .constraints = {                                        \
310                         .name = max77663_rails(_id),                    \
311                         .min_uV = _min_uV,                              \
312                         .max_uV = _max_uV,                              \
313                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
314                                              REGULATOR_MODE_STANDBY),   \
315                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
316                                            REGULATOR_CHANGE_STATUS |    \
317                                            REGULATOR_CHANGE_VOLTAGE),   \
318                         .always_on = _always_on,                        \
319                         .boot_on = _boot_on,                            \
320                         .apply_uV = _apply_uV,                          \
321                 },                                                      \
322                 .num_consumer_supplies =                                \
323                         ARRAY_SIZE(max77663_##_id##_supply),            \
324                 .consumer_supplies = max77663_##_id##_supply,           \
325         };                                                              \
326 static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id =\
327 {                                                                       \
328                 .reg_init_data = &max77663_regulator_idata_##_id,       \
329                 .id = MAX77663_REGULATOR_ID_##_rid,                     \
330                 .fps_src = _fps_src,                                    \
331                 .fps_pu_period = _fps_pu_period,                        \
332                 .fps_pd_period = _fps_pd_period,                        \
333                 .fps_cfgs = max77663_fps_cfgs,                          \
334                 .flags = _flags,                                        \
335         }
336
337 MAX77663_PDATA_INIT(SD0, sd0,  900000, 1400000, tps65090_rails(DCDC3), 1, 1, 0,
338                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
339
340 MAX77663_PDATA_INIT(SD1, sd1,  1200000, 1200000, tps65090_rails(DCDC3), 1, 1, 1,
341                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
342
343 MAX77663_PDATA_INIT(SD2, sd2,  1800000, 1800000, tps65090_rails(DCDC3), 1, 1, 1,
344                     FPS_SRC_0, -1, -1, 0);
345
346 MAX77663_PDATA_INIT(SD3, sd3,  2850000, 2850000, tps65090_rails(DCDC3), 1, 1, 1,
347                     FPS_SRC_NONE, -1, -1, 0);
348
349 MAX77663_PDATA_INIT(LDO0, ldo0, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
350                     FPS_SRC_1, -1, -1, 0);
351
352 MAX77663_PDATA_INIT(LDO1, ldo1, 1050000, 1050000, max77663_rails(sd2), 0, 0, 1,
353                     FPS_SRC_NONE, -1, -1, 0);
354
355 MAX77663_PDATA_INIT(LDO2, ldo2, 2850000, 2850000, tps65090_rails(DCDC2), 1, 1,
356                     1, FPS_SRC_1, -1, -1, 0);
357
358 MAX77663_PDATA_INIT(LDO3, ldo3, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
359                     FPS_SRC_NONE, -1, -1, 0);
360
361 MAX77663_PDATA_INIT(LDO4, ldo4, 1100000, 1100000, tps65090_rails(DCDC2), 1, 1,
362                     1, FPS_SRC_NONE, -1, -1, 0);
363
364 MAX77663_PDATA_INIT(LDO5, ldo5, 1200000, 1200000, max77663_rails(sd2), 0, 1, 1,
365                     FPS_SRC_NONE, -1, -1, 0);
366
367 MAX77663_PDATA_INIT(LDO6, ldo6, 1800000, 3300000, tps65090_rails(DCDC2), 0, 0, 0,
368                     FPS_SRC_NONE, -1, -1, 0);
369
370 MAX77663_PDATA_INIT(LDO7, ldo7, 2800000, 2800000, tps65090_rails(DCDC2), 0, 0, 1,
371                     FPS_SRC_NONE, -1, -1, 0);
372
373 MAX77663_PDATA_INIT(LDO8, ldo8, 2800000, 2800000, tps65090_rails(DCDC2), 0, 1, 1,
374                     FPS_SRC_1, -1, -1, 0);
375
376 #define MAX77663_REG(_id, _data) (&max77663_regulator_pdata_##_data)
377
378 static struct max77663_regulator_platform_data *max77663_reg_pdata[] = {
379         MAX77663_REG(SD0, sd0),
380         MAX77663_REG(SD1, sd1),
381         MAX77663_REG(SD2, sd2),
382         MAX77663_REG(SD3, sd3),
383         MAX77663_REG(LDO0, ldo0),
384         MAX77663_REG(LDO1, ldo1),
385         MAX77663_REG(LDO2, ldo2),
386         MAX77663_REG(LDO3, ldo3),
387         MAX77663_REG(LDO4, ldo4),
388         MAX77663_REG(LDO5, ldo5),
389         MAX77663_REG(LDO6, ldo6),
390         MAX77663_REG(LDO7, ldo7),
391         MAX77663_REG(LDO8, ldo8),
392 };
393
394 static struct max77663_gpio_config max77663_gpio_cfgs[] = {
395         {
396                 .gpio = MAX77663_GPIO0,
397                 .dir = GPIO_DIR_OUT,
398                 .dout = GPIO_DOUT_LOW,
399                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
400                 .alternate = GPIO_ALT_DISABLE,
401         },
402         {
403                 .gpio = MAX77663_GPIO1,
404                 .dir = GPIO_DIR_IN,
405                 .dout = GPIO_DOUT_HIGH,
406                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
407                 .pull_up = GPIO_PU_ENABLE,
408                 .alternate = GPIO_ALT_DISABLE,
409         },
410         {
411                 .gpio = MAX77663_GPIO2,
412                 .dir = GPIO_DIR_OUT,
413                 .dout = GPIO_DOUT_HIGH,
414                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
415                 .pull_up = GPIO_PU_ENABLE,
416                 .alternate = GPIO_ALT_DISABLE,
417         },
418         {
419                 .gpio = MAX77663_GPIO3,
420                 .dir = GPIO_DIR_OUT,
421                 .dout = GPIO_DOUT_HIGH,
422                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
423                 .pull_up = GPIO_PU_ENABLE,
424                 .alternate = GPIO_ALT_DISABLE,
425         },
426         {
427                 .gpio = MAX77663_GPIO4,
428                 .dir = GPIO_DIR_OUT,
429                 .dout = GPIO_DOUT_HIGH,
430                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
431                 .alternate = GPIO_ALT_ENABLE,
432         },
433         {
434                 .gpio = MAX77663_GPIO5,
435                 .dir = GPIO_DIR_OUT,
436                 .dout = GPIO_DOUT_LOW,
437                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
438                 .alternate = GPIO_ALT_DISABLE,
439         },
440         {
441                 .gpio = MAX77663_GPIO6,
442                 .dir = GPIO_DIR_OUT,
443                 .dout = GPIO_DOUT_LOW,
444                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
445                 .alternate = GPIO_ALT_DISABLE,
446         },
447         {
448                 .gpio = MAX77663_GPIO7,
449                 .dir = GPIO_DIR_OUT,
450                 .dout = GPIO_DOUT_LOW,
451                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
452                 .alternate = GPIO_ALT_DISABLE,
453         },
454 };
455
456 static struct max77663_platform_data max77663_pdata = {
457         .irq_base       = MAX77663_IRQ_BASE,
458         .gpio_base      = MAX77663_GPIO_BASE,
459
460         .num_gpio_cfgs  = ARRAY_SIZE(max77663_gpio_cfgs),
461         .gpio_cfgs      = max77663_gpio_cfgs,
462
463         .regulator_pdata = max77663_reg_pdata,
464         .num_regulator_pdata = ARRAY_SIZE(max77663_reg_pdata),
465
466         .rtc_i2c_addr   = 0x68,
467
468         .use_power_off  = false,
469 };
470
471 static struct i2c_board_info __initdata max77663_regulators[] = {
472         {
473                 /* The I2C address was determined by OTP factory setting */
474                 I2C_BOARD_INFO("max77663", 0x3c),
475                 .irq            = INT_EXTERNAL_PMU,
476                 .platform_data  = &max77663_pdata,
477         },
478 };
479
480 static struct i2c_board_info __initdata tps65090_regulators[] = {
481         {
482                 I2C_BOARD_INFO("tps65090", 0x48),
483                 .platform_data  = &tps65090_pdata,
484         },
485 };
486
487 /* TPS51632 DC-DC converter */
488 static struct regulator_consumer_supply tps51632_dcdc_supply[] = {
489         REGULATOR_SUPPLY("vdd_cpu", NULL),
490 };
491
492 static struct regulator_init_data tps51632_init_data = {
493         .constraints = {                                                \
494                 .min_uV = 500000,                                       \
495                 .max_uV = 1520000,                                      \
496                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
497                                         REGULATOR_MODE_STANDBY),        \
498                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
499                                         REGULATOR_CHANGE_STATUS |       \
500                                         REGULATOR_CHANGE_VOLTAGE),      \
501                 .always_on = 1,                                         \
502                 .boot_on =  1,                                          \
503                 .apply_uV = 0,                                          \
504         },                                                              \
505         .num_consumer_supplies = ARRAY_SIZE(tps51632_dcdc_supply),      \
506                 .consumer_supplies = tps51632_dcdc_supply,              \
507 };
508
509 static struct tps51632_regulator_platform_data tps51632_pdata = {
510         .reg_init_data = &tps51632_init_data,           \
511         .enable_pwm = false,                            \
512         .max_voltage_uV = 1520000,                      \
513         .base_voltage_uV = 500000,                      \
514         .slew_rate_uv_per_us = 6000,                    \
515 };
516
517 static struct i2c_board_info __initdata tps51632_boardinfo[] = {
518         {
519                 I2C_BOARD_INFO("tps51632", 0x43),
520                 .platform_data  = &tps51632_pdata,
521         },
522 };
523
524 /************************ Palmas based regulator ****************/
525 static struct regulator_consumer_supply palmas_smps12_supply[] = {
526         REGULATOR_SUPPLY("vddio_ddr3l", NULL),
527         REGULATOR_SUPPLY("vcore_ddr3l", NULL),
528         REGULATOR_SUPPLY("vref2_ddr3l", NULL),
529 };
530
531 static struct regulator_consumer_supply palmas_smps3_supply[] = {
532         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
533         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
534         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
535         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
536         REGULATOR_SUPPLY("vdd_emmc", "sdhci-tegra.3"),
537         REGULATOR_SUPPLY("avdd_osc", NULL),
538         REGULATOR_SUPPLY("vddio_sys", NULL),
539         REGULATOR_SUPPLY("vddio_audio", NULL),
540         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
541         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
542         REGULATOR_SUPPLY("vddio_uart", NULL),
543         REGULATOR_SUPPLY("vddio_gmi", NULL),
544         REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
545         REGULATOR_SUPPLY("vddio_bb", NULL),
546         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
547         REGULATOR_SUPPLY("vddio_com_1v8", NULL),
548         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
549         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
550         REGULATOR_SUPPLY("vdd_modem", NULL),
551         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
552         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
553         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
554         REGULATOR_SUPPLY("dvdd_lcd", NULL),
555
556 };
557
558 static struct regulator_consumer_supply palmas_smps45_supply[] = {
559         REGULATOR_SUPPLY("vdd_core", NULL),
560 };
561
562 static struct regulator_consumer_supply palmas_smps8_supply[] = {
563         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
564         REGULATOR_SUPPLY("avdd_pllm", NULL),
565         REGULATOR_SUPPLY("avdd_pllu", NULL),
566         REGULATOR_SUPPLY("avdd_pllx", NULL),
567         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
568         REGULATOR_SUPPLY("avdd_plle", NULL),
569         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
570         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
571         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
572         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
573         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
574         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
575
576 };
577
578 static struct regulator_consumer_supply palmas_smps9_supply[] = {
579         REGULATOR_SUPPLY("vcore_emmc", "sdhci-tegra.3"),
580 };
581
582 static struct regulator_consumer_supply palmas_ldo1_supply[] = {
583         REGULATOR_SUPPLY("avdd_cam1", NULL),
584 };
585
586 static struct regulator_consumer_supply palmas_ldo2_supply[] = {
587         REGULATOR_SUPPLY("avdd_cam2", NULL),
588 };
589
590 static struct regulator_consumer_supply palmas_ldo3_supply[] = {
591         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.0"),
592         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
593         REGULATOR_SUPPLY("vddio_hsic_bb", NULL),
594         REGULATOR_SUPPLY("avdd_csi_dsi", "tegradc.0"),
595         REGULATOR_SUPPLY("avdd_csi_dsi", "tegradc.1"),
596         REGULATOR_SUPPLY("avdd_csi_dsi", "tegra_camera"),
597 };
598
599 static struct regulator_consumer_supply palmas_ldo4_supply[] = {
600         REGULATOR_SUPPLY("vpp_fuse", NULL),
601 };
602
603 static struct regulator_consumer_supply palmas_ldo6_supply[] = {
604         REGULATOR_SUPPLY("vdd_temp", NULL),
605         REGULATOR_SUPPLY("vdd_sensor", NULL),
606 };
607
608 static struct regulator_consumer_supply palmas_ldo7_supply[] = {
609         REGULATOR_SUPPLY("vdd_af_cam1", NULL),
610 };
611 static struct regulator_consumer_supply palmas_ldo8_supply[] = {
612         REGULATOR_SUPPLY("vdd_rtc", NULL),
613 };
614 static struct regulator_consumer_supply palmas_ldo9_supply[] = {
615         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
616 };
617
618 static struct regulator_consumer_supply palmas_ldoln_supply[] = {
619         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
620 };
621
622 static struct regulator_consumer_supply palmas_ldousb_supply[] = {
623         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
624         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
625         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
626         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
627 };
628
629 #define PALMAS_PDATA_INIT(_name, _minmv, _maxmv, _supply_reg, _always_on, \
630         _boot_on, _apply_uv)                                            \
631         static struct regulator_init_data reg_idata_##_name = {         \
632                 .constraints = {                                        \
633                         .name = palmas_rails(_name),                    \
634                         .min_uV = (_minmv)*1000,                        \
635                         .max_uV = (_maxmv)*1000,                        \
636                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
637                                         REGULATOR_MODE_STANDBY),        \
638                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
639                                         REGULATOR_CHANGE_STATUS |       \
640                                         REGULATOR_CHANGE_VOLTAGE),      \
641                         .always_on = _always_on,                        \
642                         .boot_on = _boot_on,                            \
643                         .apply_uV = _apply_uv,                          \
644                 },                                                      \
645                 .num_consumer_supplies =                                \
646                         ARRAY_SIZE(palmas_##_name##_supply),            \
647                 .consumer_supplies = palmas_##_name##_supply,           \
648                 .supply_regulator = _supply_reg,                        \
649         }
650
651 PALMAS_PDATA_INIT(smps12, 1350,  1350, tps65090_rails(DCDC3), 0, 0, 0);
652 PALMAS_PDATA_INIT(smps3, 1800,  1800, tps65090_rails(DCDC3), 0, 0, 0);
653 PALMAS_PDATA_INIT(smps45, 900,  1400, tps65090_rails(DCDC2), 1, 1, 0);
654 PALMAS_PDATA_INIT(smps8, 1050,  1050, tps65090_rails(DCDC2), 0, 1, 1);
655 PALMAS_PDATA_INIT(smps9, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 0);
656 PALMAS_PDATA_INIT(ldo1, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
657 PALMAS_PDATA_INIT(ldo2, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
658 PALMAS_PDATA_INIT(ldo3, 1200,  1200, palmas_rails(smps3), 0, 0, 1);
659 PALMAS_PDATA_INIT(ldo4, 1800,  1800, tps65090_rails(DCDC2), 0, 0, 0);
660 PALMAS_PDATA_INIT(ldo6, 2850,  2850, tps65090_rails(DCDC2), 0, 0, 1);
661 PALMAS_PDATA_INIT(ldo7, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
662 PALMAS_PDATA_INIT(ldo8, 1100,  1100, tps65090_rails(DCDC3), 1, 1, 1);
663 PALMAS_PDATA_INIT(ldo9, 1800,  3300, palmas_rails(smps9), 0, 0, 1);
664 PALMAS_PDATA_INIT(ldoln, 3300, 3300, tps65090_rails(DCDC1), 0, 0, 1);
665 PALMAS_PDATA_INIT(ldousb, 3300,  3300, tps65090_rails(DCDC1), 0, 0, 1);
666
667 #define PALMAS_REG_PDATA(_sname) &reg_idata_##_sname
668
669 static struct regulator_init_data *dalmore_e1611_reg_data[] = {
670         PALMAS_REG_PDATA(smps12),
671         NULL,
672         PALMAS_REG_PDATA(smps3),
673         PALMAS_REG_PDATA(smps45),
674         NULL,
675         NULL,
676         NULL,
677         PALMAS_REG_PDATA(smps8),
678         PALMAS_REG_PDATA(smps9),
679         NULL,
680         PALMAS_REG_PDATA(ldo1),
681         PALMAS_REG_PDATA(ldo2),
682         PALMAS_REG_PDATA(ldo3),
683         PALMAS_REG_PDATA(ldo4),
684         NULL,
685         PALMAS_REG_PDATA(ldo6),
686         PALMAS_REG_PDATA(ldo7),
687         PALMAS_REG_PDATA(ldo8),
688         PALMAS_REG_PDATA(ldo9),
689         PALMAS_REG_PDATA(ldoln),
690         PALMAS_REG_PDATA(ldousb),
691         NULL,
692         NULL,
693         NULL,
694         NULL,
695         NULL,
696 };
697
698 #define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep,   \
699                 _tstep, _vsel)                                          \
700         static struct palmas_reg_init reg_init_data_##_name = {         \
701                 .warm_reset = _warm_reset,                              \
702                 .roof_floor =   _roof_floor,                            \
703                 .mode_sleep = _mode_sleep,                              \
704                 .tstep = _tstep,                                        \
705                 .vsel = _vsel,                                          \
706         }
707
708 PALMAS_REG_INIT(smps12, 0, 0, 0, 0, 0);
709 PALMAS_REG_INIT(smps123, 0, 0, 0, 0, 0);
710 PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
711 PALMAS_REG_INIT(smps45, 0, 0, 0, 0, 0);
712 PALMAS_REG_INIT(smps457, 0, 0, 0, 0, 0);
713 PALMAS_REG_INIT(smps6, 0, 0, 0, 0, 0);
714 PALMAS_REG_INIT(smps7, 0, 0, 0, 0, 0);
715 PALMAS_REG_INIT(smps8, 0, 0, 0, 0, 0);
716 PALMAS_REG_INIT(smps9, 0, 0, 0, 0, 0);
717 PALMAS_REG_INIT(smps10, 0, 0, 0, 0, 0);
718 PALMAS_REG_INIT(ldo1, 0, 0, 0, 0, 0);
719 PALMAS_REG_INIT(ldo2, 0, 0, 0, 0, 0);
720 PALMAS_REG_INIT(ldo3, 0, 0, 0, 0, 0);
721 PALMAS_REG_INIT(ldo4, 0, 0, 0, 0, 0);
722 PALMAS_REG_INIT(ldo5, 0, 0, 0, 0, 0);
723 PALMAS_REG_INIT(ldo6, 0, 0, 0, 0, 0);
724 PALMAS_REG_INIT(ldo7, 0, 0, 0, 0, 0);
725 PALMAS_REG_INIT(ldo8, 0, 0, 0, 0, 0);
726 PALMAS_REG_INIT(ldo9, 0, 0, 0, 0, 0);
727 PALMAS_REG_INIT(ldoln, 0, 0, 0, 0, 0);
728 PALMAS_REG_INIT(ldousb, 0, 0, 0, 0, 0);
729 PALMAS_REG_INIT(regen1, 0, 0, 0, 0, 0);
730 PALMAS_REG_INIT(regen2, 0, 0, 0, 0, 0);
731 PALMAS_REG_INIT(regen3, 0, 0, 0, 0, 0);
732 PALMAS_REG_INIT(sysen1, 0, 0, 0, 0, 0);
733 PALMAS_REG_INIT(sysen2, 0, 0, 0, 0, 0);
734
735 #define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
736 static struct palmas_reg_init *dalmore_e1611_reg_init[] = {
737         PALMAS_REG_INIT_DATA(smps12),
738         PALMAS_REG_INIT_DATA(smps123),
739         PALMAS_REG_INIT_DATA(smps3),
740         PALMAS_REG_INIT_DATA(smps45),
741         PALMAS_REG_INIT_DATA(smps457),
742         PALMAS_REG_INIT_DATA(smps6),
743         PALMAS_REG_INIT_DATA(smps7),
744         PALMAS_REG_INIT_DATA(smps8),
745         PALMAS_REG_INIT_DATA(smps9),
746         PALMAS_REG_INIT_DATA(smps10),
747         PALMAS_REG_INIT_DATA(ldo1),
748         PALMAS_REG_INIT_DATA(ldo2),
749         PALMAS_REG_INIT_DATA(ldo3),
750         PALMAS_REG_INIT_DATA(ldo4),
751         PALMAS_REG_INIT_DATA(ldo5),
752         PALMAS_REG_INIT_DATA(ldo6),
753         PALMAS_REG_INIT_DATA(ldo7),
754         PALMAS_REG_INIT_DATA(ldo8),
755         PALMAS_REG_INIT_DATA(ldo9),
756         PALMAS_REG_INIT_DATA(ldoln),
757         PALMAS_REG_INIT_DATA(ldousb),
758         PALMAS_REG_INIT_DATA(regen1),
759         PALMAS_REG_INIT_DATA(regen2),
760         PALMAS_REG_INIT_DATA(regen3),
761         PALMAS_REG_INIT_DATA(sysen1),
762         PALMAS_REG_INIT_DATA(sysen2),
763 };
764
765 static struct palmas_pmic_platform_data pmic_platform = {
766         .reg_data = dalmore_e1611_reg_data,
767         .reg_init = dalmore_e1611_reg_init,
768 };
769
770 static struct palmas_platform_data palmas_pdata = {
771         .gpio_base = PALMAS_TEGRA_GPIO_BASE,
772         .irq_base = PALMAS_TEGRA_IRQ_BASE,
773         .pmic_pdata = &pmic_platform,
774         .mux_from_pdata = true,
775         .pad1 = 0,
776         .pad2 = 0,
777 };
778
779 static struct i2c_board_info palma_device[] = {
780         {
781                 I2C_BOARD_INFO("tps65913", 0x58),
782                 .irq            = INT_EXTERNAL_PMU,
783                 .platform_data  = &palmas_pdata,
784         },
785 };
786
787 /* EN_AVDD_USB_HDMI From PMU GP1 */
788 static struct regulator_consumer_supply fixed_reg_avdd_usb_hdmi_supply[] = {
789         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
790         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
791         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
792         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
793         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
794         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
795 };
796
797 /* EN_CAM_1v8 From PMU GP5 */
798 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
799         REGULATOR_SUPPLY("dvdd_cam", NULL),
800         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
801 };
802
803 /* EN_CAM_1v8 on e1611 From PMU GP6 */
804 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_e1611_supply[] = {
805         REGULATOR_SUPPLY("dvdd_cam", NULL),
806         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
807 };
808
809 static struct regulator_consumer_supply fixed_reg_vdd_hdmi_5v0_supply[] = {
810         REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
811 };
812
813 /* EN_USB1_VBUS From TEGRA GPIO PN4 PR3(T30) */
814 static struct regulator_consumer_supply fixed_reg_usb1_vbus_supply[] = {
815         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
816 };
817
818 /* EN_3V3_FUSE From TEGRA GPIO PX4 */
819 static struct regulator_consumer_supply fixed_reg_vpp_fuse_supply[] = {
820         REGULATOR_SUPPLY("vpp_fuse", NULL),
821 };
822
823 /* EN_USB3_VBUS From TEGRA GPIO PM5 */
824 static struct regulator_consumer_supply fixed_reg_usb3_vbus_supply[] = {
825         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.2"),
826 };
827
828 /* Macro for defining fixed regulator sub device data */
829 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
830 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
831         _gpio_nr, _open_drain, _active_high, _boot_state, _millivolts)  \
832         static struct regulator_init_data ri_data_##_var =              \
833         {                                                               \
834                 .supply_regulator = _in_supply,                         \
835                 .num_consumer_supplies =                                \
836                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
837                 .consumer_supplies = fixed_reg_##_name##_supply,        \
838                 .constraints = {                                        \
839                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
840                                         REGULATOR_MODE_STANDBY),        \
841                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
842                                         REGULATOR_CHANGE_STATUS |       \
843                                         REGULATOR_CHANGE_VOLTAGE),      \
844                         .always_on = _always_on,                        \
845                         .boot_on = _boot_on,                            \
846                 },                                                      \
847         };                                                              \
848         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
849         {                                                               \
850                 .supply_name = FIXED_SUPPLY(_name),                     \
851                 .microvolts = _millivolts * 1000,                       \
852                 .gpio = _gpio_nr,                                       \
853                 .gpio_is_open_drain = _open_drain,                      \
854                 .enable_high = _active_high,                            \
855                 .enabled_at_boot = _boot_state,                         \
856                 .init_data = &ri_data_##_var,                           \
857         };                                                              \
858         static struct platform_device fixed_reg_##_var##_dev = {        \
859                 .name = "reg-fixed-voltage",                            \
860                 .id = _id,                                              \
861                 .dev = {                                                \
862                         .platform_data = &fixed_reg_##_var##_pdata,     \
863                 },                                                      \
864         }
865
866 FIXED_REG(1,    avdd_usb_hdmi,  avdd_usb_hdmi,
867         tps65090_rails(DCDC2),  0,      0,
868         MAX77663_GPIO_BASE + MAX77663_GPIO1,    true,   true,   1,      3300);
869
870 FIXED_REG(2,    en_1v8_cam,     en_1v8_cam,
871         max77663_rails(sd2),    0,      0,
872         MAX77663_GPIO_BASE + MAX77663_GPIO5,    false,  true,   0,      1800);
873
874 FIXED_REG(3,    vdd_hdmi_5v0,   vdd_hdmi_5v0,
875         tps65090_rails(DCDC1),  0,      0,
876         TEGRA_GPIO_PK1, false,  true,   0,      5000);
877
878 FIXED_REG(4,    vpp_fuse,       vpp_fuse,
879         max77663_rails(sd2),    0,      0,
880         TEGRA_GPIO_PX4, false,  true,   0,      3300);
881
882 FIXED_REG(5,    usb1_vbus,      usb1_vbus,
883         tps65090_rails(DCDC1),  0,      0,
884         TEGRA_GPIO_PN4, true,   true,   0,      5000);
885
886 FIXED_REG(6,    usb3_vbus,      usb3_vbus,
887         tps65090_rails(DCDC1),  0,      0,
888         TEGRA_GPIO_PK6, true,   true,   0,      5000);
889
890 FIXED_REG(7,    en_1v8_cam_e1611,       en_1v8_cam_e1611,
891         palmas_rails(smps3),    0,      0,
892         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO6,  false,  true,   0,      1800);
893
894 /*
895  * Creating the fixed regulator device tables
896  */
897
898 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
899
900 #define DALMORE_COMMON_FIXED_REG                \
901         ADD_FIXED_REG(usb1_vbus),               \
902         ADD_FIXED_REG(usb3_vbus),               \
903         ADD_FIXED_REG(vdd_hdmi_5v0),
904
905 #define E1612_FIXED_REG                         \
906         ADD_FIXED_REG(avdd_usb_hdmi),           \
907         ADD_FIXED_REG(en_1v8_cam),              \
908         ADD_FIXED_REG(vpp_fuse),                \
909
910 #define E1611_FIXED_REG                         \
911         ADD_FIXED_REG(en_1v8_cam_e1611),
912
913 /* Gpio switch regulator platform data for Dalmore E1611 */
914 static struct platform_device *fixed_reg_devs_e1611_a00[] = {
915         DALMORE_COMMON_FIXED_REG
916         E1611_FIXED_REG
917 };
918
919 /* Gpio switch regulator platform data for Dalmore E1612 */
920 static struct platform_device *fixed_reg_devs_e1612_a00[] = {
921         DALMORE_COMMON_FIXED_REG
922         E1612_FIXED_REG
923 };
924
925 int __init dalmore_palmas_regulator_init(void)
926 {
927         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
928         u32 pmc_ctrl;
929 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
930         int ret;
931
932         ret = gpio_request(TEGRA_GPIO_PCC3, "pmic_nreswarm");
933         if (ret < 0)
934                 pr_err("%s: gpio_request failed for gpio %d\n",
935                                 __func__, TEGRA_GPIO_PCC3);
936         else
937                 gpio_direction_output(TEGRA_GPIO_PCC3, 1);
938 #endif
939         /* TPS65913: Normal state of INT request line is LOW.
940          * configure the power management controller to trigger PMU
941          * interrupts when HIGH.
942          */
943         pmc_ctrl = readl(pmc + PMC_CTRL);
944         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
945         i2c_register_board_info(4, palma_device,
946                         ARRAY_SIZE(palma_device));
947         return 0;
948 }
949
950 static int ac_online(void)
951 {
952         return 1;
953 }
954
955 static struct resource dalmore_pda_resources[] = {
956         [0] = {
957                 .name   = "ac",
958         },
959 };
960
961 static struct pda_power_pdata dalmore_pda_data = {
962         .is_ac_online   = ac_online,
963 };
964
965 static struct platform_device dalmore_pda_power_device = {
966         .name           = "pda-power",
967         .id             = -1,
968         .resource       = dalmore_pda_resources,
969         .num_resources  = ARRAY_SIZE(dalmore_pda_resources),
970         .dev    = {
971                 .platform_data  = &dalmore_pda_data,
972         },
973 };
974
975 static struct tegra_suspend_platform_data dalmore_suspend_data = {
976         .cpu_timer      = 2000,
977         .cpu_off_timer  = 0,
978         .suspend_mode   = TEGRA_SUSPEND_NONE,
979         .core_timer     = 0x7e7e,
980         .core_off_timer = 0,
981         .corereq_high   = true,
982         .sysclkreq_high = true,
983 };
984
985 /* board parameters for cpu dfll */
986 static struct tegra_cl_dvfs_cfg_param dalmore_cl_dvfs_param = {
987         .sample_rate = 12500,
988
989         .force_mode = TEGRA_CL_DVFS_FORCE_FIXED,
990         .cf = 10,
991         .ci = 0,
992         .cg = 2,
993
994         .droop_cut_value = 0xF,
995         .droop_restore_ramp = 0x0,
996         .scale_out_ramp = 0x0,
997 };
998
999 /* TPS51632: fixed 10mV steps from 600mV to 1400mV, with offset 0x23 */
1000 #define PMU_CPU_VDD_MAP_SIZE ((1400000 - 600000) / 10000 + 1)
1001 static struct voltage_reg_map pmu_cpu_vdd_map[PMU_CPU_VDD_MAP_SIZE];
1002 static inline void fill_reg_map(void)
1003 {
1004         int i;
1005         for (i = 0; i < PMU_CPU_VDD_MAP_SIZE; i++) {
1006                 pmu_cpu_vdd_map[i].reg_value = i + 0x23;
1007                 pmu_cpu_vdd_map[i].reg_uV = 600000 + 10000 * i;
1008         }
1009 }
1010
1011 static struct tegra_cl_dvfs_platform_data dalmore_dfll_cpu_data = {
1012         .dfll_clk_name = "dfll_cpu",
1013         .pmu_if = TEGRA_CL_DVFS_PMU_I2C,
1014         .u.pmu_i2c = {
1015                 .fs_rate = 400000,
1016                 .slave_addr = 0x86,
1017                 .reg = 0x00,
1018         },
1019         .vdd_map = pmu_cpu_vdd_map,
1020         .vdd_map_size = PMU_CPU_VDD_MAP_SIZE,
1021
1022         .cfg_param = &dalmore_cl_dvfs_param,
1023 };
1024
1025 static int __init dalmore_max77663_regulator_init(void)
1026 {
1027         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
1028         u32 pmc_ctrl;
1029
1030         /* configure the power management controller to trigger PMU
1031          * interrupts when low */
1032         pmc_ctrl = readl(pmc + PMC_CTRL);
1033         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
1034
1035         i2c_register_board_info(4, max77663_regulators,
1036                                 ARRAY_SIZE(max77663_regulators));
1037
1038         return 0;
1039 }
1040
1041 static int __init dalmore_fixed_regulator_init(void)
1042 {
1043         struct board_info board_info;
1044
1045         if (!machine_is_dalmore())
1046                 return 0;
1047
1048         tegra_get_board_info(&board_info);
1049
1050         if (board_info.board_id == BOARD_E1611)
1051                 return platform_add_devices(fixed_reg_devs_e1611_a00,
1052                                 ARRAY_SIZE(fixed_reg_devs_e1611_a00));
1053         else
1054                 return platform_add_devices(fixed_reg_devs_e1612_a00,
1055                                 ARRAY_SIZE(fixed_reg_devs_e1612_a00));
1056 }
1057 subsys_initcall_sync(dalmore_fixed_regulator_init);
1058
1059 int __init dalmore_regulator_init(void)
1060 {
1061         struct board_info board_info;
1062         i2c_register_board_info(4, tps65090_regulators,
1063                         ARRAY_SIZE(tps65090_regulators));
1064         tegra_get_board_info(&board_info);
1065         if (board_info.board_id == BOARD_E1611)
1066                 dalmore_palmas_regulator_init();
1067         else
1068                 dalmore_max77663_regulator_init();
1069
1070         fill_reg_map();
1071         tegra_cl_dvfs_set_platform_data(&dalmore_dfll_cpu_data);
1072
1073         i2c_register_board_info(4, tps51632_boardinfo, 1);
1074         platform_device_register(&dalmore_pda_power_device);
1075         return 0;
1076 }
1077
1078 int __init dalmore_suspend_init(void)
1079 {
1080         tegra_init_suspend(&dalmore_suspend_data);
1081         return 0;
1082 }
1083