ARM: tegra: dalmore: Add cpu dfll platform data
[linux-3.10.git] / arch / arm / mach-tegra / board-dalmore-power.c
1 /*
2  * arch/arm/mach-tegra/board-dalmore-power.c
3  *
4  * Copyright (C) 2012 NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/io.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/regulator/fixed.h>
28 #include <linux/mfd/max77663-core.h>
29 #include <linux/mfd/palmas.h>
30 #include <linux/mfd/tps65090.h>
31 #include <linux/regulator/max77663-regulator.h>
32 #include <linux/regulator/tps65090-regulator.h>
33 #include <linux/regulator/tps51632-regulator.h>
34 #include <linux/gpio.h>
35
36 #include <asm/mach-types.h>
37
38 #include <mach/iomap.h>
39 #include <mach/irqs.h>
40 #include <mach/gpio-tegra.h>
41
42 #include "pm.h"
43 #include "tegra-board-id.h"
44 #include "board.h"
45 #include "gpio-names.h"
46 #include "board-dalmore.h"
47 #include "tegra_cl_dvfs.h"
48
49 #define PMC_CTRL                0x0
50 #define PMC_CTRL_INTR_LOW       (1 << 17)
51
52 /*TPS65090 consumer rails */
53 static struct regulator_consumer_supply tps65090_dcdc1_supply[] = {
54         REGULATOR_SUPPLY("vdd_sys_5v0", NULL),
55         REGULATOR_SUPPLY("vdd_spk", NULL),
56         REGULATOR_SUPPLY("vdd_sys_modem_5v0", NULL),
57         REGULATOR_SUPPLY("vdd_sys_cam_5v0", NULL),
58 };
59
60 static struct regulator_consumer_supply tps65090_dcdc2_supply[] = {
61         REGULATOR_SUPPLY("vdd_sys_3v3", NULL),
62         REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
63         REGULATOR_SUPPLY("vdd_sys_ds_3v3", NULL),
64         REGULATOR_SUPPLY("vdd_sys_nfc_3v3", NULL),
65         REGULATOR_SUPPLY("vdd_hv_nfc_3v3", NULL),
66         REGULATOR_SUPPLY("vdd_sys_cam_3v3", NULL),
67         REGULATOR_SUPPLY("vdd_sys_sensor_3v3", NULL),
68         REGULATOR_SUPPLY("vdd_sys_audio_3v3", NULL),
69         REGULATOR_SUPPLY("vdd_sys_dtv_3v3", NULL),
70         REGULATOR_SUPPLY("vcc", "0-007c"),
71         REGULATOR_SUPPLY("vcc", "0-0030"),
72 };
73
74 static struct regulator_consumer_supply tps65090_dcdc3_supply[] = {
75         REGULATOR_SUPPLY("vdd_ao", NULL),
76 };
77
78 static struct regulator_consumer_supply tps65090_ldo1_supply[] = {
79         REGULATOR_SUPPLY("vdd_sby_5v0", NULL),
80 };
81
82 static struct regulator_consumer_supply tps65090_ldo2_supply[] = {
83         REGULATOR_SUPPLY("vdd_sby_3v3", NULL),
84 };
85
86 static struct regulator_consumer_supply tps65090_fet1_supply[] = {
87         REGULATOR_SUPPLY("vdd_lcd_bl", NULL),
88 };
89
90 static struct regulator_consumer_supply tps65090_fet3_supply[] = {
91         REGULATOR_SUPPLY("vdd_modem_3v3", NULL),
92 };
93
94 static struct regulator_consumer_supply tps65090_fet4_supply[] = {
95         REGULATOR_SUPPLY("avdd_lcd", NULL),
96         REGULATOR_SUPPLY("vdd_ts_3v3", NULL),
97 };
98
99 static struct regulator_consumer_supply tps65090_fet5_supply[] = {
100         REGULATOR_SUPPLY("vdd_lvds", NULL),
101 };
102
103 static struct regulator_consumer_supply tps65090_fet6_supply[] = {
104         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.2"),
105 };
106
107 static struct regulator_consumer_supply tps65090_fet7_supply[] = {
108         REGULATOR_SUPPLY("vdd_com_3v3", NULL),
109         REGULATOR_SUPPLY("vdd_gps_3v3", NULL),
110 };
111
112 #define TPS65090_PDATA_INIT(_id, _name, _supply_reg,                    \
113                 _always_on, _boot_on, _apply_uV, _en_ext_ctrl, _gpio)   \
114 static struct regulator_init_data ri_data_##_name =                     \
115 {                                                                       \
116         .supply_regulator = _supply_reg,                                \
117         .constraints = {                                                \
118                 .name = tps65090_rails(_id),                            \
119                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
120                                      REGULATOR_MODE_STANDBY),           \
121                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
122                                    REGULATOR_CHANGE_STATUS |            \
123                                    REGULATOR_CHANGE_VOLTAGE),           \
124                 .always_on = _always_on,                                \
125                 .boot_on = _boot_on,                                    \
126                 .apply_uV = _apply_uV,                                  \
127         },                                                              \
128         .num_consumer_supplies =                                        \
129                 ARRAY_SIZE(tps65090_##_name##_supply),                  \
130         .consumer_supplies = tps65090_##_name##_supply,                 \
131 };                                                                      \
132 static struct tps65090_regulator_platform_data                          \
133                         tps65090_regulator_pdata_##_name =              \
134 {                                                                       \
135         .id = TPS65090_REGULATOR_##_id,                                 \
136         .enable_ext_control = _en_ext_ctrl,                             \
137         .gpio = _gpio,                                                  \
138         .reg_init_data = &ri_data_##_name ,                             \
139 }
140
141 TPS65090_PDATA_INIT(DCDC1, dcdc1, NULL, 1, 1, 0, false, -1);
142 TPS65090_PDATA_INIT(DCDC2, dcdc2, NULL, 1, 1, 0, false, -1);
143 TPS65090_PDATA_INIT(DCDC3, dcdc3, NULL, 1, 1, 0, false, -1);
144 TPS65090_PDATA_INIT(LDO1, ldo1, NULL, 1, 1, 0, false, -1);
145 TPS65090_PDATA_INIT(LDO2, ldo2, NULL, 1, 1, 0, false, -1);
146 TPS65090_PDATA_INIT(FET1, fet1, NULL, 0, 0, 0, false, -1);
147 TPS65090_PDATA_INIT(FET3, fet3, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
148 TPS65090_PDATA_INIT(FET4, fet4, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
149 TPS65090_PDATA_INIT(FET5, fet5, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
150 TPS65090_PDATA_INIT(FET6, fet6, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
151 TPS65090_PDATA_INIT(FET7, fet7, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
152
153 #define ADD_TPS65090_REG(_name) (&tps65090_regulator_pdata_##_name)
154 static struct tps65090_regulator_platform_data *tps65090_reg_pdata[] = {
155         ADD_TPS65090_REG(dcdc1),
156         ADD_TPS65090_REG(dcdc2),
157         ADD_TPS65090_REG(dcdc3),
158         ADD_TPS65090_REG(ldo1),
159         ADD_TPS65090_REG(ldo2),
160         ADD_TPS65090_REG(fet1),
161         ADD_TPS65090_REG(fet3),
162         ADD_TPS65090_REG(fet4),
163         ADD_TPS65090_REG(fet5),
164         ADD_TPS65090_REG(fet6),
165         ADD_TPS65090_REG(fet7),
166 };
167
168 static struct tps65090_platform_data tps65090_pdata = {
169         .irq_base = -1,
170         .num_reg_pdata =  ARRAY_SIZE(tps65090_reg_pdata),
171         .reg_pdata = tps65090_reg_pdata
172 };
173
174 /* MAX77663 consumer rails */
175 static struct regulator_consumer_supply max77663_sd0_supply[] = {
176         REGULATOR_SUPPLY("vdd_core", NULL),
177 };
178
179 static struct regulator_consumer_supply max77663_sd1_supply[] = {
180         REGULATOR_SUPPLY("vddio_ddr", NULL),
181         REGULATOR_SUPPLY("vddio_ddr0", NULL),
182         REGULATOR_SUPPLY("vddio_ddr1", NULL),
183 };
184
185 static struct regulator_consumer_supply max77663_sd2_supply[] = {
186         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
187         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
188         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
189         REGULATOR_SUPPLY("vddio_cam", "tegrra_camera"),
190         REGULATOR_SUPPLY("pwrdet_cam", NULL),
191         REGULATOR_SUPPLY("avdd_osc", NULL),
192         REGULATOR_SUPPLY("vddio_sys", NULL),
193         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
194         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
195         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
196         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
197         REGULATOR_SUPPLY("vdd_emmc", NULL),
198         REGULATOR_SUPPLY("vddio_audio", NULL),
199         REGULATOR_SUPPLY("pwrdet_audio", NULL),
200         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
201         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
202         REGULATOR_SUPPLY("vddio_modem", NULL),
203         REGULATOR_SUPPLY("vddio_modem_1v8", NULL),
204         REGULATOR_SUPPLY("vddio_bb", NULL),
205         REGULATOR_SUPPLY("pwrdet_bb", NULL),
206         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
207         REGULATOR_SUPPLY("vddio_uart", NULL),
208         REGULATOR_SUPPLY("pwrdet_uart", NULL),
209         REGULATOR_SUPPLY("vddio_gmi", NULL),
210         REGULATOR_SUPPLY("pwrdet_nand", NULL),
211         REGULATOR_SUPPLY("vdd_sensor_1v8", NULL),
212         REGULATOR_SUPPLY("vdd_mic_1v8", NULL),
213         REGULATOR_SUPPLY("vdd_nfc_1v8", NULL),
214         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
215         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
216         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
217         REGULATOR_SUPPLY("dvdd_lcd", NULL),
218         REGULATOR_SUPPLY("vdd_com_1v8", NULL),
219         REGULATOR_SUPPLY("vddio_com_1v8", NULL),
220         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
221         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
222 };
223
224 static struct regulator_consumer_supply max77663_sd3_supply[] = {
225         REGULATOR_SUPPLY("vcore_emmc", NULL),
226 };
227
228 static struct regulator_consumer_supply max77663_ldo0_supply[] = {
229         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
230         REGULATOR_SUPPLY("avdd_pllx", NULL),
231         REGULATOR_SUPPLY("avdd_plle", NULL),
232         REGULATOR_SUPPLY("avdd_pllm", NULL),
233         REGULATOR_SUPPLY("avdd_pllu", NULL),
234         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
235         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
236         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
237 };
238
239 static struct regulator_consumer_supply max77663_ldo1_supply[] = {
240         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
241 };
242
243 static struct regulator_consumer_supply max77663_ldo2_supply[] = {
244         REGULATOR_SUPPLY("vdd_sensor_2v85", NULL),
245         REGULATOR_SUPPLY("vdd_als", NULL),
246         REGULATOR_SUPPLY("vdd", "1-004c"),
247 };
248
249 static struct regulator_consumer_supply max77663_ldo3_supply[] = {
250         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
251         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
252         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
253 };
254
255 static struct regulator_consumer_supply max77663_ldo4_supply[] = {
256         REGULATOR_SUPPLY("vdd_rtc", NULL),
257 };
258
259 static struct regulator_consumer_supply max77663_ldo5_supply[] = {
260         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
261         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
262         REGULATOR_SUPPLY("avdd_dsi_csi", "tegra_camera"),
263         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.0"),
264         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
265         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
266         REGULATOR_SUPPLY("vddio_bb_hsic", NULL),
267 };
268
269 static struct regulator_consumer_supply max77663_ldo6_supply[] = {
270         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
271         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
272 };
273
274 /* FIXME!! Put the device address of camera */
275 static struct regulator_consumer_supply max77663_ldo7_supply[] = {
276         REGULATOR_SUPPLY("avdd_cam1", NULL),
277         REGULATOR_SUPPLY("avdd_2v8_cam_af", NULL),
278 };
279
280 /* FIXME!! Put the device address of camera */
281 static struct regulator_consumer_supply max77663_ldo8_supply[] = {
282         REGULATOR_SUPPLY("avdd_cam2", NULL),
283 };
284
285 static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
286         {
287                 .src = FPS_SRC_0,
288                 .en_src = FPS_EN_SRC_EN0,
289                 .time_period = FPS_TIME_PERIOD_DEF,
290         },
291         {
292                 .src = FPS_SRC_1,
293                 .en_src = FPS_EN_SRC_EN1,
294                 .time_period = FPS_TIME_PERIOD_DEF,
295         },
296         {
297                 .src = FPS_SRC_2,
298                 .en_src = FPS_EN_SRC_EN0,
299                 .time_period = FPS_TIME_PERIOD_DEF,
300         },
301 };
302
303 #define MAX77663_PDATA_INIT(_rid, _id, _min_uV, _max_uV, _supply_reg,   \
304                 _always_on, _boot_on, _apply_uV,                        \
305                 _fps_src, _fps_pu_period, _fps_pd_period, _flags)       \
306         static struct regulator_init_data max77663_regulator_idata_##_id = {   \
307                 .supply_regulator = _supply_reg,                        \
308                 .constraints = {                                        \
309                         .name = max77663_rails(_id),                    \
310                         .min_uV = _min_uV,                              \
311                         .max_uV = _max_uV,                              \
312                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
313                                              REGULATOR_MODE_STANDBY),   \
314                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
315                                            REGULATOR_CHANGE_STATUS |    \
316                                            REGULATOR_CHANGE_VOLTAGE),   \
317                         .always_on = _always_on,                        \
318                         .boot_on = _boot_on,                            \
319                         .apply_uV = _apply_uV,                          \
320                 },                                                      \
321                 .num_consumer_supplies =                                \
322                         ARRAY_SIZE(max77663_##_id##_supply),            \
323                 .consumer_supplies = max77663_##_id##_supply,           \
324         };                                                              \
325 static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id =\
326 {                                                                       \
327                 .reg_init_data = &max77663_regulator_idata_##_id,       \
328                 .id = MAX77663_REGULATOR_ID_##_rid,                     \
329                 .fps_src = _fps_src,                                    \
330                 .fps_pu_period = _fps_pu_period,                        \
331                 .fps_pd_period = _fps_pd_period,                        \
332                 .fps_cfgs = max77663_fps_cfgs,                          \
333                 .flags = _flags,                                        \
334         }
335
336 MAX77663_PDATA_INIT(SD0, sd0,  900000, 1400000, tps65090_rails(DCDC3), 1, 1, 0,
337                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
338
339 MAX77663_PDATA_INIT(SD1, sd1,  1200000, 1200000, tps65090_rails(DCDC3), 1, 1, 1,
340                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
341
342 MAX77663_PDATA_INIT(SD2, sd2,  1800000, 1800000, tps65090_rails(DCDC3), 1, 1, 1,
343                     FPS_SRC_0, -1, -1, 0);
344
345 MAX77663_PDATA_INIT(SD3, sd3,  2850000, 2850000, tps65090_rails(DCDC3), 1, 1, 1,
346                     FPS_SRC_NONE, -1, -1, 0);
347
348 MAX77663_PDATA_INIT(LDO0, ldo0, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
349                     FPS_SRC_1, -1, -1, 0);
350
351 MAX77663_PDATA_INIT(LDO1, ldo1, 1050000, 1050000, max77663_rails(sd2), 0, 0, 1,
352                     FPS_SRC_NONE, -1, -1, 0);
353
354 MAX77663_PDATA_INIT(LDO2, ldo2, 2850000, 2850000, tps65090_rails(DCDC2), 1, 1,
355                     1, FPS_SRC_1, -1, -1, 0);
356
357 MAX77663_PDATA_INIT(LDO3, ldo3, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
358                     FPS_SRC_NONE, -1, -1, 0);
359
360 MAX77663_PDATA_INIT(LDO4, ldo4, 1100000, 1100000, tps65090_rails(DCDC2), 1, 1,
361                     1, FPS_SRC_NONE, -1, -1, 0);
362
363 MAX77663_PDATA_INIT(LDO5, ldo5, 1200000, 1200000, max77663_rails(sd2), 0, 1, 1,
364                     FPS_SRC_NONE, -1, -1, 0);
365
366 MAX77663_PDATA_INIT(LDO6, ldo6, 1800000, 3300000, tps65090_rails(DCDC2), 0, 0, 0,
367                     FPS_SRC_NONE, -1, -1, 0);
368
369 MAX77663_PDATA_INIT(LDO7, ldo7, 2800000, 2800000, tps65090_rails(DCDC2), 0, 0, 1,
370                     FPS_SRC_NONE, -1, -1, 0);
371
372 MAX77663_PDATA_INIT(LDO8, ldo8, 2800000, 2800000, tps65090_rails(DCDC2), 0, 1, 1,
373                     FPS_SRC_1, -1, -1, 0);
374
375 #define MAX77663_REG(_id, _data) (&max77663_regulator_pdata_##_data)
376
377 static struct max77663_regulator_platform_data *max77663_reg_pdata[] = {
378         MAX77663_REG(SD0, sd0),
379         MAX77663_REG(SD1, sd1),
380         MAX77663_REG(SD2, sd2),
381         MAX77663_REG(SD3, sd3),
382         MAX77663_REG(LDO0, ldo0),
383         MAX77663_REG(LDO1, ldo1),
384         MAX77663_REG(LDO2, ldo2),
385         MAX77663_REG(LDO3, ldo3),
386         MAX77663_REG(LDO4, ldo4),
387         MAX77663_REG(LDO5, ldo5),
388         MAX77663_REG(LDO6, ldo6),
389         MAX77663_REG(LDO7, ldo7),
390         MAX77663_REG(LDO8, ldo8),
391 };
392
393 static struct max77663_gpio_config max77663_gpio_cfgs[] = {
394         {
395                 .gpio = MAX77663_GPIO0,
396                 .dir = GPIO_DIR_OUT,
397                 .dout = GPIO_DOUT_LOW,
398                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
399                 .alternate = GPIO_ALT_DISABLE,
400         },
401         {
402                 .gpio = MAX77663_GPIO1,
403                 .dir = GPIO_DIR_IN,
404                 .dout = GPIO_DOUT_HIGH,
405                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
406                 .pull_up = GPIO_PU_ENABLE,
407                 .alternate = GPIO_ALT_DISABLE,
408         },
409         {
410                 .gpio = MAX77663_GPIO2,
411                 .dir = GPIO_DIR_OUT,
412                 .dout = GPIO_DOUT_HIGH,
413                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
414                 .pull_up = GPIO_PU_ENABLE,
415                 .alternate = GPIO_ALT_DISABLE,
416         },
417         {
418                 .gpio = MAX77663_GPIO3,
419                 .dir = GPIO_DIR_OUT,
420                 .dout = GPIO_DOUT_HIGH,
421                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
422                 .pull_up = GPIO_PU_ENABLE,
423                 .alternate = GPIO_ALT_DISABLE,
424         },
425         {
426                 .gpio = MAX77663_GPIO4,
427                 .dir = GPIO_DIR_OUT,
428                 .dout = GPIO_DOUT_HIGH,
429                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
430                 .alternate = GPIO_ALT_ENABLE,
431         },
432         {
433                 .gpio = MAX77663_GPIO5,
434                 .dir = GPIO_DIR_OUT,
435                 .dout = GPIO_DOUT_LOW,
436                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
437                 .alternate = GPIO_ALT_DISABLE,
438         },
439         {
440                 .gpio = MAX77663_GPIO6,
441                 .dir = GPIO_DIR_OUT,
442                 .dout = GPIO_DOUT_LOW,
443                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
444                 .alternate = GPIO_ALT_DISABLE,
445         },
446         {
447                 .gpio = MAX77663_GPIO7,
448                 .dir = GPIO_DIR_OUT,
449                 .dout = GPIO_DOUT_LOW,
450                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
451                 .alternate = GPIO_ALT_DISABLE,
452         },
453 };
454
455 static struct max77663_platform_data max77663_pdata = {
456         .irq_base       = MAX77663_IRQ_BASE,
457         .gpio_base      = MAX77663_GPIO_BASE,
458
459         .num_gpio_cfgs  = ARRAY_SIZE(max77663_gpio_cfgs),
460         .gpio_cfgs      = max77663_gpio_cfgs,
461
462         .regulator_pdata = max77663_reg_pdata,
463         .num_regulator_pdata = ARRAY_SIZE(max77663_reg_pdata),
464
465         .rtc_i2c_addr   = 0x68,
466
467         .use_power_off  = false,
468 };
469
470 static struct i2c_board_info __initdata max77663_regulators[] = {
471         {
472                 /* The I2C address was determined by OTP factory setting */
473                 I2C_BOARD_INFO("max77663", 0x3c),
474                 .irq            = INT_EXTERNAL_PMU,
475                 .platform_data  = &max77663_pdata,
476         },
477 };
478
479 static struct i2c_board_info __initdata tps65090_regulators[] = {
480         {
481                 I2C_BOARD_INFO("tps65090", 0x48),
482                 .platform_data  = &tps65090_pdata,
483         },
484 };
485
486 /* TPS51632 DC-DC converter */
487 static struct regulator_consumer_supply tps51632_dcdc_supply[] = {
488         REGULATOR_SUPPLY("vdd_cpu", NULL),
489 };
490
491 static struct regulator_init_data tps51632_init_data = {
492         .constraints = {                                                \
493                 .min_uV = 500000,                                       \
494                 .max_uV = 1520000,                                      \
495                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
496                                         REGULATOR_MODE_STANDBY),        \
497                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
498                                         REGULATOR_CHANGE_STATUS |       \
499                                         REGULATOR_CHANGE_VOLTAGE),      \
500                 .always_on = 1,                                         \
501                 .boot_on =  1,                                          \
502                 .apply_uV = 0,                                          \
503         },                                                              \
504         .num_consumer_supplies = ARRAY_SIZE(tps51632_dcdc_supply),      \
505                 .consumer_supplies = tps51632_dcdc_supply,              \
506 };
507
508 static struct tps51632_regulator_platform_data tps51632_pdata = {
509         .reg_init_data = &tps51632_init_data,           \
510         .enable_pwm = false,                            \
511         .max_voltage_uV = 1520000,                      \
512         .base_voltage_uV = 500000,                      \
513         .slew_rate_uv_per_us = 6000,                    \
514 };
515
516 static struct i2c_board_info __initdata tps51632_boardinfo[] = {
517         {
518                 I2C_BOARD_INFO("tps51632", 0x43),
519                 .platform_data  = &tps51632_pdata,
520         },
521 };
522
523 /************************ Palmas based regulator ****************/
524 static struct regulator_consumer_supply palmas_smps12_supply[] = {
525         REGULATOR_SUPPLY("vddio_ddr3l", NULL),
526         REGULATOR_SUPPLY("vcore_ddr3l", NULL),
527         REGULATOR_SUPPLY("vref2_ddr3l", NULL),
528 };
529
530 static struct regulator_consumer_supply palmas_smps3_supply[] = {
531         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
532         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
533         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
534         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
535         REGULATOR_SUPPLY("vdd_emmc", "sdhci-tegra.3"),
536         REGULATOR_SUPPLY("avdd_osc", NULL),
537         REGULATOR_SUPPLY("vddio_sys", NULL),
538         REGULATOR_SUPPLY("vddio_audio", NULL),
539         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
540         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
541         REGULATOR_SUPPLY("vddio_uart", NULL),
542         REGULATOR_SUPPLY("vddio_gmi", NULL),
543         REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
544         REGULATOR_SUPPLY("vddio_bb", NULL),
545         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
546         REGULATOR_SUPPLY("vddio_com_1v8", NULL),
547         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
548         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
549         REGULATOR_SUPPLY("vdd_modem", NULL),
550         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
551         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
552         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
553         REGULATOR_SUPPLY("dvdd_lcd", NULL),
554
555 };
556
557 static struct regulator_consumer_supply palmas_smps45_supply[] = {
558         REGULATOR_SUPPLY("vdd_core", NULL),
559 };
560
561 static struct regulator_consumer_supply palmas_smps8_supply[] = {
562         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
563         REGULATOR_SUPPLY("avdd_pllm", NULL),
564         REGULATOR_SUPPLY("avdd_pllu", NULL),
565         REGULATOR_SUPPLY("avdd_pllx", NULL),
566         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
567         REGULATOR_SUPPLY("avdd_plle", NULL),
568         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
569         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
570         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
571         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
572         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
573         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
574
575 };
576
577 static struct regulator_consumer_supply palmas_smps9_supply[] = {
578         REGULATOR_SUPPLY("vcore_emmc", "sdhci-tegra.3"),
579 };
580
581 static struct regulator_consumer_supply palmas_ldo1_supply[] = {
582         REGULATOR_SUPPLY("avdd_cam1", NULL),
583 };
584
585 static struct regulator_consumer_supply palmas_ldo2_supply[] = {
586         REGULATOR_SUPPLY("avdd_cam2", NULL),
587 };
588
589 static struct regulator_consumer_supply palmas_ldo3_supply[] = {
590         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.0"),
591         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
592         REGULATOR_SUPPLY("vddio_hsic_bb", NULL),
593         REGULATOR_SUPPLY("avdd_csi_dsi", "tegradc.0"),
594         REGULATOR_SUPPLY("avdd_csi_dsi", "tegradc.1"),
595         REGULATOR_SUPPLY("avdd_csi_dsi", "tegra_camera"),
596 };
597
598 static struct regulator_consumer_supply palmas_ldo4_supply[] = {
599         REGULATOR_SUPPLY("vpp_fuse", NULL),
600 };
601
602 static struct regulator_consumer_supply palmas_ldo6_supply[] = {
603         REGULATOR_SUPPLY("vdd_temp", NULL),
604         REGULATOR_SUPPLY("vdd_sensor", NULL),
605 };
606
607 static struct regulator_consumer_supply palmas_ldo7_supply[] = {
608         REGULATOR_SUPPLY("vdd_af_cam1", NULL),
609 };
610 static struct regulator_consumer_supply palmas_ldo8_supply[] = {
611         REGULATOR_SUPPLY("vdd_rtc", NULL),
612 };
613 static struct regulator_consumer_supply palmas_ldo9_supply[] = {
614         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
615 };
616
617 static struct regulator_consumer_supply palmas_ldoln_supply[] = {
618         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
619 };
620
621 static struct regulator_consumer_supply palmas_ldousb_supply[] = {
622         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
623         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
624         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
625         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
626 };
627
628 #define PALMAS_PDATA_INIT(_name, _minmv, _maxmv, _supply_reg, _always_on, \
629         _boot_on, _apply_uv)                                            \
630         static struct regulator_init_data reg_idata_##_name = {         \
631                 .constraints = {                                        \
632                         .name = palmas_rails(_name),                    \
633                         .min_uV = (_minmv)*1000,                        \
634                         .max_uV = (_maxmv)*1000,                        \
635                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
636                                         REGULATOR_MODE_STANDBY),        \
637                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
638                                         REGULATOR_CHANGE_STATUS |       \
639                                         REGULATOR_CHANGE_VOLTAGE),      \
640                         .always_on = _always_on,                        \
641                         .boot_on = _boot_on,                            \
642                         .apply_uV = _apply_uv,                          \
643                 },                                                      \
644                 .num_consumer_supplies =                                \
645                         ARRAY_SIZE(palmas_##_name##_supply),            \
646                 .consumer_supplies = palmas_##_name##_supply,           \
647                 .supply_regulator = _supply_reg,                        \
648         }
649
650 PALMAS_PDATA_INIT(smps12, 1350,  1350, tps65090_rails(DCDC3), 0, 0, 0);
651 PALMAS_PDATA_INIT(smps3, 1800,  1800, tps65090_rails(DCDC3), 0, 0, 0);
652 PALMAS_PDATA_INIT(smps45, 900,  1400, tps65090_rails(DCDC2), 1, 1, 0);
653 PALMAS_PDATA_INIT(smps8, 1050,  1050, tps65090_rails(DCDC2), 0, 1, 1);
654 PALMAS_PDATA_INIT(smps9, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 0);
655 PALMAS_PDATA_INIT(ldo1, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
656 PALMAS_PDATA_INIT(ldo2, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
657 PALMAS_PDATA_INIT(ldo3, 1200,  1200, palmas_rails(smps3), 0, 0, 1);
658 PALMAS_PDATA_INIT(ldo4, 1800,  1800, tps65090_rails(DCDC2), 0, 0, 0);
659 PALMAS_PDATA_INIT(ldo6, 2850,  2850, tps65090_rails(DCDC2), 0, 0, 1);
660 PALMAS_PDATA_INIT(ldo7, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
661 PALMAS_PDATA_INIT(ldo8, 1100,  1100, tps65090_rails(DCDC3), 1, 1, 1);
662 PALMAS_PDATA_INIT(ldo9, 1800,  3300, palmas_rails(smps9), 0, 0, 1);
663 PALMAS_PDATA_INIT(ldoln, 3300, 3300, tps65090_rails(DCDC1), 0, 0, 1);
664 PALMAS_PDATA_INIT(ldousb, 3300,  3300, tps65090_rails(DCDC1), 0, 0, 1);
665
666 #define PALMAS_REG_PDATA(_sname) &reg_idata_##_sname
667
668 static struct regulator_init_data *dalmore_e1611_reg_data[] = {
669         PALMAS_REG_PDATA(smps12),
670         NULL,
671         PALMAS_REG_PDATA(smps3),
672         PALMAS_REG_PDATA(smps45),
673         NULL,
674         NULL,
675         NULL,
676         PALMAS_REG_PDATA(smps8),
677         PALMAS_REG_PDATA(smps9),
678         NULL,
679         PALMAS_REG_PDATA(ldo1),
680         PALMAS_REG_PDATA(ldo2),
681         PALMAS_REG_PDATA(ldo3),
682         PALMAS_REG_PDATA(ldo4),
683         NULL,
684         PALMAS_REG_PDATA(ldo6),
685         PALMAS_REG_PDATA(ldo7),
686         PALMAS_REG_PDATA(ldo8),
687         PALMAS_REG_PDATA(ldo9),
688         PALMAS_REG_PDATA(ldoln),
689         PALMAS_REG_PDATA(ldousb),
690         NULL,
691         NULL,
692         NULL,
693         NULL,
694         NULL,
695 };
696
697 #define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep,   \
698                 _tstep, _vsel)                                          \
699         static struct palmas_reg_init reg_init_data_##_name = {         \
700                 .warm_reset = _warm_reset,                              \
701                 .roof_floor =   _roof_floor,                            \
702                 .mode_sleep = _mode_sleep,                              \
703                 .tstep = _tstep,                                        \
704                 .vsel = _vsel,                                          \
705         }
706
707 PALMAS_REG_INIT(smps12, 0, 0, 0, 0, 0);
708 PALMAS_REG_INIT(smps123, 0, 0, 0, 0, 0);
709 PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
710 PALMAS_REG_INIT(smps45, 0, 0, 0, 0, 0);
711 PALMAS_REG_INIT(smps457, 0, 0, 0, 0, 0);
712 PALMAS_REG_INIT(smps6, 0, 0, 0, 0, 0);
713 PALMAS_REG_INIT(smps7, 0, 0, 0, 0, 0);
714 PALMAS_REG_INIT(smps8, 0, 0, 0, 0, 0);
715 PALMAS_REG_INIT(smps9, 0, 0, 0, 0, 0);
716 PALMAS_REG_INIT(smps10, 0, 0, 0, 0, 0);
717 PALMAS_REG_INIT(ldo1, 0, 0, 0, 0, 0);
718 PALMAS_REG_INIT(ldo2, 0, 0, 0, 0, 0);
719 PALMAS_REG_INIT(ldo3, 0, 0, 0, 0, 0);
720 PALMAS_REG_INIT(ldo4, 0, 0, 0, 0, 0);
721 PALMAS_REG_INIT(ldo5, 0, 0, 0, 0, 0);
722 PALMAS_REG_INIT(ldo6, 0, 0, 0, 0, 0);
723 PALMAS_REG_INIT(ldo7, 0, 0, 0, 0, 0);
724 PALMAS_REG_INIT(ldo8, 0, 0, 0, 0, 0);
725 PALMAS_REG_INIT(ldo9, 0, 0, 0, 0, 0);
726 PALMAS_REG_INIT(ldoln, 0, 0, 0, 0, 0);
727 PALMAS_REG_INIT(ldousb, 0, 0, 0, 0, 0);
728 PALMAS_REG_INIT(regen1, 0, 0, 0, 0, 0);
729 PALMAS_REG_INIT(regen2, 0, 0, 0, 0, 0);
730 PALMAS_REG_INIT(regen3, 0, 0, 0, 0, 0);
731 PALMAS_REG_INIT(sysen1, 0, 0, 0, 0, 0);
732 PALMAS_REG_INIT(sysen2, 0, 0, 0, 0, 0);
733
734 #define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
735 static struct palmas_reg_init *dalmore_e1611_reg_init[] = {
736         PALMAS_REG_INIT_DATA(smps12),
737         PALMAS_REG_INIT_DATA(smps123),
738         PALMAS_REG_INIT_DATA(smps3),
739         PALMAS_REG_INIT_DATA(smps45),
740         PALMAS_REG_INIT_DATA(smps457),
741         PALMAS_REG_INIT_DATA(smps6),
742         PALMAS_REG_INIT_DATA(smps7),
743         PALMAS_REG_INIT_DATA(smps8),
744         PALMAS_REG_INIT_DATA(smps9),
745         PALMAS_REG_INIT_DATA(smps10),
746         PALMAS_REG_INIT_DATA(ldo1),
747         PALMAS_REG_INIT_DATA(ldo2),
748         PALMAS_REG_INIT_DATA(ldo3),
749         PALMAS_REG_INIT_DATA(ldo4),
750         PALMAS_REG_INIT_DATA(ldo5),
751         PALMAS_REG_INIT_DATA(ldo6),
752         PALMAS_REG_INIT_DATA(ldo7),
753         PALMAS_REG_INIT_DATA(ldo8),
754         PALMAS_REG_INIT_DATA(ldo9),
755         PALMAS_REG_INIT_DATA(ldoln),
756         PALMAS_REG_INIT_DATA(ldousb),
757         PALMAS_REG_INIT_DATA(regen1),
758         PALMAS_REG_INIT_DATA(regen2),
759         PALMAS_REG_INIT_DATA(regen3),
760         PALMAS_REG_INIT_DATA(sysen1),
761         PALMAS_REG_INIT_DATA(sysen2),
762 };
763
764 static struct palmas_pmic_platform_data pmic_platform = {
765         .reg_data = dalmore_e1611_reg_data,
766         .reg_init = dalmore_e1611_reg_init,
767 };
768
769 static struct palmas_platform_data palmas_pdata = {
770         .gpio_base = PALMAS_TEGRA_GPIO_BASE,
771         .irq_base = PALMAS_TEGRA_IRQ_BASE,
772         .pmic_pdata = &pmic_platform,
773         .mux_from_pdata = true,
774         .pad1 = 0,
775         .pad2 = 0,
776 };
777
778 static struct i2c_board_info palma_device[] = {
779         {
780                 I2C_BOARD_INFO("tps65913", 0x58),
781                 .irq            = INT_EXTERNAL_PMU,
782                 .platform_data  = &palmas_pdata,
783         },
784 };
785
786 /* EN_AVDD_USB_HDMI From PMU GP1 */
787 static struct regulator_consumer_supply fixed_reg_avdd_usb_hdmi_supply[] = {
788         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
789         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
790         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
791         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
792         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
793         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
794 };
795
796 /* EN_CAM_1v8 From PMU GP5 */
797 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
798         REGULATOR_SUPPLY("dvdd_cam", NULL),
799         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
800 };
801
802 /* EN_CAM_1v8 on e1611 From PMU GP6 */
803 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_e1611_supply[] = {
804         REGULATOR_SUPPLY("dvdd_cam", NULL),
805         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
806 };
807
808 static struct regulator_consumer_supply fixed_reg_vdd_hdmi_5v0_supply[] = {
809         REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
810 };
811
812 /* EN_USB1_VBUS From TEGRA GPIO PN4 PR3(T30) */
813 static struct regulator_consumer_supply fixed_reg_usb1_vbus_supply[] = {
814         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
815 };
816
817 /* EN_3V3_FUSE From TEGRA GPIO PX4 */
818 static struct regulator_consumer_supply fixed_reg_vpp_fuse_supply[] = {
819         REGULATOR_SUPPLY("vpp_fuse", NULL),
820 };
821
822 /* EN_USB3_VBUS From TEGRA GPIO PM5 */
823 static struct regulator_consumer_supply fixed_reg_usb3_vbus_supply[] = {
824         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.2"),
825 };
826
827 /* Macro for defining fixed regulator sub device data */
828 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
829 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
830         _gpio_nr, _open_drain, _active_high, _boot_state, _millivolts)  \
831         static struct regulator_init_data ri_data_##_var =              \
832         {                                                               \
833                 .supply_regulator = _in_supply,                         \
834                 .num_consumer_supplies =                                \
835                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
836                 .consumer_supplies = fixed_reg_##_name##_supply,        \
837                 .constraints = {                                        \
838                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
839                                         REGULATOR_MODE_STANDBY),        \
840                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
841                                         REGULATOR_CHANGE_STATUS |       \
842                                         REGULATOR_CHANGE_VOLTAGE),      \
843                         .always_on = _always_on,                        \
844                         .boot_on = _boot_on,                            \
845                 },                                                      \
846         };                                                              \
847         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
848         {                                                               \
849                 .supply_name = FIXED_SUPPLY(_name),                     \
850                 .microvolts = _millivolts * 1000,                       \
851                 .gpio = _gpio_nr,                                       \
852                 .gpio_is_open_drain = _open_drain,                      \
853                 .enable_high = _active_high,                            \
854                 .enabled_at_boot = _boot_state,                         \
855                 .init_data = &ri_data_##_var,                           \
856         };                                                              \
857         static struct platform_device fixed_reg_##_var##_dev = {        \
858                 .name = "reg-fixed-voltage",                            \
859                 .id = _id,                                              \
860                 .dev = {                                                \
861                         .platform_data = &fixed_reg_##_var##_pdata,     \
862                 },                                                      \
863         }
864
865 FIXED_REG(1,    avdd_usb_hdmi,  avdd_usb_hdmi,
866         tps65090_rails(DCDC2),  0,      0,
867         MAX77663_GPIO_BASE + MAX77663_GPIO1,    true,   true,   1,      3300);
868
869 FIXED_REG(2,    en_1v8_cam,     en_1v8_cam,
870         max77663_rails(sd2),    0,      0,
871         MAX77663_GPIO_BASE + MAX77663_GPIO5,    false,  true,   0,      1800);
872
873 FIXED_REG(3,    vdd_hdmi_5v0,   vdd_hdmi_5v0,
874         tps65090_rails(DCDC1),  0,      0,
875         TEGRA_GPIO_PK1, false,  true,   0,      5000);
876
877 FIXED_REG(4,    vpp_fuse,       vpp_fuse,
878         max77663_rails(sd2),    0,      0,
879         TEGRA_GPIO_PX4, false,  true,   0,      3300);
880
881 FIXED_REG(5,    usb1_vbus,      usb1_vbus,
882         tps65090_rails(DCDC1),  0,      0,
883         TEGRA_GPIO_PN4, true,   true,   0,      5000);
884
885 FIXED_REG(6,    usb3_vbus,      usb3_vbus,
886         tps65090_rails(DCDC1),  0,      0,
887         TEGRA_GPIO_PK6, true,   true,   0,      5000);
888
889 FIXED_REG(7,    en_1v8_cam_e1611,       en_1v8_cam_e1611,
890         palmas_rails(smps3),    0,      0,
891         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO6,  false,  true,   0,      1800);
892
893 /*
894  * Creating the fixed regulator device tables
895  */
896
897 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
898
899 #define DALMORE_COMMON_FIXED_REG                \
900         ADD_FIXED_REG(usb1_vbus),               \
901         ADD_FIXED_REG(usb3_vbus),               \
902         ADD_FIXED_REG(vdd_hdmi_5v0),
903
904 #define E1612_FIXED_REG                         \
905         ADD_FIXED_REG(avdd_usb_hdmi),           \
906         ADD_FIXED_REG(en_1v8_cam),              \
907         ADD_FIXED_REG(vpp_fuse),                \
908
909 #define E1611_FIXED_REG                         \
910         ADD_FIXED_REG(en_1v8_cam_e1611),
911
912 /* Gpio switch regulator platform data for Dalmore E1611 */
913 static struct platform_device *fixed_reg_devs_e1611_a00[] = {
914         DALMORE_COMMON_FIXED_REG
915         E1611_FIXED_REG
916 };
917
918 /* Gpio switch regulator platform data for Dalmore E1612 */
919 static struct platform_device *fixed_reg_devs_e1612_a00[] = {
920         DALMORE_COMMON_FIXED_REG
921         E1612_FIXED_REG
922 };
923
924 int __init dalmore_palmas_regulator_init(void)
925 {
926         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
927         u32 pmc_ctrl;
928 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
929         int ret;
930
931         ret = gpio_request(TEGRA_GPIO_PCC3, "pmic_nreswarm");
932         if (ret < 0)
933                 pr_err("%s: gpio_request failed for gpio %d\n",
934                                 __func__, TEGRA_GPIO_PCC3);
935         else
936                 gpio_direction_output(TEGRA_GPIO_PCC3, 1);
937 #endif
938         /* TPS65913: Normal state of INT request line is LOW.
939          * configure the power management controller to trigger PMU
940          * interrupts when HIGH.
941          */
942         pmc_ctrl = readl(pmc + PMC_CTRL);
943         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
944         i2c_register_board_info(4, palma_device,
945                         ARRAY_SIZE(palma_device));
946         return 0;
947 }
948
949 static int ac_online(void)
950 {
951         return 1;
952 }
953
954 static struct resource dalmore_pda_resources[] = {
955         [0] = {
956                 .name   = "ac",
957         },
958 };
959
960 static struct pda_power_pdata dalmore_pda_data = {
961         .is_ac_online   = ac_online,
962 };
963
964 static struct platform_device dalmore_pda_power_device = {
965         .name           = "pda-power",
966         .id             = -1,
967         .resource       = dalmore_pda_resources,
968         .num_resources  = ARRAY_SIZE(dalmore_pda_resources),
969         .dev    = {
970                 .platform_data  = &dalmore_pda_data,
971         },
972 };
973
974 static struct tegra_suspend_platform_data dalmore_suspend_data = {
975         .cpu_timer      = 2000,
976         .cpu_off_timer  = 0,
977         .suspend_mode   = TEGRA_SUSPEND_NONE,
978         .core_timer     = 0x7e7e,
979         .core_off_timer = 0,
980         .corereq_high   = true,
981         .sysclkreq_high = true,
982 };
983
984 /* board parameters for cpu dfll */
985 static struct tegra_cl_dvfs_cfg_param dalmore_cl_dvfs_param = {
986         .sample_rate = 12500,
987
988         .force_mode = TEGRA_CL_DVFS_FORCE_FIXED,
989         .cf = 10,
990         .ci = 0,
991         .cg = 2,
992
993         .droop_cut_value = 0xF,
994         .droop_restore_ramp = 0x0,
995         .scale_out_ramp = 0x0,
996 };
997
998 /* TPS51632: fixed 10mV steps from 600mV to 1400mV, with offset 0x23 */
999 #define PMU_CPU_VDD_MAP_SIZE ((1400000 - 600000) / 10000 + 1)
1000 static struct voltage_reg_map pmu_cpu_vdd_map[PMU_CPU_VDD_MAP_SIZE];
1001 static inline void fill_reg_map(void)
1002 {
1003         int i;
1004         for (i = 0; i < PMU_CPU_VDD_MAP_SIZE; i++) {
1005                 pmu_cpu_vdd_map[i].reg_value = i + 0x23;
1006                 pmu_cpu_vdd_map[i].reg_uV = 600000 + 10000 * i;
1007         }
1008 }
1009
1010 static struct tegra_cl_dvfs_platform_data dalmore_dfll_cpu_data = {
1011         .dfll_clk_name = "dfll_cpu",
1012         .pmu_if = TEGRA_CL_DVFS_PMU_I2C,
1013         .u.pmu_i2c = {
1014                 .fs_rate = 400000,
1015                 .slave_addr = 0x86,
1016                 .reg = 0x00,
1017         },
1018         .vdd_map = pmu_cpu_vdd_map,
1019         .vdd_map_size = PMU_CPU_VDD_MAP_SIZE,
1020
1021         .cfg_param = &dalmore_cl_dvfs_param,
1022 };
1023
1024 static int __init dalmore_max77663_regulator_init(void)
1025 {
1026         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
1027         u32 pmc_ctrl;
1028
1029         /* configure the power management controller to trigger PMU
1030          * interrupts when low */
1031         pmc_ctrl = readl(pmc + PMC_CTRL);
1032         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
1033
1034         i2c_register_board_info(4, max77663_regulators,
1035                                 ARRAY_SIZE(max77663_regulators));
1036
1037         return 0;
1038 }
1039
1040 static int __init dalmore_fixed_regulator_init(void)
1041 {
1042         struct board_info board_info;
1043
1044         if (!machine_is_dalmore())
1045                 return 0;
1046
1047         tegra_get_board_info(&board_info);
1048
1049         if (board_info.board_id == BOARD_E1611)
1050                 return platform_add_devices(fixed_reg_devs_e1611_a00,
1051                                 ARRAY_SIZE(fixed_reg_devs_e1611_a00));
1052         else
1053                 return platform_add_devices(fixed_reg_devs_e1612_a00,
1054                                 ARRAY_SIZE(fixed_reg_devs_e1612_a00));
1055 }
1056 subsys_initcall_sync(dalmore_fixed_regulator_init);
1057
1058 int __init dalmore_regulator_init(void)
1059 {
1060         struct board_info board_info;
1061         i2c_register_board_info(4, tps65090_regulators,
1062                         ARRAY_SIZE(tps65090_regulators));
1063         tegra_get_board_info(&board_info);
1064         if (board_info.board_id == BOARD_E1611)
1065                 dalmore_palmas_regulator_init();
1066         else
1067                 dalmore_max77663_regulator_init();
1068
1069         fill_reg_map();
1070         tegra_cl_dvfs_set_platform_data(&dalmore_dfll_cpu_data);
1071
1072         dalmore_max77663_regulator_init();
1073         i2c_register_board_info(4, tps51632_boardinfo, 1);
1074         platform_device_register(&dalmore_pda_power_device);
1075         return 0;
1076 }
1077
1078 int __init dalmore_suspend_init(void)
1079 {
1080         tegra_init_suspend(&dalmore_suspend_data);
1081         return 0;
1082 }
1083