arm: tegra: power: enable dynamic VDD_CPU EDP capping
[linux-3.10.git] / arch / arm / mach-tegra / board-dalmore-power.c
1 /*
2  * arch/arm/mach-tegra/board-dalmore-power.c
3  *
4  * Copyright (C) 2012 NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/io.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/regulator/fixed.h>
28 #include <linux/mfd/max77663-core.h>
29 #include <linux/mfd/palmas.h>
30 #include <linux/mfd/tps65090.h>
31 #include <linux/regulator/max77663-regulator.h>
32 #include <linux/regulator/tps65090-regulator.h>
33 #include <linux/regulator/tps51632-regulator.h>
34 #include <linux/gpio.h>
35 #include <linux/regulator/userspace-consumer.h>
36
37 #include <asm/mach-types.h>
38
39 #include <mach/iomap.h>
40 #include <mach/irqs.h>
41 #include <mach/edp.h>
42 #include <mach/gpio-tegra.h>
43
44 #include "pm.h"
45 #include "tegra-board-id.h"
46 #include "board.h"
47 #include "gpio-names.h"
48 #include "board-dalmore.h"
49 #include "tegra_cl_dvfs.h"
50 #include "devices.h"
51
52 #define PMC_CTRL                0x0
53 #define PMC_CTRL_INTR_LOW       (1 << 17)
54
55 /*TPS65090 consumer rails */
56 static struct regulator_consumer_supply tps65090_dcdc1_supply[] = {
57         REGULATOR_SUPPLY("vdd_sys_5v0", NULL),
58         REGULATOR_SUPPLY("vdd_spk", NULL),
59         REGULATOR_SUPPLY("vdd_sys_modem_5v0", NULL),
60         REGULATOR_SUPPLY("vdd_sys_cam_5v0", NULL),
61 };
62
63 static struct regulator_consumer_supply tps65090_dcdc2_supply[] = {
64         REGULATOR_SUPPLY("vdd_sys_3v3", NULL),
65         REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
66         REGULATOR_SUPPLY("pwrdet_hv", NULL),
67         REGULATOR_SUPPLY("vdd_sys_ds_3v3", NULL),
68         REGULATOR_SUPPLY("vdd_sys_nfc_3v3", NULL),
69         REGULATOR_SUPPLY("vdd_hv_nfc_3v3", NULL),
70         REGULATOR_SUPPLY("vdd_sys_cam_3v3", NULL),
71         REGULATOR_SUPPLY("vdd_sys_sensor_3v3", NULL),
72         REGULATOR_SUPPLY("vdd_sys_audio_3v3", NULL),
73         REGULATOR_SUPPLY("vdd_sys_dtv_3v3", NULL),
74         REGULATOR_SUPPLY("vcc", "0-007c"),
75         REGULATOR_SUPPLY("vcc", "0-0030"),
76 };
77
78 static struct regulator_consumer_supply tps65090_dcdc3_supply[] = {
79         REGULATOR_SUPPLY("vdd_ao", NULL),
80 };
81
82 static struct regulator_consumer_supply tps65090_ldo1_supply[] = {
83         REGULATOR_SUPPLY("vdd_sby_5v0", NULL),
84 };
85
86 static struct regulator_consumer_supply tps65090_ldo2_supply[] = {
87         REGULATOR_SUPPLY("vdd_sby_3v3", NULL),
88 };
89
90 static struct regulator_consumer_supply tps65090_fet1_supply[] = {
91         REGULATOR_SUPPLY("vdd_lcd_bl", NULL),
92 };
93
94 static struct regulator_consumer_supply tps65090_fet3_supply[] = {
95         REGULATOR_SUPPLY("vdd_modem_3v3", NULL),
96 };
97
98 static struct regulator_consumer_supply tps65090_fet4_supply[] = {
99         REGULATOR_SUPPLY("avdd_lcd", NULL),
100         REGULATOR_SUPPLY("vdd_ts_3v3", NULL),
101 };
102
103 static struct regulator_consumer_supply tps65090_fet5_supply[] = {
104         REGULATOR_SUPPLY("vdd_lvds", NULL),
105 };
106
107 static struct regulator_consumer_supply tps65090_fet6_supply[] = {
108         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.2"),
109 };
110
111 static struct regulator_consumer_supply tps65090_fet7_supply[] = {
112         REGULATOR_SUPPLY("vdd_wifi_3v3", NULL),
113         REGULATOR_SUPPLY("vdd_gps_3v3", NULL),
114         REGULATOR_SUPPLY("vdd_bt_3v3", NULL),
115 };
116
117 #define TPS65090_PDATA_INIT(_id, _name, _supply_reg,                    \
118                 _always_on, _boot_on, _apply_uV, _en_ext_ctrl, _gpio)   \
119 static struct regulator_init_data ri_data_##_name =                     \
120 {                                                                       \
121         .supply_regulator = _supply_reg,                                \
122         .constraints = {                                                \
123                 .name = tps65090_rails(_id),                            \
124                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
125                                      REGULATOR_MODE_STANDBY),           \
126                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
127                                    REGULATOR_CHANGE_STATUS |            \
128                                    REGULATOR_CHANGE_VOLTAGE),           \
129                 .always_on = _always_on,                                \
130                 .boot_on = _boot_on,                                    \
131                 .apply_uV = _apply_uV,                                  \
132         },                                                              \
133         .num_consumer_supplies =                                        \
134                 ARRAY_SIZE(tps65090_##_name##_supply),                  \
135         .consumer_supplies = tps65090_##_name##_supply,                 \
136 };                                                                      \
137 static struct tps65090_regulator_platform_data                          \
138                         tps65090_regulator_pdata_##_name =              \
139 {                                                                       \
140         .id = TPS65090_REGULATOR_##_id,                                 \
141         .enable_ext_control = _en_ext_ctrl,                             \
142         .gpio = _gpio,                                                  \
143         .reg_init_data = &ri_data_##_name ,                             \
144 }
145
146 TPS65090_PDATA_INIT(DCDC1, dcdc1, NULL, 1, 1, 0, false, -1);
147 TPS65090_PDATA_INIT(DCDC2, dcdc2, NULL, 1, 1, 0, false, -1);
148 TPS65090_PDATA_INIT(DCDC3, dcdc3, NULL, 1, 1, 0, false, -1);
149 TPS65090_PDATA_INIT(LDO1, ldo1, NULL, 1, 1, 0, false, -1);
150 TPS65090_PDATA_INIT(LDO2, ldo2, NULL, 1, 1, 0, false, -1);
151 TPS65090_PDATA_INIT(FET1, fet1, NULL, 0, 0, 0, false, -1);
152 TPS65090_PDATA_INIT(FET3, fet3, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
153 TPS65090_PDATA_INIT(FET4, fet4, tps65090_rails(DCDC2), 1, 1, 0, false, -1); /* always_on and boot_on */
154 TPS65090_PDATA_INIT(FET5, fet5, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
155 TPS65090_PDATA_INIT(FET6, fet6, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
156 TPS65090_PDATA_INIT(FET7, fet7, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
157
158 #define ADD_TPS65090_REG(_name) (&tps65090_regulator_pdata_##_name)
159 static struct tps65090_regulator_platform_data *tps65090_reg_pdata[] = {
160         ADD_TPS65090_REG(dcdc1),
161         ADD_TPS65090_REG(dcdc2),
162         ADD_TPS65090_REG(dcdc3),
163         ADD_TPS65090_REG(ldo1),
164         ADD_TPS65090_REG(ldo2),
165         ADD_TPS65090_REG(fet1),
166         ADD_TPS65090_REG(fet3),
167         ADD_TPS65090_REG(fet4),
168         ADD_TPS65090_REG(fet5),
169         ADD_TPS65090_REG(fet6),
170         ADD_TPS65090_REG(fet7),
171 };
172
173 static struct tps65090_platform_data tps65090_pdata = {
174         .irq_base = -1,
175         .num_reg_pdata =  ARRAY_SIZE(tps65090_reg_pdata),
176         .reg_pdata = tps65090_reg_pdata
177 };
178
179 /* MAX77663 consumer rails */
180 static struct regulator_consumer_supply max77663_sd0_supply[] = {
181         REGULATOR_SUPPLY("vdd_core", NULL),
182 };
183
184 static struct regulator_consumer_supply max77663_sd1_supply[] = {
185         REGULATOR_SUPPLY("vddio_ddr", NULL),
186         REGULATOR_SUPPLY("vddio_ddr0", NULL),
187         REGULATOR_SUPPLY("vddio_ddr1", NULL),
188 };
189
190 static struct regulator_consumer_supply max77663_sd2_supply[] = {
191         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
192         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
193         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
194         REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
195         REGULATOR_SUPPLY("pwrdet_cam", NULL),
196         REGULATOR_SUPPLY("avdd_osc", NULL),
197         REGULATOR_SUPPLY("vddio_sys", NULL),
198         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
199         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
200         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
201         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
202         REGULATOR_SUPPLY("vdd_emmc", NULL),
203         REGULATOR_SUPPLY("vddio_audio", NULL),
204         REGULATOR_SUPPLY("pwrdet_audio", NULL),
205         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
206         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
207         REGULATOR_SUPPLY("vddio_modem", NULL),
208         REGULATOR_SUPPLY("vddio_modem_1v8", NULL),
209         REGULATOR_SUPPLY("vddio_bb", NULL),
210         REGULATOR_SUPPLY("pwrdet_bb", NULL),
211         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
212         REGULATOR_SUPPLY("vddio_uart", NULL),
213         REGULATOR_SUPPLY("pwrdet_uart", NULL),
214         REGULATOR_SUPPLY("vddio_gmi", NULL),
215         REGULATOR_SUPPLY("pwrdet_nand", NULL),
216         REGULATOR_SUPPLY("vdd_sensor_1v8", NULL),
217         REGULATOR_SUPPLY("vdd_mic_1v8", NULL),
218         REGULATOR_SUPPLY("vdd_nfc_1v8", NULL),
219         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
220         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
221         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
222         REGULATOR_SUPPLY("dvdd_lcd", NULL),
223         REGULATOR_SUPPLY("vdd_com_1v8", NULL),
224         REGULATOR_SUPPLY("vddio_wifi_1v8", NULL),
225         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
226         REGULATOR_SUPPLY("vddio_bt_1v8", NULL),
227         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
228 };
229
230 static struct regulator_consumer_supply max77663_sd3_supply[] = {
231         REGULATOR_SUPPLY("vcore_emmc", NULL),
232 };
233
234 static struct regulator_consumer_supply max77663_ldo0_supply[] = {
235         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
236         REGULATOR_SUPPLY("avdd_pllx", NULL),
237         REGULATOR_SUPPLY("avdd_plle", NULL),
238         REGULATOR_SUPPLY("avdd_pllm", NULL),
239         REGULATOR_SUPPLY("avdd_pllu", NULL),
240         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
241         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
242         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
243 };
244
245 static struct regulator_consumer_supply max77663_ldo1_supply[] = {
246         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
247 };
248
249 static struct regulator_consumer_supply max77663_ldo2_supply[] = {
250         REGULATOR_SUPPLY("vdd_sensor_2v85", NULL),
251         REGULATOR_SUPPLY("vdd_als", NULL),
252         REGULATOR_SUPPLY("vdd", "0-004c"),
253 };
254
255 static struct regulator_consumer_supply max77663_ldo3_supply[] = {
256         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
257         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
258         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
259 };
260
261 static struct regulator_consumer_supply max77663_ldo4_supply[] = {
262         REGULATOR_SUPPLY("vdd_rtc", NULL),
263 };
264
265 static struct regulator_consumer_supply max77663_ldo5_supply[] = {
266         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
267         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
268         REGULATOR_SUPPLY("avdd_dsi_csi", "tegra_camera"),
269         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
270         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.2"),
271         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
272         REGULATOR_SUPPLY("vddio_bb_hsic", NULL),
273 };
274
275 static struct regulator_consumer_supply max77663_ldo6_supply[] = {
276         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
277         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
278 };
279
280 /* FIXME!! Put the device address of camera */
281 static struct regulator_consumer_supply max77663_ldo7_supply[] = {
282         REGULATOR_SUPPLY("avdd_cam1", NULL),
283         REGULATOR_SUPPLY("avdd_2v8_cam_af", NULL),
284 };
285
286 /* FIXME!! Put the device address of camera */
287 static struct regulator_consumer_supply max77663_ldo8_supply[] = {
288         REGULATOR_SUPPLY("avdd_cam2", NULL),
289 };
290
291 static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
292         {
293                 .src = FPS_SRC_0,
294                 .en_src = FPS_EN_SRC_EN0,
295                 .time_period = FPS_TIME_PERIOD_DEF,
296         },
297         {
298                 .src = FPS_SRC_1,
299                 .en_src = FPS_EN_SRC_EN1,
300                 .time_period = FPS_TIME_PERIOD_DEF,
301         },
302         {
303                 .src = FPS_SRC_2,
304                 .en_src = FPS_EN_SRC_EN0,
305                 .time_period = FPS_TIME_PERIOD_DEF,
306         },
307 };
308
309 #define MAX77663_PDATA_INIT(_rid, _id, _min_uV, _max_uV, _supply_reg,   \
310                 _always_on, _boot_on, _apply_uV,                        \
311                 _fps_src, _fps_pu_period, _fps_pd_period, _flags)       \
312         static struct regulator_init_data max77663_regulator_idata_##_id = {   \
313                 .supply_regulator = _supply_reg,                        \
314                 .constraints = {                                        \
315                         .name = max77663_rails(_id),                    \
316                         .min_uV = _min_uV,                              \
317                         .max_uV = _max_uV,                              \
318                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
319                                              REGULATOR_MODE_STANDBY),   \
320                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
321                                            REGULATOR_CHANGE_STATUS |    \
322                                            REGULATOR_CHANGE_VOLTAGE),   \
323                         .always_on = _always_on,                        \
324                         .boot_on = _boot_on,                            \
325                         .apply_uV = _apply_uV,                          \
326                 },                                                      \
327                 .num_consumer_supplies =                                \
328                         ARRAY_SIZE(max77663_##_id##_supply),            \
329                 .consumer_supplies = max77663_##_id##_supply,           \
330         };                                                              \
331 static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id =\
332 {                                                                       \
333                 .reg_init_data = &max77663_regulator_idata_##_id,       \
334                 .id = MAX77663_REGULATOR_ID_##_rid,                     \
335                 .fps_src = _fps_src,                                    \
336                 .fps_pu_period = _fps_pu_period,                        \
337                 .fps_pd_period = _fps_pd_period,                        \
338                 .fps_cfgs = max77663_fps_cfgs,                          \
339                 .flags = _flags,                                        \
340         }
341
342 MAX77663_PDATA_INIT(SD0, sd0,  900000, 1400000, tps65090_rails(DCDC3), 1, 1, 0,
343                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
344
345 MAX77663_PDATA_INIT(SD1, sd1,  1200000, 1200000, tps65090_rails(DCDC3), 1, 1, 1,
346                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
347
348 MAX77663_PDATA_INIT(SD2, sd2,  1800000, 1800000, tps65090_rails(DCDC3), 1, 1, 1,
349                     FPS_SRC_0, -1, -1, 0);
350
351 MAX77663_PDATA_INIT(SD3, sd3,  2850000, 2850000, tps65090_rails(DCDC3), 1, 1, 1,
352                     FPS_SRC_NONE, -1, -1, 0);
353
354 MAX77663_PDATA_INIT(LDO0, ldo0, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
355                     FPS_SRC_1, -1, -1, 0);
356
357 MAX77663_PDATA_INIT(LDO1, ldo1, 1050000, 1050000, max77663_rails(sd2), 0, 0, 1,
358                     FPS_SRC_NONE, -1, -1, 0);
359
360 MAX77663_PDATA_INIT(LDO2, ldo2, 2850000, 2850000, tps65090_rails(DCDC2), 1, 1,
361                     1, FPS_SRC_1, -1, -1, 0);
362
363 MAX77663_PDATA_INIT(LDO3, ldo3, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
364                     FPS_SRC_NONE, -1, -1, 0);
365
366 MAX77663_PDATA_INIT(LDO4, ldo4, 1100000, 1100000, tps65090_rails(DCDC2), 1, 1,
367                     1, FPS_SRC_NONE, -1, -1, 0);
368
369 MAX77663_PDATA_INIT(LDO5, ldo5, 1200000, 1200000, max77663_rails(sd2), 0, 1, 1,
370                     FPS_SRC_NONE, -1, -1, 0);
371
372 MAX77663_PDATA_INIT(LDO6, ldo6, 1800000, 3300000, tps65090_rails(DCDC2), 0, 0, 0,
373                     FPS_SRC_NONE, -1, -1, 0);
374
375 MAX77663_PDATA_INIT(LDO7, ldo7, 2800000, 2800000, tps65090_rails(DCDC2), 0, 0, 1,
376                     FPS_SRC_NONE, -1, -1, 0);
377
378 MAX77663_PDATA_INIT(LDO8, ldo8, 2800000, 2800000, tps65090_rails(DCDC2), 0, 1, 1,
379                     FPS_SRC_1, -1, -1, 0);
380
381 #define MAX77663_REG(_id, _data) (&max77663_regulator_pdata_##_data)
382
383 static struct max77663_regulator_platform_data *max77663_reg_pdata[] = {
384         MAX77663_REG(SD0, sd0),
385         MAX77663_REG(SD1, sd1),
386         MAX77663_REG(SD2, sd2),
387         MAX77663_REG(SD3, sd3),
388         MAX77663_REG(LDO0, ldo0),
389         MAX77663_REG(LDO1, ldo1),
390         MAX77663_REG(LDO2, ldo2),
391         MAX77663_REG(LDO3, ldo3),
392         MAX77663_REG(LDO4, ldo4),
393         MAX77663_REG(LDO5, ldo5),
394         MAX77663_REG(LDO6, ldo6),
395         MAX77663_REG(LDO7, ldo7),
396         MAX77663_REG(LDO8, ldo8),
397 };
398
399 static struct max77663_gpio_config max77663_gpio_cfgs[] = {
400         {
401                 .gpio = MAX77663_GPIO0,
402                 .dir = GPIO_DIR_OUT,
403                 .dout = GPIO_DOUT_LOW,
404                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
405                 .alternate = GPIO_ALT_DISABLE,
406         },
407         {
408                 .gpio = MAX77663_GPIO1,
409                 .dir = GPIO_DIR_IN,
410                 .dout = GPIO_DOUT_HIGH,
411                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
412                 .pull_up = GPIO_PU_ENABLE,
413                 .alternate = GPIO_ALT_DISABLE,
414         },
415         {
416                 .gpio = MAX77663_GPIO2,
417                 .dir = GPIO_DIR_OUT,
418                 .dout = GPIO_DOUT_HIGH,
419                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
420                 .pull_up = GPIO_PU_ENABLE,
421                 .alternate = GPIO_ALT_DISABLE,
422         },
423         {
424                 .gpio = MAX77663_GPIO3,
425                 .dir = GPIO_DIR_OUT,
426                 .dout = GPIO_DOUT_HIGH,
427                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
428                 .pull_up = GPIO_PU_ENABLE,
429                 .alternate = GPIO_ALT_DISABLE,
430         },
431         {
432                 .gpio = MAX77663_GPIO4,
433                 .dir = GPIO_DIR_OUT,
434                 .dout = GPIO_DOUT_HIGH,
435                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
436                 .alternate = GPIO_ALT_ENABLE,
437         },
438         {
439                 .gpio = MAX77663_GPIO5,
440                 .dir = GPIO_DIR_OUT,
441                 .dout = GPIO_DOUT_LOW,
442                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
443                 .alternate = GPIO_ALT_DISABLE,
444         },
445         {
446                 .gpio = MAX77663_GPIO6,
447                 .dir = GPIO_DIR_OUT,
448                 .dout = GPIO_DOUT_LOW,
449                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
450                 .alternate = GPIO_ALT_DISABLE,
451         },
452         {
453                 .gpio = MAX77663_GPIO7,
454                 .dir = GPIO_DIR_OUT,
455                 .dout = GPIO_DOUT_LOW,
456                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
457                 .alternate = GPIO_ALT_DISABLE,
458         },
459 };
460
461 static struct max77663_platform_data max77663_pdata = {
462         .irq_base       = MAX77663_IRQ_BASE,
463         .gpio_base      = MAX77663_GPIO_BASE,
464
465         .num_gpio_cfgs  = ARRAY_SIZE(max77663_gpio_cfgs),
466         .gpio_cfgs      = max77663_gpio_cfgs,
467
468         .regulator_pdata = max77663_reg_pdata,
469         .num_regulator_pdata = ARRAY_SIZE(max77663_reg_pdata),
470
471         .rtc_i2c_addr   = 0x68,
472
473         .use_power_off  = false,
474 };
475
476 static struct i2c_board_info __initdata max77663_regulators[] = {
477         {
478                 /* The I2C address was determined by OTP factory setting */
479                 I2C_BOARD_INFO("max77663", 0x3c),
480                 .irq            = INT_EXTERNAL_PMU,
481                 .platform_data  = &max77663_pdata,
482         },
483 };
484
485 static struct i2c_board_info __initdata tps65090_regulators[] = {
486         {
487                 I2C_BOARD_INFO("tps65090", 0x48),
488                 .platform_data  = &tps65090_pdata,
489         },
490 };
491
492 /* TPS51632 DC-DC converter */
493 static struct regulator_consumer_supply tps51632_dcdc_supply[] = {
494         REGULATOR_SUPPLY("vdd_cpu", NULL),
495 };
496
497 static struct regulator_init_data tps51632_init_data = {
498         .constraints = {                                                \
499                 .min_uV = 500000,                                       \
500                 .max_uV = 1520000,                                      \
501                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
502                                         REGULATOR_MODE_STANDBY),        \
503                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
504                                         REGULATOR_CHANGE_STATUS |       \
505                                         REGULATOR_CHANGE_VOLTAGE),      \
506                 .always_on = 1,                                         \
507                 .boot_on =  1,                                          \
508                 .apply_uV = 0,                                          \
509         },                                                              \
510         .num_consumer_supplies = ARRAY_SIZE(tps51632_dcdc_supply),      \
511                 .consumer_supplies = tps51632_dcdc_supply,              \
512 };
513
514 static struct tps51632_regulator_platform_data tps51632_pdata = {
515         .reg_init_data = &tps51632_init_data,           \
516         .enable_pwm = false,                            \
517         .max_voltage_uV = 1520000,                      \
518         .base_voltage_uV = 500000,                      \
519         .slew_rate_uv_per_us = 6000,                    \
520 };
521
522 static struct i2c_board_info __initdata tps51632_boardinfo[] = {
523         {
524                 I2C_BOARD_INFO("tps51632", 0x43),
525                 .platform_data  = &tps51632_pdata,
526         },
527 };
528
529 /************************ Palmas based regulator ****************/
530 static struct regulator_consumer_supply palmas_smps12_supply[] = {
531         REGULATOR_SUPPLY("vddio_ddr3l", NULL),
532         REGULATOR_SUPPLY("vcore_ddr3l", NULL),
533         REGULATOR_SUPPLY("vref2_ddr3l", NULL),
534 };
535
536 #define palmas_smps3_supply max77663_sd2_supply
537 #define palmas_smps45_supply max77663_sd0_supply
538
539 static struct regulator_consumer_supply palmas_smps8_supply[] = {
540         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
541         REGULATOR_SUPPLY("avdd_pllm", NULL),
542         REGULATOR_SUPPLY("avdd_pllu", NULL),
543         REGULATOR_SUPPLY("avdd_pllx", NULL),
544         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
545         REGULATOR_SUPPLY("avdd_plle", NULL),
546         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
547         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
548         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
549         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
550         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
551         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
552
553 };
554
555 static struct regulator_consumer_supply palmas_smps9_supply[] = {
556         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.3"),
557 };
558
559 #define palmas_ldo1_supply max77663_ldo7_supply
560 #define palmas_ldo2_supply max77663_ldo8_supply
561 #define palmas_ldo3_supply max77663_ldo5_supply
562
563 static struct regulator_consumer_supply palmas_ldo4_supply[] = {
564         REGULATOR_SUPPLY("vpp_fuse", NULL),
565 };
566
567 #define palmas_ldo6_supply max77663_ldo2_supply
568
569 static struct regulator_consumer_supply palmas_ldo7_supply[] = {
570         REGULATOR_SUPPLY("vdd_af_cam1", NULL),
571 };
572
573 #define palmas_ldo8_supply max77663_ldo4_supply
574 #define palmas_ldo9_supply max77663_ldo6_supply
575
576 static struct regulator_consumer_supply palmas_ldoln_supply[] = {
577         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
578 };
579
580 static struct regulator_consumer_supply palmas_ldousb_supply[] = {
581         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
582         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
583         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
584         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
585         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
586 };
587
588 #define PALMAS_PDATA_INIT(_name, _minmv, _maxmv, _supply_reg, _always_on, \
589         _boot_on, _apply_uv)                                            \
590         static struct regulator_init_data reg_idata_##_name = {         \
591                 .constraints = {                                        \
592                         .name = palmas_rails(_name),                    \
593                         .min_uV = (_minmv)*1000,                        \
594                         .max_uV = (_maxmv)*1000,                        \
595                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
596                                         REGULATOR_MODE_STANDBY),        \
597                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
598                                         REGULATOR_CHANGE_STATUS |       \
599                                         REGULATOR_CHANGE_VOLTAGE),      \
600                         .always_on = _always_on,                        \
601                         .boot_on = _boot_on,                            \
602                         .apply_uV = _apply_uv,                          \
603                 },                                                      \
604                 .num_consumer_supplies =                                \
605                         ARRAY_SIZE(palmas_##_name##_supply),            \
606                 .consumer_supplies = palmas_##_name##_supply,           \
607                 .supply_regulator = _supply_reg,                        \
608         }
609
610 PALMAS_PDATA_INIT(smps12, 1350,  1350, tps65090_rails(DCDC3), 0, 0, 0);
611 PALMAS_PDATA_INIT(smps3, 1800,  1800, tps65090_rails(DCDC3), 0, 0, 0);
612 PALMAS_PDATA_INIT(smps45, 900,  1400, tps65090_rails(DCDC2), 1, 1, 0);
613 PALMAS_PDATA_INIT(smps8, 1050,  1050, tps65090_rails(DCDC2), 0, 1, 1);
614 PALMAS_PDATA_INIT(smps9, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 0);
615 PALMAS_PDATA_INIT(ldo1, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
616 PALMAS_PDATA_INIT(ldo2, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
617 PALMAS_PDATA_INIT(ldo3, 1200,  1200, palmas_rails(smps3), 0, 0, 1);
618 PALMAS_PDATA_INIT(ldo4, 1800,  1800, tps65090_rails(DCDC2), 0, 0, 0);
619 PALMAS_PDATA_INIT(ldo6, 2850,  2850, tps65090_rails(DCDC2), 0, 0, 1);
620 PALMAS_PDATA_INIT(ldo7, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
621 PALMAS_PDATA_INIT(ldo8, 900,  900, tps65090_rails(DCDC3), 1, 1, 1);
622 PALMAS_PDATA_INIT(ldo9, 1800,  3300, palmas_rails(smps9), 0, 0, 1);
623 PALMAS_PDATA_INIT(ldoln, 3300, 3300, tps65090_rails(DCDC1), 0, 0, 1);
624 PALMAS_PDATA_INIT(ldousb, 3300,  3300, tps65090_rails(DCDC1), 0, 0, 1);
625
626 #define PALMAS_REG_PDATA(_sname) &reg_idata_##_sname
627
628 static struct regulator_init_data *dalmore_e1611_reg_data[PALMAS_NUM_REGS] = {
629         PALMAS_REG_PDATA(smps12),
630         NULL,
631         PALMAS_REG_PDATA(smps3),
632         PALMAS_REG_PDATA(smps45),
633         NULL,
634         NULL,
635         NULL,
636         PALMAS_REG_PDATA(smps8),
637         PALMAS_REG_PDATA(smps9),
638         NULL,
639         PALMAS_REG_PDATA(ldo1),
640         PALMAS_REG_PDATA(ldo2),
641         PALMAS_REG_PDATA(ldo3),
642         PALMAS_REG_PDATA(ldo4),
643         NULL,
644         PALMAS_REG_PDATA(ldo6),
645         PALMAS_REG_PDATA(ldo7),
646         PALMAS_REG_PDATA(ldo8),
647         PALMAS_REG_PDATA(ldo9),
648         PALMAS_REG_PDATA(ldoln),
649         PALMAS_REG_PDATA(ldousb),
650         NULL,
651         NULL,
652         NULL,
653         NULL,
654         NULL,
655 };
656
657 #define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep,   \
658                 _tstep, _vsel)                                          \
659         static struct palmas_reg_init reg_init_data_##_name = {         \
660                 .warm_reset = _warm_reset,                              \
661                 .roof_floor =   _roof_floor,                            \
662                 .mode_sleep = _mode_sleep,                              \
663                 .tstep = _tstep,                                        \
664                 .vsel = _vsel,                                          \
665         }
666
667 PALMAS_REG_INIT(smps12, 0, 0, 0, 0, 0);
668 PALMAS_REG_INIT(smps123, 0, 0, 0, 0, 0);
669 PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
670 PALMAS_REG_INIT(smps45, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
671 PALMAS_REG_INIT(smps457, 0, 0, 0, 0, 0);
672 PALMAS_REG_INIT(smps6, 0, 0, 0, 0, 0);
673 PALMAS_REG_INIT(smps7, 0, 0, 0, 0, 0);
674 PALMAS_REG_INIT(smps8, 0, 0, 0, 0, 0);
675 PALMAS_REG_INIT(smps9, 0, 0, 0, 0, 0);
676 PALMAS_REG_INIT(smps10, 0, 0, 0, 0, 0);
677 PALMAS_REG_INIT(ldo1, 0, 0, 0, 0, 0);
678 PALMAS_REG_INIT(ldo2, 0, 0, 0, 0, 0);
679 PALMAS_REG_INIT(ldo3, 0, 0, 0, 0, 0);
680 PALMAS_REG_INIT(ldo4, 0, 0, 0, 0, 0);
681 PALMAS_REG_INIT(ldo5, 0, 0, 0, 0, 0);
682 PALMAS_REG_INIT(ldo6, 0, 0, 0, 0, 0);
683 PALMAS_REG_INIT(ldo7, 0, 0, 0, 0, 0);
684 PALMAS_REG_INIT(ldo8, 0, 0, 0, 0, 0);
685 PALMAS_REG_INIT(ldo9, 0, 0, 0, 0, 0);
686 PALMAS_REG_INIT(ldoln, 0, 0, 0, 0, 0);
687 PALMAS_REG_INIT(ldousb, 0, 0, 0, 0, 0);
688 PALMAS_REG_INIT(regen1, 0, 0, 0, 0, 0);
689 PALMAS_REG_INIT(regen2, 0, 0, 0, 0, 0);
690 PALMAS_REG_INIT(regen3, 0, 0, 0, 0, 0);
691 PALMAS_REG_INIT(sysen1, 0, 0, 0, 0, 0);
692 PALMAS_REG_INIT(sysen2, 0, 0, 0, 0, 0);
693
694 #define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
695 static struct palmas_reg_init *dalmore_e1611_reg_init[PALMAS_NUM_REGS] = {
696         PALMAS_REG_INIT_DATA(smps12),
697         PALMAS_REG_INIT_DATA(smps123),
698         PALMAS_REG_INIT_DATA(smps3),
699         PALMAS_REG_INIT_DATA(smps45),
700         PALMAS_REG_INIT_DATA(smps457),
701         PALMAS_REG_INIT_DATA(smps6),
702         PALMAS_REG_INIT_DATA(smps7),
703         PALMAS_REG_INIT_DATA(smps8),
704         PALMAS_REG_INIT_DATA(smps9),
705         PALMAS_REG_INIT_DATA(smps10),
706         PALMAS_REG_INIT_DATA(ldo1),
707         PALMAS_REG_INIT_DATA(ldo2),
708         PALMAS_REG_INIT_DATA(ldo3),
709         PALMAS_REG_INIT_DATA(ldo4),
710         PALMAS_REG_INIT_DATA(ldo5),
711         PALMAS_REG_INIT_DATA(ldo6),
712         PALMAS_REG_INIT_DATA(ldo7),
713         PALMAS_REG_INIT_DATA(ldo8),
714         PALMAS_REG_INIT_DATA(ldo9),
715         PALMAS_REG_INIT_DATA(ldoln),
716         PALMAS_REG_INIT_DATA(ldousb),
717         PALMAS_REG_INIT_DATA(regen1),
718         PALMAS_REG_INIT_DATA(regen2),
719         PALMAS_REG_INIT_DATA(regen3),
720         PALMAS_REG_INIT_DATA(sysen1),
721         PALMAS_REG_INIT_DATA(sysen2),
722 };
723
724 static struct palmas_pmic_platform_data pmic_platform = {
725         .enable_ldo8_tracking = true,
726         .disabe_ldo8_tracking_suspend = true,
727 };
728
729 static struct palmas_platform_data palmas_pdata = {
730         .gpio_base = PALMAS_TEGRA_GPIO_BASE,
731         .irq_base = PALMAS_TEGRA_IRQ_BASE,
732         .pmic_pdata = &pmic_platform,
733         .mux_from_pdata = true,
734         .pad1 = 0,
735         .pad2 = 0,
736         .pad3 = PALMAS_PRIMARY_SECONDARY_PAD3_DVFS1,
737 };
738
739 static struct i2c_board_info palma_device[] = {
740         {
741                 I2C_BOARD_INFO("tps65913", 0x58),
742                 .irq            = INT_EXTERNAL_PMU,
743                 .platform_data  = &palmas_pdata,
744         },
745 };
746
747 /* EN_AVDD_USB_HDMI From PMU GP1 */
748 static struct regulator_consumer_supply fixed_reg_avdd_usb_hdmi_supply[] = {
749         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
750         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
751         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
752         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
753         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
754         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
755 };
756
757 /* EN_CAM_1v8 From PMU GP5 */
758 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
759         REGULATOR_SUPPLY("dvdd_cam", NULL),
760         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
761 };
762
763 /* EN_CAM_1v8 on e1611 From PMU GP6 */
764 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_e1611_supply[] = {
765         REGULATOR_SUPPLY("dvdd_cam", NULL),
766         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
767 };
768
769 static struct regulator_consumer_supply fixed_reg_vdd_hdmi_5v0_supply[] = {
770         REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
771 };
772
773 /* EN_USB1_VBUS From TEGRA GPIO PN4 PR3(T30) */
774 static struct regulator_consumer_supply fixed_reg_usb1_vbus_supply[] = {
775         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
776 };
777
778 /* EN_3V3_FUSE From TEGRA GPIO PX4 */
779 static struct regulator_consumer_supply fixed_reg_vpp_fuse_supply[] = {
780         REGULATOR_SUPPLY("vpp_fuse", NULL),
781 };
782
783 /* EN_USB3_VBUS From TEGRA GPIO PM5 */
784 static struct regulator_consumer_supply fixed_reg_usb3_vbus_supply[] = {
785         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.2"),
786 };
787
788 /* Macro for defining fixed regulator sub device data */
789 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
790 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
791         _gpio_nr, _open_drain, _active_high, _boot_state, _millivolts)  \
792         static struct regulator_init_data ri_data_##_var =              \
793         {                                                               \
794                 .supply_regulator = _in_supply,                         \
795                 .num_consumer_supplies =                                \
796                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
797                 .consumer_supplies = fixed_reg_##_name##_supply,        \
798                 .constraints = {                                        \
799                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
800                                         REGULATOR_MODE_STANDBY),        \
801                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
802                                         REGULATOR_CHANGE_STATUS |       \
803                                         REGULATOR_CHANGE_VOLTAGE),      \
804                         .always_on = _always_on,                        \
805                         .boot_on = _boot_on,                            \
806                 },                                                      \
807         };                                                              \
808         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
809         {                                                               \
810                 .supply_name = FIXED_SUPPLY(_name),                     \
811                 .microvolts = _millivolts * 1000,                       \
812                 .gpio = _gpio_nr,                                       \
813                 .gpio_is_open_drain = _open_drain,                      \
814                 .enable_high = _active_high,                            \
815                 .enabled_at_boot = _boot_state,                         \
816                 .init_data = &ri_data_##_var,                           \
817         };                                                              \
818         static struct platform_device fixed_reg_##_var##_dev = {        \
819                 .name = "reg-fixed-voltage",                            \
820                 .id = _id,                                              \
821                 .dev = {                                                \
822                         .platform_data = &fixed_reg_##_var##_pdata,     \
823                 },                                                      \
824         }
825
826 FIXED_REG(1,    avdd_usb_hdmi,  avdd_usb_hdmi,
827         tps65090_rails(DCDC2),  0,      0,
828         MAX77663_GPIO_BASE + MAX77663_GPIO1,    true,   true,   1,      3300);
829
830 FIXED_REG(2,    en_1v8_cam,     en_1v8_cam,
831         max77663_rails(sd2),    0,      0,
832         MAX77663_GPIO_BASE + MAX77663_GPIO5,    false,  true,   0,      1800);
833
834 FIXED_REG(3,    vdd_hdmi_5v0,   vdd_hdmi_5v0,
835         tps65090_rails(DCDC1),  0,      0,
836         TEGRA_GPIO_PK1, false,  true,   0,      5000);
837
838 FIXED_REG(4,    vpp_fuse,       vpp_fuse,
839         max77663_rails(sd2),    0,      0,
840         TEGRA_GPIO_PX4, false,  true,   0,      3300);
841
842 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
843 FIXED_REG(5,    usb1_vbus,      usb1_vbus,
844         tps65090_rails(DCDC1),  0,      0,
845         TEGRA_GPIO_PN4, true,   true,   0,      5000);
846 #else
847 FIXED_REG(5,    usb1_vbus,      usb1_vbus,
848         tps65090_rails(DCDC1),  0,      0,
849         TEGRA_GPIO_PR3, true,   true,   0,      5000);
850 #endif
851
852 FIXED_REG(6,    usb3_vbus,      usb3_vbus,
853         tps65090_rails(DCDC1),  0,      0,
854         TEGRA_GPIO_PK6, true,   true,   0,      5000);
855
856 FIXED_REG(7,    en_1v8_cam_e1611,       en_1v8_cam_e1611,
857         palmas_rails(smps3),    0,      0,
858         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO6,  false,  true,   0,      1800);
859
860 /*
861  * Creating the fixed regulator device tables
862  */
863
864 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
865
866 #define DALMORE_COMMON_FIXED_REG                \
867         ADD_FIXED_REG(usb1_vbus),               \
868         ADD_FIXED_REG(usb3_vbus),               \
869         ADD_FIXED_REG(vdd_hdmi_5v0),
870
871 #define E1612_FIXED_REG                         \
872         ADD_FIXED_REG(avdd_usb_hdmi),           \
873         ADD_FIXED_REG(en_1v8_cam),              \
874         ADD_FIXED_REG(vpp_fuse),                \
875
876 #define E1611_FIXED_REG                         \
877         ADD_FIXED_REG(en_1v8_cam_e1611),
878
879 /* Gpio switch regulator platform data for Dalmore E1611 */
880 static struct platform_device *fixed_reg_devs_e1611_a00[] = {
881         DALMORE_COMMON_FIXED_REG
882         E1611_FIXED_REG
883 };
884
885 /* Gpio switch regulator platform data for Dalmore E1612 */
886 static struct platform_device *fixed_reg_devs_e1612_a00[] = {
887         DALMORE_COMMON_FIXED_REG
888         E1612_FIXED_REG
889 };
890
891 int __init dalmore_palmas_regulator_init(void)
892 {
893         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
894         u32 pmc_ctrl;
895         int i;
896 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
897         int ret;
898
899         ret = gpio_request(TEGRA_GPIO_PCC3, "pmic_nreswarm");
900         if (ret < 0)
901                 pr_err("%s: gpio_request failed for gpio %d\n",
902                                 __func__, TEGRA_GPIO_PCC3);
903         else
904                 gpio_direction_output(TEGRA_GPIO_PCC3, 1);
905 #endif
906         /* TPS65913: Normal state of INT request line is LOW.
907          * configure the power management controller to trigger PMU
908          * interrupts when HIGH.
909          */
910         pmc_ctrl = readl(pmc + PMC_CTRL);
911         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
912         for (i = 0; i < PALMAS_NUM_REGS ; i++) {
913                 pmic_platform.reg_data[i] = dalmore_e1611_reg_data[i];
914                 pmic_platform.reg_init[i] = dalmore_e1611_reg_init[i];
915         }
916
917         i2c_register_board_info(4, palma_device,
918                         ARRAY_SIZE(palma_device));
919         return 0;
920 }
921
922 static int ac_online(void)
923 {
924         return 1;
925 }
926
927 static struct resource dalmore_pda_resources[] = {
928         [0] = {
929                 .name   = "ac",
930         },
931 };
932
933 static struct pda_power_pdata dalmore_pda_data = {
934         .is_ac_online   = ac_online,
935 };
936
937 static struct platform_device dalmore_pda_power_device = {
938         .name           = "pda-power",
939         .id             = -1,
940         .resource       = dalmore_pda_resources,
941         .num_resources  = ARRAY_SIZE(dalmore_pda_resources),
942         .dev    = {
943                 .platform_data  = &dalmore_pda_data,
944         },
945 };
946
947 static struct tegra_suspend_platform_data dalmore_suspend_data = {
948         .cpu_timer      = 2000,
949         .cpu_off_timer  = 2000,
950         .suspend_mode   = TEGRA_SUSPEND_LP0,
951         .core_timer     = 0x157e,
952         .core_off_timer = 2000,
953         .corereq_high   = true,
954         .sysclkreq_high = true,
955         .min_residency_noncpu = 600,
956         .min_residency_crail = 1000,
957 };
958 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
959 /* board parameters for cpu dfll */
960 static struct tegra_cl_dvfs_cfg_param dalmore_cl_dvfs_param = {
961         .sample_rate = 12500,
962
963         .force_mode = TEGRA_CL_DVFS_FORCE_FIXED,
964         .cf = 10,
965         .ci = 0,
966         .cg = 2,
967
968         .droop_cut_value = 0xF,
969         .droop_restore_ramp = 0x0,
970         .scale_out_ramp = 0x0,
971 };
972 #endif
973
974 /* TPS51632: fixed 10mV steps from 600mV to 1400mV, with offset 0x23 */
975 #define PMU_CPU_VDD_MAP_SIZE ((1400000 - 600000) / 10000 + 1)
976 static struct voltage_reg_map pmu_cpu_vdd_map[PMU_CPU_VDD_MAP_SIZE];
977 static inline void fill_reg_map(void)
978 {
979         int i;
980         for (i = 0; i < PMU_CPU_VDD_MAP_SIZE; i++) {
981                 pmu_cpu_vdd_map[i].reg_value = i + 0x23;
982                 pmu_cpu_vdd_map[i].reg_uV = 600000 + 10000 * i;
983         }
984 }
985
986 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
987 static struct tegra_cl_dvfs_platform_data dalmore_cl_dvfs_data = {
988         .dfll_clk_name = "dfll_cpu",
989         .pmu_if = TEGRA_CL_DVFS_PMU_I2C,
990         .u.pmu_i2c = {
991                 .fs_rate = 400000,
992                 .slave_addr = 0x86,
993                 .reg = 0x00,
994         },
995         .vdd_map = pmu_cpu_vdd_map,
996         .vdd_map_size = PMU_CPU_VDD_MAP_SIZE,
997
998         .cfg_param = &dalmore_cl_dvfs_param,
999 };
1000
1001 static int __init dalmore_cl_dvfs_init(void)
1002 {
1003         fill_reg_map();
1004         tegra_cl_dvfs_device.dev.platform_data = &dalmore_cl_dvfs_data;
1005         platform_device_register(&tegra_cl_dvfs_device);
1006
1007         return 0;
1008 }
1009 #endif
1010
1011 static int __init dalmore_max77663_regulator_init(void)
1012 {
1013         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
1014         u32 pmc_ctrl;
1015
1016         /* configure the power management controller to trigger PMU
1017          * interrupts when low */
1018         pmc_ctrl = readl(pmc + PMC_CTRL);
1019         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
1020
1021         i2c_register_board_info(4, max77663_regulators,
1022                                 ARRAY_SIZE(max77663_regulators));
1023
1024         return 0;
1025 }
1026
1027 static struct regulator_bulk_data dalmore_bt_regulator_supply[] = {
1028         [0] = {
1029                 .supply = "vdd_bt_3v3",
1030         },
1031         [1] = {
1032                 .supply = "vddio_bt_1v8",
1033         },
1034 };
1035
1036 static struct regulator_userspace_consumer_data dalmore_bt_regulator_pdata = {
1037         .num_supplies   = ARRAY_SIZE(dalmore_bt_regulator_supply),
1038         .supplies       = dalmore_bt_regulator_supply,
1039 };
1040
1041 static struct platform_device dalmore_bt_regulator_device = {
1042         .name   = "reg-userspace-consumer",
1043         .id     = 1,
1044         .dev    = {
1045                         .platform_data = &dalmore_bt_regulator_pdata,
1046         },
1047 };
1048
1049 static int __init dalmore_fixed_regulator_init(void)
1050 {
1051         struct board_info board_info;
1052
1053         if (!machine_is_dalmore())
1054                 return 0;
1055
1056         tegra_get_board_info(&board_info);
1057
1058         if (board_info.board_id == BOARD_E1611)
1059                 return platform_add_devices(fixed_reg_devs_e1611_a00,
1060                                 ARRAY_SIZE(fixed_reg_devs_e1611_a00));
1061         else
1062                 return platform_add_devices(fixed_reg_devs_e1612_a00,
1063                                 ARRAY_SIZE(fixed_reg_devs_e1612_a00));
1064 }
1065 subsys_initcall_sync(dalmore_fixed_regulator_init);
1066
1067 int __init dalmore_regulator_init(void)
1068 {
1069         struct board_info board_info;
1070         i2c_register_board_info(4, tps65090_regulators,
1071                         ARRAY_SIZE(tps65090_regulators));
1072 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
1073         dalmore_cl_dvfs_init();
1074 #endif
1075         tegra_get_board_info(&board_info);
1076         if (board_info.board_id == BOARD_E1611)
1077                 dalmore_palmas_regulator_init();
1078         else
1079                 dalmore_max77663_regulator_init();
1080
1081         i2c_register_board_info(4, tps51632_boardinfo, 1);
1082         platform_device_register(&dalmore_pda_power_device);
1083         platform_device_register(&dalmore_bt_regulator_device);
1084         return 0;
1085 }
1086
1087 int __init dalmore_suspend_init(void)
1088 {
1089         tegra_init_suspend(&dalmore_suspend_data);
1090         return 0;
1091 }
1092
1093 int __init dalmore_edp_init(void)
1094 {
1095 #ifdef CONFIG_TEGRA_EDP_LIMITS
1096         unsigned int regulator_mA;
1097
1098         regulator_mA = get_maximum_cpu_current_supported();
1099         if (!regulator_mA)
1100                 regulator_mA = 15000;
1101
1102         pr_info("%s: CPU regulator %d mA\n", __func__, regulator_mA);
1103
1104         tegra_init_cpu_edp_limits(regulator_mA);
1105 #endif
1106         return 0;
1107 }