arm: tegra: power detect update
[linux-3.10.git] / arch / arm / mach-tegra / board-dalmore-power.c
1 /*
2  * arch/arm/mach-tegra/board-dalmore-power.c
3  *
4  * Copyright (C) 2012 NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/io.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/regulator/fixed.h>
28 #include <linux/mfd/max77663-core.h>
29 #include <linux/mfd/palmas.h>
30 #include <linux/mfd/tps65090.h>
31 #include <linux/regulator/max77663-regulator.h>
32 #include <linux/regulator/tps65090-regulator.h>
33 #include <linux/regulator/tps51632-regulator.h>
34 #include <linux/gpio.h>
35
36 #include <asm/mach-types.h>
37
38 #include <mach/iomap.h>
39 #include <mach/irqs.h>
40 #include <mach/gpio-tegra.h>
41
42 #include "pm.h"
43 #include "tegra-board-id.h"
44 #include "board.h"
45 #include "gpio-names.h"
46 #include "board-dalmore.h"
47 #include "tegra_cl_dvfs.h"
48
49 #define PMC_CTRL                0x0
50 #define PMC_CTRL_INTR_LOW       (1 << 17)
51
52 /*TPS65090 consumer rails */
53 static struct regulator_consumer_supply tps65090_dcdc1_supply[] = {
54         REGULATOR_SUPPLY("vdd_sys_5v0", NULL),
55         REGULATOR_SUPPLY("vdd_spk", NULL),
56         REGULATOR_SUPPLY("vdd_sys_modem_5v0", NULL),
57         REGULATOR_SUPPLY("vdd_sys_cam_5v0", NULL),
58 };
59
60 static struct regulator_consumer_supply tps65090_dcdc2_supply[] = {
61         REGULATOR_SUPPLY("vdd_sys_3v3", NULL),
62         REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
63         REGULATOR_SUPPLY("pwrdet_hv", NULL),
64         REGULATOR_SUPPLY("vdd_sys_ds_3v3", NULL),
65         REGULATOR_SUPPLY("vdd_sys_nfc_3v3", NULL),
66         REGULATOR_SUPPLY("vdd_hv_nfc_3v3", NULL),
67         REGULATOR_SUPPLY("vdd_sys_cam_3v3", NULL),
68         REGULATOR_SUPPLY("vdd_sys_sensor_3v3", NULL),
69         REGULATOR_SUPPLY("vdd_sys_audio_3v3", NULL),
70         REGULATOR_SUPPLY("vdd_sys_dtv_3v3", NULL),
71         REGULATOR_SUPPLY("vcc", "0-007c"),
72         REGULATOR_SUPPLY("vcc", "0-0030"),
73 };
74
75 static struct regulator_consumer_supply tps65090_dcdc3_supply[] = {
76         REGULATOR_SUPPLY("vdd_ao", NULL),
77 };
78
79 static struct regulator_consumer_supply tps65090_ldo1_supply[] = {
80         REGULATOR_SUPPLY("vdd_sby_5v0", NULL),
81 };
82
83 static struct regulator_consumer_supply tps65090_ldo2_supply[] = {
84         REGULATOR_SUPPLY("vdd_sby_3v3", NULL),
85 };
86
87 static struct regulator_consumer_supply tps65090_fet1_supply[] = {
88         REGULATOR_SUPPLY("vdd_lcd_bl", NULL),
89 };
90
91 static struct regulator_consumer_supply tps65090_fet3_supply[] = {
92         REGULATOR_SUPPLY("vdd_modem_3v3", NULL),
93 };
94
95 static struct regulator_consumer_supply tps65090_fet4_supply[] = {
96         REGULATOR_SUPPLY("avdd_lcd", NULL),
97         REGULATOR_SUPPLY("vdd_ts_3v3", NULL),
98 };
99
100 static struct regulator_consumer_supply tps65090_fet5_supply[] = {
101         REGULATOR_SUPPLY("vdd_lvds", NULL),
102 };
103
104 static struct regulator_consumer_supply tps65090_fet6_supply[] = {
105         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.2"),
106 };
107
108 static struct regulator_consumer_supply tps65090_fet7_supply[] = {
109         REGULATOR_SUPPLY("vdd_com_3v3", NULL),
110         REGULATOR_SUPPLY("vdd_gps_3v3", NULL),
111 };
112
113 #define TPS65090_PDATA_INIT(_id, _name, _supply_reg,                    \
114                 _always_on, _boot_on, _apply_uV, _en_ext_ctrl, _gpio)   \
115 static struct regulator_init_data ri_data_##_name =                     \
116 {                                                                       \
117         .supply_regulator = _supply_reg,                                \
118         .constraints = {                                                \
119                 .name = tps65090_rails(_id),                            \
120                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
121                                      REGULATOR_MODE_STANDBY),           \
122                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
123                                    REGULATOR_CHANGE_STATUS |            \
124                                    REGULATOR_CHANGE_VOLTAGE),           \
125                 .always_on = _always_on,                                \
126                 .boot_on = _boot_on,                                    \
127                 .apply_uV = _apply_uV,                                  \
128         },                                                              \
129         .num_consumer_supplies =                                        \
130                 ARRAY_SIZE(tps65090_##_name##_supply),                  \
131         .consumer_supplies = tps65090_##_name##_supply,                 \
132 };                                                                      \
133 static struct tps65090_regulator_platform_data                          \
134                         tps65090_regulator_pdata_##_name =              \
135 {                                                                       \
136         .id = TPS65090_REGULATOR_##_id,                                 \
137         .enable_ext_control = _en_ext_ctrl,                             \
138         .gpio = _gpio,                                                  \
139         .reg_init_data = &ri_data_##_name ,                             \
140 }
141
142 TPS65090_PDATA_INIT(DCDC1, dcdc1, NULL, 1, 1, 0, false, -1);
143 TPS65090_PDATA_INIT(DCDC2, dcdc2, NULL, 1, 1, 0, false, -1);
144 TPS65090_PDATA_INIT(DCDC3, dcdc3, NULL, 1, 1, 0, false, -1);
145 TPS65090_PDATA_INIT(LDO1, ldo1, NULL, 1, 1, 0, false, -1);
146 TPS65090_PDATA_INIT(LDO2, ldo2, NULL, 1, 1, 0, false, -1);
147 TPS65090_PDATA_INIT(FET1, fet1, NULL, 0, 0, 0, false, -1);
148 TPS65090_PDATA_INIT(FET3, fet3, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
149 TPS65090_PDATA_INIT(FET4, fet4, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
150 TPS65090_PDATA_INIT(FET5, fet5, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
151 TPS65090_PDATA_INIT(FET6, fet6, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
152 TPS65090_PDATA_INIT(FET7, fet7, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
153
154 #define ADD_TPS65090_REG(_name) (&tps65090_regulator_pdata_##_name)
155 static struct tps65090_regulator_platform_data *tps65090_reg_pdata[] = {
156         ADD_TPS65090_REG(dcdc1),
157         ADD_TPS65090_REG(dcdc2),
158         ADD_TPS65090_REG(dcdc3),
159         ADD_TPS65090_REG(ldo1),
160         ADD_TPS65090_REG(ldo2),
161         ADD_TPS65090_REG(fet1),
162         ADD_TPS65090_REG(fet3),
163         ADD_TPS65090_REG(fet4),
164         ADD_TPS65090_REG(fet5),
165         ADD_TPS65090_REG(fet6),
166         ADD_TPS65090_REG(fet7),
167 };
168
169 static struct tps65090_platform_data tps65090_pdata = {
170         .irq_base = -1,
171         .num_reg_pdata =  ARRAY_SIZE(tps65090_reg_pdata),
172         .reg_pdata = tps65090_reg_pdata
173 };
174
175 /* MAX77663 consumer rails */
176 static struct regulator_consumer_supply max77663_sd0_supply[] = {
177         REGULATOR_SUPPLY("vdd_core", NULL),
178 };
179
180 static struct regulator_consumer_supply max77663_sd1_supply[] = {
181         REGULATOR_SUPPLY("vddio_ddr", NULL),
182         REGULATOR_SUPPLY("vddio_ddr0", NULL),
183         REGULATOR_SUPPLY("vddio_ddr1", NULL),
184 };
185
186 static struct regulator_consumer_supply max77663_sd2_supply[] = {
187         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
188         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
189         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
190         REGULATOR_SUPPLY("vddio_cam", "tegrra_camera"),
191         REGULATOR_SUPPLY("pwrdet_cam", NULL),
192         REGULATOR_SUPPLY("avdd_osc", NULL),
193         REGULATOR_SUPPLY("vddio_sys", NULL),
194         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
195         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
196         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
197         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
198         REGULATOR_SUPPLY("vdd_emmc", NULL),
199         REGULATOR_SUPPLY("vddio_audio", NULL),
200         REGULATOR_SUPPLY("pwrdet_audio", NULL),
201         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
202         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
203         REGULATOR_SUPPLY("vddio_modem", NULL),
204         REGULATOR_SUPPLY("vddio_modem_1v8", NULL),
205         REGULATOR_SUPPLY("vddio_bb", NULL),
206         REGULATOR_SUPPLY("pwrdet_bb", NULL),
207         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
208         REGULATOR_SUPPLY("vddio_uart", NULL),
209         REGULATOR_SUPPLY("pwrdet_uart", NULL),
210         REGULATOR_SUPPLY("vddio_gmi", NULL),
211         REGULATOR_SUPPLY("pwrdet_nand", NULL),
212         REGULATOR_SUPPLY("vdd_sensor_1v8", NULL),
213         REGULATOR_SUPPLY("vdd_mic_1v8", NULL),
214         REGULATOR_SUPPLY("vdd_nfc_1v8", NULL),
215         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
216         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
217         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
218         REGULATOR_SUPPLY("dvdd_lcd", NULL),
219         REGULATOR_SUPPLY("vdd_com_1v8", NULL),
220         REGULATOR_SUPPLY("vddio_com_1v8", NULL),
221         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
222         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
223 };
224
225 static struct regulator_consumer_supply max77663_sd3_supply[] = {
226         REGULATOR_SUPPLY("vcore_emmc", NULL),
227 };
228
229 static struct regulator_consumer_supply max77663_ldo0_supply[] = {
230         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
231         REGULATOR_SUPPLY("avdd_pllx", NULL),
232         REGULATOR_SUPPLY("avdd_plle", NULL),
233         REGULATOR_SUPPLY("avdd_pllm", NULL),
234         REGULATOR_SUPPLY("avdd_pllu", NULL),
235         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
236         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
237         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
238 };
239
240 static struct regulator_consumer_supply max77663_ldo1_supply[] = {
241         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
242 };
243
244 static struct regulator_consumer_supply max77663_ldo2_supply[] = {
245         REGULATOR_SUPPLY("vdd_sensor_2v85", NULL),
246         REGULATOR_SUPPLY("vdd_als", NULL),
247         REGULATOR_SUPPLY("vdd", "1-004c"),
248 };
249
250 static struct regulator_consumer_supply max77663_ldo3_supply[] = {
251         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
252         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
253         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
254 };
255
256 static struct regulator_consumer_supply max77663_ldo4_supply[] = {
257         REGULATOR_SUPPLY("vdd_rtc", NULL),
258 };
259
260 static struct regulator_consumer_supply max77663_ldo5_supply[] = {
261         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
262         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
263         REGULATOR_SUPPLY("avdd_dsi_csi", "tegra_camera"),
264         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.0"),
265         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
266         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
267         REGULATOR_SUPPLY("vddio_bb_hsic", NULL),
268 };
269
270 static struct regulator_consumer_supply max77663_ldo6_supply[] = {
271         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
272         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
273 };
274
275 /* FIXME!! Put the device address of camera */
276 static struct regulator_consumer_supply max77663_ldo7_supply[] = {
277         REGULATOR_SUPPLY("avdd_cam1", NULL),
278         REGULATOR_SUPPLY("avdd_2v8_cam_af", NULL),
279 };
280
281 /* FIXME!! Put the device address of camera */
282 static struct regulator_consumer_supply max77663_ldo8_supply[] = {
283         REGULATOR_SUPPLY("avdd_cam2", NULL),
284 };
285
286 static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
287         {
288                 .src = FPS_SRC_0,
289                 .en_src = FPS_EN_SRC_EN0,
290                 .time_period = FPS_TIME_PERIOD_DEF,
291         },
292         {
293                 .src = FPS_SRC_1,
294                 .en_src = FPS_EN_SRC_EN1,
295                 .time_period = FPS_TIME_PERIOD_DEF,
296         },
297         {
298                 .src = FPS_SRC_2,
299                 .en_src = FPS_EN_SRC_EN0,
300                 .time_period = FPS_TIME_PERIOD_DEF,
301         },
302 };
303
304 #define MAX77663_PDATA_INIT(_rid, _id, _min_uV, _max_uV, _supply_reg,   \
305                 _always_on, _boot_on, _apply_uV,                        \
306                 _fps_src, _fps_pu_period, _fps_pd_period, _flags)       \
307         static struct regulator_init_data max77663_regulator_idata_##_id = {   \
308                 .supply_regulator = _supply_reg,                        \
309                 .constraints = {                                        \
310                         .name = max77663_rails(_id),                    \
311                         .min_uV = _min_uV,                              \
312                         .max_uV = _max_uV,                              \
313                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
314                                              REGULATOR_MODE_STANDBY),   \
315                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
316                                            REGULATOR_CHANGE_STATUS |    \
317                                            REGULATOR_CHANGE_VOLTAGE),   \
318                         .always_on = _always_on,                        \
319                         .boot_on = _boot_on,                            \
320                         .apply_uV = _apply_uV,                          \
321                 },                                                      \
322                 .num_consumer_supplies =                                \
323                         ARRAY_SIZE(max77663_##_id##_supply),            \
324                 .consumer_supplies = max77663_##_id##_supply,           \
325         };                                                              \
326 static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id =\
327 {                                                                       \
328                 .reg_init_data = &max77663_regulator_idata_##_id,       \
329                 .id = MAX77663_REGULATOR_ID_##_rid,                     \
330                 .fps_src = _fps_src,                                    \
331                 .fps_pu_period = _fps_pu_period,                        \
332                 .fps_pd_period = _fps_pd_period,                        \
333                 .fps_cfgs = max77663_fps_cfgs,                          \
334                 .flags = _flags,                                        \
335         }
336
337 MAX77663_PDATA_INIT(SD0, sd0,  900000, 1400000, tps65090_rails(DCDC3), 1, 1, 0,
338                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
339
340 MAX77663_PDATA_INIT(SD1, sd1,  1200000, 1200000, tps65090_rails(DCDC3), 1, 1, 1,
341                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
342
343 MAX77663_PDATA_INIT(SD2, sd2,  1800000, 1800000, tps65090_rails(DCDC3), 1, 1, 1,
344                     FPS_SRC_0, -1, -1, 0);
345
346 MAX77663_PDATA_INIT(SD3, sd3,  2850000, 2850000, tps65090_rails(DCDC3), 1, 1, 1,
347                     FPS_SRC_NONE, -1, -1, 0);
348
349 MAX77663_PDATA_INIT(LDO0, ldo0, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
350                     FPS_SRC_1, -1, -1, 0);
351
352 MAX77663_PDATA_INIT(LDO1, ldo1, 1050000, 1050000, max77663_rails(sd2), 0, 0, 1,
353                     FPS_SRC_NONE, -1, -1, 0);
354
355 MAX77663_PDATA_INIT(LDO2, ldo2, 2850000, 2850000, tps65090_rails(DCDC2), 1, 1,
356                     1, FPS_SRC_1, -1, -1, 0);
357
358 MAX77663_PDATA_INIT(LDO3, ldo3, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
359                     FPS_SRC_NONE, -1, -1, 0);
360
361 MAX77663_PDATA_INIT(LDO4, ldo4, 1100000, 1100000, tps65090_rails(DCDC2), 1, 1,
362                     1, FPS_SRC_NONE, -1, -1, 0);
363
364 MAX77663_PDATA_INIT(LDO5, ldo5, 1200000, 1200000, max77663_rails(sd2), 0, 1, 1,
365                     FPS_SRC_NONE, -1, -1, 0);
366
367 MAX77663_PDATA_INIT(LDO6, ldo6, 1800000, 3300000, tps65090_rails(DCDC2), 0, 0, 0,
368                     FPS_SRC_NONE, -1, -1, 0);
369
370 MAX77663_PDATA_INIT(LDO7, ldo7, 2800000, 2800000, tps65090_rails(DCDC2), 0, 0, 1,
371                     FPS_SRC_NONE, -1, -1, 0);
372
373 MAX77663_PDATA_INIT(LDO8, ldo8, 2800000, 2800000, tps65090_rails(DCDC2), 0, 1, 1,
374                     FPS_SRC_1, -1, -1, 0);
375
376 #define MAX77663_REG(_id, _data) (&max77663_regulator_pdata_##_data)
377
378 static struct max77663_regulator_platform_data *max77663_reg_pdata[] = {
379         MAX77663_REG(SD0, sd0),
380         MAX77663_REG(SD1, sd1),
381         MAX77663_REG(SD2, sd2),
382         MAX77663_REG(SD3, sd3),
383         MAX77663_REG(LDO0, ldo0),
384         MAX77663_REG(LDO1, ldo1),
385         MAX77663_REG(LDO2, ldo2),
386         MAX77663_REG(LDO3, ldo3),
387         MAX77663_REG(LDO4, ldo4),
388         MAX77663_REG(LDO5, ldo5),
389         MAX77663_REG(LDO6, ldo6),
390         MAX77663_REG(LDO7, ldo7),
391         MAX77663_REG(LDO8, ldo8),
392 };
393
394 static struct max77663_gpio_config max77663_gpio_cfgs[] = {
395         {
396                 .gpio = MAX77663_GPIO0,
397                 .dir = GPIO_DIR_OUT,
398                 .dout = GPIO_DOUT_LOW,
399                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
400                 .alternate = GPIO_ALT_DISABLE,
401         },
402         {
403                 .gpio = MAX77663_GPIO1,
404                 .dir = GPIO_DIR_IN,
405                 .dout = GPIO_DOUT_HIGH,
406                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
407                 .pull_up = GPIO_PU_ENABLE,
408                 .alternate = GPIO_ALT_DISABLE,
409         },
410         {
411                 .gpio = MAX77663_GPIO2,
412                 .dir = GPIO_DIR_OUT,
413                 .dout = GPIO_DOUT_HIGH,
414                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
415                 .pull_up = GPIO_PU_ENABLE,
416                 .alternate = GPIO_ALT_DISABLE,
417         },
418         {
419                 .gpio = MAX77663_GPIO3,
420                 .dir = GPIO_DIR_OUT,
421                 .dout = GPIO_DOUT_HIGH,
422                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
423                 .pull_up = GPIO_PU_ENABLE,
424                 .alternate = GPIO_ALT_DISABLE,
425         },
426         {
427                 .gpio = MAX77663_GPIO4,
428                 .dir = GPIO_DIR_OUT,
429                 .dout = GPIO_DOUT_HIGH,
430                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
431                 .alternate = GPIO_ALT_ENABLE,
432         },
433         {
434                 .gpio = MAX77663_GPIO5,
435                 .dir = GPIO_DIR_OUT,
436                 .dout = GPIO_DOUT_LOW,
437                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
438                 .alternate = GPIO_ALT_DISABLE,
439         },
440         {
441                 .gpio = MAX77663_GPIO6,
442                 .dir = GPIO_DIR_OUT,
443                 .dout = GPIO_DOUT_LOW,
444                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
445                 .alternate = GPIO_ALT_DISABLE,
446         },
447         {
448                 .gpio = MAX77663_GPIO7,
449                 .dir = GPIO_DIR_OUT,
450                 .dout = GPIO_DOUT_LOW,
451                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
452                 .alternate = GPIO_ALT_DISABLE,
453         },
454 };
455
456 static struct max77663_platform_data max77663_pdata = {
457         .irq_base       = MAX77663_IRQ_BASE,
458         .gpio_base      = MAX77663_GPIO_BASE,
459
460         .num_gpio_cfgs  = ARRAY_SIZE(max77663_gpio_cfgs),
461         .gpio_cfgs      = max77663_gpio_cfgs,
462
463         .regulator_pdata = max77663_reg_pdata,
464         .num_regulator_pdata = ARRAY_SIZE(max77663_reg_pdata),
465
466         .rtc_i2c_addr   = 0x68,
467
468         .use_power_off  = false,
469 };
470
471 static struct i2c_board_info __initdata max77663_regulators[] = {
472         {
473                 /* The I2C address was determined by OTP factory setting */
474                 I2C_BOARD_INFO("max77663", 0x3c),
475                 .irq            = INT_EXTERNAL_PMU,
476                 .platform_data  = &max77663_pdata,
477         },
478 };
479
480 static struct i2c_board_info __initdata tps65090_regulators[] = {
481         {
482                 I2C_BOARD_INFO("tps65090", 0x48),
483                 .platform_data  = &tps65090_pdata,
484         },
485 };
486
487 /* TPS51632 DC-DC converter */
488 static struct regulator_consumer_supply tps51632_dcdc_supply[] = {
489         REGULATOR_SUPPLY("vdd_cpu", NULL),
490 };
491
492 static struct regulator_init_data tps51632_init_data = {
493         .constraints = {                                                \
494                 .min_uV = 500000,                                       \
495                 .max_uV = 1520000,                                      \
496                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
497                                         REGULATOR_MODE_STANDBY),        \
498                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
499                                         REGULATOR_CHANGE_STATUS |       \
500                                         REGULATOR_CHANGE_VOLTAGE),      \
501                 .always_on = 1,                                         \
502                 .boot_on =  1,                                          \
503                 .apply_uV = 0,                                          \
504         },                                                              \
505         .num_consumer_supplies = ARRAY_SIZE(tps51632_dcdc_supply),      \
506                 .consumer_supplies = tps51632_dcdc_supply,              \
507 };
508
509 static struct tps51632_regulator_platform_data tps51632_pdata = {
510         .reg_init_data = &tps51632_init_data,           \
511         .enable_pwm = false,                            \
512         .max_voltage_uV = 1520000,                      \
513         .base_voltage_uV = 500000,                      \
514         .slew_rate_uv_per_us = 6000,                    \
515 };
516
517 static struct i2c_board_info __initdata tps51632_boardinfo[] = {
518         {
519                 I2C_BOARD_INFO("tps51632", 0x43),
520                 .platform_data  = &tps51632_pdata,
521         },
522 };
523
524 /************************ Palmas based regulator ****************/
525 static struct regulator_consumer_supply palmas_smps12_supply[] = {
526         REGULATOR_SUPPLY("vddio_ddr3l", NULL),
527         REGULATOR_SUPPLY("vcore_ddr3l", NULL),
528         REGULATOR_SUPPLY("vref2_ddr3l", NULL),
529 };
530
531 static struct regulator_consumer_supply palmas_smps3_supply[] = {
532         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
533         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
534         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
535         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
536         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
537         REGULATOR_SUPPLY("vdd_emmc", "sdhci-tegra.3"),
538         REGULATOR_SUPPLY("avdd_osc", NULL),
539         REGULATOR_SUPPLY("vddio_sys", NULL),
540         REGULATOR_SUPPLY("vddio_audio", NULL),
541         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
542         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
543         REGULATOR_SUPPLY("vddio_uart", NULL),
544         REGULATOR_SUPPLY("vddio_gmi", NULL),
545         REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
546         REGULATOR_SUPPLY("vddio_bb", NULL),
547         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
548         REGULATOR_SUPPLY("vddio_com_1v8", NULL),
549         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
550         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
551         REGULATOR_SUPPLY("vdd_modem", NULL),
552         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
553         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
554         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
555         REGULATOR_SUPPLY("dvdd_lcd", NULL),
556
557 };
558
559 static struct regulator_consumer_supply palmas_smps45_supply[] = {
560         REGULATOR_SUPPLY("vdd_core", NULL),
561 };
562
563 static struct regulator_consumer_supply palmas_smps8_supply[] = {
564         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
565         REGULATOR_SUPPLY("avdd_pllm", NULL),
566         REGULATOR_SUPPLY("avdd_pllu", NULL),
567         REGULATOR_SUPPLY("avdd_pllx", NULL),
568         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
569         REGULATOR_SUPPLY("avdd_plle", NULL),
570         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
571         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
572         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
573         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
574         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
575         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
576
577 };
578
579 static struct regulator_consumer_supply palmas_smps9_supply[] = {
580         REGULATOR_SUPPLY("vcore_emmc", "sdhci-tegra.3"),
581 };
582
583 static struct regulator_consumer_supply palmas_ldo1_supply[] = {
584         REGULATOR_SUPPLY("avdd_cam1", NULL),
585 };
586
587 static struct regulator_consumer_supply palmas_ldo2_supply[] = {
588         REGULATOR_SUPPLY("avdd_cam2", NULL),
589 };
590
591 static struct regulator_consumer_supply palmas_ldo3_supply[] = {
592         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.0"),
593         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
594         REGULATOR_SUPPLY("vddio_hsic_bb", NULL),
595         REGULATOR_SUPPLY("avdd_csi_dsi", "tegradc.0"),
596         REGULATOR_SUPPLY("avdd_csi_dsi", "tegradc.1"),
597         REGULATOR_SUPPLY("avdd_csi_dsi", "tegra_camera"),
598 };
599
600 static struct regulator_consumer_supply palmas_ldo4_supply[] = {
601         REGULATOR_SUPPLY("vpp_fuse", NULL),
602 };
603
604 static struct regulator_consumer_supply palmas_ldo6_supply[] = {
605         REGULATOR_SUPPLY("vdd_temp", NULL),
606         REGULATOR_SUPPLY("vdd_sensor", NULL),
607 };
608
609 static struct regulator_consumer_supply palmas_ldo7_supply[] = {
610         REGULATOR_SUPPLY("vdd_af_cam1", NULL),
611 };
612 static struct regulator_consumer_supply palmas_ldo8_supply[] = {
613         REGULATOR_SUPPLY("vdd_rtc", NULL),
614 };
615 static struct regulator_consumer_supply palmas_ldo9_supply[] = {
616         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
617 };
618
619 static struct regulator_consumer_supply palmas_ldoln_supply[] = {
620         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
621 };
622
623 static struct regulator_consumer_supply palmas_ldousb_supply[] = {
624         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
625         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
626         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
627         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
628         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
629 };
630
631 #define PALMAS_PDATA_INIT(_name, _minmv, _maxmv, _supply_reg, _always_on, \
632         _boot_on, _apply_uv)                                            \
633         static struct regulator_init_data reg_idata_##_name = {         \
634                 .constraints = {                                        \
635                         .name = palmas_rails(_name),                    \
636                         .min_uV = (_minmv)*1000,                        \
637                         .max_uV = (_maxmv)*1000,                        \
638                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
639                                         REGULATOR_MODE_STANDBY),        \
640                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
641                                         REGULATOR_CHANGE_STATUS |       \
642                                         REGULATOR_CHANGE_VOLTAGE),      \
643                         .always_on = _always_on,                        \
644                         .boot_on = _boot_on,                            \
645                         .apply_uV = _apply_uv,                          \
646                 },                                                      \
647                 .num_consumer_supplies =                                \
648                         ARRAY_SIZE(palmas_##_name##_supply),            \
649                 .consumer_supplies = palmas_##_name##_supply,           \
650                 .supply_regulator = _supply_reg,                        \
651         }
652
653 PALMAS_PDATA_INIT(smps12, 1350,  1350, tps65090_rails(DCDC3), 0, 0, 0);
654 PALMAS_PDATA_INIT(smps3, 1800,  1800, tps65090_rails(DCDC3), 0, 0, 0);
655 PALMAS_PDATA_INIT(smps45, 900,  1400, tps65090_rails(DCDC2), 1, 1, 0);
656 PALMAS_PDATA_INIT(smps8, 1050,  1050, tps65090_rails(DCDC2), 0, 1, 1);
657 PALMAS_PDATA_INIT(smps9, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 0);
658 PALMAS_PDATA_INIT(ldo1, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
659 PALMAS_PDATA_INIT(ldo2, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
660 PALMAS_PDATA_INIT(ldo3, 1200,  1200, palmas_rails(smps3), 0, 0, 1);
661 PALMAS_PDATA_INIT(ldo4, 1800,  1800, tps65090_rails(DCDC2), 0, 0, 0);
662 PALMAS_PDATA_INIT(ldo6, 2850,  2850, tps65090_rails(DCDC2), 0, 0, 1);
663 PALMAS_PDATA_INIT(ldo7, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
664 PALMAS_PDATA_INIT(ldo8, 1100,  1100, tps65090_rails(DCDC3), 1, 1, 1);
665 PALMAS_PDATA_INIT(ldo9, 1800,  3300, palmas_rails(smps9), 0, 0, 1);
666 PALMAS_PDATA_INIT(ldoln, 3300, 3300, tps65090_rails(DCDC1), 0, 0, 1);
667 PALMAS_PDATA_INIT(ldousb, 3300,  3300, tps65090_rails(DCDC1), 0, 0, 1);
668
669 #define PALMAS_REG_PDATA(_sname) &reg_idata_##_sname
670
671 static struct regulator_init_data *dalmore_e1611_reg_data[] = {
672         PALMAS_REG_PDATA(smps12),
673         NULL,
674         PALMAS_REG_PDATA(smps3),
675         PALMAS_REG_PDATA(smps45),
676         NULL,
677         NULL,
678         NULL,
679         PALMAS_REG_PDATA(smps8),
680         PALMAS_REG_PDATA(smps9),
681         NULL,
682         PALMAS_REG_PDATA(ldo1),
683         PALMAS_REG_PDATA(ldo2),
684         PALMAS_REG_PDATA(ldo3),
685         PALMAS_REG_PDATA(ldo4),
686         NULL,
687         PALMAS_REG_PDATA(ldo6),
688         PALMAS_REG_PDATA(ldo7),
689         PALMAS_REG_PDATA(ldo8),
690         PALMAS_REG_PDATA(ldo9),
691         PALMAS_REG_PDATA(ldoln),
692         PALMAS_REG_PDATA(ldousb),
693         NULL,
694         NULL,
695         NULL,
696         NULL,
697         NULL,
698 };
699
700 #define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep,   \
701                 _tstep, _vsel)                                          \
702         static struct palmas_reg_init reg_init_data_##_name = {         \
703                 .warm_reset = _warm_reset,                              \
704                 .roof_floor =   _roof_floor,                            \
705                 .mode_sleep = _mode_sleep,                              \
706                 .tstep = _tstep,                                        \
707                 .vsel = _vsel,                                          \
708         }
709
710 PALMAS_REG_INIT(smps12, 0, 0, 0, 0, 0);
711 PALMAS_REG_INIT(smps123, 0, 0, 0, 0, 0);
712 PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
713 PALMAS_REG_INIT(smps45, 0, 0, 0, 0, 0);
714 PALMAS_REG_INIT(smps457, 0, 0, 0, 0, 0);
715 PALMAS_REG_INIT(smps6, 0, 0, 0, 0, 0);
716 PALMAS_REG_INIT(smps7, 0, 0, 0, 0, 0);
717 PALMAS_REG_INIT(smps8, 0, 0, 0, 0, 0);
718 PALMAS_REG_INIT(smps9, 0, 0, 0, 0, 0);
719 PALMAS_REG_INIT(smps10, 0, 0, 0, 0, 0);
720 PALMAS_REG_INIT(ldo1, 0, 0, 0, 0, 0);
721 PALMAS_REG_INIT(ldo2, 0, 0, 0, 0, 0);
722 PALMAS_REG_INIT(ldo3, 0, 0, 0, 0, 0);
723 PALMAS_REG_INIT(ldo4, 0, 0, 0, 0, 0);
724 PALMAS_REG_INIT(ldo5, 0, 0, 0, 0, 0);
725 PALMAS_REG_INIT(ldo6, 0, 0, 0, 0, 0);
726 PALMAS_REG_INIT(ldo7, 0, 0, 0, 0, 0);
727 PALMAS_REG_INIT(ldo8, 0, 0, 0, 0, 0);
728 PALMAS_REG_INIT(ldo9, 0, 0, 0, 0, 0);
729 PALMAS_REG_INIT(ldoln, 0, 0, 0, 0, 0);
730 PALMAS_REG_INIT(ldousb, 0, 0, 0, 0, 0);
731 PALMAS_REG_INIT(regen1, 0, 0, 0, 0, 0);
732 PALMAS_REG_INIT(regen2, 0, 0, 0, 0, 0);
733 PALMAS_REG_INIT(regen3, 0, 0, 0, 0, 0);
734 PALMAS_REG_INIT(sysen1, 0, 0, 0, 0, 0);
735 PALMAS_REG_INIT(sysen2, 0, 0, 0, 0, 0);
736
737 #define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
738 static struct palmas_reg_init *dalmore_e1611_reg_init[] = {
739         PALMAS_REG_INIT_DATA(smps12),
740         PALMAS_REG_INIT_DATA(smps123),
741         PALMAS_REG_INIT_DATA(smps3),
742         PALMAS_REG_INIT_DATA(smps45),
743         PALMAS_REG_INIT_DATA(smps457),
744         PALMAS_REG_INIT_DATA(smps6),
745         PALMAS_REG_INIT_DATA(smps7),
746         PALMAS_REG_INIT_DATA(smps8),
747         PALMAS_REG_INIT_DATA(smps9),
748         PALMAS_REG_INIT_DATA(smps10),
749         PALMAS_REG_INIT_DATA(ldo1),
750         PALMAS_REG_INIT_DATA(ldo2),
751         PALMAS_REG_INIT_DATA(ldo3),
752         PALMAS_REG_INIT_DATA(ldo4),
753         PALMAS_REG_INIT_DATA(ldo5),
754         PALMAS_REG_INIT_DATA(ldo6),
755         PALMAS_REG_INIT_DATA(ldo7),
756         PALMAS_REG_INIT_DATA(ldo8),
757         PALMAS_REG_INIT_DATA(ldo9),
758         PALMAS_REG_INIT_DATA(ldoln),
759         PALMAS_REG_INIT_DATA(ldousb),
760         PALMAS_REG_INIT_DATA(regen1),
761         PALMAS_REG_INIT_DATA(regen2),
762         PALMAS_REG_INIT_DATA(regen3),
763         PALMAS_REG_INIT_DATA(sysen1),
764         PALMAS_REG_INIT_DATA(sysen2),
765 };
766
767 static struct palmas_pmic_platform_data pmic_platform = {
768         .reg_data = dalmore_e1611_reg_data,
769         .reg_init = dalmore_e1611_reg_init,
770 };
771
772 static struct palmas_platform_data palmas_pdata = {
773         .gpio_base = PALMAS_TEGRA_GPIO_BASE,
774         .irq_base = PALMAS_TEGRA_IRQ_BASE,
775         .pmic_pdata = &pmic_platform,
776         .mux_from_pdata = true,
777         .pad1 = 0,
778         .pad2 = 0,
779 };
780
781 static struct i2c_board_info palma_device[] = {
782         {
783                 I2C_BOARD_INFO("tps65913", 0x58),
784                 .irq            = INT_EXTERNAL_PMU,
785                 .platform_data  = &palmas_pdata,
786         },
787 };
788
789 /* EN_AVDD_USB_HDMI From PMU GP1 */
790 static struct regulator_consumer_supply fixed_reg_avdd_usb_hdmi_supply[] = {
791         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
792         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
793         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
794         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
795         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
796         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
797 };
798
799 /* EN_CAM_1v8 From PMU GP5 */
800 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
801         REGULATOR_SUPPLY("dvdd_cam", NULL),
802         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
803 };
804
805 /* EN_CAM_1v8 on e1611 From PMU GP6 */
806 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_e1611_supply[] = {
807         REGULATOR_SUPPLY("dvdd_cam", NULL),
808         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
809 };
810
811 static struct regulator_consumer_supply fixed_reg_vdd_hdmi_5v0_supply[] = {
812         REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
813 };
814
815 /* EN_USB1_VBUS From TEGRA GPIO PN4 PR3(T30) */
816 static struct regulator_consumer_supply fixed_reg_usb1_vbus_supply[] = {
817         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
818 };
819
820 /* EN_3V3_FUSE From TEGRA GPIO PX4 */
821 static struct regulator_consumer_supply fixed_reg_vpp_fuse_supply[] = {
822         REGULATOR_SUPPLY("vpp_fuse", NULL),
823 };
824
825 /* EN_USB3_VBUS From TEGRA GPIO PM5 */
826 static struct regulator_consumer_supply fixed_reg_usb3_vbus_supply[] = {
827         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.2"),
828 };
829
830 /* Macro for defining fixed regulator sub device data */
831 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
832 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
833         _gpio_nr, _open_drain, _active_high, _boot_state, _millivolts)  \
834         static struct regulator_init_data ri_data_##_var =              \
835         {                                                               \
836                 .supply_regulator = _in_supply,                         \
837                 .num_consumer_supplies =                                \
838                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
839                 .consumer_supplies = fixed_reg_##_name##_supply,        \
840                 .constraints = {                                        \
841                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
842                                         REGULATOR_MODE_STANDBY),        \
843                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
844                                         REGULATOR_CHANGE_STATUS |       \
845                                         REGULATOR_CHANGE_VOLTAGE),      \
846                         .always_on = _always_on,                        \
847                         .boot_on = _boot_on,                            \
848                 },                                                      \
849         };                                                              \
850         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
851         {                                                               \
852                 .supply_name = FIXED_SUPPLY(_name),                     \
853                 .microvolts = _millivolts * 1000,                       \
854                 .gpio = _gpio_nr,                                       \
855                 .gpio_is_open_drain = _open_drain,                      \
856                 .enable_high = _active_high,                            \
857                 .enabled_at_boot = _boot_state,                         \
858                 .init_data = &ri_data_##_var,                           \
859         };                                                              \
860         static struct platform_device fixed_reg_##_var##_dev = {        \
861                 .name = "reg-fixed-voltage",                            \
862                 .id = _id,                                              \
863                 .dev = {                                                \
864                         .platform_data = &fixed_reg_##_var##_pdata,     \
865                 },                                                      \
866         }
867
868 FIXED_REG(1,    avdd_usb_hdmi,  avdd_usb_hdmi,
869         tps65090_rails(DCDC2),  0,      0,
870         MAX77663_GPIO_BASE + MAX77663_GPIO1,    true,   true,   1,      3300);
871
872 FIXED_REG(2,    en_1v8_cam,     en_1v8_cam,
873         max77663_rails(sd2),    0,      0,
874         MAX77663_GPIO_BASE + MAX77663_GPIO5,    false,  true,   0,      1800);
875
876 FIXED_REG(3,    vdd_hdmi_5v0,   vdd_hdmi_5v0,
877         tps65090_rails(DCDC1),  0,      0,
878         TEGRA_GPIO_PK1, false,  true,   0,      5000);
879
880 FIXED_REG(4,    vpp_fuse,       vpp_fuse,
881         max77663_rails(sd2),    0,      0,
882         TEGRA_GPIO_PX4, false,  true,   0,      3300);
883
884 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
885 FIXED_REG(5,    usb1_vbus,      usb1_vbus,
886         tps65090_rails(DCDC1),  0,      0,
887         TEGRA_GPIO_PN4, true,   true,   0,      5000);
888 #else
889 FIXED_REG(5,    usb1_vbus,      usb1_vbus,
890         tps65090_rails(DCDC1),  0,      0,
891         TEGRA_GPIO_PR3, true,   true,   0,      5000);
892 #endif
893
894 FIXED_REG(6,    usb3_vbus,      usb3_vbus,
895         tps65090_rails(DCDC1),  0,      0,
896         TEGRA_GPIO_PK6, true,   true,   0,      5000);
897
898 FIXED_REG(7,    en_1v8_cam_e1611,       en_1v8_cam_e1611,
899         palmas_rails(smps3),    0,      0,
900         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO6,  false,  true,   0,      1800);
901
902 /*
903  * Creating the fixed regulator device tables
904  */
905
906 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
907
908 #define DALMORE_COMMON_FIXED_REG                \
909         ADD_FIXED_REG(usb1_vbus),               \
910         ADD_FIXED_REG(usb3_vbus),               \
911         ADD_FIXED_REG(vdd_hdmi_5v0),
912
913 #define E1612_FIXED_REG                         \
914         ADD_FIXED_REG(avdd_usb_hdmi),           \
915         ADD_FIXED_REG(en_1v8_cam),              \
916         ADD_FIXED_REG(vpp_fuse),                \
917
918 #define E1611_FIXED_REG                         \
919         ADD_FIXED_REG(en_1v8_cam_e1611),
920
921 /* Gpio switch regulator platform data for Dalmore E1611 */
922 static struct platform_device *fixed_reg_devs_e1611_a00[] = {
923         DALMORE_COMMON_FIXED_REG
924         E1611_FIXED_REG
925 };
926
927 /* Gpio switch regulator platform data for Dalmore E1612 */
928 static struct platform_device *fixed_reg_devs_e1612_a00[] = {
929         DALMORE_COMMON_FIXED_REG
930         E1612_FIXED_REG
931 };
932
933 int __init dalmore_palmas_regulator_init(void)
934 {
935         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
936         u32 pmc_ctrl;
937 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
938         int ret;
939
940         ret = gpio_request(TEGRA_GPIO_PCC3, "pmic_nreswarm");
941         if (ret < 0)
942                 pr_err("%s: gpio_request failed for gpio %d\n",
943                                 __func__, TEGRA_GPIO_PCC3);
944         else
945                 gpio_direction_output(TEGRA_GPIO_PCC3, 1);
946 #endif
947         /* TPS65913: Normal state of INT request line is LOW.
948          * configure the power management controller to trigger PMU
949          * interrupts when HIGH.
950          */
951         pmc_ctrl = readl(pmc + PMC_CTRL);
952         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
953         i2c_register_board_info(4, palma_device,
954                         ARRAY_SIZE(palma_device));
955         return 0;
956 }
957
958 static int ac_online(void)
959 {
960         return 1;
961 }
962
963 static struct resource dalmore_pda_resources[] = {
964         [0] = {
965                 .name   = "ac",
966         },
967 };
968
969 static struct pda_power_pdata dalmore_pda_data = {
970         .is_ac_online   = ac_online,
971 };
972
973 static struct platform_device dalmore_pda_power_device = {
974         .name           = "pda-power",
975         .id             = -1,
976         .resource       = dalmore_pda_resources,
977         .num_resources  = ARRAY_SIZE(dalmore_pda_resources),
978         .dev    = {
979                 .platform_data  = &dalmore_pda_data,
980         },
981 };
982
983 static struct tegra_suspend_platform_data dalmore_suspend_data = {
984         .cpu_timer      = 2000,
985         .cpu_off_timer  = 0,
986         .suspend_mode   = TEGRA_SUSPEND_LP0,
987         .core_timer     = 0x7e7e,
988         .core_off_timer = 0,
989         .corereq_high   = true,
990         .sysclkreq_high = true,
991 };
992
993 /* board parameters for cpu dfll */
994 static struct tegra_cl_dvfs_cfg_param dalmore_cl_dvfs_param = {
995         .sample_rate = 12500,
996
997         .force_mode = TEGRA_CL_DVFS_FORCE_FIXED,
998         .cf = 10,
999         .ci = 0,
1000         .cg = 2,
1001
1002         .droop_cut_value = 0xF,
1003         .droop_restore_ramp = 0x0,
1004         .scale_out_ramp = 0x0,
1005 };
1006
1007 /* TPS51632: fixed 10mV steps from 600mV to 1400mV, with offset 0x23 */
1008 #define PMU_CPU_VDD_MAP_SIZE ((1400000 - 600000) / 10000 + 1)
1009 static struct voltage_reg_map pmu_cpu_vdd_map[PMU_CPU_VDD_MAP_SIZE];
1010 static inline void fill_reg_map(void)
1011 {
1012         int i;
1013         for (i = 0; i < PMU_CPU_VDD_MAP_SIZE; i++) {
1014                 pmu_cpu_vdd_map[i].reg_value = i + 0x23;
1015                 pmu_cpu_vdd_map[i].reg_uV = 600000 + 10000 * i;
1016         }
1017 }
1018
1019 static struct tegra_cl_dvfs_platform_data dalmore_dfll_cpu_data = {
1020         .dfll_clk_name = "dfll_cpu",
1021         .pmu_if = TEGRA_CL_DVFS_PMU_I2C,
1022         .u.pmu_i2c = {
1023                 .fs_rate = 400000,
1024                 .slave_addr = 0x86,
1025                 .reg = 0x00,
1026         },
1027         .vdd_map = pmu_cpu_vdd_map,
1028         .vdd_map_size = PMU_CPU_VDD_MAP_SIZE,
1029
1030         .cfg_param = &dalmore_cl_dvfs_param,
1031 };
1032
1033 static int __init dalmore_max77663_regulator_init(void)
1034 {
1035         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
1036         u32 pmc_ctrl;
1037
1038         /* configure the power management controller to trigger PMU
1039          * interrupts when low */
1040         pmc_ctrl = readl(pmc + PMC_CTRL);
1041         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
1042
1043         i2c_register_board_info(4, max77663_regulators,
1044                                 ARRAY_SIZE(max77663_regulators));
1045
1046         return 0;
1047 }
1048
1049 static int __init dalmore_fixed_regulator_init(void)
1050 {
1051         struct board_info board_info;
1052
1053         if (!machine_is_dalmore())
1054                 return 0;
1055
1056         tegra_get_board_info(&board_info);
1057
1058         if (board_info.board_id == BOARD_E1611)
1059                 return platform_add_devices(fixed_reg_devs_e1611_a00,
1060                                 ARRAY_SIZE(fixed_reg_devs_e1611_a00));
1061         else
1062                 return platform_add_devices(fixed_reg_devs_e1612_a00,
1063                                 ARRAY_SIZE(fixed_reg_devs_e1612_a00));
1064 }
1065 subsys_initcall_sync(dalmore_fixed_regulator_init);
1066
1067 int __init dalmore_regulator_init(void)
1068 {
1069         struct board_info board_info;
1070         i2c_register_board_info(4, tps65090_regulators,
1071                         ARRAY_SIZE(tps65090_regulators));
1072
1073         fill_reg_map();
1074         tegra_cl_dvfs_set_platform_data(&dalmore_dfll_cpu_data);
1075
1076         tegra_get_board_info(&board_info);
1077         if (board_info.board_id == BOARD_E1611)
1078                 dalmore_palmas_regulator_init();
1079         else
1080                 dalmore_max77663_regulator_init();
1081
1082         i2c_register_board_info(4, tps51632_boardinfo, 1);
1083         platform_device_register(&dalmore_pda_power_device);
1084         return 0;
1085 }
1086
1087 int __init dalmore_suspend_init(void)
1088 {
1089         tegra_init_suspend(&dalmore_suspend_data);
1090         return 0;
1091 }
1092