arch/arm/mach-tegra/board-dalmore-power.c

   1 /*
   2  * arch/arm/mach-tegra/board-dalmore-power.c
   3  *
   4  * Copyright (C) 2012 NVIDIA Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  18  */
  19
  20 #include <linux/i2c.h>
  21 #include <linux/pda_power.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/resource.h>
  24 #include <linux/io.h>
  25 #include <linux/regulator/machine.h>
  26 #include <linux/regulator/driver.h>
  27 #include <linux/regulator/fixed.h>
  28 #include <linux/mfd/max77663-core.h>
  29 #include <linux/mfd/palmas.h>
  30 #include <linux/mfd/tps65090.h>
  31 #include <linux/regulator/max77663-regulator.h>
  32 #include <linux/regulator/tps65090-regulator.h>
  33 #include <linux/regulator/tps51632-regulator.h>
  34 #include <linux/gpio.h>
  35 #include <linux/regulator/userspace-consumer.h>
  36
  37 #include <asm/mach-types.h>
  38
  39 #include <mach/iomap.h>
  40 #include <mach/irqs.h>
  41 #include <mach/gpio-tegra.h>
  42
  43 #include "pm.h"
  44 #include "tegra-board-id.h"
  45 #include "board.h"
  46 #include "gpio-names.h"
  47 #include "board-dalmore.h"
  48 #include "tegra_cl_dvfs.h"
  49 #include "devices.h"
  50
  51 #define PMC_CTRL                0x0
  52 #define PMC_CTRL_INTR_LOW       (1 << 17)
  53
  54 /*TPS65090 consumer rails */
  55 static struct regulator_consumer_supply tps65090_dcdc1_supply[] = {
  56         REGULATOR_SUPPLY("vdd_sys_5v0", NULL),
  57         REGULATOR_SUPPLY("vdd_spk", NULL),
  58         REGULATOR_SUPPLY("vdd_sys_modem_5v0", NULL),
  59         REGULATOR_SUPPLY("vdd_sys_cam_5v0", NULL),
  60 };
  61
  62 static struct regulator_consumer_supply tps65090_dcdc2_supply[] = {
  63         REGULATOR_SUPPLY("vdd_sys_3v3", NULL),
  64         REGULATOR_SUPPLY("vddio_hv", "tegradc.1"),
  65         REGULATOR_SUPPLY("pwrdet_hv", NULL),
  66         REGULATOR_SUPPLY("vdd_sys_ds_3v3", NULL),
  67         REGULATOR_SUPPLY("vdd_sys_nfc_3v3", NULL),
  68         REGULATOR_SUPPLY("vdd_hv_nfc_3v3", NULL),
  69         REGULATOR_SUPPLY("vdd_sys_cam_3v3", NULL),
  70         REGULATOR_SUPPLY("vdd_sys_sensor_3v3", NULL),
  71         REGULATOR_SUPPLY("vdd_sys_audio_3v3", NULL),
  72         REGULATOR_SUPPLY("vdd_sys_dtv_3v3", NULL),
  73         REGULATOR_SUPPLY("vcc", "0-007c"),
  74         REGULATOR_SUPPLY("vcc", "0-0030"),
  75 };
  76
  77 static struct regulator_consumer_supply tps65090_dcdc3_supply[] = {
  78         REGULATOR_SUPPLY("vdd_ao", NULL),
  79 };
  80
  81 static struct regulator_consumer_supply tps65090_ldo1_supply[] = {
  82         REGULATOR_SUPPLY("vdd_sby_5v0", NULL),
  83 };
  84
  85 static struct regulator_consumer_supply tps65090_ldo2_supply[] = {
  86         REGULATOR_SUPPLY("vdd_sby_3v3", NULL),
  87 };
  88
  89 static struct regulator_consumer_supply tps65090_fet1_supply[] = {
  90         REGULATOR_SUPPLY("vdd_lcd_bl", NULL),
  91 };
  92
  93 static struct regulator_consumer_supply tps65090_fet3_supply[] = {
  94         REGULATOR_SUPPLY("vdd_modem_3v3", NULL),
  95 };
  96
  97 static struct regulator_consumer_supply tps65090_fet4_supply[] = {
  98         REGULATOR_SUPPLY("avdd_lcd", NULL),
  99         REGULATOR_SUPPLY("vdd_ts_3v3", NULL),
 100 };
 101
 102 static struct regulator_consumer_supply tps65090_fet5_supply[] = {
 103         REGULATOR_SUPPLY("vdd_lvds", NULL),
 104 };
 105
 106 static struct regulator_consumer_supply tps65090_fet6_supply[] = {
 107         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.2"),
 108 };
 109
 110 static struct regulator_consumer_supply tps65090_fet7_supply[] = {
 111         REGULATOR_SUPPLY("vdd_wifi_3v3", NULL),
 112         REGULATOR_SUPPLY("vdd_gps_3v3", NULL),
 113         REGULATOR_SUPPLY("vdd_bt_3v3", NULL),
 114 };
 115
 116 #define TPS65090_PDATA_INIT(_id, _name, _supply_reg,                    \
 117                 _always_on, _boot_on, _apply_uV, _en_ext_ctrl, _gpio)   \
 118 static struct regulator_init_data ri_data_##_name =                     \
 119 {                                                                       \
 120         .supply_regulator = _supply_reg,                                \
 121         .constraints = {                                                \
 122                 .name = tps65090_rails(_id),                            \
 123                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
 124                                      REGULATOR_MODE_STANDBY),           \
 125                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
 126                                    REGULATOR_CHANGE_STATUS |            \
 127                                    REGULATOR_CHANGE_VOLTAGE),           \
 128                 .always_on = _always_on,                                \
 129                 .boot_on = _boot_on,                                    \
 130                 .apply_uV = _apply_uV,                                  \
 131         },                                                              \
 132         .num_consumer_supplies =                                        \
 133                 ARRAY_SIZE(tps65090_##_name##_supply),                  \
 134         .consumer_supplies = tps65090_##_name##_supply,                 \
 135 };                                                                      \
 136 static struct tps65090_regulator_platform_data                          \
 137                         tps65090_regulator_pdata_##_name =              \
 138 {                                                                       \
 139         .id = TPS65090_REGULATOR_##_id,                                 \
 140         .enable_ext_control = _en_ext_ctrl,                             \
 141         .gpio = _gpio,                                                  \
 142         .reg_init_data = &ri_data_##_name ,                             \
 143 }
 144
 145 TPS65090_PDATA_INIT(DCDC1, dcdc1, NULL, 1, 1, 0, false, -1);
 146 TPS65090_PDATA_INIT(DCDC2, dcdc2, NULL, 1, 1, 0, false, -1);
 147 TPS65090_PDATA_INIT(DCDC3, dcdc3, NULL, 1, 1, 0, false, -1);
 148 TPS65090_PDATA_INIT(LDO1, ldo1, NULL, 1, 1, 0, false, -1);
 149 TPS65090_PDATA_INIT(LDO2, ldo2, NULL, 1, 1, 0, false, -1);
 150 TPS65090_PDATA_INIT(FET1, fet1, NULL, 0, 0, 0, false, -1);
 151 TPS65090_PDATA_INIT(FET3, fet3, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
 152 TPS65090_PDATA_INIT(FET4, fet4, tps65090_rails(DCDC2), 1, 1, 0, false, -1); /* always_on and boot_on */
 153 TPS65090_PDATA_INIT(FET5, fet5, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
 154 TPS65090_PDATA_INIT(FET6, fet6, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
 155 TPS65090_PDATA_INIT(FET7, fet7, tps65090_rails(DCDC2), 0, 0, 0, false, -1);
 156
 157 #define ADD_TPS65090_REG(_name) (&tps65090_regulator_pdata_##_name)
 158 static struct tps65090_regulator_platform_data *tps65090_reg_pdata[] = {
 159         ADD_TPS65090_REG(dcdc1),
 160         ADD_TPS65090_REG(dcdc2),
 161         ADD_TPS65090_REG(dcdc3),
 162         ADD_TPS65090_REG(ldo1),
 163         ADD_TPS65090_REG(ldo2),
 164         ADD_TPS65090_REG(fet1),
 165         ADD_TPS65090_REG(fet3),
 166         ADD_TPS65090_REG(fet4),
 167         ADD_TPS65090_REG(fet5),
 168         ADD_TPS65090_REG(fet6),
 169         ADD_TPS65090_REG(fet7),
 170 };
 171
 172 static struct tps65090_platform_data tps65090_pdata = {
 173         .irq_base = -1,
 174         .num_reg_pdata =  ARRAY_SIZE(tps65090_reg_pdata),
 175         .reg_pdata = tps65090_reg_pdata
 176 };
 177
 178 /* MAX77663 consumer rails */
 179 static struct regulator_consumer_supply max77663_sd0_supply[] = {
 180         REGULATOR_SUPPLY("vdd_core", NULL),
 181 };
 182
 183 static struct regulator_consumer_supply max77663_sd1_supply[] = {
 184         REGULATOR_SUPPLY("vddio_ddr", NULL),
 185         REGULATOR_SUPPLY("vddio_ddr0", NULL),
 186         REGULATOR_SUPPLY("vddio_ddr1", NULL),
 187 };
 188
 189 static struct regulator_consumer_supply max77663_sd2_supply[] = {
 190         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
 191         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
 192         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
 193         REGULATOR_SUPPLY("vddio_cam", "tegrra_camera"),
 194         REGULATOR_SUPPLY("pwrdet_cam", NULL),
 195         REGULATOR_SUPPLY("avdd_osc", NULL),
 196         REGULATOR_SUPPLY("vddio_sys", NULL),
 197         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
 198         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
 199         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
 200         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
 201         REGULATOR_SUPPLY("vdd_emmc", NULL),
 202         REGULATOR_SUPPLY("vddio_audio", NULL),
 203         REGULATOR_SUPPLY("pwrdet_audio", NULL),
 204         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
 205         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
 206         REGULATOR_SUPPLY("vddio_modem", NULL),
 207         REGULATOR_SUPPLY("vddio_modem_1v8", NULL),
 208         REGULATOR_SUPPLY("vddio_bb", NULL),
 209         REGULATOR_SUPPLY("pwrdet_bb", NULL),
 210         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
 211         REGULATOR_SUPPLY("vddio_uart", NULL),
 212         REGULATOR_SUPPLY("pwrdet_uart", NULL),
 213         REGULATOR_SUPPLY("vddio_gmi", NULL),
 214         REGULATOR_SUPPLY("pwrdet_nand", NULL),
 215         REGULATOR_SUPPLY("vdd_sensor_1v8", NULL),
 216         REGULATOR_SUPPLY("vdd_mic_1v8", NULL),
 217         REGULATOR_SUPPLY("vdd_nfc_1v8", NULL),
 218         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
 219         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
 220         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
 221         REGULATOR_SUPPLY("dvdd_lcd", NULL),
 222         REGULATOR_SUPPLY("vdd_com_1v8", NULL),
 223         REGULATOR_SUPPLY("vddio_wifi_1v8", NULL),
 224         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
 225         REGULATOR_SUPPLY("vddio_bt_1v8", NULL),
 226         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
 227 };
 228
 229 static struct regulator_consumer_supply max77663_sd3_supply[] = {
 230         REGULATOR_SUPPLY("vcore_emmc", NULL),
 231 };
 232
 233 static struct regulator_consumer_supply max77663_ldo0_supply[] = {
 234         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
 235         REGULATOR_SUPPLY("avdd_pllx", NULL),
 236         REGULATOR_SUPPLY("avdd_plle", NULL),
 237         REGULATOR_SUPPLY("avdd_pllm", NULL),
 238         REGULATOR_SUPPLY("avdd_pllu", NULL),
 239         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
 240         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
 241         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
 242 };
 243
 244 static struct regulator_consumer_supply max77663_ldo1_supply[] = {
 245         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
 246 };
 247
 248 static struct regulator_consumer_supply max77663_ldo2_supply[] = {
 249         REGULATOR_SUPPLY("vdd_sensor_2v85", NULL),
 250         REGULATOR_SUPPLY("vdd_als", NULL),
 251         REGULATOR_SUPPLY("vdd", "1-004c"),
 252 };
 253
 254 static struct regulator_consumer_supply max77663_ldo3_supply[] = {
 255         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
 256         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
 257         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
 258 };
 259
 260 static struct regulator_consumer_supply max77663_ldo4_supply[] = {
 261         REGULATOR_SUPPLY("vdd_rtc", NULL),
 262 };
 263
 264 static struct regulator_consumer_supply max77663_ldo5_supply[] = {
 265         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.0"),
 266         REGULATOR_SUPPLY("avdd_dsi_csi", "tegradc.1"),
 267         REGULATOR_SUPPLY("avdd_dsi_csi", "tegra_camera"),
 268         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
 269         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.2"),
 270         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
 271         REGULATOR_SUPPLY("vddio_bb_hsic", NULL),
 272 };
 273
 274 static struct regulator_consumer_supply max77663_ldo6_supply[] = {
 275         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
 276         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
 277 };
 278
 279 /* FIXME!! Put the device address of camera */
 280 static struct regulator_consumer_supply max77663_ldo7_supply[] = {
 281         REGULATOR_SUPPLY("avdd_cam1", NULL),
 282         REGULATOR_SUPPLY("avdd_2v8_cam_af", NULL),
 283 };
 284
 285 /* FIXME!! Put the device address of camera */
 286 static struct regulator_consumer_supply max77663_ldo8_supply[] = {
 287         REGULATOR_SUPPLY("avdd_cam2", NULL),
 288 };
 289
 290 static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
 291         {
 292                 .src = FPS_SRC_0,
 293                 .en_src = FPS_EN_SRC_EN0,
 294                 .time_period = FPS_TIME_PERIOD_DEF,
 295         },
 296         {
 297                 .src = FPS_SRC_1,
 298                 .en_src = FPS_EN_SRC_EN1,
 299                 .time_period = FPS_TIME_PERIOD_DEF,
 300         },
 301         {
 302                 .src = FPS_SRC_2,
 303                 .en_src = FPS_EN_SRC_EN0,
 304                 .time_period = FPS_TIME_PERIOD_DEF,
 305         },
 306 };
 307
 308 #define MAX77663_PDATA_INIT(_rid, _id, _min_uV, _max_uV, _supply_reg,   \
 309                 _always_on, _boot_on, _apply_uV,                        \
 310                 _fps_src, _fps_pu_period, _fps_pd_period, _flags)       \
 311         static struct regulator_init_data max77663_regulator_idata_##_id = {   \
 312                 .supply_regulator = _supply_reg,                        \
 313                 .constraints = {                                        \
 314                         .name = max77663_rails(_id),                    \
 315                         .min_uV = _min_uV,                              \
 316                         .max_uV = _max_uV,                              \
 317                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
 318                                              REGULATOR_MODE_STANDBY),   \
 319                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
 320                                            REGULATOR_CHANGE_STATUS |    \
 321                                            REGULATOR_CHANGE_VOLTAGE),   \
 322                         .always_on = _always_on,                        \
 323                         .boot_on = _boot_on,                            \
 324                         .apply_uV = _apply_uV,                          \
 325                 },                                                      \
 326                 .num_consumer_supplies =                                \
 327                         ARRAY_SIZE(max77663_##_id##_supply),            \
 328                 .consumer_supplies = max77663_##_id##_supply,           \
 329         };                                                              \
 330 static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id =\
 331 {                                                                       \
 332                 .reg_init_data = &max77663_regulator_idata_##_id,       \
 333                 .id = MAX77663_REGULATOR_ID_##_rid,                     \
 334                 .fps_src = _fps_src,                                    \
 335                 .fps_pu_period = _fps_pu_period,                        \
 336                 .fps_pd_period = _fps_pd_period,                        \
 337                 .fps_cfgs = max77663_fps_cfgs,                          \
 338                 .flags = _flags,                                        \
 339         }
 340
 341 MAX77663_PDATA_INIT(SD0, sd0,  900000, 1400000, tps65090_rails(DCDC3), 1, 1, 0,
 342                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
 343
 344 MAX77663_PDATA_INIT(SD1, sd1,  1200000, 1200000, tps65090_rails(DCDC3), 1, 1, 1,
 345                     FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
 346
 347 MAX77663_PDATA_INIT(SD2, sd2,  1800000, 1800000, tps65090_rails(DCDC3), 1, 1, 1,
 348                     FPS_SRC_0, -1, -1, 0);
 349
 350 MAX77663_PDATA_INIT(SD3, sd3,  2850000, 2850000, tps65090_rails(DCDC3), 1, 1, 1,
 351                     FPS_SRC_NONE, -1, -1, 0);
 352
 353 MAX77663_PDATA_INIT(LDO0, ldo0, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
 354                     FPS_SRC_1, -1, -1, 0);
 355
 356 MAX77663_PDATA_INIT(LDO1, ldo1, 1050000, 1050000, max77663_rails(sd2), 0, 0, 1,
 357                     FPS_SRC_NONE, -1, -1, 0);
 358
 359 MAX77663_PDATA_INIT(LDO2, ldo2, 2850000, 2850000, tps65090_rails(DCDC2), 1, 1,
 360                     1, FPS_SRC_1, -1, -1, 0);
 361
 362 MAX77663_PDATA_INIT(LDO3, ldo3, 1050000, 1050000, max77663_rails(sd2), 1, 1, 1,
 363                     FPS_SRC_NONE, -1, -1, 0);
 364
 365 MAX77663_PDATA_INIT(LDO4, ldo4, 1100000, 1100000, tps65090_rails(DCDC2), 1, 1,
 366                     1, FPS_SRC_NONE, -1, -1, 0);
 367
 368 MAX77663_PDATA_INIT(LDO5, ldo5, 1200000, 1200000, max77663_rails(sd2), 0, 1, 1,
 369                     FPS_SRC_NONE, -1, -1, 0);
 370
 371 MAX77663_PDATA_INIT(LDO6, ldo6, 1800000, 3300000, tps65090_rails(DCDC2), 0, 0, 0,
 372                     FPS_SRC_NONE, -1, -1, 0);
 373
 374 MAX77663_PDATA_INIT(LDO7, ldo7, 2800000, 2800000, tps65090_rails(DCDC2), 0, 0, 1,
 375                     FPS_SRC_NONE, -1, -1, 0);
 376
 377 MAX77663_PDATA_INIT(LDO8, ldo8, 2800000, 2800000, tps65090_rails(DCDC2), 0, 1, 1,
 378                     FPS_SRC_1, -1, -1, 0);
 379
 380 #define MAX77663_REG(_id, _data) (&max77663_regulator_pdata_##_data)
 381
 382 static struct max77663_regulator_platform_data *max77663_reg_pdata[] = {
 383         MAX77663_REG(SD0, sd0),
 384         MAX77663_REG(SD1, sd1),
 385         MAX77663_REG(SD2, sd2),
 386         MAX77663_REG(SD3, sd3),
 387         MAX77663_REG(LDO0, ldo0),
 388         MAX77663_REG(LDO1, ldo1),
 389         MAX77663_REG(LDO2, ldo2),
 390         MAX77663_REG(LDO3, ldo3),
 391         MAX77663_REG(LDO4, ldo4),
 392         MAX77663_REG(LDO5, ldo5),
 393         MAX77663_REG(LDO6, ldo6),
 394         MAX77663_REG(LDO7, ldo7),
 395         MAX77663_REG(LDO8, ldo8),
 396 };
 397
 398 static struct max77663_gpio_config max77663_gpio_cfgs[] = {
 399         {
 400                 .gpio = MAX77663_GPIO0,
 401                 .dir = GPIO_DIR_OUT,
 402                 .dout = GPIO_DOUT_LOW,
 403                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
 404                 .alternate = GPIO_ALT_DISABLE,
 405         },
 406         {
 407                 .gpio = MAX77663_GPIO1,
 408                 .dir = GPIO_DIR_IN,
 409                 .dout = GPIO_DOUT_HIGH,
 410                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
 411                 .pull_up = GPIO_PU_ENABLE,
 412                 .alternate = GPIO_ALT_DISABLE,
 413         },
 414         {
 415                 .gpio = MAX77663_GPIO2,
 416                 .dir = GPIO_DIR_OUT,
 417                 .dout = GPIO_DOUT_HIGH,
 418                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
 419                 .pull_up = GPIO_PU_ENABLE,
 420                 .alternate = GPIO_ALT_DISABLE,
 421         },
 422         {
 423                 .gpio = MAX77663_GPIO3,
 424                 .dir = GPIO_DIR_OUT,
 425                 .dout = GPIO_DOUT_HIGH,
 426                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
 427                 .pull_up = GPIO_PU_ENABLE,
 428                 .alternate = GPIO_ALT_DISABLE,
 429         },
 430         {
 431                 .gpio = MAX77663_GPIO4,
 432                 .dir = GPIO_DIR_OUT,
 433                 .dout = GPIO_DOUT_HIGH,
 434                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
 435                 .alternate = GPIO_ALT_ENABLE,
 436         },
 437         {
 438                 .gpio = MAX77663_GPIO5,
 439                 .dir = GPIO_DIR_OUT,
 440                 .dout = GPIO_DOUT_LOW,
 441                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
 442                 .alternate = GPIO_ALT_DISABLE,
 443         },
 444         {
 445                 .gpio = MAX77663_GPIO6,
 446                 .dir = GPIO_DIR_OUT,
 447                 .dout = GPIO_DOUT_LOW,
 448                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
 449                 .alternate = GPIO_ALT_DISABLE,
 450         },
 451         {
 452                 .gpio = MAX77663_GPIO7,
 453                 .dir = GPIO_DIR_OUT,
 454                 .dout = GPIO_DOUT_LOW,
 455                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
 456                 .alternate = GPIO_ALT_DISABLE,
 457         },
 458 };
 459
 460 static struct max77663_platform_data max77663_pdata = {
 461         .irq_base       = MAX77663_IRQ_BASE,
 462         .gpio_base      = MAX77663_GPIO_BASE,
 463
 464         .num_gpio_cfgs  = ARRAY_SIZE(max77663_gpio_cfgs),
 465         .gpio_cfgs      = max77663_gpio_cfgs,
 466
 467         .regulator_pdata = max77663_reg_pdata,
 468         .num_regulator_pdata = ARRAY_SIZE(max77663_reg_pdata),
 469
 470         .rtc_i2c_addr   = 0x68,
 471
 472         .use_power_off  = false,
 473 };
 474
 475 static struct i2c_board_info __initdata max77663_regulators[] = {
 476         {
 477                 /* The I2C address was determined by OTP factory setting */
 478                 I2C_BOARD_INFO("max77663", 0x3c),
 479                 .irq            = INT_EXTERNAL_PMU,
 480                 .platform_data  = &max77663_pdata,
 481         },
 482 };
 483
 484 static struct i2c_board_info __initdata tps65090_regulators[] = {
 485         {
 486                 I2C_BOARD_INFO("tps65090", 0x48),
 487                 .platform_data  = &tps65090_pdata,
 488         },
 489 };
 490
 491 /* TPS51632 DC-DC converter */
 492 static struct regulator_consumer_supply tps51632_dcdc_supply[] = {
 493         REGULATOR_SUPPLY("vdd_cpu", NULL),
 494 };
 495
 496 static struct regulator_init_data tps51632_init_data = {
 497         .constraints = {                                                \
 498                 .min_uV = 500000,                                       \
 499                 .max_uV = 1520000,                                      \
 500                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |            \
 501                                         REGULATOR_MODE_STANDBY),        \
 502                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |              \
 503                                         REGULATOR_CHANGE_STATUS |       \
 504                                         REGULATOR_CHANGE_VOLTAGE),      \
 505                 .always_on = 1,                                         \
 506                 .boot_on =  1,                                          \
 507                 .apply_uV = 0,                                          \
 508         },                                                              \
 509         .num_consumer_supplies = ARRAY_SIZE(tps51632_dcdc_supply),      \
 510                 .consumer_supplies = tps51632_dcdc_supply,              \
 511 };
 512
 513 static struct tps51632_regulator_platform_data tps51632_pdata = {
 514         .reg_init_data = &tps51632_init_data,           \
 515         .enable_pwm = false,                            \
 516         .max_voltage_uV = 1520000,                      \
 517         .base_voltage_uV = 500000,                      \
 518         .slew_rate_uv_per_us = 6000,                    \
 519 };
 520
 521 static struct i2c_board_info __initdata tps51632_boardinfo[] = {
 522         {
 523                 I2C_BOARD_INFO("tps51632", 0x43),
 524                 .platform_data  = &tps51632_pdata,
 525         },
 526 };
 527
 528 /************************ Palmas based regulator ****************/
 529 static struct regulator_consumer_supply palmas_smps12_supply[] = {
 530         REGULATOR_SUPPLY("vddio_ddr3l", NULL),
 531         REGULATOR_SUPPLY("vcore_ddr3l", NULL),
 532         REGULATOR_SUPPLY("vref2_ddr3l", NULL),
 533 };
 534
 535 static struct regulator_consumer_supply palmas_smps3_supply[] = {
 536         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
 537         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
 538         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
 539         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
 540         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
 541         REGULATOR_SUPPLY("vdd_emmc", "sdhci-tegra.3"),
 542         REGULATOR_SUPPLY("avdd_osc", NULL),
 543         REGULATOR_SUPPLY("vddio_sys", NULL),
 544         REGULATOR_SUPPLY("vddio_audio", NULL),
 545         REGULATOR_SUPPLY("avdd_audio_1v8", NULL),
 546         REGULATOR_SUPPLY("vdd_audio_1v8", NULL),
 547         REGULATOR_SUPPLY("vddio_uart", NULL),
 548         REGULATOR_SUPPLY("vddio_gmi", NULL),
 549         REGULATOR_SUPPLY("vddio_cam", "tegra_camera"),
 550         REGULATOR_SUPPLY("vddio_bb", NULL),
 551         REGULATOR_SUPPLY("vddio_bb_1v8", NULL),
 552         REGULATOR_SUPPLY("vddio_wifi_1v8", NULL),
 553         REGULATOR_SUPPLY("vdd_gps_1v8", NULL),
 554         REGULATOR_SUPPLY("vddio_bt_1v8", NULL),
 555         REGULATOR_SUPPLY("vdd_dtv_1v8", NULL),
 556         REGULATOR_SUPPLY("vdd_modem", NULL),
 557         REGULATOR_SUPPLY("vdd_ts_1v8", NULL),
 558         REGULATOR_SUPPLY("vdd_ds_1v8", NULL),
 559         REGULATOR_SUPPLY("vdd_spi_1v8", NULL),
 560         REGULATOR_SUPPLY("dvdd_lcd", NULL),
 561
 562 };
 563
 564 static struct regulator_consumer_supply palmas_smps45_supply[] = {
 565         REGULATOR_SUPPLY("vdd_core", NULL),
 566 };
 567
 568 static struct regulator_consumer_supply palmas_smps8_supply[] = {
 569         REGULATOR_SUPPLY("avdd_plla_p_c", NULL),
 570         REGULATOR_SUPPLY("avdd_pllm", NULL),
 571         REGULATOR_SUPPLY("avdd_pllu", NULL),
 572         REGULATOR_SUPPLY("avdd_pllx", NULL),
 573         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
 574         REGULATOR_SUPPLY("avdd_plle", NULL),
 575         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.0"),
 576         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegradc.1"),
 577         REGULATOR_SUPPLY("avdd_csi_dsi_pll", "tegra_camera"),
 578         REGULATOR_SUPPLY("avdd_hdmi_pll", "tegradc.1"),
 579         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
 580         REGULATOR_SUPPLY("avddio_usb", "tegra-ehci.2"),
 581
 582 };
 583
 584 static struct regulator_consumer_supply palmas_smps9_supply[] = {
 585         REGULATOR_SUPPLY("vcore_emmc", "sdhci-tegra.3"),
 586 };
 587
 588 static struct regulator_consumer_supply palmas_ldo1_supply[] = {
 589         REGULATOR_SUPPLY("avdd_cam1", NULL),
 590 };
 591
 592 static struct regulator_consumer_supply palmas_ldo2_supply[] = {
 593         REGULATOR_SUPPLY("avdd_cam2", NULL),
 594 };
 595
 596 static struct regulator_consumer_supply palmas_ldo3_supply[] = {
 597         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.1"),
 598         REGULATOR_SUPPLY("vddio_hsic", "tegra-ehci.2"),
 599         REGULATOR_SUPPLY("vddio_hsic_bb", NULL),
 600         REGULATOR_SUPPLY("avdd_csi_dsi", "tegradc.0"),
 601         REGULATOR_SUPPLY("avdd_csi_dsi", "tegradc.1"),
 602         REGULATOR_SUPPLY("avdd_csi_dsi", "tegra_camera"),
 603 };
 604
 605 static struct regulator_consumer_supply palmas_ldo4_supply[] = {
 606         REGULATOR_SUPPLY("vpp_fuse", NULL),
 607 };
 608
 609 static struct regulator_consumer_supply palmas_ldo6_supply[] = {
 610         REGULATOR_SUPPLY("vdd_temp", NULL),
 611         REGULATOR_SUPPLY("vdd_sensor", NULL),
 612 };
 613
 614 static struct regulator_consumer_supply palmas_ldo7_supply[] = {
 615         REGULATOR_SUPPLY("vdd_af_cam1", NULL),
 616 };
 617 static struct regulator_consumer_supply palmas_ldo8_supply[] = {
 618         REGULATOR_SUPPLY("vdd_rtc", NULL),
 619 };
 620 static struct regulator_consumer_supply palmas_ldo9_supply[] = {
 621         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
 622 };
 623
 624 static struct regulator_consumer_supply palmas_ldoln_supply[] = {
 625         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
 626 };
 627
 628 static struct regulator_consumer_supply palmas_ldousb_supply[] = {
 629         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
 630         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
 631         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
 632         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
 633         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
 634 };
 635
 636 #define PALMAS_PDATA_INIT(_name, _minmv, _maxmv, _supply_reg, _always_on, \
 637         _boot_on, _apply_uv)                                            \
 638         static struct regulator_init_data reg_idata_##_name = {         \
 639                 .constraints = {                                        \
 640                         .name = palmas_rails(_name),                    \
 641                         .min_uV = (_minmv)*1000,                        \
 642                         .max_uV = (_maxmv)*1000,                        \
 643                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
 644                                         REGULATOR_MODE_STANDBY),        \
 645                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
 646                                         REGULATOR_CHANGE_STATUS |       \
 647                                         REGULATOR_CHANGE_VOLTAGE),      \
 648                         .always_on = _always_on,                        \
 649                         .boot_on = _boot_on,                            \
 650                         .apply_uV = _apply_uv,                          \
 651                 },                                                      \
 652                 .num_consumer_supplies =                                \
 653                         ARRAY_SIZE(palmas_##_name##_supply),            \
 654                 .consumer_supplies = palmas_##_name##_supply,           \
 655                 .supply_regulator = _supply_reg,                        \
 656         }
 657
 658 PALMAS_PDATA_INIT(smps12, 1350,  1350, tps65090_rails(DCDC3), 0, 0, 0);
 659 PALMAS_PDATA_INIT(smps3, 1800,  1800, tps65090_rails(DCDC3), 0, 0, 0);
 660 PALMAS_PDATA_INIT(smps45, 900,  1400, tps65090_rails(DCDC2), 1, 1, 0);
 661 PALMAS_PDATA_INIT(smps8, 1050,  1050, tps65090_rails(DCDC2), 0, 1, 1);
 662 PALMAS_PDATA_INIT(smps9, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 0);
 663 PALMAS_PDATA_INIT(ldo1, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
 664 PALMAS_PDATA_INIT(ldo2, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
 665 PALMAS_PDATA_INIT(ldo3, 1200,  1200, palmas_rails(smps3), 0, 0, 1);
 666 PALMAS_PDATA_INIT(ldo4, 1800,  1800, tps65090_rails(DCDC2), 0, 0, 0);
 667 PALMAS_PDATA_INIT(ldo6, 2850,  2850, tps65090_rails(DCDC2), 0, 0, 1);
 668 PALMAS_PDATA_INIT(ldo7, 2800,  2800, tps65090_rails(DCDC2), 0, 0, 1);
 669 PALMAS_PDATA_INIT(ldo8, 1100,  1100, tps65090_rails(DCDC3), 1, 1, 1);
 670 PALMAS_PDATA_INIT(ldo9, 1800,  3300, palmas_rails(smps9), 0, 0, 1);
 671 PALMAS_PDATA_INIT(ldoln, 3300, 3300, tps65090_rails(DCDC1), 0, 0, 1);
 672 PALMAS_PDATA_INIT(ldousb, 3300,  3300, tps65090_rails(DCDC1), 0, 0, 1);
 673
 674 #define PALMAS_REG_PDATA(_sname) &reg_idata_##_sname
 675
 676 static struct regulator_init_data *dalmore_e1611_reg_data[PALMAS_NUM_REGS] = {
 677         PALMAS_REG_PDATA(smps12),
 678         NULL,
 679         PALMAS_REG_PDATA(smps3),
 680         PALMAS_REG_PDATA(smps45),
 681         NULL,
 682         NULL,
 683         NULL,
 684         PALMAS_REG_PDATA(smps8),
 685         PALMAS_REG_PDATA(smps9),
 686         NULL,
 687         PALMAS_REG_PDATA(ldo1),
 688         PALMAS_REG_PDATA(ldo2),
 689         PALMAS_REG_PDATA(ldo3),
 690         PALMAS_REG_PDATA(ldo4),
 691         NULL,
 692         PALMAS_REG_PDATA(ldo6),
 693         PALMAS_REG_PDATA(ldo7),
 694         PALMAS_REG_PDATA(ldo8),
 695         PALMAS_REG_PDATA(ldo9),
 696         PALMAS_REG_PDATA(ldoln),
 697         PALMAS_REG_PDATA(ldousb),
 698         NULL,
 699         NULL,
 700         NULL,
 701         NULL,
 702         NULL,
 703 };
 704
 705 #define PALMAS_REG_INIT(_name, _warm_reset, _roof_floor, _mode_sleep,   \
 706                 _tstep, _vsel)                                          \
 707         static struct palmas_reg_init reg_init_data_##_name = {         \
 708                 .warm_reset = _warm_reset,                              \
 709                 .roof_floor =   _roof_floor,                            \
 710                 .mode_sleep = _mode_sleep,                              \
 711                 .tstep = _tstep,                                        \
 712                 .vsel = _vsel,                                          \
 713         }
 714
 715 PALMAS_REG_INIT(smps12, 0, 0, 0, 0, 0);
 716 PALMAS_REG_INIT(smps123, 0, 0, 0, 0, 0);
 717 PALMAS_REG_INIT(smps3, 0, 0, 0, 0, 0);
 718 PALMAS_REG_INIT(smps45, 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
 719 PALMAS_REG_INIT(smps457, 0, 0, 0, 0, 0);
 720 PALMAS_REG_INIT(smps6, 0, 0, 0, 0, 0);
 721 PALMAS_REG_INIT(smps7, 0, 0, 0, 0, 0);
 722 PALMAS_REG_INIT(smps8, 0, 0, 0, 0, 0);
 723 PALMAS_REG_INIT(smps9, 0, 0, 0, 0, 0);
 724 PALMAS_REG_INIT(smps10, 0, 0, 0, 0, 0);
 725 PALMAS_REG_INIT(ldo1, 0, 0, 0, 0, 0);
 726 PALMAS_REG_INIT(ldo2, 0, 0, 0, 0, 0);
 727 PALMAS_REG_INIT(ldo3, 0, 0, 0, 0, 0);
 728 PALMAS_REG_INIT(ldo4, 0, 0, 0, 0, 0);
 729 PALMAS_REG_INIT(ldo5, 0, 0, 0, 0, 0);
 730 PALMAS_REG_INIT(ldo6, 0, 0, 0, 0, 0);
 731 PALMAS_REG_INIT(ldo7, 0, 0, 0, 0, 0);
 732 PALMAS_REG_INIT(ldo8, 0, 0, 0, 0, 0);
 733 PALMAS_REG_INIT(ldo9, 0, 0, 0, 0, 0);
 734 PALMAS_REG_INIT(ldoln, 0, 0, 0, 0, 0);
 735 PALMAS_REG_INIT(ldousb, 0, 0, 0, 0, 0);
 736 PALMAS_REG_INIT(regen1, 0, 0, 0, 0, 0);
 737 PALMAS_REG_INIT(regen2, 0, 0, 0, 0, 0);
 738 PALMAS_REG_INIT(regen3, 0, 0, 0, 0, 0);
 739 PALMAS_REG_INIT(sysen1, 0, 0, 0, 0, 0);
 740 PALMAS_REG_INIT(sysen2, 0, 0, 0, 0, 0);
 741
 742 #define PALMAS_REG_INIT_DATA(_sname) &reg_init_data_##_sname
 743 static struct palmas_reg_init *dalmore_e1611_reg_init[PALMAS_NUM_REGS] = {
 744         PALMAS_REG_INIT_DATA(smps12),
 745         PALMAS_REG_INIT_DATA(smps123),
 746         PALMAS_REG_INIT_DATA(smps3),
 747         PALMAS_REG_INIT_DATA(smps45),
 748         PALMAS_REG_INIT_DATA(smps457),
 749         PALMAS_REG_INIT_DATA(smps6),
 750         PALMAS_REG_INIT_DATA(smps7),
 751         PALMAS_REG_INIT_DATA(smps8),
 752         PALMAS_REG_INIT_DATA(smps9),
 753         PALMAS_REG_INIT_DATA(smps10),
 754         PALMAS_REG_INIT_DATA(ldo1),
 755         PALMAS_REG_INIT_DATA(ldo2),
 756         PALMAS_REG_INIT_DATA(ldo3),
 757         PALMAS_REG_INIT_DATA(ldo4),
 758         PALMAS_REG_INIT_DATA(ldo5),
 759         PALMAS_REG_INIT_DATA(ldo6),
 760         PALMAS_REG_INIT_DATA(ldo7),
 761         PALMAS_REG_INIT_DATA(ldo8),
 762         PALMAS_REG_INIT_DATA(ldo9),
 763         PALMAS_REG_INIT_DATA(ldoln),
 764         PALMAS_REG_INIT_DATA(ldousb),
 765         PALMAS_REG_INIT_DATA(regen1),
 766         PALMAS_REG_INIT_DATA(regen2),
 767         PALMAS_REG_INIT_DATA(regen3),
 768         PALMAS_REG_INIT_DATA(sysen1),
 769         PALMAS_REG_INIT_DATA(sysen2),
 770 };
 771
 772 static struct palmas_pmic_platform_data pmic_platform = {
 773         .enable_ldo8_tracking = true,
 774 };
 775
 776 static struct palmas_platform_data palmas_pdata = {
 777         .gpio_base = PALMAS_TEGRA_GPIO_BASE,
 778         .irq_base = PALMAS_TEGRA_IRQ_BASE,
 779         .pmic_pdata = &pmic_platform,
 780         .mux_from_pdata = true,
 781         .pad1 = 0,
 782         .pad2 = 0,
 783 };
 784
 785 static struct i2c_board_info palma_device[] = {
 786         {
 787                 I2C_BOARD_INFO("tps65913", 0x58),
 788                 .irq            = INT_EXTERNAL_PMU,
 789                 .platform_data  = &palmas_pdata,
 790         },
 791 };
 792
 793 /* EN_AVDD_USB_HDMI From PMU GP1 */
 794 static struct regulator_consumer_supply fixed_reg_avdd_usb_hdmi_supply[] = {
 795         REGULATOR_SUPPLY("avdd_hdmi", "tegradc.1"),
 796         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
 797         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
 798         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
 799         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
 800         REGULATOR_SUPPLY("hvdd_usb", "tegra-ehci.2"),
 801 };
 802
 803 /* EN_CAM_1v8 From PMU GP5 */
 804 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
 805         REGULATOR_SUPPLY("dvdd_cam", NULL),
 806         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
 807 };
 808
 809 /* EN_CAM_1v8 on e1611 From PMU GP6 */
 810 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_e1611_supply[] = {
 811         REGULATOR_SUPPLY("dvdd_cam", NULL),
 812         REGULATOR_SUPPLY("vdd_cam_1v8", NULL),
 813 };
 814
 815 static struct regulator_consumer_supply fixed_reg_vdd_hdmi_5v0_supply[] = {
 816         REGULATOR_SUPPLY("vdd_hdmi_5v0", "tegradc.1"),
 817 };
 818
 819 /* EN_USB1_VBUS From TEGRA GPIO PN4 PR3(T30) */
 820 static struct regulator_consumer_supply fixed_reg_usb1_vbus_supply[] = {
 821         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
 822 };
 823
 824 /* EN_3V3_FUSE From TEGRA GPIO PX4 */
 825 static struct regulator_consumer_supply fixed_reg_vpp_fuse_supply[] = {
 826         REGULATOR_SUPPLY("vpp_fuse", NULL),
 827 };
 828
 829 /* EN_USB3_VBUS From TEGRA GPIO PM5 */
 830 static struct regulator_consumer_supply fixed_reg_usb3_vbus_supply[] = {
 831         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.2"),
 832 };
 833
 834 /* Macro for defining fixed regulator sub device data */
 835 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
 836 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
 837         _gpio_nr, _open_drain, _active_high, _boot_state, _millivolts)  \
 838         static struct regulator_init_data ri_data_##_var =              \
 839         {                                                               \
 840                 .supply_regulator = _in_supply,                         \
 841                 .num_consumer_supplies =                                \
 842                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
 843                 .consumer_supplies = fixed_reg_##_name##_supply,        \
 844                 .constraints = {                                        \
 845                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
 846                                         REGULATOR_MODE_STANDBY),        \
 847                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
 848                                         REGULATOR_CHANGE_STATUS |       \
 849                                         REGULATOR_CHANGE_VOLTAGE),      \
 850                         .always_on = _always_on,                        \
 851                         .boot_on = _boot_on,                            \
 852                 },                                                      \
 853         };                                                              \
 854         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
 855         {                                                               \
 856                 .supply_name = FIXED_SUPPLY(_name),                     \
 857                 .microvolts = _millivolts * 1000,                       \
 858                 .gpio = _gpio_nr,                                       \
 859                 .gpio_is_open_drain = _open_drain,                      \
 860                 .enable_high = _active_high,                            \
 861                 .enabled_at_boot = _boot_state,                         \
 862                 .init_data = &ri_data_##_var,                           \
 863         };                                                              \
 864         static struct platform_device fixed_reg_##_var##_dev = {        \
 865                 .name = "reg-fixed-voltage",                            \
 866                 .id = _id,                                              \
 867                 .dev = {                                                \
 868                         .platform_data = &fixed_reg_##_var##_pdata,     \
 869                 },                                                      \
 870         }
 871
 872 FIXED_REG(1,    avdd_usb_hdmi,  avdd_usb_hdmi,
 873         tps65090_rails(DCDC2),  0,      0,
 874         MAX77663_GPIO_BASE + MAX77663_GPIO1,    true,   true,   1,      3300);
 875
 876 FIXED_REG(2,    en_1v8_cam,     en_1v8_cam,
 877         max77663_rails(sd2),    0,      0,
 878         MAX77663_GPIO_BASE + MAX77663_GPIO5,    false,  true,   0,      1800);
 879
 880 FIXED_REG(3,    vdd_hdmi_5v0,   vdd_hdmi_5v0,
 881         tps65090_rails(DCDC1),  0,      0,
 882         TEGRA_GPIO_PK1, false,  true,   0,      5000);
 883
 884 FIXED_REG(4,    vpp_fuse,       vpp_fuse,
 885         max77663_rails(sd2),    0,      0,
 886         TEGRA_GPIO_PX4, false,  true,   0,      3300);
 887
 888 #ifdef CONFIG_ARCH_TEGRA_11x_SOC
 889 FIXED_REG(5,    usb1_vbus,      usb1_vbus,
 890         tps65090_rails(DCDC1),  0,      0,
 891         TEGRA_GPIO_PN4, true,   true,   0,      5000);
 892 #else
 893 FIXED_REG(5,    usb1_vbus,      usb1_vbus,
 894         tps65090_rails(DCDC1),  0,      0,
 895         TEGRA_GPIO_PR3, true,   true,   0,      5000);
 896 #endif
 897
 898 FIXED_REG(6,    usb3_vbus,      usb3_vbus,
 899         tps65090_rails(DCDC1),  0,      0,
 900         TEGRA_GPIO_PK6, true,   true,   0,      5000);
 901
 902 FIXED_REG(7,    en_1v8_cam_e1611,       en_1v8_cam_e1611,
 903         palmas_rails(smps3),    0,      0,
 904         PALMAS_TEGRA_GPIO_BASE + PALMAS_GPIO6,  false,  true,   0,      1800);
 905
 906 /*
 907  * Creating the fixed regulator device tables
 908  */
 909
 910 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
 911
 912 #define DALMORE_COMMON_FIXED_REG                \
 913         ADD_FIXED_REG(usb1_vbus),               \
 914         ADD_FIXED_REG(usb3_vbus),               \
 915         ADD_FIXED_REG(vdd_hdmi_5v0),
 916
 917 #define E1612_FIXED_REG                         \
 918         ADD_FIXED_REG(avdd_usb_hdmi),           \
 919         ADD_FIXED_REG(en_1v8_cam),              \
 920         ADD_FIXED_REG(vpp_fuse),                \
 921
 922 #define E1611_FIXED_REG                         \
 923         ADD_FIXED_REG(en_1v8_cam_e1611),
 924
 925 /* Gpio switch regulator platform data for Dalmore E1611 */
 926 static struct platform_device *fixed_reg_devs_e1611_a00[] = {
 927         DALMORE_COMMON_FIXED_REG
 928         E1611_FIXED_REG
 929 };
 930
 931 /* Gpio switch regulator platform data for Dalmore E1612 */
 932 static struct platform_device *fixed_reg_devs_e1612_a00[] = {
 933         DALMORE_COMMON_FIXED_REG
 934         E1612_FIXED_REG
 935 };
 936
 937 int __init dalmore_palmas_regulator_init(void)
 938 {
 939         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
 940         u32 pmc_ctrl;
 941         int i;
 942 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
 943         int ret;
 944
 945         ret = gpio_request(TEGRA_GPIO_PCC3, "pmic_nreswarm");
 946         if (ret < 0)
 947                 pr_err("%s: gpio_request failed for gpio %d\n",
 948                                 __func__, TEGRA_GPIO_PCC3);
 949         else
 950                 gpio_direction_output(TEGRA_GPIO_PCC3, 1);
 951 #endif
 952         /* TPS65913: Normal state of INT request line is LOW.
 953          * configure the power management controller to trigger PMU
 954          * interrupts when HIGH.
 955          */
 956         pmc_ctrl = readl(pmc + PMC_CTRL);
 957         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
 958         for (i = 0; i < PALMAS_NUM_REGS ; i++) {
 959                 pmic_platform.reg_data[i] = dalmore_e1611_reg_data[i];
 960                 pmic_platform.reg_init[i] = dalmore_e1611_reg_init[i];
 961         }
 962
 963         i2c_register_board_info(4, palma_device,
 964                         ARRAY_SIZE(palma_device));
 965         return 0;
 966 }
 967
 968 static int ac_online(void)
 969 {
 970         return 1;
 971 }
 972
 973 static struct resource dalmore_pda_resources[] = {
 974         [0] = {
 975                 .name   = "ac",
 976         },
 977 };
 978
 979 static struct pda_power_pdata dalmore_pda_data = {
 980         .is_ac_online   = ac_online,
 981 };
 982
 983 static struct platform_device dalmore_pda_power_device = {
 984         .name           = "pda-power",
 985         .id             = -1,
 986         .resource       = dalmore_pda_resources,
 987         .num_resources  = ARRAY_SIZE(dalmore_pda_resources),
 988         .dev    = {
 989                 .platform_data  = &dalmore_pda_data,
 990         },
 991 };
 992
 993 static struct tegra_suspend_platform_data dalmore_suspend_data = {
 994         .cpu_timer      = 2000,
 995         .cpu_off_timer  = 2000,
 996         .suspend_mode   = TEGRA_SUSPEND_LP0,
 997         .core_timer     = 0x7e7e,
 998         .core_off_timer = 2000,
 999         .corereq_high   = true,
1000         .sysclkreq_high = true,
1001 };
1002 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
1003 /* board parameters for cpu dfll */
1004 static struct tegra_cl_dvfs_cfg_param dalmore_cl_dvfs_param = {
1005         .sample_rate = 12500,
1006
1007         .force_mode = TEGRA_CL_DVFS_FORCE_FIXED,
1008         .cf = 10,
1009         .ci = 0,
1010         .cg = 2,
1011
1012         .droop_cut_value = 0xF,
1013         .droop_restore_ramp = 0x0,
1014         .scale_out_ramp = 0x0,
1015 };
1016 #endif
1017
1018 /* TPS51632: fixed 10mV steps from 600mV to 1400mV, with offset 0x23 */
1019 #define PMU_CPU_VDD_MAP_SIZE ((1400000 - 600000) / 10000 + 1)
1020 static struct voltage_reg_map pmu_cpu_vdd_map[PMU_CPU_VDD_MAP_SIZE];
1021 static inline void fill_reg_map(void)
1022 {
1023         int i;
1024         for (i = 0; i < PMU_CPU_VDD_MAP_SIZE; i++) {
1025                 pmu_cpu_vdd_map[i].reg_value = i + 0x23;
1026                 pmu_cpu_vdd_map[i].reg_uV = 600000 + 10000 * i;
1027         }
1028 }
1029
1030 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
1031 static struct tegra_cl_dvfs_platform_data dalmore_cl_dvfs_data = {
1032         .dfll_clk_name = "dfll_cpu",
1033         .pmu_if = TEGRA_CL_DVFS_PMU_I2C,
1034         .u.pmu_i2c = {
1035                 .fs_rate = 400000,
1036                 .slave_addr = 0x86,
1037                 .reg = 0x00,
1038         },
1039         .vdd_map = pmu_cpu_vdd_map,
1040         .vdd_map_size = PMU_CPU_VDD_MAP_SIZE,
1041
1042         .cfg_param = &dalmore_cl_dvfs_param,
1043 };
1044
1045 static int __init dalmore_cl_dvfs_init(void)
1046 {
1047         fill_reg_map();
1048         tegra_cl_dvfs_device.dev.platform_data = &dalmore_cl_dvfs_data;
1049         platform_device_register(&tegra_cl_dvfs_device);
1050
1051         return 0;
1052 }
1053 #endif
1054
1055 static int __init dalmore_max77663_regulator_init(void)
1056 {
1057         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
1058         u32 pmc_ctrl;
1059
1060         /* configure the power management controller to trigger PMU
1061          * interrupts when low */
1062         pmc_ctrl = readl(pmc + PMC_CTRL);
1063         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
1064
1065         i2c_register_board_info(4, max77663_regulators,
1066                                 ARRAY_SIZE(max77663_regulators));
1067
1068         return 0;
1069 }
1070
1071 static struct regulator_bulk_data dalmore_bt_regulator_supply[] = {
1072         [0] = {
1073                 .supply = "vdd_bt_3v3",
1074         },
1075         [1] = {
1076                 .supply = "vddio_bt_1v8",
1077         },
1078 };
1079
1080 static struct regulator_userspace_consumer_data dalmore_bt_regulator_pdata = {
1081         .num_supplies   = ARRAY_SIZE(dalmore_bt_regulator_supply),
1082         .supplies       = dalmore_bt_regulator_supply,
1083 };
1084
1085 static struct platform_device dalmore_bt_regulator_device = {
1086         .name   = "reg-userspace-consumer",
1087         .id     = 1,
1088         .dev    = {
1089                         .platform_data = &dalmore_bt_regulator_pdata,
1090         },
1091 };
1092
1093 static int __init dalmore_fixed_regulator_init(void)
1094 {
1095         struct board_info board_info;
1096
1097         if (!machine_is_dalmore())
1098                 return 0;
1099
1100         tegra_get_board_info(&board_info);
1101
1102         if (board_info.board_id == BOARD_E1611)
1103                 return platform_add_devices(fixed_reg_devs_e1611_a00,
1104                                 ARRAY_SIZE(fixed_reg_devs_e1611_a00));
1105         else
1106                 return platform_add_devices(fixed_reg_devs_e1612_a00,
1107                                 ARRAY_SIZE(fixed_reg_devs_e1612_a00));
1108 }
1109 subsys_initcall_sync(dalmore_fixed_regulator_init);
1110
1111 int __init dalmore_regulator_init(void)
1112 {
1113         struct board_info board_info;
1114         i2c_register_board_info(4, tps65090_regulators,
1115                         ARRAY_SIZE(tps65090_regulators));
1116 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
1117         dalmore_cl_dvfs_init();
1118 #endif
1119         tegra_get_board_info(&board_info);
1120         if (board_info.board_id == BOARD_E1611)
1121                 dalmore_palmas_regulator_init();
1122         else
1123                 dalmore_max77663_regulator_init();
1124
1125         i2c_register_board_info(4, tps51632_boardinfo, 1);
1126         platform_device_register(&dalmore_pda_power_device);
1127         platform_device_register(&dalmore_bt_regulator_device);
1128         return 0;
1129 }
1130
1131 int __init dalmore_suspend_init(void)
1132 {
1133         tegra_init_suspend(&dalmore_suspend_data);
1134         return 0;
1135 }
1136