ARM: tegra: move i2c registration to DT for bonaire
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (C) 2013 NVIDIA Corporation. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/gpio_keys.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37 #include <linux/platform_data/serial-tegra.h>
38 #include <linux/of_platform.h>
39 #include <linux/clk/tegra.h>
40 #include <linux/tegra-soc.h>
41 #include <linux/usb/tegra_usb_phy.h>
42 #include <linux/clocksource.h>
43 #include <linux/irqchip.h>
44 #include <linux/pci-tegra.h>
45
46 #include <mach/gpio-tegra.h>
47
48 #include <mach/io_dpd.h>
49
50 #include <mach/irqs.h>
51 #include <mach/pinmux.h>
52 #include <mach/i2s.h>
53 #include <mach/audio.h>
54 #include <mach/nand.h>
55
56 #include <asm/mach-types.h>
57 #include <asm/mach/arch.h>
58
59 #include "board.h"
60 #include "board-bonaire.h"
61 #include "clock.h"
62 #include "common.h"
63 #include "devices.h"
64 #include "gpio-names.h"
65 #include "iomap.h"
66
67 #define ENABLE_OTG 0
68 /*#define USB_HOST_ONLY*/
69
70 static struct plat_serial8250_port debug_uart_platform_data[] = {
71         {
72                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
73                 .mapbase        = TEGRA_UARTA_BASE,
74                 .irq            = INT_UARTA,
75                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
76                 .type           = PORT_TEGRA,
77                 .iotype         = UPIO_MEM,
78                 .regshift       = 2,
79                 .uartclk        = 13000000,
80         }, {
81                 .flags          = 0,
82         }
83 };
84
85 static struct platform_device debug_uart = {
86         .name = "serial8250",
87         .id = PLAT8250_DEV_PLATFORM,
88         .dev = {
89                 .platform_data = debug_uart_platform_data,
90         },
91 };
92
93 #ifdef CONFIG_BCM4329_RFKILL
94
95 static struct resource bonaire_bcm4329_rfkill_resources[] = {
96         {
97                 .name   = "bcm4329_nreset_gpio",
98                 .start  = TEGRA_GPIO_PU0,
99                 .end    = TEGRA_GPIO_PU0,
100                 .flags  = IORESOURCE_IO,
101         },
102         {
103                 .name   = "bcm4329_nshutdown_gpio",
104                 .start  = TEGRA_GPIO_PK2,
105                 .end    = TEGRA_GPIO_PK2,
106                 .flags  = IORESOURCE_IO,
107         },
108 };
109
110 static struct platform_device bonaire_bcm4329_rfkill_device = {
111         .name = "bcm4329_rfkill",
112         .id             = -1,
113         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
114         .resource       = bonaire_bcm4329_rfkill_resources,
115 };
116
117 static noinline void __init bonaire_bt_rfkill(void)
118 {
119         /*Add Clock Resource*/
120         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
121                                 "blink", NULL);
122
123         platform_device_register(&bonaire_bcm4329_rfkill_device);
124
125         return;
126 }
127 #else
128 static inline void bonaire_bt_rfkill(void) { }
129 #endif
130
131 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
132         /* name         parent          rate            enabled */
133         { "uarta",      "clk_m",        13000000,       true},
134         { "uartb",      "clk_m",        13000000,       true},
135         { "uartc",      "clk_m",        13000000,       true},
136         { "uartd",      "clk_m",        13000000,       true},
137         { "uarte",      "clk_m",        13000000,       true},
138         { "sdmmc1",     "clk_m",        26000000,       false},
139         { "sdmmc3",     "clk_m",        26000000,       false},
140         { "sdmmc4",     "clk_m",        26000000,       false},
141         { "pll_m",      NULL,           0,              true},
142         { "blink",      "clk_32k",      32768,          false},
143         { "pll_p_out4", "pll_p",        24000000,       true },
144         { "pwm",        "clk_32k",      32768,          false},
145         { "blink",      "clk_32k",      32768,          false},
146         { "pll_a",      NULL,           56448000,       true},
147         { "pll_a_out0", NULL,           11289600,       true},
148         { "i2s1",       "pll_a_out0",   11289600,       true},
149         { "i2s2",       "pll_a_out0",   11289600,       true},
150         { "d_audio",    "pll_a_out0",   11289600,       false},
151         { "audio_2x",   "audio",        22579200,       true},
152         { NULL,         NULL,           0,              0},
153 };
154
155 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
156         {
157                 I2C_BOARD_INFO("wm8903", 0x1a),
158         },
159 };
160
161 static void bonaire_i2c_init(void)
162 {
163         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
164 }
165
166 static void bonaire_apbdma_init(void)
167 {
168         platform_device_register(&tegra_apbdma);
169 }
170
171 #define GPIO_KEY(_id, _gpio, _iswake)           \
172         {                                       \
173                 .code = _id,                    \
174                 .gpio = TEGRA_GPIO_##_gpio,     \
175                 .active_low = 1,                \
176                 .desc = #_id,                   \
177                 .type = EV_KEY,                 \
178                 .wakeup = _iswake,              \
179                 .debounce_interval = 10,        \
180         }
181
182 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
183 static struct gpio_keys_button bonaire_keys[] = {
184         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
185         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
186         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
187         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
188         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
189         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
190 };
191
192 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
193         .buttons        = bonaire_keys,
194         .nbuttons       = ARRAY_SIZE(bonaire_keys),
195 };
196
197 static struct platform_device bonaire_keys_device = {
198         .name   = "gpio-keys",
199         .id     = 0,
200         .dev    = {
201                 .platform_data  = &bonaire_keys_platform_data,
202         },
203 };
204
205 static struct resource tegra_rtc_resources[] = {
206         [0] = {
207                 .start = TEGRA_RTC_BASE,
208                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
209                 .flags = IORESOURCE_MEM,
210         },
211         [1] = {
212                 .start = INT_RTC,
213                 .end = INT_RTC,
214                 .flags = IORESOURCE_IRQ,
215         },
216 };
217
218 static struct platform_device tegra_rtc_device = {
219         .name = "tegra_rtc",
220         .id   = -1,
221         .resource = tegra_rtc_resources,
222         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
223 };
224
225 #if defined(CONFIG_MTD_NAND_TEGRA)
226 static struct resource nand_resources[] = {
227         [0] = {
228                 .start = INT_NANDFLASH,
229                 .end   = INT_NANDFLASH,
230                 .flags = IORESOURCE_IRQ
231         },
232         [1] = {
233                 .start = TEGRA_NAND_BASE,
234                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
235                 .flags = IORESOURCE_MEM
236         }
237 };
238
239 static struct tegra_nand_chip_parms nand_chip_parms[] = {
240         /* Samsung K5E2G1GACM */
241         [0] = {
242                 .vendor_id   = 0xEC,
243                 .device_id   = 0xAA,
244                 .capacity    = 256,
245                 .timing      = {
246                         .trp            = 21,
247                         .trh            = 15,
248                         .twp            = 21,
249                         .twh            = 15,
250                         .tcs            = 31,
251                         .twhr           = 60,
252                         .tcr_tar_trr    = 20,
253                         .twb            = 100,
254                         .trp_resp       = 30,
255                         .tadl           = 100,
256                 },
257         },
258         /* Hynix H5PS1GB3EFR */
259         [1] = {
260                 .vendor_id   = 0xAD,
261                 .device_id   = 0xDC,
262                 .capacity    = 512,
263                 .timing      = {
264                         .trp            = 12,
265                         .trh            = 10,
266                         .twp            = 12,
267                         .twh            = 10,
268                         .tcs            = 20,
269                         .twhr           = 80,
270                         .tcr_tar_trr    = 20,
271                         .twb            = 100,
272                         .trp_resp       = 20,
273                         .tadl           = 70,
274                 },
275         },
276 };
277
278 struct tegra_nand_platform nand_data = {
279         .max_chips      = 8,
280         .chip_parms     = nand_chip_parms,
281         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
282 };
283
284 struct platform_device tegra_nand_device = {
285         .name          = "tegra_nand",
286         .id            = -1,
287         .resource      = nand_resources,
288         .num_resources = ARRAY_SIZE(nand_resources),
289         .dev            = {
290                 .platform_data = &nand_data,
291         },
292 };
293 #endif
294
295 static struct platform_device *bonaire_devices[] __initdata = {
296 #if ENABLE_OTG
297         &tegra_otg_device,
298 #endif
299         &debug_uart,
300         &tegra_pmu_device,
301         &tegra_rtc_device,
302 #if !defined(USB_HOST_ONLY)
303         &tegra_udc_device,
304 #endif
305 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
306         &tegra12_se_device,
307 #endif
308         &bonaire_keys_device,
309 #if defined(CONFIG_SND_HDA_TEGRA)
310         &tegra_hda_device,
311 #endif
312         &tegra_avp_device,
313 #if defined(CONFIG_MTD_NAND_TEGRA)
314         &tegra_nand_device,
315 #endif
316 };
317
318 static int __init bonaire_touch_init(void)
319 {
320         return 0;
321 }
322
323 static struct tegra_usb_platform_data tegra_udc_pdata = {
324         .port_otg = false,
325         .has_hostpc = true,
326         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
327         .op_mode = TEGRA_USB_OPMODE_DEVICE,
328         .u_data.dev = {
329                 .vbus_pmu_irq = 0,
330                 .vbus_gpio = -1,
331                 .charging_supported = false,
332                 .remote_wakeup_supported = false,
333         },
334         .u_cfg.utmi = {
335                 .hssync_start_delay = 0,
336                 .elastic_limit = 16,
337                 .idle_wait_delay = 17,
338                 .term_range_adj = 6,
339                 .xcvr_setup = 8,
340                 .xcvr_lsfslew = 2,
341                 .xcvr_lsrslew = 2,
342                 .xcvr_setup_offset = 0,
343                 .xcvr_use_fuses = 1,
344         },
345 };
346
347 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
348         .port_otg = false,
349         .has_hostpc = true,
350         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
351         .op_mode = TEGRA_USB_OPMODE_HOST,
352         .u_data.host = {
353                 .vbus_gpio = -1,
354                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
355                 .hot_plug = true,
356                 .remote_wakeup_supported = true,
357                 .power_off_on_suspend = true,
358         },
359         .u_cfg.utmi = {
360                 .hssync_start_delay = 0,
361                 .elastic_limit = 16,
362                 .idle_wait_delay = 17,
363                 .term_range_adj = 6,
364                 .xcvr_setup = 15,
365                 .xcvr_lsfslew = 2,
366                 .xcvr_lsrslew = 2,
367                 .xcvr_setup_offset = 0,
368                 .xcvr_use_fuses = 1,
369         },
370 };
371
372 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
373         .port_otg = false,
374         .has_hostpc = true,
375         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
376         .op_mode         = TEGRA_USB_OPMODE_HOST,
377         .u_data.host = {
378                 .vbus_gpio = -1,
379                 .hot_plug = true,
380                 .remote_wakeup_supported = true,
381                 .power_off_on_suspend = true,
382         },
383         .u_cfg.utmi = {
384                 .hssync_start_delay = 0,
385                 .elastic_limit = 16,
386                 .idle_wait_delay = 17,
387                 .term_range_adj = 6,
388                 .xcvr_setup = 15,
389                 .xcvr_lsfslew = 2,
390                 .xcvr_lsrslew = 2,
391                 .xcvr_setup_offset = 0,
392                 .xcvr_use_fuses = 1,
393         },
394 };
395
396 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
397         .port_otg = false,
398         .has_hostpc = true,
399         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
400         .op_mode         = TEGRA_USB_OPMODE_HOST,
401         .u_data.host = {
402                 .vbus_gpio = -1,
403                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
404                 .hot_plug = true,
405                 .remote_wakeup_supported = true,
406                 .power_off_on_suspend = true,
407         },
408         .u_cfg.utmi = {
409                 .hssync_start_delay = 0,
410                 .elastic_limit = 16,
411                 .idle_wait_delay = 17,
412                 .term_range_adj = 6,
413                 .xcvr_setup = 8,
414                 .xcvr_lsfslew = 2,
415                 .xcvr_lsrslew = 2,
416                 .xcvr_setup_offset = 0,
417                 .xcvr_use_fuses = 1,
418         },
419 };
420
421 static void bonaire_usb_init(void)
422 {
423 #if defined(USB_HOST_ONLY)
424         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
425         platform_device_register(&tegra_ehci1_device);
426 #else
427         /* setup the udc platform data */
428         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
429
430 #endif
431 }
432
433 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
434         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
435 };
436
437 static struct tegra_serial_platform_data bonaire_uartb_pdata = {
438         .dma_req_selector = 9,
439         .modem_interrupt = false,
440 };
441 static struct tegra_serial_platform_data bonaire_uartc_pdata = {
442         .dma_req_selector = 10,
443         .modem_interrupt = false,
444 };
445 static struct tegra_serial_platform_data bonaire_uartd_pdata = {
446         .dma_req_selector = 19,
447         .modem_interrupt = false,
448 };
449
450 static void __init bonaire_hs_uart_init(void)
451 {
452         tegra_uartb_device.dev.platform_data = &bonaire_uartb_pdata;
453         tegra_uartc_device.dev.platform_data = &bonaire_uartc_pdata;
454         tegra_uartd_device.dev.platform_data = &bonaire_uartd_pdata;
455         platform_add_devices(bonaire_hs_uart_devices,
456                         ARRAY_SIZE(bonaire_hs_uart_devices));
457 }
458
459 static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
460         .port_status[0] = 1,
461         .port_status[1] = 1,
462         .gpio_hot_plug  = TEGRA_GPIO_PO1,
463 };
464
465 static void bonaire_pcie_init(void)
466 {
467         tegra_pci_device.dev.platform_data = &bonaire_pcie_platform_data;
468         platform_device_register(&tegra_pci_device);
469 }
470
471 static void __init tegra_bonaire_init(void)
472 {
473         tegra_clk_init_from_table(bonaire_clk_init_table);
474         tegra_enable_pinmux();
475         bonaire_pinmux_init();
476         tegra_soc_device_init("bonaire");
477         bonaire_apbdma_init();
478
479         if (tegra_platform_is_fpga() && tegra_platform_is_qt())
480                 debug_uart_platform_data[0].uartclk =
481                                                 tegra_clk_measure_input_freq();
482
483         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
484
485         if (tegra_cpu_is_asim())
486                 bonaire_power_off_init();
487         tegra_io_dpd_init();
488         bonaire_hs_uart_init();
489         bonaire_sdhci_init();
490         bonaire_i2c_init();
491         bonaire_regulator_init();
492         bonaire_suspend_init();
493         bonaire_touch_init();
494         bonaire_usb_init();
495         bonaire_panel_init();
496         bonaire_sensors_init();
497         bonaire_bt_rfkill();
498         bonaire_pcie_init();
499         tegra_register_fuse();
500 }
501
502 #ifdef CONFIG_USE_OF
503 struct of_dev_auxdata tegra_bonaire_auxdata_lookup[] __initdata = {
504         OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
505                 NULL),
506         OF_DEV_AUXDATA("nvidia,tegra124-gk20a", TEGRA_GK20A_BAR0_BASE,
507                 "gk20a.0", NULL),
508         OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03.0", NULL),
509         OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
510                 NULL),
511         OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi.0", NULL),
512         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp.0", NULL),
513         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISPB_BASE, "isp.1", NULL),
514         OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
515         T124_I2C_OF_DEV_AUXDATA,
516         {}
517 };
518 #endif
519
520 static void __init tegra_bonaire_dt_init(void)
521 {
522         of_platform_populate(NULL, of_default_bus_match_table,
523                 tegra_bonaire_auxdata_lookup, &platform_bus);
524
525         tegra_bonaire_init();
526 }
527
528 static void __init tegra_bonaire_reserve(void)
529 {
530 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
531         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
532 #else
533         if (tegra_cpu_is_asim() && tegra_split_mem_active())
534                 tegra_reserve(0, 0, 0);
535         else
536                 tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_16M);
537 #endif
538 }
539
540 static const char * const bonaire_dt_board_compat[] = {
541         "nvidia,bonaire",
542         NULL
543 };
544
545 MACHINE_START(BONAIRE, "bonaire")
546         .atag_offset    = 0x80000100,
547         .map_io         = tegra_map_common_io,
548         .reserve        = tegra_bonaire_reserve,
549         .init_early     = tegra12x_init_early,
550         .init_irq       = irqchip_init,
551         .init_machine   = tegra_bonaire_dt_init,
552         .init_time      = clocksource_of_init,
553         .dt_compat      = bonaire_dt_board_compat,
554 MACHINE_END