ARM: tegra12: Enable device tree for bonaire
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (c) 2013, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi-tegra.h>
31 #include <linux/i2c/panjit_ts.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/i2c-tegra.h>
35 #include <linux/gpio.h>
36 #include <linux/gpio_keys.h>
37 #include <linux/input.h>
38 #include <linux/platform_data/tegra_usb.h>
39 #include <linux/tegra_uart.h>
40 #if defined(CONFIG_SMSC911X)
41 #include <linux/smsc911x.h>
42 #endif
43 #include <mach/clk.h>
44 #include <mach/gpio-tegra.h>
45 #include <mach/iomap.h>
46
47 #include <mach/io_dpd.h>
48
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/iomap.h>
52 #include <mach/io.h>
53 #include <mach/i2s.h>
54 #include <mach/audio.h>
55 #include <mach/usb_phy.h>
56 #include <mach/nand.h>
57 #include <mach/pci.h>
58 #include <mach/hardware.h>
59
60 #include <asm/hardware/gic.h>
61 #include <asm/mach-types.h>
62 #include <asm/mach/arch.h>
63
64 #include "board.h"
65 #include "board-bonaire.h"
66 #include "clock.h"
67 #include "common.h"
68 #include "devices.h"
69 #include "fuse.h"
70 #include "gpio-names.h"
71
72 #define ENABLE_OTG 0
73 /*#define USB_HOST_ONLY*/
74
75 static struct plat_serial8250_port debug_uart_platform_data[] = {
76         {
77                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
78                 .mapbase        = TEGRA_UARTA_BASE,
79                 .irq            = INT_UARTA,
80                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
81                 .type           = PORT_TEGRA,
82                 .iotype         = UPIO_MEM,
83                 .regshift       = 2,
84                 .uartclk        = 13000000,
85         }, {
86                 .flags          = 0,
87         }
88 };
89
90 static struct platform_device debug_uart = {
91         .name = "serial8250",
92         .id = PLAT8250_DEV_PLATFORM,
93         .dev = {
94                 .platform_data = debug_uart_platform_data,
95         },
96 };
97
98 #ifdef CONFIG_BCM4329_RFKILL
99
100 static struct resource bonaire_bcm4329_rfkill_resources[] = {
101         {
102                 .name   = "bcm4329_nreset_gpio",
103                 .start  = TEGRA_GPIO_PU0,
104                 .end    = TEGRA_GPIO_PU0,
105                 .flags  = IORESOURCE_IO,
106         },
107         {
108                 .name   = "bcm4329_nshutdown_gpio",
109                 .start  = TEGRA_GPIO_PK2,
110                 .end    = TEGRA_GPIO_PK2,
111                 .flags  = IORESOURCE_IO,
112         },
113 };
114
115 static struct platform_device bonaire_bcm4329_rfkill_device = {
116         .name = "bcm4329_rfkill",
117         .id             = -1,
118         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
119         .resource       = bonaire_bcm4329_rfkill_resources,
120 };
121
122 static noinline void __init bonaire_bt_rfkill(void)
123 {
124         /*Add Clock Resource*/
125         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
126                                 "blink", NULL);
127
128         platform_device_register(&bonaire_bcm4329_rfkill_device);
129
130         return;
131 }
132 #else
133 static inline void bonaire_bt_rfkill(void) { }
134 #endif
135
136 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
137         /* name         parent          rate            enabled */
138         { "uarta",      "clk_m",        13000000,       true},
139         { "uartb",      "clk_m",        13000000,       true},
140         { "uartc",      "clk_m",        13000000,       true},
141         { "uartd",      "clk_m",        13000000,       true},
142         { "uarte",      "clk_m",        13000000,       true},
143         { "sdmmc1",     "clk_m",        26000000,       false},
144         { "sdmmc3",     "clk_m",        26000000,       false},
145         { "sdmmc4",     "clk_m",        26000000,       false},
146         { "pll_m",      NULL,           0,              true},
147         { "blink",      "clk_32k",      32768,          false},
148         { "pll_p_out4", "pll_p",        24000000,       true },
149         { "pwm",        "clk_32k",      32768,          false},
150         { "blink",      "clk_32k",      32768,          false},
151         { "pll_a",      NULL,           56448000,       true},
152         { "pll_a_out0", NULL,           11289600,       true},
153         { "i2s1",       "pll_a_out0",   11289600,       true},
154         { "i2s2",       "pll_a_out0",   11289600,       true},
155         { "d_audio",    "pll_a_out0",   11289600,       false},
156         { "audio_2x",   "audio",        22579200,       true},
157         { NULL,         NULL,           0,              0},
158 };
159
160 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
161         {
162                 I2C_BOARD_INFO("wm8903", 0x1a),
163         },
164 };
165
166 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
167         .bus_clk_rate   = 100000,
168 };
169
170 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
171 static const struct tegra_pingroup_config i2c2_ddc = {
172         .pingroup       = TEGRA_PINGROUP_DDC,
173         .func           = TEGRA_MUX_I2C2,
174 };
175
176 static const struct tegra_pingroup_config i2c2_gen2 = {
177         .pingroup       = TEGRA_PINGROUP_PTA,
178         .func           = TEGRA_MUX_I2C2,
179 };
180 #endif
181
182 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
183         .bus_clk_rate   = 100000,
184 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
185         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
186         .bus_mux_len    = { 1, 1 },
187 #endif
188 };
189
190 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
191         .bus_clk_rate   = 100000,
192 };
193
194 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
195         .bus_clk_rate   = 100000,
196 };
197
198 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
199         .bus_clk_rate   = 100000,
200 };
201
202 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
203         .bus_clk_rate   = 100000,
204 };
205
206 static void bonaire_i2c_init(void)
207 {
208         tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
209         tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
210         tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
211         tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
212         tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
213         tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
214
215         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
216
217         platform_device_register(&tegra14_i2c_device6);
218         platform_device_register(&tegra14_i2c_device5);
219         platform_device_register(&tegra14_i2c_device4);
220         platform_device_register(&tegra14_i2c_device3);
221         platform_device_register(&tegra14_i2c_device2);
222         platform_device_register(&tegra14_i2c_device1);
223 }
224
225 static struct platform_device *bonaire_spi_devices[] __initdata = {
226         &tegra11_spi_device4,
227 };
228
229 struct spi_clk_parent spi_parent_clk_bonaire[] = {
230         [0] = {.name = "pll_p"},
231 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
232         [1] = {.name = "pll_m"},
233         [2] = {.name = "clk_m"},
234 #else
235         [1] = {.name = "clk_m"},
236 #endif
237 };
238
239 static struct tegra_spi_platform_data bonaire_spi_pdata = {
240         .is_dma_based           = true,
241         .max_dma_buffer         = 16 * 1024,
242         .is_clkon_always        = false,
243         .max_rate               = 25000000,
244 };
245
246 static void __init bonaire_spi_init(void)
247 {
248         int i;
249         struct clk *c;
250         struct board_info board_info, display_board_info;
251
252         tegra_get_board_info(&board_info);
253         tegra_get_display_board_info(&display_board_info);
254
255         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_bonaire); ++i) {
256                 c = tegra_get_clock_by_name(spi_parent_clk_bonaire[i].name);
257                 if (IS_ERR_OR_NULL(c)) {
258                         pr_err("Not able to get the clock for %s\n",
259                                         spi_parent_clk_bonaire[i].name);
260                 continue;
261                 }
262                 spi_parent_clk_bonaire[i].parent_clk = c;
263                 spi_parent_clk_bonaire[i].fixed_clk_rate = clk_get_rate(c);
264         }
265         bonaire_spi_pdata.parent_clk_list = spi_parent_clk_bonaire;
266         bonaire_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_bonaire);
267         tegra11_spi_device4.dev.platform_data = &bonaire_spi_pdata;
268         platform_add_devices(bonaire_spi_devices,
269                         ARRAY_SIZE(bonaire_spi_devices));
270 }
271
272 #define GPIO_KEY(_id, _gpio, _iswake)           \
273         {                                       \
274                 .code = _id,                    \
275                 .gpio = TEGRA_GPIO_##_gpio,     \
276                 .active_low = 1,                \
277                 .desc = #_id,                   \
278                 .type = EV_KEY,                 \
279                 .wakeup = _iswake,              \
280                 .debounce_interval = 10,        \
281         }
282
283 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
284 static struct gpio_keys_button bonaire_keys[] = {
285         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
286         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
287         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
288         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
289         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
290         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
291 };
292
293 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
294         .buttons        = bonaire_keys,
295         .nbuttons       = ARRAY_SIZE(bonaire_keys),
296 };
297
298 static struct platform_device bonaire_keys_device = {
299         .name   = "gpio-keys",
300         .id     = 0,
301         .dev    = {
302                 .platform_data  = &bonaire_keys_platform_data,
303         },
304 };
305
306 static struct resource tegra_rtc_resources[] = {
307         [0] = {
308                 .start = TEGRA_RTC_BASE,
309                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
310                 .flags = IORESOURCE_MEM,
311         },
312         [1] = {
313                 .start = INT_RTC,
314                 .end = INT_RTC,
315                 .flags = IORESOURCE_IRQ,
316         },
317 };
318
319 static struct platform_device tegra_rtc_device = {
320         .name = "tegra_rtc",
321         .id   = -1,
322         .resource = tegra_rtc_resources,
323         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
324 };
325
326 #if defined(CONFIG_MTD_NAND_TEGRA)
327 static struct resource nand_resources[] = {
328         [0] = {
329                 .start = INT_NANDFLASH,
330                 .end   = INT_NANDFLASH,
331                 .flags = IORESOURCE_IRQ
332         },
333         [1] = {
334                 .start = TEGRA_NAND_BASE,
335                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
336                 .flags = IORESOURCE_MEM
337         }
338 };
339
340 static struct tegra_nand_chip_parms nand_chip_parms[] = {
341         /* Samsung K5E2G1GACM */
342         [0] = {
343                 .vendor_id   = 0xEC,
344                 .device_id   = 0xAA,
345                 .capacity    = 256,
346                 .timing      = {
347                         .trp            = 21,
348                         .trh            = 15,
349                         .twp            = 21,
350                         .twh            = 15,
351                         .tcs            = 31,
352                         .twhr           = 60,
353                         .tcr_tar_trr    = 20,
354                         .twb            = 100,
355                         .trp_resp       = 30,
356                         .tadl           = 100,
357                 },
358         },
359         /* Hynix H5PS1GB3EFR */
360         [1] = {
361                 .vendor_id   = 0xAD,
362                 .device_id   = 0xDC,
363                 .capacity    = 512,
364                 .timing      = {
365                         .trp            = 12,
366                         .trh            = 10,
367                         .twp            = 12,
368                         .twh            = 10,
369                         .tcs            = 20,
370                         .twhr           = 80,
371                         .tcr_tar_trr    = 20,
372                         .twb            = 100,
373                         .trp_resp       = 20,
374                         .tadl           = 70,
375                 },
376         },
377 };
378
379 struct tegra_nand_platform nand_data = {
380         .max_chips      = 8,
381         .chip_parms     = nand_chip_parms,
382         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
383 };
384
385 struct platform_device tegra_nand_device = {
386         .name          = "tegra_nand",
387         .id            = -1,
388         .resource      = nand_resources,
389         .num_resources = ARRAY_SIZE(nand_resources),
390         .dev            = {
391                 .platform_data = &nand_data,
392         },
393 };
394 #endif
395
396 static struct platform_device *bonaire_devices[] __initdata = {
397 #if ENABLE_OTG
398         &tegra_otg_device,
399 #endif
400         &debug_uart,
401         &tegra_pmu_device,
402         &tegra_rtc_device,
403 #if !defined(USB_HOST_ONLY)
404         &tegra_udc_device,
405 #endif
406 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
407         &tegra11_se_device,
408 #endif
409 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
410         &tegra_smmu_device,
411 #endif
412         &bonaire_keys_device,
413 #if defined(CONFIG_SND_HDA_TEGRA)
414         &tegra_hda_device,
415 #endif
416         &tegra_avp_device,
417 #if defined(CONFIG_MTD_NAND_TEGRA)
418         &tegra_nand_device,
419 #endif
420 };
421
422 static int __init bonaire_touch_init(void)
423 {
424         return 0;
425 }
426
427 static struct tegra_usb_platform_data tegra_udc_pdata = {
428         .port_otg = false,
429         .has_hostpc = true,
430         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
431         .op_mode = TEGRA_USB_OPMODE_DEVICE,
432         .u_data.dev = {
433                 .vbus_pmu_irq = 0,
434                 .vbus_gpio = -1,
435                 .charging_supported = false,
436                 .remote_wakeup_supported = false,
437         },
438         .u_cfg.utmi = {
439                 .hssync_start_delay = 0,
440                 .elastic_limit = 16,
441                 .idle_wait_delay = 17,
442                 .term_range_adj = 6,
443                 .xcvr_setup = 8,
444                 .xcvr_lsfslew = 2,
445                 .xcvr_lsrslew = 2,
446                 .xcvr_setup_offset = 0,
447                 .xcvr_use_fuses = 1,
448         },
449 };
450
451 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
452         .port_otg = false,
453         .has_hostpc = true,
454         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
455         .op_mode = TEGRA_USB_OPMODE_HOST,
456         .u_data.host = {
457                 .vbus_gpio = -1,
458                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
459                 .hot_plug = true,
460                 .remote_wakeup_supported = true,
461                 .power_off_on_suspend = true,
462         },
463         .u_cfg.utmi = {
464                 .hssync_start_delay = 0,
465                 .elastic_limit = 16,
466                 .idle_wait_delay = 17,
467                 .term_range_adj = 6,
468                 .xcvr_setup = 15,
469                 .xcvr_lsfslew = 2,
470                 .xcvr_lsrslew = 2,
471                 .xcvr_setup_offset = 0,
472                 .xcvr_use_fuses = 1,
473         },
474 };
475
476 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
477         .port_otg = false,
478         .has_hostpc = true,
479         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
480         .op_mode         = TEGRA_USB_OPMODE_HOST,
481         .u_data.host = {
482                 .vbus_gpio = -1,
483                 .hot_plug = true,
484                 .remote_wakeup_supported = true,
485                 .power_off_on_suspend = true,
486         },
487         .u_cfg.utmi = {
488                 .hssync_start_delay = 0,
489                 .elastic_limit = 16,
490                 .idle_wait_delay = 17,
491                 .term_range_adj = 6,
492                 .xcvr_setup = 15,
493                 .xcvr_lsfslew = 2,
494                 .xcvr_lsrslew = 2,
495                 .xcvr_setup_offset = 0,
496                 .xcvr_use_fuses = 1,
497         },
498 };
499
500 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
501         .port_otg = false,
502         .has_hostpc = true,
503         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
504         .op_mode         = TEGRA_USB_OPMODE_HOST,
505         .u_data.host = {
506                 .vbus_gpio = -1,
507                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
508                 .hot_plug = true,
509                 .remote_wakeup_supported = true,
510                 .power_off_on_suspend = true,
511         },
512         .u_cfg.utmi = {
513                 .hssync_start_delay = 0,
514                 .elastic_limit = 16,
515                 .idle_wait_delay = 17,
516                 .term_range_adj = 6,
517                 .xcvr_setup = 8,
518                 .xcvr_lsfslew = 2,
519                 .xcvr_lsrslew = 2,
520                 .xcvr_setup_offset = 0,
521                 .xcvr_use_fuses = 1,
522         },
523 };
524
525 static void bonaire_usb_init(void)
526 {
527 #if defined(USB_HOST_ONLY)
528         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
529         platform_device_register(&tegra_ehci1_device);
530 #else
531         /* setup the udc platform data */
532         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
533
534 #endif
535 }
536
537 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
538         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
539 };
540
541 static struct uart_clk_parent uart_parent_clk[] = {
542         [0] = {.name = "clk_m"},
543 };
544
545 static struct tegra_uart_platform_data bonaire_uart_pdata;
546 static struct tegra_uart_platform_data bonaire_loopback_uart_pdata;
547
548 static void __init bonaire_hs_uart_init(void)
549 {
550         struct clk *c;
551         int i;
552
553         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
554                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
555                 if (IS_ERR_OR_NULL(c)) {
556                         pr_err("Not able to get the clock for %s\n",
557                                         uart_parent_clk[i].name);
558                         continue;
559                 }
560                 uart_parent_clk[i].parent_clk = c;
561                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
562         }
563         bonaire_uart_pdata.parent_clk_list = uart_parent_clk;
564         bonaire_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
565         bonaire_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
566         bonaire_loopback_uart_pdata.parent_clk_count =
567                 ARRAY_SIZE(uart_parent_clk);
568         bonaire_loopback_uart_pdata.is_loopback = true;
569         tegra_uartb_device.dev.platform_data = &bonaire_uart_pdata;
570         tegra_uartc_device.dev.platform_data = &bonaire_uart_pdata;
571         tegra_uartd_device.dev.platform_data = &bonaire_uart_pdata;
572         platform_add_devices(bonaire_hs_uart_devices,
573                         ARRAY_SIZE(bonaire_hs_uart_devices));
574 }
575
576 static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
577         .port_status[0] = 1,
578         .port_status[1] = 1,
579         .use_dock_detect        = 0,
580         .gpio                   = 0,
581 };
582
583 static void bonaire_pcie_init(void)
584 {
585         tegra_pci_device.dev.platform_data = &bonaire_pcie_platform_data;
586         platform_device_register(&tegra_pci_device);
587 }
588
589 static void __init tegra_bonaire_init(void)
590 {
591         tegra_clk_init_from_table(bonaire_clk_init_table);
592         tegra_enable_pinmux();
593         bonaire_pinmux_init();
594         tegra_soc_device_init("bonaire");
595
596 #ifdef CONFIG_TEGRA_FPGA_PLATFORM
597         if (tegra_platform_is_qt())
598                 debug_uart_platform_data[0].uartclk =
599                                                 tegra_clk_measure_input_freq();
600 #endif
601
602         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
603
604 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
605         bonaire_power_off_init();
606 #endif
607         tegra_io_dpd_init();
608         bonaire_hs_uart_init();
609         bonaire_sdhci_init();
610         bonaire_i2c_init();
611         bonaire_spi_init();
612         bonaire_regulator_init();
613         bonaire_suspend_init();
614         bonaire_touch_init();
615         bonaire_usb_init();
616         bonaire_panel_init();
617         bonaire_bt_rfkill();
618         bonaire_pcie_init();
619 }
620
621 static void __init tegra_bonaire_reserve(void)
622 {
623 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
624         tegra_reserve(0, SZ_4M, 0);
625 #else
626 #if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
627         if (tegra_split_mem_active())
628                 tegra_reserve(0, 0, 0);
629         else
630 #endif
631                 tegra_reserve(SZ_128M, SZ_4M, 0);
632 #endif
633 }
634
635 static const char * const bonaire_dt_board_compat[] = {
636         "nvidia,bonaire",
637         NULL
638 };
639
640 MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
641         .atag_offset    = 0x80000100,
642         .map_io         = tegra_map_common_io,
643         .reserve        = tegra_bonaire_reserve,
644         .init_early     = tegra12x_init_early,
645         .init_irq       = tegra_dt_init_irq,
646         .handle_irq     = gic_handle_irq,
647         .init_machine   = tegra_bonaire_init,
648         .timer          = &tegra_sys_timer,
649         .dt_compat      = bonaire_dt_board_compat,
650 MACHINE_END