serial: tegra: move header to linux/platform_data
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (C) 2013 NVIDIA Corporation. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi/spi-tegra.h>
31 #include <linux/i2c/panjit_ts.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/i2c-tegra.h>
35 #include <linux/gpio.h>
36 #include <linux/gpio_keys.h>
37 #include <linux/input.h>
38 #include <linux/platform_data/tegra_usb.h>
39 #include <linux/platform_data/serial-tegra.h>
40 #include <linux/of_platform.h>
41 #include <mach/clk.h>
42 #include <mach/gpio-tegra.h>
43 #include <mach/iomap.h>
44
45 #include <mach/io_dpd.h>
46
47 #include <mach/irqs.h>
48 #include <mach/pinmux.h>
49 #include <mach/iomap.h>
50 #include <mach/io.h>
51 #include <mach/i2s.h>
52 #include <mach/audio.h>
53 #include <mach/usb_phy.h>
54 #include <mach/nand.h>
55 #include <mach/pci.h>
56 #include <mach/hardware.h>
57
58 #include <asm/hardware/gic.h>
59 #include <asm/mach-types.h>
60 #include <asm/mach/arch.h>
61
62 #include "board.h"
63 #include "board-bonaire.h"
64 #include "clock.h"
65 #include "common.h"
66 #include "devices.h"
67 #include "fuse.h"
68 #include "gpio-names.h"
69
70 #define ENABLE_OTG 0
71 /*#define USB_HOST_ONLY*/
72
73 static struct plat_serial8250_port debug_uart_platform_data[] = {
74         {
75                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
76                 .mapbase        = TEGRA_UARTA_BASE,
77                 .irq            = INT_UARTA,
78                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
79                 .type           = PORT_TEGRA,
80                 .iotype         = UPIO_MEM,
81                 .regshift       = 2,
82                 .uartclk        = 13000000,
83         }, {
84                 .flags          = 0,
85         }
86 };
87
88 static struct platform_device debug_uart = {
89         .name = "serial8250",
90         .id = PLAT8250_DEV_PLATFORM,
91         .dev = {
92                 .platform_data = debug_uart_platform_data,
93         },
94 };
95
96 #ifdef CONFIG_BCM4329_RFKILL
97
98 static struct resource bonaire_bcm4329_rfkill_resources[] = {
99         {
100                 .name   = "bcm4329_nreset_gpio",
101                 .start  = TEGRA_GPIO_PU0,
102                 .end    = TEGRA_GPIO_PU0,
103                 .flags  = IORESOURCE_IO,
104         },
105         {
106                 .name   = "bcm4329_nshutdown_gpio",
107                 .start  = TEGRA_GPIO_PK2,
108                 .end    = TEGRA_GPIO_PK2,
109                 .flags  = IORESOURCE_IO,
110         },
111 };
112
113 static struct platform_device bonaire_bcm4329_rfkill_device = {
114         .name = "bcm4329_rfkill",
115         .id             = -1,
116         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
117         .resource       = bonaire_bcm4329_rfkill_resources,
118 };
119
120 static noinline void __init bonaire_bt_rfkill(void)
121 {
122         /*Add Clock Resource*/
123         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
124                                 "blink", NULL);
125
126         platform_device_register(&bonaire_bcm4329_rfkill_device);
127
128         return;
129 }
130 #else
131 static inline void bonaire_bt_rfkill(void) { }
132 #endif
133
134 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
135         /* name         parent          rate            enabled */
136         { "uarta",      "clk_m",        13000000,       true},
137         { "uartb",      "clk_m",        13000000,       true},
138         { "uartc",      "clk_m",        13000000,       true},
139         { "uartd",      "clk_m",        13000000,       true},
140         { "uarte",      "clk_m",        13000000,       true},
141         { "sdmmc1",     "clk_m",        26000000,       false},
142         { "sdmmc3",     "clk_m",        26000000,       false},
143         { "sdmmc4",     "clk_m",        26000000,       false},
144         { "pll_m",      NULL,           0,              true},
145         { "blink",      "clk_32k",      32768,          false},
146         { "pll_p_out4", "pll_p",        24000000,       true },
147         { "pwm",        "clk_32k",      32768,          false},
148         { "blink",      "clk_32k",      32768,          false},
149         { "pll_a",      NULL,           56448000,       true},
150         { "pll_a_out0", NULL,           11289600,       true},
151         { "i2s1",       "pll_a_out0",   11289600,       true},
152         { "i2s2",       "pll_a_out0",   11289600,       true},
153         { "d_audio",    "pll_a_out0",   11289600,       false},
154         { "audio_2x",   "audio",        22579200,       true},
155         { NULL,         NULL,           0,              0},
156 };
157
158 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
159         {
160                 I2C_BOARD_INFO("wm8903", 0x1a),
161         },
162 };
163
164 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
165         .bus_clk_rate   = 100000,
166 };
167
168 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
169 static const struct tegra_pingroup_config i2c2_ddc = {
170         .pingroup       = TEGRA_PINGROUP_DDC,
171         .func           = TEGRA_MUX_I2C2,
172 };
173
174 static const struct tegra_pingroup_config i2c2_gen2 = {
175         .pingroup       = TEGRA_PINGROUP_PTA,
176         .func           = TEGRA_MUX_I2C2,
177 };
178 #endif
179
180 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
181         .bus_clk_rate   = 100000,
182 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
183         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
184         .bus_mux_len    = { 1, 1 },
185 #endif
186 };
187
188 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
189         .bus_clk_rate   = 100000,
190 };
191
192 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
193         .bus_clk_rate   = 100000,
194 };
195
196 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
197         .bus_clk_rate   = 100000,
198 };
199
200 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
201         .bus_clk_rate   = 100000,
202 };
203
204 static void bonaire_i2c_init(void)
205 {
206         tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
207         tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
208         tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
209         tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
210         tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
211         tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
212
213         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
214
215         platform_device_register(&tegra14_i2c_device6);
216         platform_device_register(&tegra14_i2c_device5);
217         platform_device_register(&tegra14_i2c_device4);
218         platform_device_register(&tegra14_i2c_device3);
219         platform_device_register(&tegra14_i2c_device2);
220         platform_device_register(&tegra14_i2c_device1);
221 }
222
223 static void bonaire_apbdma_init(void)
224 {
225         platform_device_register(&tegra_apbdma);
226 }
227
228 static struct platform_device *bonaire_spi_devices[] __initdata = {
229         &tegra11_spi_device4,
230 };
231
232 /* struct spi_clk_parent spi_parent_clk_bonaire[] = { */
233 /*      [0] = {.name = "pll_p"}, */
234 /* #ifndef CONFIG_TEGRA_PLLM_RESTRICTED */
235 /*      [1] = {.name = "pll_m"}, */
236 /*      [2] = {.name = "clk_m"}, */
237 /* #else */
238 /*      [1] = {.name = "clk_m"}, */
239 /* #endif */
240 /* }; */
241
242 /* static struct tegra_spi_platform_data bonaire_spi_pdata = { */
243 /*      .is_dma_based           = true, */
244 /*      .max_dma_buffer         = 16 * 1024, */
245 /*      .is_clkon_always        = false, */
246 /*      .max_rate               = 25000000, */
247 /* }; */
248
249 /* static void __init bonaire_spi_init(void) */
250 /* { */
251 /*      int i; */
252 /*      struct clk *c; */
253 /*      struct board_info board_info, display_board_info; */
254
255 /*      tegra_get_board_info(&board_info); */
256 /*      tegra_get_display_board_info(&display_board_info); */
257
258 /*      for (i = 0; i < ARRAY_SIZE(spi_parent_clk_bonaire); ++i) { */
259 /*              c = tegra_get_clock_by_name(spi_parent_clk_bonaire[i].name); */
260 /*              if (IS_ERR_OR_NULL(c)) { */
261 /*                      pr_err("Not able to get the clock for %s\n", */
262 /*                                      spi_parent_clk_bonaire[i].name); */
263 /*              continue; */
264 /*              } */
265 /*              spi_parent_clk_bonaire[i].parent_clk = c; */
266 /*              spi_parent_clk_bonaire[i].fixed_clk_rate = clk_get_rate(c); */
267 /*      } */
268 /*      bonaire_spi_pdata.parent_clk_list = spi_parent_clk_bonaire; */
269 /*      bonaire_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_bonaire); */
270 /*      tegra11_spi_device4.dev.platform_data = &bonaire_spi_pdata; */
271 /*      platform_add_devices(bonaire_spi_devices, */
272 /*                      ARRAY_SIZE(bonaire_spi_devices)); */
273 /* } */
274
275 #define GPIO_KEY(_id, _gpio, _iswake)           \
276         {                                       \
277                 .code = _id,                    \
278                 .gpio = TEGRA_GPIO_##_gpio,     \
279                 .active_low = 1,                \
280                 .desc = #_id,                   \
281                 .type = EV_KEY,                 \
282                 .wakeup = _iswake,              \
283                 .debounce_interval = 10,        \
284         }
285
286 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
287 static struct gpio_keys_button bonaire_keys[] = {
288         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
289         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
290         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
291         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
292         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
293         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
294 };
295
296 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
297         .buttons        = bonaire_keys,
298         .nbuttons       = ARRAY_SIZE(bonaire_keys),
299 };
300
301 static struct platform_device bonaire_keys_device = {
302         .name   = "gpio-keys",
303         .id     = 0,
304         .dev    = {
305                 .platform_data  = &bonaire_keys_platform_data,
306         },
307 };
308
309 static struct resource tegra_rtc_resources[] = {
310         [0] = {
311                 .start = TEGRA_RTC_BASE,
312                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
313                 .flags = IORESOURCE_MEM,
314         },
315         [1] = {
316                 .start = INT_RTC,
317                 .end = INT_RTC,
318                 .flags = IORESOURCE_IRQ,
319         },
320 };
321
322 static struct platform_device tegra_rtc_device = {
323         .name = "tegra_rtc",
324         .id   = -1,
325         .resource = tegra_rtc_resources,
326         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
327 };
328
329 #if defined(CONFIG_MTD_NAND_TEGRA)
330 static struct resource nand_resources[] = {
331         [0] = {
332                 .start = INT_NANDFLASH,
333                 .end   = INT_NANDFLASH,
334                 .flags = IORESOURCE_IRQ
335         },
336         [1] = {
337                 .start = TEGRA_NAND_BASE,
338                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
339                 .flags = IORESOURCE_MEM
340         }
341 };
342
343 static struct tegra_nand_chip_parms nand_chip_parms[] = {
344         /* Samsung K5E2G1GACM */
345         [0] = {
346                 .vendor_id   = 0xEC,
347                 .device_id   = 0xAA,
348                 .capacity    = 256,
349                 .timing      = {
350                         .trp            = 21,
351                         .trh            = 15,
352                         .twp            = 21,
353                         .twh            = 15,
354                         .tcs            = 31,
355                         .twhr           = 60,
356                         .tcr_tar_trr    = 20,
357                         .twb            = 100,
358                         .trp_resp       = 30,
359                         .tadl           = 100,
360                 },
361         },
362         /* Hynix H5PS1GB3EFR */
363         [1] = {
364                 .vendor_id   = 0xAD,
365                 .device_id   = 0xDC,
366                 .capacity    = 512,
367                 .timing      = {
368                         .trp            = 12,
369                         .trh            = 10,
370                         .twp            = 12,
371                         .twh            = 10,
372                         .tcs            = 20,
373                         .twhr           = 80,
374                         .tcr_tar_trr    = 20,
375                         .twb            = 100,
376                         .trp_resp       = 20,
377                         .tadl           = 70,
378                 },
379         },
380 };
381
382 struct tegra_nand_platform nand_data = {
383         .max_chips      = 8,
384         .chip_parms     = nand_chip_parms,
385         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
386 };
387
388 struct platform_device tegra_nand_device = {
389         .name          = "tegra_nand",
390         .id            = -1,
391         .resource      = nand_resources,
392         .num_resources = ARRAY_SIZE(nand_resources),
393         .dev            = {
394                 .platform_data = &nand_data,
395         },
396 };
397 #endif
398
399 static struct platform_device *bonaire_devices[] __initdata = {
400 #if ENABLE_OTG
401         &tegra_otg_device,
402 #endif
403         &debug_uart,
404         &tegra_pmu_device,
405         &tegra_rtc_device,
406 #if !defined(USB_HOST_ONLY)
407         &tegra_udc_device,
408 #endif
409 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
410         &tegra12_se_device,
411 #endif
412         &bonaire_keys_device,
413 #if defined(CONFIG_SND_HDA_TEGRA)
414         &tegra_hda_device,
415 #endif
416         &tegra_avp_device,
417 #if defined(CONFIG_MTD_NAND_TEGRA)
418         &tegra_nand_device,
419 #endif
420 };
421
422 static int __init bonaire_touch_init(void)
423 {
424         return 0;
425 }
426
427 static struct tegra_usb_platform_data tegra_udc_pdata = {
428         .port_otg = false,
429         .has_hostpc = true,
430         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
431         .op_mode = TEGRA_USB_OPMODE_DEVICE,
432         .u_data.dev = {
433                 .vbus_pmu_irq = 0,
434                 .vbus_gpio = -1,
435                 .charging_supported = false,
436                 .remote_wakeup_supported = false,
437         },
438         .u_cfg.utmi = {
439                 .hssync_start_delay = 0,
440                 .elastic_limit = 16,
441                 .idle_wait_delay = 17,
442                 .term_range_adj = 6,
443                 .xcvr_setup = 8,
444                 .xcvr_lsfslew = 2,
445                 .xcvr_lsrslew = 2,
446                 .xcvr_setup_offset = 0,
447                 .xcvr_use_fuses = 1,
448         },
449 };
450
451 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
452         .port_otg = false,
453         .has_hostpc = true,
454         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
455         .op_mode = TEGRA_USB_OPMODE_HOST,
456         .u_data.host = {
457                 .vbus_gpio = -1,
458                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
459                 .hot_plug = true,
460                 .remote_wakeup_supported = true,
461                 .power_off_on_suspend = true,
462         },
463         .u_cfg.utmi = {
464                 .hssync_start_delay = 0,
465                 .elastic_limit = 16,
466                 .idle_wait_delay = 17,
467                 .term_range_adj = 6,
468                 .xcvr_setup = 15,
469                 .xcvr_lsfslew = 2,
470                 .xcvr_lsrslew = 2,
471                 .xcvr_setup_offset = 0,
472                 .xcvr_use_fuses = 1,
473         },
474 };
475
476 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
477         .port_otg = false,
478         .has_hostpc = true,
479         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
480         .op_mode         = TEGRA_USB_OPMODE_HOST,
481         .u_data.host = {
482                 .vbus_gpio = -1,
483                 .hot_plug = true,
484                 .remote_wakeup_supported = true,
485                 .power_off_on_suspend = true,
486         },
487         .u_cfg.utmi = {
488                 .hssync_start_delay = 0,
489                 .elastic_limit = 16,
490                 .idle_wait_delay = 17,
491                 .term_range_adj = 6,
492                 .xcvr_setup = 15,
493                 .xcvr_lsfslew = 2,
494                 .xcvr_lsrslew = 2,
495                 .xcvr_setup_offset = 0,
496                 .xcvr_use_fuses = 1,
497         },
498 };
499
500 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
501         .port_otg = false,
502         .has_hostpc = true,
503         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
504         .op_mode         = TEGRA_USB_OPMODE_HOST,
505         .u_data.host = {
506                 .vbus_gpio = -1,
507                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
508                 .hot_plug = true,
509                 .remote_wakeup_supported = true,
510                 .power_off_on_suspend = true,
511         },
512         .u_cfg.utmi = {
513                 .hssync_start_delay = 0,
514                 .elastic_limit = 16,
515                 .idle_wait_delay = 17,
516                 .term_range_adj = 6,
517                 .xcvr_setup = 8,
518                 .xcvr_lsfslew = 2,
519                 .xcvr_lsrslew = 2,
520                 .xcvr_setup_offset = 0,
521                 .xcvr_use_fuses = 1,
522         },
523 };
524
525 static void bonaire_usb_init(void)
526 {
527 #if defined(USB_HOST_ONLY)
528         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
529         platform_device_register(&tegra_ehci1_device);
530 #else
531         /* setup the udc platform data */
532         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
533
534 #endif
535 }
536
537 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
538         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
539 };
540
541 static struct tegra_serial_platform_data bonaire_uartb_pdata = {
542         .dma_req_selector = 9,
543         .modem_interrupt = false,
544 };
545 static struct tegra_serial_platform_data bonaire_uartc_pdata = {
546         .dma_req_selector = 10,
547         .modem_interrupt = false,
548 };
549 static struct tegra_serial_platform_data bonaire_uartd_pdata = {
550         .dma_req_selector = 19,
551         .modem_interrupt = false,
552 };
553
554 static void __init bonaire_hs_uart_init(void)
555 {
556         tegra_uartb_device.dev.platform_data = &bonaire_uartb_pdata;
557         tegra_uartc_device.dev.platform_data = &bonaire_uartc_pdata;
558         tegra_uartd_device.dev.platform_data = &bonaire_uartd_pdata;
559         platform_add_devices(bonaire_hs_uart_devices,
560                         ARRAY_SIZE(bonaire_hs_uart_devices));
561 }
562
563 static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
564         .port_status[0] = 1,
565         .port_status[1] = 1,
566         .use_dock_detect        = 1,
567         .gpio                   = TEGRA_GPIO_PO1,
568 };
569
570 static void bonaire_pcie_init(void)
571 {
572         tegra_pci_device.dev.platform_data = &bonaire_pcie_platform_data;
573         platform_device_register(&tegra_pci_device);
574 }
575
576 static void __init tegra_bonaire_init(void)
577 {
578         tegra_clk_init_from_table(bonaire_clk_init_table);
579         tegra_enable_pinmux();
580         bonaire_pinmux_init();
581         tegra_soc_device_init("bonaire");
582         bonaire_apbdma_init();
583
584         if (tegra_platform_is_fpga() && tegra_platform_is_qt())
585                 debug_uart_platform_data[0].uartclk =
586                                                 tegra_clk_measure_input_freq();
587
588         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
589
590         if (tegra_cpu_is_asim())
591                 bonaire_power_off_init();
592         tegra_io_dpd_init();
593         bonaire_hs_uart_init();
594         bonaire_sdhci_init();
595         bonaire_i2c_init();
596         /* bonaire_spi_init(); */
597         bonaire_regulator_init();
598         bonaire_suspend_init();
599         bonaire_touch_init();
600         bonaire_usb_init();
601         bonaire_panel_init();
602         bonaire_sensors_init();
603         bonaire_bt_rfkill();
604         bonaire_pcie_init();
605         tegra_register_fuse();
606 }
607
608 #ifdef CONFIG_USE_OF
609 struct of_dev_auxdata tegra_bonaire_auxdata_lookup[] __initdata = {
610         OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
611                 NULL),
612         OF_DEV_AUXDATA("nvidia,tegra124-gk20a", 0x538F0000, "gk20a", NULL),
613         OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03", NULL),
614         OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
615                 NULL),
616         OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi", NULL),
617         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp", NULL),
618         OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
619         {}
620 };
621 #endif
622
623 static void __init tegra_bonaire_dt_init(void)
624 {
625         of_platform_populate(NULL, of_default_bus_match_table,
626                 tegra_bonaire_auxdata_lookup, &platform_bus);
627
628         tegra_bonaire_init();
629 }
630
631 static void __init tegra_bonaire_reserve(void)
632 {
633 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
634         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
635 #else
636         if (tegra_cpu_is_asim() && tegra_split_mem_active())
637                 tegra_reserve(0, 0, 0);
638         else
639                 tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_16M);
640 #endif
641 }
642
643 static const char * const bonaire_dt_board_compat[] = {
644         "nvidia,bonaire",
645         NULL
646 };
647
648 MACHINE_START(BONAIRE, "bonaire")
649         .atag_offset    = 0x80000100,
650         .map_io         = tegra_map_common_io,
651         .reserve        = tegra_bonaire_reserve,
652         .init_early     = tegra12x_init_early,
653         .init_irq       = tegra_dt_init_irq,
654         .handle_irq     = gic_handle_irq,
655         .init_machine   = tegra_bonaire_dt_init,
656         .timer          = &tegra_sys_timer,
657         .dt_compat      = bonaire_dt_board_compat,
658 MACHINE_END