i2c: tegra12: remove multiplexed bus option
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (c) 2013, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/gpio_keys.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37 #include <linux/tegra_uart.h>
38 #include <mach/clk.h>
39 #include <mach/gpio-tegra.h>
40 #include <mach/iomap.h>
41
42 #include <mach/io_dpd.h>
43
44 #include <mach/irqs.h>
45 #include <mach/pinmux.h>
46 #include <mach/iomap.h>
47 #include <mach/io.h>
48 #include <mach/i2s.h>
49 #include <mach/audio.h>
50 #include <mach/usb_phy.h>
51 #include <mach/nand.h>
52 #include <mach/hardware.h>
53
54 #include <asm/hardware/gic.h>
55 #include <asm/mach-types.h>
56 #include <asm/mach/arch.h>
57
58 #include "board.h"
59 #include "board-bonaire.h"
60 #include "clock.h"
61 #include "common.h"
62 #include "devices.h"
63 #include "fuse.h"
64 #include "gpio-names.h"
65
66 #define ENABLE_OTG 0
67
68 static struct plat_serial8250_port debug_uart_platform_data[] = {
69         {
70                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
71                 .mapbase        = TEGRA_UARTA_BASE,
72                 .irq            = INT_UARTA,
73                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
74                 .type           = PORT_TEGRA,
75                 .iotype         = UPIO_MEM,
76                 .regshift       = 2,
77                 .uartclk        = 13000000,
78         }, {
79                 .flags          = 0,
80         }
81 };
82
83 static struct platform_device debug_uart = {
84         .name = "serial8250",
85         .id = PLAT8250_DEV_PLATFORM,
86         .dev = {
87                 .platform_data = debug_uart_platform_data,
88         },
89 };
90
91 #ifdef CONFIG_BCM4329_RFKILL
92
93 static struct resource bonaire_bcm4329_rfkill_resources[] = {
94         {
95                 .name   = "bcm4329_nreset_gpio",
96                 .start  = TEGRA_GPIO_PU0,
97                 .end    = TEGRA_GPIO_PU0,
98                 .flags  = IORESOURCE_IO,
99         },
100         {
101                 .name   = "bcm4329_nshutdown_gpio",
102                 .start  = TEGRA_GPIO_PK2,
103                 .end    = TEGRA_GPIO_PK2,
104                 .flags  = IORESOURCE_IO,
105         },
106 };
107
108 static struct platform_device bonaire_bcm4329_rfkill_device = {
109         .name = "bcm4329_rfkill",
110         .id             = -1,
111         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
112         .resource       = bonaire_bcm4329_rfkill_resources,
113 };
114
115 static noinline void __init bonaire_bt_rfkill(void)
116 {
117         /*Add Clock Resource*/
118         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
119                                 "blink", NULL);
120
121         platform_device_register(&bonaire_bcm4329_rfkill_device);
122
123         return;
124 }
125 #else
126 static inline void bonaire_bt_rfkill(void) { }
127 #endif
128
129 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
130         /* name         parent          rate            enabled */
131         { "uarta",      "clk_m",        13000000,       true},
132         { "uartb",      "clk_m",        13000000,       true},
133         { "uartc",      "clk_m",        13000000,       true},
134         { "uartd",      "clk_m",        13000000,       true},
135         { "uarte",      "clk_m",        13000000,       true},
136         { "pll_m",      NULL,           0,              true},
137         { "blink",      "clk_32k",      32768,          false},
138         { "pll_p_out4", "pll_p",        24000000,       true },
139         { "pwm",        "clk_32k",      32768,          false},
140         { "blink",      "clk_32k",      32768,          false},
141         { "pll_a",      NULL,           56448000,       true},
142         { "pll_a_out0", NULL,           11289600,       true},
143         { "i2s1",       "pll_a_out0",   11289600,       true},
144         { "i2s2",       "pll_a_out0",   11289600,       true},
145         { "d_audio",    "pll_a_out0",   11289600,       false},
146         { "audio_2x",   "audio",        22579200,       true},
147         { NULL,         NULL,           0,              0},
148 };
149
150 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
151         {
152                 I2C_BOARD_INFO("wm8903", 0x1a),
153         },
154 };
155
156 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
157         .bus_clk_rate   = 100000,
158 };
159
160 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
161 static const struct tegra_pingroup_config i2c2_ddc = {
162         .pingroup       = TEGRA_PINGROUP_DDC,
163         .func           = TEGRA_MUX_I2C2,
164 };
165
166 static const struct tegra_pingroup_config i2c2_gen2 = {
167         .pingroup       = TEGRA_PINGROUP_PTA,
168         .func           = TEGRA_MUX_I2C2,
169 };
170 #endif
171
172 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
173         .bus_clk_rate   = 100000,
174 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
175         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
176         .bus_mux_len    = { 1, 1 },
177 #endif
178 };
179
180 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
181         .bus_clk_rate   = 100000,
182 };
183
184 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
185         .bus_clk_rate   = 100000,
186 };
187
188 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
189         .bus_clk_rate   = 100000,
190 };
191
192 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
193         .bus_clk_rate   = 100000,
194 };
195
196 static void bonaire_i2c_init(void)
197 {
198         tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
199         tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
200         tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
201         tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
202         tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
203         tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
204
205         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
206
207         platform_device_register(&tegra14_i2c_device6);
208         platform_device_register(&tegra14_i2c_device5);
209         platform_device_register(&tegra14_i2c_device4);
210         platform_device_register(&tegra14_i2c_device3);
211         platform_device_register(&tegra14_i2c_device2);
212         platform_device_register(&tegra14_i2c_device1);
213 }
214
215 #define GPIO_KEY(_id, _gpio, _iswake)           \
216         {                                       \
217                 .code = _id,                    \
218                 .gpio = TEGRA_GPIO_##_gpio,     \
219                 .active_low = 1,                \
220                 .desc = #_id,                   \
221                 .type = EV_KEY,                 \
222                 .wakeup = _iswake,              \
223                 .debounce_interval = 10,        \
224         }
225
226 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
227 static struct gpio_keys_button bonaire_keys[] = {
228         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
229         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
230         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
231         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
232         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
233         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
234 };
235
236 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
237         .buttons        = bonaire_keys,
238         .nbuttons       = ARRAY_SIZE(bonaire_keys),
239 };
240
241 static struct platform_device bonaire_keys_device = {
242         .name   = "gpio-keys",
243         .id     = 0,
244         .dev    = {
245                 .platform_data  = &bonaire_keys_platform_data,
246         },
247 };
248
249 static struct resource tegra_rtc_resources[] = {
250         [0] = {
251                 .start = TEGRA_RTC_BASE,
252                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
253                 .flags = IORESOURCE_MEM,
254         },
255         [1] = {
256                 .start = INT_RTC,
257                 .end = INT_RTC,
258                 .flags = IORESOURCE_IRQ,
259         },
260 };
261
262 static struct platform_device tegra_rtc_device = {
263         .name = "tegra_rtc",
264         .id   = -1,
265         .resource = tegra_rtc_resources,
266         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
267 };
268
269 #if defined(CONFIG_MTD_NAND_TEGRA)
270 static struct resource nand_resources[] = {
271         [0] = {
272                 .start = INT_NANDFLASH,
273                 .end   = INT_NANDFLASH,
274                 .flags = IORESOURCE_IRQ
275         },
276         [1] = {
277                 .start = TEGRA_NAND_BASE,
278                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
279                 .flags = IORESOURCE_MEM
280         }
281 };
282
283 static struct tegra_nand_chip_parms nand_chip_parms[] = {
284         /* Samsung K5E2G1GACM */
285         [0] = {
286                 .vendor_id   = 0xEC,
287                 .device_id   = 0xAA,
288                 .capacity    = 256,
289                 .timing      = {
290                         .trp            = 21,
291                         .trh            = 15,
292                         .twp            = 21,
293                         .twh            = 15,
294                         .tcs            = 31,
295                         .twhr           = 60,
296                         .tcr_tar_trr    = 20,
297                         .twb            = 100,
298                         .trp_resp       = 30,
299                         .tadl           = 100,
300                 },
301         },
302         /* Hynix H5PS1GB3EFR */
303         [1] = {
304                 .vendor_id   = 0xAD,
305                 .device_id   = 0xDC,
306                 .capacity    = 512,
307                 .timing      = {
308                         .trp            = 12,
309                         .trh            = 10,
310                         .twp            = 12,
311                         .twh            = 10,
312                         .tcs            = 20,
313                         .twhr           = 80,
314                         .tcr_tar_trr    = 20,
315                         .twb            = 100,
316                         .trp_resp       = 20,
317                         .tadl           = 70,
318                 },
319         },
320 };
321
322 struct tegra_nand_platform nand_data = {
323         .max_chips      = 8,
324         .chip_parms     = nand_chip_parms,
325         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
326 };
327
328 struct platform_device tegra_nand_device = {
329         .name          = "tegra_nand",
330         .id            = -1,
331         .resource      = nand_resources,
332         .num_resources = ARRAY_SIZE(nand_resources),
333         .dev            = {
334                 .platform_data = &nand_data,
335         },
336 };
337 #endif
338
339 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
340 static struct resource tegra_sim_smc91x_resources[] = {
341         [0] = {
342                 .start          = TEGRA_SIM_ETH_BASE,
343                 .end            = TEGRA_SIM_ETH_BASE + TEGRA_SIM_ETH_SIZE - 1,
344                 .flags          = IORESOURCE_MEM,
345         },
346         [1] = {
347                 .start          = IRQ_ETH,
348                 .end            = IRQ_ETH,
349                 .flags          = IORESOURCE_IRQ,
350         },
351 };
352
353 static struct platform_device tegra_sim_smc91x_device = {
354         .name           = "smc91x",
355         .id             = 0,
356         .num_resources  = ARRAY_SIZE(tegra_sim_smc91x_resources),
357         .resource       = tegra_sim_smc91x_resources,
358 };
359 #endif
360
361 static struct platform_device *bonaire_devices[] __initdata = {
362 #if ENABLE_OTG
363         &tegra_otg_device,
364 #endif
365         &debug_uart,
366         &tegra_pmu_device,
367         &tegra_rtc_device,
368         &tegra_udc_device,
369 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
370         &tegra11_se_device,
371 #endif
372 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
373         &tegra_smmu_device,
374 #endif
375         &bonaire_keys_device,
376 #if defined(CONFIG_SND_HDA_TEGRA)
377         &tegra_hda_device,
378 #endif
379         &tegra_avp_device,
380 #if defined(CONFIG_MTD_NAND_TEGRA)
381         &tegra_nand_device,
382 #endif
383 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
384         &tegra_sim_smc91x_device,
385 #endif
386 };
387
388 static int __init bonaire_touch_init(void)
389 {
390         return 0;
391 }
392
393 #if defined(USB_HOST_ONLY)
394 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
395         [0] = {
396                         .phy_config = &utmi_phy_config[0],
397                         .operating_mode = TEGRA_USB_HOST,
398                         .power_down_on_bus_suspend = 0,
399         },
400         [1] = {
401                         .phy_config = &ulpi_phy_config,
402                         .operating_mode = TEGRA_USB_HOST,
403                         .power_down_on_bus_suspend = 1,
404         },
405         [2] = {
406                         .phy_config = &utmi_phy_config[1],
407                         .operating_mode = TEGRA_USB_HOST,
408                         .power_down_on_bus_suspend = 0,
409         },
410 };
411 #endif
412
413 static struct tegra_usb_platform_data tegra_udc_pdata = {
414         .port_otg = true,
415         .has_hostpc = true,
416         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
417         .op_mode = TEGRA_USB_OPMODE_DEVICE,
418         .u_data.dev = {
419                 .vbus_pmu_irq = 0,
420                 .vbus_gpio = -1,
421                 .charging_supported = false,
422                 .remote_wakeup_supported = false,
423         },
424         .u_cfg.utmi = {
425                 .hssync_start_delay = 0,
426                 .elastic_limit = 16,
427                 .idle_wait_delay = 17,
428                 .term_range_adj = 6,
429                 .xcvr_setup = 8,
430                 .xcvr_lsfslew = 2,
431                 .xcvr_lsrslew = 2,
432                 .xcvr_setup_offset = 0,
433                 .xcvr_use_fuses = 1,
434         },
435 };
436
437 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
438         .port_otg = true,
439         .has_hostpc = true,
440         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
441         .op_mode = TEGRA_USB_OPMODE_HOST,
442         .u_data.host = {
443                 .vbus_gpio = -1,
444                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
445                 .hot_plug = true,
446                 .remote_wakeup_supported = true,
447                 .power_off_on_suspend = true,
448         },
449         .u_cfg.utmi = {
450                 .hssync_start_delay = 0,
451                 .elastic_limit = 16,
452                 .idle_wait_delay = 17,
453                 .term_range_adj = 6,
454                 .xcvr_setup = 15,
455                 .xcvr_lsfslew = 2,
456                 .xcvr_lsrslew = 2,
457                 .xcvr_setup_offset = 0,
458                 .xcvr_use_fuses = 1,
459         },
460 };
461
462 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
463         .port_otg = false,
464         .has_hostpc = true,
465         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
466         .op_mode         = TEGRA_USB_OPMODE_HOST,
467         .u_data.host = {
468                 .vbus_gpio = -1,
469                 .hot_plug = true,
470                 .remote_wakeup_supported = true,
471                 .power_off_on_suspend = true,
472         },
473         .u_cfg.utmi = {
474                 .hssync_start_delay = 0,
475                 .elastic_limit = 16,
476                 .idle_wait_delay = 17,
477                 .term_range_adj = 6,
478                 .xcvr_setup = 15,
479                 .xcvr_lsfslew = 2,
480                 .xcvr_lsrslew = 2,
481                 .xcvr_setup_offset = 0,
482                 .xcvr_use_fuses = 1,
483         },
484 };
485
486 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
487         .port_otg = false,
488         .has_hostpc = true,
489         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
490         .op_mode         = TEGRA_USB_OPMODE_HOST,
491         .u_data.host = {
492                 .vbus_gpio = -1,
493                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
494                 .hot_plug = true,
495                 .remote_wakeup_supported = true,
496                 .power_off_on_suspend = true,
497         },
498         .u_cfg.utmi = {
499                 .hssync_start_delay = 0,
500                 .elastic_limit = 16,
501                 .idle_wait_delay = 17,
502                 .term_range_adj = 6,
503                 .xcvr_setup = 8,
504                 .xcvr_lsfslew = 2,
505                 .xcvr_lsrslew = 2,
506                 .xcvr_setup_offset = 0,
507                 .xcvr_use_fuses = 1,
508         },
509 };
510
511 static void bonaire_usb_init(void)
512 {
513 #if defined(USB_HOST_ONLY)
514         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
515         platform_device_register(&tegra_ehci1_device);
516 #else
517         /* setup the udc platform data */
518         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
519
520 #endif
521 }
522 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
523         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
524 };
525
526 static struct uart_clk_parent uart_parent_clk[] = {
527         [0] = {.name = "clk_m"},
528 };
529
530 static struct tegra_uart_platform_data bonaire_uart_pdata;
531 static struct tegra_uart_platform_data bonaire_loopback_uart_pdata;
532
533 static void __init bonaire_hs_uart_init(void)
534 {
535         struct clk *c;
536         int i;
537
538         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
539                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
540                 if (IS_ERR_OR_NULL(c)) {
541                         pr_err("Not able to get the clock for %s\n",
542                                         uart_parent_clk[i].name);
543                         continue;
544                 }
545                 uart_parent_clk[i].parent_clk = c;
546                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
547         }
548         bonaire_uart_pdata.parent_clk_list = uart_parent_clk;
549         bonaire_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
550         bonaire_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
551         bonaire_loopback_uart_pdata.parent_clk_count =
552                 ARRAY_SIZE(uart_parent_clk);
553         bonaire_loopback_uart_pdata.is_loopback = true;
554         tegra_uartb_device.dev.platform_data = &bonaire_uart_pdata;
555         tegra_uartc_device.dev.platform_data = &bonaire_uart_pdata;
556         tegra_uartd_device.dev.platform_data = &bonaire_uart_pdata;
557         platform_add_devices(bonaire_hs_uart_devices,
558                         ARRAY_SIZE(bonaire_hs_uart_devices));
559 }
560
561 static void __init tegra_bonaire_init(void)
562 {
563         tegra_clk_init_from_table(bonaire_clk_init_table);
564         tegra_enable_pinmux();
565         bonaire_pinmux_init();
566         tegra_soc_device_init("bonaire");
567
568 #ifdef CONFIG_TEGRA_FPGA_PLATFORM
569         if (tegra_platform_is_qt())
570                 debug_uart_platform_data[0].uartclk =
571                                                 tegra_clk_measure_input_freq();
572 #endif
573
574         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
575
576 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
577         bonaire_power_off_init();
578 #endif
579         tegra_io_dpd_init();
580         bonaire_hs_uart_init();
581         bonaire_sdhci_init();
582         bonaire_i2c_init();
583         bonaire_regulator_init();
584         bonaire_suspend_init();
585         bonaire_touch_init();
586         bonaire_usb_init();
587         bonaire_panel_init();
588         bonaire_bt_rfkill();
589 }
590
591 static void __init tegra_bonaire_reserve(void)
592 {
593 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
594         tegra_reserve(0, SZ_4M, 0);
595 #else
596 #if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
597         if (tegra_split_mem_active())
598                 tegra_reserve(0, 0, 0);
599         else
600 #endif
601                 tegra_reserve(SZ_128M, SZ_4M, 0);
602 #endif
603 }
604
605
606 MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
607         .atag_offset    = 0x80000100,
608         .map_io         = tegra_map_common_io,
609         .reserve        = tegra_bonaire_reserve,
610         .init_early     = tegra12x_init_early,
611         .init_irq       = tegra_dt_init_irq,
612         .handle_irq     = gic_handle_irq,
613         .init_machine   = tegra_bonaire_init,
614         .timer          = &tegra_sys_timer,
615 MACHINE_END