ARM: tegra: pcie: Enable PCIE for T124
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (c) 2013, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi-tegra.h>
31 #include <linux/i2c/panjit_ts.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/i2c-tegra.h>
35 #include <linux/gpio.h>
36 #include <linux/gpio_keys.h>
37 #include <linux/input.h>
38 #include <linux/platform_data/tegra_usb.h>
39 #include <linux/tegra_uart.h>
40 #if defined(CONFIG_SMSC911X)
41 #include <linux/smsc911x.h>
42 #endif
43 #include <mach/clk.h>
44 #include <mach/gpio-tegra.h>
45 #include <mach/iomap.h>
46
47 #include <mach/io_dpd.h>
48
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/iomap.h>
52 #include <mach/io.h>
53 #include <mach/i2s.h>
54 #include <mach/audio.h>
55 #include <mach/usb_phy.h>
56 #include <mach/nand.h>
57 #include <mach/pci.h>
58 #include <mach/hardware.h>
59
60 #include <asm/hardware/gic.h>
61 #include <asm/mach-types.h>
62 #include <asm/mach/arch.h>
63
64 #include "board.h"
65 #include "board-bonaire.h"
66 #include "clock.h"
67 #include "common.h"
68 #include "devices.h"
69 #include "fuse.h"
70 #include "gpio-names.h"
71
72 #define ENABLE_OTG 0
73 /*#define USB_HOST_ONLY*/
74
75 static struct plat_serial8250_port debug_uart_platform_data[] = {
76         {
77                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
78                 .mapbase        = TEGRA_UARTA_BASE,
79                 .irq            = INT_UARTA,
80                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
81                 .type           = PORT_TEGRA,
82                 .iotype         = UPIO_MEM,
83                 .regshift       = 2,
84                 .uartclk        = 13000000,
85         }, {
86                 .flags          = 0,
87         }
88 };
89
90 static struct platform_device debug_uart = {
91         .name = "serial8250",
92         .id = PLAT8250_DEV_PLATFORM,
93         .dev = {
94                 .platform_data = debug_uart_platform_data,
95         },
96 };
97
98 #ifdef CONFIG_BCM4329_RFKILL
99
100 static struct resource bonaire_bcm4329_rfkill_resources[] = {
101         {
102                 .name   = "bcm4329_nreset_gpio",
103                 .start  = TEGRA_GPIO_PU0,
104                 .end    = TEGRA_GPIO_PU0,
105                 .flags  = IORESOURCE_IO,
106         },
107         {
108                 .name   = "bcm4329_nshutdown_gpio",
109                 .start  = TEGRA_GPIO_PK2,
110                 .end    = TEGRA_GPIO_PK2,
111                 .flags  = IORESOURCE_IO,
112         },
113 };
114
115 static struct platform_device bonaire_bcm4329_rfkill_device = {
116         .name = "bcm4329_rfkill",
117         .id             = -1,
118         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
119         .resource       = bonaire_bcm4329_rfkill_resources,
120 };
121
122 static noinline void __init bonaire_bt_rfkill(void)
123 {
124         /*Add Clock Resource*/
125         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
126                                 "blink", NULL);
127
128         platform_device_register(&bonaire_bcm4329_rfkill_device);
129
130         return;
131 }
132 #else
133 static inline void bonaire_bt_rfkill(void) { }
134 #endif
135
136 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
137         /* name         parent          rate            enabled */
138         { "uarta",      "clk_m",        13000000,       true},
139         { "uartb",      "clk_m",        13000000,       true},
140         { "uartc",      "clk_m",        13000000,       true},
141         { "uartd",      "clk_m",        13000000,       true},
142         { "uarte",      "clk_m",        13000000,       true},
143         { "sdmmc1",     "clk_m",        26000000,       false},
144         { "sdmmc3",     "clk_m",        26000000,       false},
145         { "sdmmc4",     "clk_m",        26000000,       false},
146         { "pll_m",      NULL,           0,              true},
147         { "blink",      "clk_32k",      32768,          false},
148         { "pll_p_out4", "pll_p",        24000000,       true },
149         { "pwm",        "clk_32k",      32768,          false},
150         { "blink",      "clk_32k",      32768,          false},
151         { "pll_a",      NULL,           56448000,       true},
152         { "pll_a_out0", NULL,           11289600,       true},
153         { "i2s1",       "pll_a_out0",   11289600,       true},
154         { "i2s2",       "pll_a_out0",   11289600,       true},
155         { "d_audio",    "pll_a_out0",   11289600,       false},
156         { "audio_2x",   "audio",        22579200,       true},
157         { NULL,         NULL,           0,              0},
158 };
159
160 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
161         {
162                 I2C_BOARD_INFO("wm8903", 0x1a),
163         },
164 };
165
166 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
167         .bus_clk_rate   = 100000,
168 };
169
170 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
171 static const struct tegra_pingroup_config i2c2_ddc = {
172         .pingroup       = TEGRA_PINGROUP_DDC,
173         .func           = TEGRA_MUX_I2C2,
174 };
175
176 static const struct tegra_pingroup_config i2c2_gen2 = {
177         .pingroup       = TEGRA_PINGROUP_PTA,
178         .func           = TEGRA_MUX_I2C2,
179 };
180 #endif
181
182 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
183         .bus_clk_rate   = 100000,
184 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
185         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
186         .bus_mux_len    = { 1, 1 },
187 #endif
188 };
189
190 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
191         .bus_clk_rate   = 100000,
192 };
193
194 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
195         .bus_clk_rate   = 100000,
196 };
197
198 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
199         .bus_clk_rate   = 100000,
200 };
201
202 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
203         .bus_clk_rate   = 100000,
204 };
205
206 static void bonaire_i2c_init(void)
207 {
208         tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
209         tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
210         tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
211         tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
212         tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
213         tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
214
215         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
216
217         platform_device_register(&tegra14_i2c_device6);
218         platform_device_register(&tegra14_i2c_device5);
219         platform_device_register(&tegra14_i2c_device4);
220         platform_device_register(&tegra14_i2c_device3);
221         platform_device_register(&tegra14_i2c_device2);
222         platform_device_register(&tegra14_i2c_device1);
223 }
224
225 static struct platform_device *bonaire_spi_devices[] __initdata = {
226         &tegra11_spi_device4,
227 };
228
229 struct spi_clk_parent spi_parent_clk_bonaire[] = {
230         [0] = {.name = "pll_p"},
231 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
232         [1] = {.name = "pll_m"},
233         [2] = {.name = "clk_m"},
234 #else
235         [1] = {.name = "clk_m"},
236 #endif
237 };
238
239 static struct tegra_spi_platform_data bonaire_spi_pdata = {
240         .is_dma_based           = true,
241         .max_dma_buffer         = 16 * 1024,
242         .is_clkon_always        = false,
243         .max_rate               = 25000000,
244 };
245
246 static void __init bonaire_spi_init(void)
247 {
248         int i;
249         struct clk *c;
250         struct board_info board_info, display_board_info;
251
252         tegra_get_board_info(&board_info);
253         tegra_get_display_board_info(&display_board_info);
254
255         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_bonaire); ++i) {
256                 c = tegra_get_clock_by_name(spi_parent_clk_bonaire[i].name);
257                 if (IS_ERR_OR_NULL(c)) {
258                         pr_err("Not able to get the clock for %s\n",
259                                         spi_parent_clk_bonaire[i].name);
260                 continue;
261                 }
262                 spi_parent_clk_bonaire[i].parent_clk = c;
263                 spi_parent_clk_bonaire[i].fixed_clk_rate = clk_get_rate(c);
264         }
265         bonaire_spi_pdata.parent_clk_list = spi_parent_clk_bonaire;
266         bonaire_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_bonaire);
267         tegra11_spi_device4.dev.platform_data = &bonaire_spi_pdata;
268         platform_add_devices(bonaire_spi_devices,
269                         ARRAY_SIZE(bonaire_spi_devices));
270 }
271
272 #define GPIO_KEY(_id, _gpio, _iswake)           \
273         {                                       \
274                 .code = _id,                    \
275                 .gpio = TEGRA_GPIO_##_gpio,     \
276                 .active_low = 1,                \
277                 .desc = #_id,                   \
278                 .type = EV_KEY,                 \
279                 .wakeup = _iswake,              \
280                 .debounce_interval = 10,        \
281         }
282
283 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
284 static struct gpio_keys_button bonaire_keys[] = {
285         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
286         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
287         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
288         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
289         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
290         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
291 };
292
293 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
294         .buttons        = bonaire_keys,
295         .nbuttons       = ARRAY_SIZE(bonaire_keys),
296 };
297
298 static struct platform_device bonaire_keys_device = {
299         .name   = "gpio-keys",
300         .id     = 0,
301         .dev    = {
302                 .platform_data  = &bonaire_keys_platform_data,
303         },
304 };
305
306 static struct resource tegra_rtc_resources[] = {
307         [0] = {
308                 .start = TEGRA_RTC_BASE,
309                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
310                 .flags = IORESOURCE_MEM,
311         },
312         [1] = {
313                 .start = INT_RTC,
314                 .end = INT_RTC,
315                 .flags = IORESOURCE_IRQ,
316         },
317 };
318
319 static struct platform_device tegra_rtc_device = {
320         .name = "tegra_rtc",
321         .id   = -1,
322         .resource = tegra_rtc_resources,
323         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
324 };
325
326 #if defined(CONFIG_MTD_NAND_TEGRA)
327 static struct resource nand_resources[] = {
328         [0] = {
329                 .start = INT_NANDFLASH,
330                 .end   = INT_NANDFLASH,
331                 .flags = IORESOURCE_IRQ
332         },
333         [1] = {
334                 .start = TEGRA_NAND_BASE,
335                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
336                 .flags = IORESOURCE_MEM
337         }
338 };
339
340 static struct tegra_nand_chip_parms nand_chip_parms[] = {
341         /* Samsung K5E2G1GACM */
342         [0] = {
343                 .vendor_id   = 0xEC,
344                 .device_id   = 0xAA,
345                 .capacity    = 256,
346                 .timing      = {
347                         .trp            = 21,
348                         .trh            = 15,
349                         .twp            = 21,
350                         .twh            = 15,
351                         .tcs            = 31,
352                         .twhr           = 60,
353                         .tcr_tar_trr    = 20,
354                         .twb            = 100,
355                         .trp_resp       = 30,
356                         .tadl           = 100,
357                 },
358         },
359         /* Hynix H5PS1GB3EFR */
360         [1] = {
361                 .vendor_id   = 0xAD,
362                 .device_id   = 0xDC,
363                 .capacity    = 512,
364                 .timing      = {
365                         .trp            = 12,
366                         .trh            = 10,
367                         .twp            = 12,
368                         .twh            = 10,
369                         .tcs            = 20,
370                         .twhr           = 80,
371                         .tcr_tar_trr    = 20,
372                         .twb            = 100,
373                         .trp_resp       = 20,
374                         .tadl           = 70,
375                 },
376         },
377 };
378
379 struct tegra_nand_platform nand_data = {
380         .max_chips      = 8,
381         .chip_parms     = nand_chip_parms,
382         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
383 };
384
385 struct platform_device tegra_nand_device = {
386         .name          = "tegra_nand",
387         .id            = -1,
388         .resource      = nand_resources,
389         .num_resources = ARRAY_SIZE(nand_resources),
390         .dev            = {
391                 .platform_data = &nand_data,
392         },
393 };
394 #endif
395
396 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
397 static struct resource tegra_sim_smc91x_resources[] = {
398         [0] = {
399                 .start          = TEGRA_SIM_ETH_BASE,
400                 .end            = TEGRA_SIM_ETH_BASE + TEGRA_SIM_ETH_SIZE - 1,
401                 .flags          = IORESOURCE_MEM,
402         },
403         [1] = {
404                 .start          = IRQ_ETH,
405                 .end            = IRQ_ETH,
406                 .flags          = IORESOURCE_IRQ,
407         },
408 };
409
410 static struct platform_device tegra_sim_smc91x_device = {
411         .name           = "smc91x",
412         .id             = 0,
413         .num_resources  = ARRAY_SIZE(tegra_sim_smc91x_resources),
414         .resource       = tegra_sim_smc91x_resources,
415 };
416 #endif
417
418 #if defined(CONFIG_SMSC911X)
419 static struct resource tegra_smsc911x_resources[] = {
420         [0] = {
421                 .start          = 0x4E000000,
422                 .end            = 0x4E000000 + SZ_64K - 1,
423                 .flags          = IORESOURCE_MEM,
424         },
425         [1] = {
426                 .start          = IRQ_ETH,
427                 .end            = IRQ_ETH,
428                 .flags          = IORESOURCE_IRQ,
429         },
430 };
431
432 static struct smsc911x_platform_config tegra_smsc911x_config = {
433         .flags          = SMSC911X_USE_32BIT,
434         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
435         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
436         .phy_interface  = PHY_INTERFACE_MODE_MII,
437 };
438
439 static struct platform_device tegra_smsc911x_device = {
440         .name              = "smsc911x",
441         .id                = 0,
442         .resource          = tegra_smsc911x_resources,
443         .num_resources     = ARRAY_SIZE(tegra_smsc911x_resources),
444         .dev.platform_data = &tegra_smsc911x_config,
445 };
446 #endif
447
448 static struct platform_device *bonaire_devices[] __initdata = {
449 #if ENABLE_OTG
450         &tegra_otg_device,
451 #endif
452         &debug_uart,
453         &tegra_pmu_device,
454         &tegra_rtc_device,
455 #if !defined(USB_HOST_ONLY)
456         &tegra_udc_device,
457 #endif
458 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
459         &tegra11_se_device,
460 #endif
461 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
462         &tegra_smmu_device,
463 #endif
464         &bonaire_keys_device,
465 #if defined(CONFIG_SND_HDA_TEGRA)
466         &tegra_hda_device,
467 #endif
468         &tegra_avp_device,
469 #if defined(CONFIG_MTD_NAND_TEGRA)
470         &tegra_nand_device,
471 #endif
472 };
473
474 static int __init bonaire_touch_init(void)
475 {
476         return 0;
477 }
478
479 static struct tegra_usb_platform_data tegra_udc_pdata = {
480         .port_otg = false,
481         .has_hostpc = true,
482         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
483         .op_mode = TEGRA_USB_OPMODE_DEVICE,
484         .u_data.dev = {
485                 .vbus_pmu_irq = 0,
486                 .vbus_gpio = -1,
487                 .charging_supported = false,
488                 .remote_wakeup_supported = false,
489         },
490         .u_cfg.utmi = {
491                 .hssync_start_delay = 0,
492                 .elastic_limit = 16,
493                 .idle_wait_delay = 17,
494                 .term_range_adj = 6,
495                 .xcvr_setup = 8,
496                 .xcvr_lsfslew = 2,
497                 .xcvr_lsrslew = 2,
498                 .xcvr_setup_offset = 0,
499                 .xcvr_use_fuses = 1,
500         },
501 };
502
503 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
504         .port_otg = false,
505         .has_hostpc = true,
506         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
507         .op_mode = TEGRA_USB_OPMODE_HOST,
508         .u_data.host = {
509                 .vbus_gpio = -1,
510                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
511                 .hot_plug = true,
512                 .remote_wakeup_supported = true,
513                 .power_off_on_suspend = true,
514         },
515         .u_cfg.utmi = {
516                 .hssync_start_delay = 0,
517                 .elastic_limit = 16,
518                 .idle_wait_delay = 17,
519                 .term_range_adj = 6,
520                 .xcvr_setup = 15,
521                 .xcvr_lsfslew = 2,
522                 .xcvr_lsrslew = 2,
523                 .xcvr_setup_offset = 0,
524                 .xcvr_use_fuses = 1,
525         },
526 };
527
528 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
529         .port_otg = false,
530         .has_hostpc = true,
531         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
532         .op_mode         = TEGRA_USB_OPMODE_HOST,
533         .u_data.host = {
534                 .vbus_gpio = -1,
535                 .hot_plug = true,
536                 .remote_wakeup_supported = true,
537                 .power_off_on_suspend = true,
538         },
539         .u_cfg.utmi = {
540                 .hssync_start_delay = 0,
541                 .elastic_limit = 16,
542                 .idle_wait_delay = 17,
543                 .term_range_adj = 6,
544                 .xcvr_setup = 15,
545                 .xcvr_lsfslew = 2,
546                 .xcvr_lsrslew = 2,
547                 .xcvr_setup_offset = 0,
548                 .xcvr_use_fuses = 1,
549         },
550 };
551
552 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
553         .port_otg = false,
554         .has_hostpc = true,
555         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
556         .op_mode         = TEGRA_USB_OPMODE_HOST,
557         .u_data.host = {
558                 .vbus_gpio = -1,
559                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
560                 .hot_plug = true,
561                 .remote_wakeup_supported = true,
562                 .power_off_on_suspend = true,
563         },
564         .u_cfg.utmi = {
565                 .hssync_start_delay = 0,
566                 .elastic_limit = 16,
567                 .idle_wait_delay = 17,
568                 .term_range_adj = 6,
569                 .xcvr_setup = 8,
570                 .xcvr_lsfslew = 2,
571                 .xcvr_lsrslew = 2,
572                 .xcvr_setup_offset = 0,
573                 .xcvr_use_fuses = 1,
574         },
575 };
576
577 static void bonaire_usb_init(void)
578 {
579 #if defined(USB_HOST_ONLY)
580         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
581         platform_device_register(&tegra_ehci1_device);
582 #else
583         /* setup the udc platform data */
584         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
585
586 #endif
587 }
588
589 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
590         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
591 };
592
593 static struct uart_clk_parent uart_parent_clk[] = {
594         [0] = {.name = "clk_m"},
595 };
596
597 static struct tegra_uart_platform_data bonaire_uart_pdata;
598 static struct tegra_uart_platform_data bonaire_loopback_uart_pdata;
599
600 static void __init bonaire_hs_uart_init(void)
601 {
602         struct clk *c;
603         int i;
604
605         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
606                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
607                 if (IS_ERR_OR_NULL(c)) {
608                         pr_err("Not able to get the clock for %s\n",
609                                         uart_parent_clk[i].name);
610                         continue;
611                 }
612                 uart_parent_clk[i].parent_clk = c;
613                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
614         }
615         bonaire_uart_pdata.parent_clk_list = uart_parent_clk;
616         bonaire_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
617         bonaire_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
618         bonaire_loopback_uart_pdata.parent_clk_count =
619                 ARRAY_SIZE(uart_parent_clk);
620         bonaire_loopback_uart_pdata.is_loopback = true;
621         tegra_uartb_device.dev.platform_data = &bonaire_uart_pdata;
622         tegra_uartc_device.dev.platform_data = &bonaire_uart_pdata;
623         tegra_uartd_device.dev.platform_data = &bonaire_uart_pdata;
624         platform_add_devices(bonaire_hs_uart_devices,
625                         ARRAY_SIZE(bonaire_hs_uart_devices));
626 }
627
628 static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
629         .port_status[0] = 1,
630         .port_status[1] = 1,
631         .use_dock_detect        = 0,
632         .gpio                   = 0,
633 };
634
635 static void bonaire_pcie_init(void)
636 {
637         tegra_pci_device.dev.platform_data = &bonaire_pcie_platform_data;
638         platform_device_register(&tegra_pci_device);
639 }
640
641 static void __init tegra_bonaire_init(void)
642 {
643         tegra_clk_init_from_table(bonaire_clk_init_table);
644         tegra_enable_pinmux();
645         bonaire_pinmux_init();
646         tegra_soc_device_init("bonaire");
647
648 #ifdef CONFIG_TEGRA_FPGA_PLATFORM
649         if (tegra_platform_is_qt())
650                 debug_uart_platform_data[0].uartclk =
651                                                 tegra_clk_measure_input_freq();
652 #endif
653
654         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
655
656 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
657         if (!tegra_cpu_is_dsim()) { /* no ethernet card on DSIM */
658                 platform_device_register(&tegra_sim_smc91x_device);
659         }
660 #endif
661
662 #if defined(CONFIG_SMSC911X)
663         if (!tegra_cpu_is_dsim()) { /* no ethernet card on DSIM */
664                 platform_device_register(&tegra_smsc911x_device);
665         }
666 #endif
667
668 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
669         bonaire_power_off_init();
670 #endif
671         tegra_io_dpd_init();
672         bonaire_hs_uart_init();
673         bonaire_sdhci_init();
674         bonaire_i2c_init();
675         bonaire_spi_init();
676         bonaire_regulator_init();
677         bonaire_suspend_init();
678         bonaire_touch_init();
679         bonaire_usb_init();
680         bonaire_panel_init();
681         bonaire_bt_rfkill();
682         bonaire_pcie_init();
683 }
684
685 static void __init tegra_bonaire_reserve(void)
686 {
687 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
688         tegra_reserve(0, SZ_4M, 0);
689 #else
690 #if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
691         if (tegra_split_mem_active())
692                 tegra_reserve(0, 0, 0);
693         else
694 #endif
695                 tegra_reserve(SZ_128M, SZ_4M, 0);
696 #endif
697 }
698
699
700 MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
701         .atag_offset    = 0x80000100,
702         .map_io         = tegra_map_common_io,
703         .reserve        = tegra_bonaire_reserve,
704         .init_early     = tegra12x_init_early,
705         .init_irq       = tegra_dt_init_irq,
706         .handle_irq     = gic_handle_irq,
707         .init_machine   = tegra_bonaire_init,
708         .timer          = &tegra_sys_timer,
709 MACHINE_END