ARM: tegra: remove unused code for spi registration
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (C) 2013 NVIDIA Corporation. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/gpio_keys.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37 #include <linux/platform_data/serial-tegra.h>
38 #include <linux/of_platform.h>
39 #include <linux/clk/tegra.h>
40 #include <linux/tegra-soc.h>
41 #include <linux/usb/tegra_usb_phy.h>
42 #include <linux/clocksource.h>
43 #include <linux/irqchip.h>
44 #include <linux/pci-tegra.h>
45
46 #include <mach/gpio-tegra.h>
47
48 #include <mach/io_dpd.h>
49
50 #include <mach/irqs.h>
51 #include <mach/pinmux.h>
52 #include <mach/i2s.h>
53 #include <mach/audio.h>
54 #include <mach/nand.h>
55
56 #include <asm/mach-types.h>
57 #include <asm/mach/arch.h>
58
59 #include "board.h"
60 #include "board-bonaire.h"
61 #include "clock.h"
62 #include "common.h"
63 #include "devices.h"
64 #include "gpio-names.h"
65 #include "iomap.h"
66
67 #define ENABLE_OTG 0
68 /*#define USB_HOST_ONLY*/
69
70 static struct plat_serial8250_port debug_uart_platform_data[] = {
71         {
72                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
73                 .mapbase        = TEGRA_UARTA_BASE,
74                 .irq            = INT_UARTA,
75                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
76                 .type           = PORT_TEGRA,
77                 .iotype         = UPIO_MEM,
78                 .regshift       = 2,
79                 .uartclk        = 13000000,
80         }, {
81                 .flags          = 0,
82         }
83 };
84
85 static struct platform_device debug_uart = {
86         .name = "serial8250",
87         .id = PLAT8250_DEV_PLATFORM,
88         .dev = {
89                 .platform_data = debug_uart_platform_data,
90         },
91 };
92
93 #ifdef CONFIG_BCM4329_RFKILL
94
95 static struct resource bonaire_bcm4329_rfkill_resources[] = {
96         {
97                 .name   = "bcm4329_nreset_gpio",
98                 .start  = TEGRA_GPIO_PU0,
99                 .end    = TEGRA_GPIO_PU0,
100                 .flags  = IORESOURCE_IO,
101         },
102         {
103                 .name   = "bcm4329_nshutdown_gpio",
104                 .start  = TEGRA_GPIO_PK2,
105                 .end    = TEGRA_GPIO_PK2,
106                 .flags  = IORESOURCE_IO,
107         },
108 };
109
110 static struct platform_device bonaire_bcm4329_rfkill_device = {
111         .name = "bcm4329_rfkill",
112         .id             = -1,
113         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
114         .resource       = bonaire_bcm4329_rfkill_resources,
115 };
116
117 static noinline void __init bonaire_bt_rfkill(void)
118 {
119         /*Add Clock Resource*/
120         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
121                                 "blink", NULL);
122
123         platform_device_register(&bonaire_bcm4329_rfkill_device);
124
125         return;
126 }
127 #else
128 static inline void bonaire_bt_rfkill(void) { }
129 #endif
130
131 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
132         /* name         parent          rate            enabled */
133         { "uarta",      "clk_m",        13000000,       true},
134         { "uartb",      "clk_m",        13000000,       true},
135         { "uartc",      "clk_m",        13000000,       true},
136         { "uartd",      "clk_m",        13000000,       true},
137         { "uarte",      "clk_m",        13000000,       true},
138         { "sdmmc1",     "clk_m",        26000000,       false},
139         { "sdmmc3",     "clk_m",        26000000,       false},
140         { "sdmmc4",     "clk_m",        26000000,       false},
141         { "pll_m",      NULL,           0,              true},
142         { "blink",      "clk_32k",      32768,          false},
143         { "pll_p_out4", "pll_p",        24000000,       true },
144         { "pwm",        "clk_32k",      32768,          false},
145         { "blink",      "clk_32k",      32768,          false},
146         { "pll_a",      NULL,           56448000,       true},
147         { "pll_a_out0", NULL,           11289600,       true},
148         { "i2s1",       "pll_a_out0",   11289600,       true},
149         { "i2s2",       "pll_a_out0",   11289600,       true},
150         { "d_audio",    "pll_a_out0",   11289600,       false},
151         { "audio_2x",   "audio",        22579200,       true},
152         { NULL,         NULL,           0,              0},
153 };
154
155 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
156         {
157                 I2C_BOARD_INFO("wm8903", 0x1a),
158         },
159 };
160
161 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
162         .bus_clk_rate   = 100000,
163 };
164
165 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
166 static const struct tegra_pingroup_config i2c2_ddc = {
167         .pingroup       = TEGRA_PINGROUP_DDC,
168         .func           = TEGRA_MUX_I2C2,
169 };
170
171 static const struct tegra_pingroup_config i2c2_gen2 = {
172         .pingroup       = TEGRA_PINGROUP_PTA,
173         .func           = TEGRA_MUX_I2C2,
174 };
175 #endif
176
177 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
178         .bus_clk_rate   = 100000,
179 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
180         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
181         .bus_mux_len    = { 1, 1 },
182 #endif
183 };
184
185 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
186         .bus_clk_rate   = 100000,
187 };
188
189 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
190         .bus_clk_rate   = 100000,
191 };
192
193 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
194         .bus_clk_rate   = 100000,
195 };
196
197 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
198         .bus_clk_rate   = 100000,
199 };
200
201 static void bonaire_i2c_init(void)
202 {
203         tegra12_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
204         tegra12_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
205         tegra12_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
206         tegra12_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
207         tegra12_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
208         tegra12_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
209
210         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
211
212         platform_device_register(&tegra12_i2c_device6);
213         platform_device_register(&tegra12_i2c_device5);
214         platform_device_register(&tegra12_i2c_device4);
215         platform_device_register(&tegra12_i2c_device3);
216         platform_device_register(&tegra12_i2c_device2);
217         platform_device_register(&tegra12_i2c_device1);
218 }
219
220 static void bonaire_apbdma_init(void)
221 {
222         platform_device_register(&tegra_apbdma);
223 }
224
225 #define GPIO_KEY(_id, _gpio, _iswake)           \
226         {                                       \
227                 .code = _id,                    \
228                 .gpio = TEGRA_GPIO_##_gpio,     \
229                 .active_low = 1,                \
230                 .desc = #_id,                   \
231                 .type = EV_KEY,                 \
232                 .wakeup = _iswake,              \
233                 .debounce_interval = 10,        \
234         }
235
236 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
237 static struct gpio_keys_button bonaire_keys[] = {
238         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
239         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
240         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
241         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
242         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
243         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
244 };
245
246 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
247         .buttons        = bonaire_keys,
248         .nbuttons       = ARRAY_SIZE(bonaire_keys),
249 };
250
251 static struct platform_device bonaire_keys_device = {
252         .name   = "gpio-keys",
253         .id     = 0,
254         .dev    = {
255                 .platform_data  = &bonaire_keys_platform_data,
256         },
257 };
258
259 static struct resource tegra_rtc_resources[] = {
260         [0] = {
261                 .start = TEGRA_RTC_BASE,
262                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
263                 .flags = IORESOURCE_MEM,
264         },
265         [1] = {
266                 .start = INT_RTC,
267                 .end = INT_RTC,
268                 .flags = IORESOURCE_IRQ,
269         },
270 };
271
272 static struct platform_device tegra_rtc_device = {
273         .name = "tegra_rtc",
274         .id   = -1,
275         .resource = tegra_rtc_resources,
276         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
277 };
278
279 #if defined(CONFIG_MTD_NAND_TEGRA)
280 static struct resource nand_resources[] = {
281         [0] = {
282                 .start = INT_NANDFLASH,
283                 .end   = INT_NANDFLASH,
284                 .flags = IORESOURCE_IRQ
285         },
286         [1] = {
287                 .start = TEGRA_NAND_BASE,
288                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
289                 .flags = IORESOURCE_MEM
290         }
291 };
292
293 static struct tegra_nand_chip_parms nand_chip_parms[] = {
294         /* Samsung K5E2G1GACM */
295         [0] = {
296                 .vendor_id   = 0xEC,
297                 .device_id   = 0xAA,
298                 .capacity    = 256,
299                 .timing      = {
300                         .trp            = 21,
301                         .trh            = 15,
302                         .twp            = 21,
303                         .twh            = 15,
304                         .tcs            = 31,
305                         .twhr           = 60,
306                         .tcr_tar_trr    = 20,
307                         .twb            = 100,
308                         .trp_resp       = 30,
309                         .tadl           = 100,
310                 },
311         },
312         /* Hynix H5PS1GB3EFR */
313         [1] = {
314                 .vendor_id   = 0xAD,
315                 .device_id   = 0xDC,
316                 .capacity    = 512,
317                 .timing      = {
318                         .trp            = 12,
319                         .trh            = 10,
320                         .twp            = 12,
321                         .twh            = 10,
322                         .tcs            = 20,
323                         .twhr           = 80,
324                         .tcr_tar_trr    = 20,
325                         .twb            = 100,
326                         .trp_resp       = 20,
327                         .tadl           = 70,
328                 },
329         },
330 };
331
332 struct tegra_nand_platform nand_data = {
333         .max_chips      = 8,
334         .chip_parms     = nand_chip_parms,
335         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
336 };
337
338 struct platform_device tegra_nand_device = {
339         .name          = "tegra_nand",
340         .id            = -1,
341         .resource      = nand_resources,
342         .num_resources = ARRAY_SIZE(nand_resources),
343         .dev            = {
344                 .platform_data = &nand_data,
345         },
346 };
347 #endif
348
349 static struct platform_device *bonaire_devices[] __initdata = {
350 #if ENABLE_OTG
351         &tegra_otg_device,
352 #endif
353         &debug_uart,
354         &tegra_pmu_device,
355         &tegra_rtc_device,
356 #if !defined(USB_HOST_ONLY)
357         &tegra_udc_device,
358 #endif
359 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
360         &tegra12_se_device,
361 #endif
362         &bonaire_keys_device,
363 #if defined(CONFIG_SND_HDA_TEGRA)
364         &tegra_hda_device,
365 #endif
366         &tegra_avp_device,
367 #if defined(CONFIG_MTD_NAND_TEGRA)
368         &tegra_nand_device,
369 #endif
370 };
371
372 static int __init bonaire_touch_init(void)
373 {
374         return 0;
375 }
376
377 static struct tegra_usb_platform_data tegra_udc_pdata = {
378         .port_otg = false,
379         .has_hostpc = true,
380         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
381         .op_mode = TEGRA_USB_OPMODE_DEVICE,
382         .u_data.dev = {
383                 .vbus_pmu_irq = 0,
384                 .vbus_gpio = -1,
385                 .charging_supported = false,
386                 .remote_wakeup_supported = false,
387         },
388         .u_cfg.utmi = {
389                 .hssync_start_delay = 0,
390                 .elastic_limit = 16,
391                 .idle_wait_delay = 17,
392                 .term_range_adj = 6,
393                 .xcvr_setup = 8,
394                 .xcvr_lsfslew = 2,
395                 .xcvr_lsrslew = 2,
396                 .xcvr_setup_offset = 0,
397                 .xcvr_use_fuses = 1,
398         },
399 };
400
401 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
402         .port_otg = false,
403         .has_hostpc = true,
404         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
405         .op_mode = TEGRA_USB_OPMODE_HOST,
406         .u_data.host = {
407                 .vbus_gpio = -1,
408                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
409                 .hot_plug = true,
410                 .remote_wakeup_supported = true,
411                 .power_off_on_suspend = true,
412         },
413         .u_cfg.utmi = {
414                 .hssync_start_delay = 0,
415                 .elastic_limit = 16,
416                 .idle_wait_delay = 17,
417                 .term_range_adj = 6,
418                 .xcvr_setup = 15,
419                 .xcvr_lsfslew = 2,
420                 .xcvr_lsrslew = 2,
421                 .xcvr_setup_offset = 0,
422                 .xcvr_use_fuses = 1,
423         },
424 };
425
426 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
427         .port_otg = false,
428         .has_hostpc = true,
429         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
430         .op_mode         = TEGRA_USB_OPMODE_HOST,
431         .u_data.host = {
432                 .vbus_gpio = -1,
433                 .hot_plug = true,
434                 .remote_wakeup_supported = true,
435                 .power_off_on_suspend = true,
436         },
437         .u_cfg.utmi = {
438                 .hssync_start_delay = 0,
439                 .elastic_limit = 16,
440                 .idle_wait_delay = 17,
441                 .term_range_adj = 6,
442                 .xcvr_setup = 15,
443                 .xcvr_lsfslew = 2,
444                 .xcvr_lsrslew = 2,
445                 .xcvr_setup_offset = 0,
446                 .xcvr_use_fuses = 1,
447         },
448 };
449
450 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
451         .port_otg = false,
452         .has_hostpc = true,
453         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
454         .op_mode         = TEGRA_USB_OPMODE_HOST,
455         .u_data.host = {
456                 .vbus_gpio = -1,
457                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
458                 .hot_plug = true,
459                 .remote_wakeup_supported = true,
460                 .power_off_on_suspend = true,
461         },
462         .u_cfg.utmi = {
463                 .hssync_start_delay = 0,
464                 .elastic_limit = 16,
465                 .idle_wait_delay = 17,
466                 .term_range_adj = 6,
467                 .xcvr_setup = 8,
468                 .xcvr_lsfslew = 2,
469                 .xcvr_lsrslew = 2,
470                 .xcvr_setup_offset = 0,
471                 .xcvr_use_fuses = 1,
472         },
473 };
474
475 static void bonaire_usb_init(void)
476 {
477 #if defined(USB_HOST_ONLY)
478         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
479         platform_device_register(&tegra_ehci1_device);
480 #else
481         /* setup the udc platform data */
482         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
483
484 #endif
485 }
486
487 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
488         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
489 };
490
491 static struct tegra_serial_platform_data bonaire_uartb_pdata = {
492         .dma_req_selector = 9,
493         .modem_interrupt = false,
494 };
495 static struct tegra_serial_platform_data bonaire_uartc_pdata = {
496         .dma_req_selector = 10,
497         .modem_interrupt = false,
498 };
499 static struct tegra_serial_platform_data bonaire_uartd_pdata = {
500         .dma_req_selector = 19,
501         .modem_interrupt = false,
502 };
503
504 static void __init bonaire_hs_uart_init(void)
505 {
506         tegra_uartb_device.dev.platform_data = &bonaire_uartb_pdata;
507         tegra_uartc_device.dev.platform_data = &bonaire_uartc_pdata;
508         tegra_uartd_device.dev.platform_data = &bonaire_uartd_pdata;
509         platform_add_devices(bonaire_hs_uart_devices,
510                         ARRAY_SIZE(bonaire_hs_uart_devices));
511 }
512
513 static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
514         .port_status[0] = 1,
515         .port_status[1] = 1,
516         .use_dock_detect        = 1,
517         .gpio                   = TEGRA_GPIO_PO1,
518 };
519
520 static void bonaire_pcie_init(void)
521 {
522         tegra_pci_device.dev.platform_data = &bonaire_pcie_platform_data;
523         platform_device_register(&tegra_pci_device);
524 }
525
526 static void __init tegra_bonaire_init(void)
527 {
528         tegra_clk_init_from_table(bonaire_clk_init_table);
529         tegra_enable_pinmux();
530         bonaire_pinmux_init();
531         tegra_soc_device_init("bonaire");
532         bonaire_apbdma_init();
533
534         if (tegra_platform_is_fpga() && tegra_platform_is_qt())
535                 debug_uart_platform_data[0].uartclk =
536                                                 tegra_clk_measure_input_freq();
537
538         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
539
540         if (tegra_cpu_is_asim())
541                 bonaire_power_off_init();
542         tegra_io_dpd_init();
543         bonaire_hs_uart_init();
544         bonaire_sdhci_init();
545         bonaire_i2c_init();
546         bonaire_regulator_init();
547         bonaire_suspend_init();
548         bonaire_touch_init();
549         bonaire_usb_init();
550         bonaire_panel_init();
551         bonaire_sensors_init();
552         bonaire_bt_rfkill();
553         bonaire_pcie_init();
554         tegra_register_fuse();
555 }
556
557 #ifdef CONFIG_USE_OF
558 struct of_dev_auxdata tegra_bonaire_auxdata_lookup[] __initdata = {
559         OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
560                 NULL),
561         OF_DEV_AUXDATA("nvidia,tegra124-gk20a", TEGRA_GK20A_BAR0_BASE,
562                 "gk20a.0", NULL),
563         OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03.0", NULL),
564         OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
565                 NULL),
566         OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi.0", NULL),
567         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp.0", NULL),
568         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISPB_BASE, "isp.1", NULL),
569         OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
570         {}
571 };
572 #endif
573
574 static void __init tegra_bonaire_dt_init(void)
575 {
576         of_platform_populate(NULL, of_default_bus_match_table,
577                 tegra_bonaire_auxdata_lookup, &platform_bus);
578
579         tegra_bonaire_init();
580 }
581
582 static void __init tegra_bonaire_reserve(void)
583 {
584 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
585         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
586 #else
587         if (tegra_cpu_is_asim() && tegra_split_mem_active())
588                 tegra_reserve(0, 0, 0);
589         else
590                 tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_16M);
591 #endif
592 }
593
594 static const char * const bonaire_dt_board_compat[] = {
595         "nvidia,bonaire",
596         NULL
597 };
598
599 MACHINE_START(BONAIRE, "bonaire")
600         .atag_offset    = 0x80000100,
601         .map_io         = tegra_map_common_io,
602         .reserve        = tegra_bonaire_reserve,
603         .init_early     = tegra12x_init_early,
604         .init_irq       = irqchip_init,
605         .init_machine   = tegra_bonaire_dt_init,
606         .init_time      = clocksource_of_init,
607         .dt_compat      = bonaire_dt_board_compat,
608 MACHINE_END