arm: tegra: Add I2C controllers for board bonaire
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (c) 2013, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/gpio_keys.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37 #include <linux/tegra_uart.h>
38 #include <mach/clk.h>
39 #include <mach/gpio-tegra.h>
40 #include <mach/iomap.h>
41
42 #include <mach/io_dpd.h>
43
44 #include <mach/irqs.h>
45 #include <mach/pinmux.h>
46 #include <mach/iomap.h>
47 #include <mach/io.h>
48 #include <mach/i2s.h>
49 #include <mach/audio.h>
50 #include <mach/usb_phy.h>
51 #include <mach/nand.h>
52 #include <mach/hardware.h>
53
54 #include <asm/hardware/gic.h>
55 #include <asm/mach-types.h>
56 #include <asm/mach/arch.h>
57
58 #include "board.h"
59 #include "board-bonaire.h"
60 #include "clock.h"
61 #include "common.h"
62 #include "devices.h"
63 #include "fuse.h"
64 #include "gpio-names.h"
65
66 #define ENABLE_OTG 0
67
68 static struct plat_serial8250_port debug_uart_platform_data[] = {
69         {
70                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
71                 .mapbase        = TEGRA_UARTA_BASE,
72                 .irq            = INT_UARTA,
73                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
74                 .type           = PORT_TEGRA,
75                 .iotype         = UPIO_MEM,
76                 .regshift       = 2,
77                 .uartclk        = 13000000,
78         }, {
79                 .flags          = 0,
80         }
81 };
82
83 static struct platform_device debug_uart = {
84         .name = "serial8250",
85         .id = PLAT8250_DEV_PLATFORM,
86         .dev = {
87                 .platform_data = debug_uart_platform_data,
88         },
89 };
90
91 #ifdef CONFIG_BCM4329_RFKILL
92
93 static struct resource bonaire_bcm4329_rfkill_resources[] = {
94         {
95                 .name   = "bcm4329_nreset_gpio",
96                 .start  = TEGRA_GPIO_PU0,
97                 .end    = TEGRA_GPIO_PU0,
98                 .flags  = IORESOURCE_IO,
99         },
100         {
101                 .name   = "bcm4329_nshutdown_gpio",
102                 .start  = TEGRA_GPIO_PK2,
103                 .end    = TEGRA_GPIO_PK2,
104                 .flags  = IORESOURCE_IO,
105         },
106 };
107
108 static struct platform_device bonaire_bcm4329_rfkill_device = {
109         .name = "bcm4329_rfkill",
110         .id             = -1,
111         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
112         .resource       = bonaire_bcm4329_rfkill_resources,
113 };
114
115 static noinline void __init bonaire_bt_rfkill(void)
116 {
117         /*Add Clock Resource*/
118         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
119                                 "blink", NULL);
120
121         platform_device_register(&bonaire_bcm4329_rfkill_device);
122
123         return;
124 }
125 #else
126 static inline void bonaire_bt_rfkill(void) { }
127 #endif
128
129 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
130         /* name         parent          rate            enabled */
131         { "uarta",      "clk_m",        13000000,       true},
132         { "uartb",      "clk_m",        13000000,       true},
133         { "uartc",      "clk_m",        13000000,       true},
134         { "uartd",      "clk_m",        13000000,       true},
135         { "uarte",      "clk_m",        13000000,       true},
136         { "pll_m",      NULL,           0,              true},
137         { "blink",      "clk_32k",      32768,          false},
138         { "pll_p_out4", "pll_p",        24000000,       true },
139         { "pwm",        "clk_32k",      32768,          false},
140         { "blink",      "clk_32k",      32768,          false},
141         { "pll_a",      NULL,           56448000,       true},
142         { "pll_a_out0", NULL,           11289600,       true},
143         { "i2s1",       "pll_a_out0",   11289600,       true},
144         { "i2s2",       "pll_a_out0",   11289600,       true},
145         { "d_audio",    "pll_a_out0",   11289600,       false},
146         { "audio_2x",   "audio",        22579200,       true},
147         { NULL,         NULL,           0,              0},
148 };
149
150 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
151         {
152                 I2C_BOARD_INFO("wm8903", 0x1a),
153         },
154 };
155
156 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
157         .adapter_nr     = 0,
158         .bus_count      = 1,
159         .bus_clk_rate   = { 100000, 0 },
160 };
161
162 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
163 static const struct tegra_pingroup_config i2c2_ddc = {
164         .pingroup       = TEGRA_PINGROUP_DDC,
165         .func           = TEGRA_MUX_I2C2,
166 };
167
168 static const struct tegra_pingroup_config i2c2_gen2 = {
169         .pingroup       = TEGRA_PINGROUP_PTA,
170         .func           = TEGRA_MUX_I2C2,
171 };
172 #endif
173
174 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
175         .adapter_nr     = 1,
176         .bus_count      = 1,
177         .bus_clk_rate   = { 100000, 100000 },
178 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
179         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
180         .bus_mux_len    = { 1, 1 },
181 #endif
182 };
183
184 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
185         .adapter_nr     = 2,
186         .bus_count      = 1,
187         .bus_clk_rate   = { 100000, 0 },
188 };
189
190 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
191         .adapter_nr     = 3,
192         .bus_count      = 1,
193         .bus_clk_rate   = { 100000, 0 },
194 };
195
196 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
197         .adapter_nr     = 4,
198         .bus_count      = 1,
199         .bus_clk_rate   = { 100000, 0 },
200 };
201
202 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
203         .adapter_nr     = 5,
204         .bus_count      = 1,
205         .bus_clk_rate   = { 100000, 0 },
206 };
207
208 static void bonaire_i2c_init(void)
209 {
210         tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
211         tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
212         tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
213         tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
214         tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
215         tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
216
217         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
218
219         platform_device_register(&tegra14_i2c_device6);
220         platform_device_register(&tegra14_i2c_device5);
221         platform_device_register(&tegra14_i2c_device4);
222         platform_device_register(&tegra14_i2c_device3);
223         platform_device_register(&tegra14_i2c_device2);
224         platform_device_register(&tegra14_i2c_device1);
225 }
226
227 #define GPIO_KEY(_id, _gpio, _iswake)           \
228         {                                       \
229                 .code = _id,                    \
230                 .gpio = TEGRA_GPIO_##_gpio,     \
231                 .active_low = 1,                \
232                 .desc = #_id,                   \
233                 .type = EV_KEY,                 \
234                 .wakeup = _iswake,              \
235                 .debounce_interval = 10,        \
236         }
237
238 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
239 static struct gpio_keys_button bonaire_keys[] = {
240         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
241         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
242         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
243         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
244         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
245         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
246 };
247
248 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
249         .buttons        = bonaire_keys,
250         .nbuttons       = ARRAY_SIZE(bonaire_keys),
251 };
252
253 static struct platform_device bonaire_keys_device = {
254         .name   = "gpio-keys",
255         .id     = 0,
256         .dev    = {
257                 .platform_data  = &bonaire_keys_platform_data,
258         },
259 };
260
261 static struct resource tegra_rtc_resources[] = {
262         [0] = {
263                 .start = TEGRA_RTC_BASE,
264                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
265                 .flags = IORESOURCE_MEM,
266         },
267         [1] = {
268                 .start = INT_RTC,
269                 .end = INT_RTC,
270                 .flags = IORESOURCE_IRQ,
271         },
272 };
273
274 static struct platform_device tegra_rtc_device = {
275         .name = "tegra_rtc",
276         .id   = -1,
277         .resource = tegra_rtc_resources,
278         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
279 };
280
281 #if defined(CONFIG_MTD_NAND_TEGRA)
282 static struct resource nand_resources[] = {
283         [0] = {
284                 .start = INT_NANDFLASH,
285                 .end   = INT_NANDFLASH,
286                 .flags = IORESOURCE_IRQ
287         },
288         [1] = {
289                 .start = TEGRA_NAND_BASE,
290                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
291                 .flags = IORESOURCE_MEM
292         }
293 };
294
295 static struct tegra_nand_chip_parms nand_chip_parms[] = {
296         /* Samsung K5E2G1GACM */
297         [0] = {
298                 .vendor_id   = 0xEC,
299                 .device_id   = 0xAA,
300                 .capacity    = 256,
301                 .timing      = {
302                         .trp            = 21,
303                         .trh            = 15,
304                         .twp            = 21,
305                         .twh            = 15,
306                         .tcs            = 31,
307                         .twhr           = 60,
308                         .tcr_tar_trr    = 20,
309                         .twb            = 100,
310                         .trp_resp       = 30,
311                         .tadl           = 100,
312                 },
313         },
314         /* Hynix H5PS1GB3EFR */
315         [1] = {
316                 .vendor_id   = 0xAD,
317                 .device_id   = 0xDC,
318                 .capacity    = 512,
319                 .timing      = {
320                         .trp            = 12,
321                         .trh            = 10,
322                         .twp            = 12,
323                         .twh            = 10,
324                         .tcs            = 20,
325                         .twhr           = 80,
326                         .tcr_tar_trr    = 20,
327                         .twb            = 100,
328                         .trp_resp       = 20,
329                         .tadl           = 70,
330                 },
331         },
332 };
333
334 struct tegra_nand_platform nand_data = {
335         .max_chips      = 8,
336         .chip_parms     = nand_chip_parms,
337         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
338 };
339
340 struct platform_device tegra_nand_device = {
341         .name          = "tegra_nand",
342         .id            = -1,
343         .resource      = nand_resources,
344         .num_resources = ARRAY_SIZE(nand_resources),
345         .dev            = {
346                 .platform_data = &nand_data,
347         },
348 };
349 #endif
350
351 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
352 static struct resource tegra_sim_smc91x_resources[] = {
353         [0] = {
354                 .start          = TEGRA_SIM_ETH_BASE,
355                 .end            = TEGRA_SIM_ETH_BASE + TEGRA_SIM_ETH_SIZE - 1,
356                 .flags          = IORESOURCE_MEM,
357         },
358         [1] = {
359                 .start          = IRQ_ETH,
360                 .end            = IRQ_ETH,
361                 .flags          = IORESOURCE_IRQ,
362         },
363 };
364
365 static struct platform_device tegra_sim_smc91x_device = {
366         .name           = "smc91x",
367         .id             = 0,
368         .num_resources  = ARRAY_SIZE(tegra_sim_smc91x_resources),
369         .resource       = tegra_sim_smc91x_resources,
370 };
371 #endif
372
373 static struct platform_device *bonaire_devices[] __initdata = {
374 #if ENABLE_OTG
375         &tegra_otg_device,
376 #endif
377         &debug_uart,
378         &tegra_pmu_device,
379         &tegra_rtc_device,
380         &tegra_udc_device,
381 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
382         &tegra11_se_device,
383 #endif
384 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
385         &tegra_smmu_device,
386 #endif
387         &bonaire_keys_device,
388 #if defined(CONFIG_SND_HDA_TEGRA)
389         &tegra_hda_device,
390 #endif
391         &tegra_avp_device,
392 #if defined(CONFIG_MTD_NAND_TEGRA)
393         &tegra_nand_device,
394 #endif
395 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
396         &tegra_sim_smc91x_device,
397 #endif
398 };
399
400 static int __init bonaire_touch_init(void)
401 {
402         return 0;
403 }
404
405 #if defined(USB_HOST_ONLY)
406 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
407         [0] = {
408                         .phy_config = &utmi_phy_config[0],
409                         .operating_mode = TEGRA_USB_HOST,
410                         .power_down_on_bus_suspend = 0,
411         },
412         [1] = {
413                         .phy_config = &ulpi_phy_config,
414                         .operating_mode = TEGRA_USB_HOST,
415                         .power_down_on_bus_suspend = 1,
416         },
417         [2] = {
418                         .phy_config = &utmi_phy_config[1],
419                         .operating_mode = TEGRA_USB_HOST,
420                         .power_down_on_bus_suspend = 0,
421         },
422 };
423 #endif
424
425 static struct tegra_usb_platform_data tegra_udc_pdata = {
426         .port_otg = true,
427         .has_hostpc = true,
428         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
429         .op_mode = TEGRA_USB_OPMODE_DEVICE,
430         .u_data.dev = {
431                 .vbus_pmu_irq = 0,
432                 .vbus_gpio = -1,
433                 .charging_supported = false,
434                 .remote_wakeup_supported = false,
435         },
436         .u_cfg.utmi = {
437                 .hssync_start_delay = 0,
438                 .elastic_limit = 16,
439                 .idle_wait_delay = 17,
440                 .term_range_adj = 6,
441                 .xcvr_setup = 8,
442                 .xcvr_lsfslew = 2,
443                 .xcvr_lsrslew = 2,
444                 .xcvr_setup_offset = 0,
445                 .xcvr_use_fuses = 1,
446         },
447 };
448
449 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
450         .port_otg = true,
451         .has_hostpc = true,
452         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
453         .op_mode = TEGRA_USB_OPMODE_HOST,
454         .u_data.host = {
455                 .vbus_gpio = -1,
456                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
457                 .hot_plug = true,
458                 .remote_wakeup_supported = true,
459                 .power_off_on_suspend = true,
460         },
461         .u_cfg.utmi = {
462                 .hssync_start_delay = 0,
463                 .elastic_limit = 16,
464                 .idle_wait_delay = 17,
465                 .term_range_adj = 6,
466                 .xcvr_setup = 15,
467                 .xcvr_lsfslew = 2,
468                 .xcvr_lsrslew = 2,
469                 .xcvr_setup_offset = 0,
470                 .xcvr_use_fuses = 1,
471         },
472 };
473
474 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
475         .port_otg = false,
476         .has_hostpc = true,
477         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
478         .op_mode         = TEGRA_USB_OPMODE_HOST,
479         .u_data.host = {
480                 .vbus_gpio = -1,
481                 .hot_plug = true,
482                 .remote_wakeup_supported = true,
483                 .power_off_on_suspend = true,
484         },
485         .u_cfg.utmi = {
486                 .hssync_start_delay = 0,
487                 .elastic_limit = 16,
488                 .idle_wait_delay = 17,
489                 .term_range_adj = 6,
490                 .xcvr_setup = 15,
491                 .xcvr_lsfslew = 2,
492                 .xcvr_lsrslew = 2,
493                 .xcvr_setup_offset = 0,
494                 .xcvr_use_fuses = 1,
495         },
496 };
497
498 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
499         .port_otg = false,
500         .has_hostpc = true,
501         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
502         .op_mode         = TEGRA_USB_OPMODE_HOST,
503         .u_data.host = {
504                 .vbus_gpio = -1,
505                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
506                 .hot_plug = true,
507                 .remote_wakeup_supported = true,
508                 .power_off_on_suspend = true,
509         },
510         .u_cfg.utmi = {
511                 .hssync_start_delay = 0,
512                 .elastic_limit = 16,
513                 .idle_wait_delay = 17,
514                 .term_range_adj = 6,
515                 .xcvr_setup = 8,
516                 .xcvr_lsfslew = 2,
517                 .xcvr_lsrslew = 2,
518                 .xcvr_setup_offset = 0,
519                 .xcvr_use_fuses = 1,
520         },
521 };
522
523 static void bonaire_usb_init(void)
524 {
525 #if defined(USB_HOST_ONLY)
526         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
527         platform_device_register(&tegra_ehci1_device);
528 #else
529         /* setup the udc platform data */
530         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
531
532 #endif
533 }
534 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
535         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
536 };
537
538 static struct uart_clk_parent uart_parent_clk[] = {
539         [0] = {.name = "clk_m"},
540 };
541
542 static struct tegra_uart_platform_data bonaire_uart_pdata;
543 static struct tegra_uart_platform_data bonaire_loopback_uart_pdata;
544
545 static void __init bonaire_hs_uart_init(void)
546 {
547         struct clk *c;
548         int i;
549
550         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
551                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
552                 if (IS_ERR_OR_NULL(c)) {
553                         pr_err("Not able to get the clock for %s\n",
554                                         uart_parent_clk[i].name);
555                         continue;
556                 }
557                 uart_parent_clk[i].parent_clk = c;
558                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
559         }
560         bonaire_uart_pdata.parent_clk_list = uart_parent_clk;
561         bonaire_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
562         bonaire_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
563         bonaire_loopback_uart_pdata.parent_clk_count =
564                 ARRAY_SIZE(uart_parent_clk);
565         bonaire_loopback_uart_pdata.is_loopback = true;
566         tegra_uartb_device.dev.platform_data = &bonaire_uart_pdata;
567         tegra_uartc_device.dev.platform_data = &bonaire_uart_pdata;
568         tegra_uartd_device.dev.platform_data = &bonaire_uart_pdata;
569         platform_add_devices(bonaire_hs_uart_devices,
570                         ARRAY_SIZE(bonaire_hs_uart_devices));
571 }
572
573 static void __init tegra_bonaire_init(void)
574 {
575         tegra_clk_init_from_table(bonaire_clk_init_table);
576         tegra_enable_pinmux();
577         bonaire_pinmux_init();
578         tegra_soc_device_init("bonaire");
579
580 #ifdef CONFIG_TEGRA_FPGA_PLATFORM
581         if (tegra_platform_is_qt())
582                 debug_uart_platform_data[0].uartclk =
583                                                 tegra_clk_measure_input_freq();
584 #endif
585
586         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
587
588 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
589         bonaire_power_off_init();
590 #endif
591         tegra_io_dpd_init();
592         bonaire_hs_uart_init();
593         bonaire_sdhci_init();
594         bonaire_i2c_init();
595         bonaire_regulator_init();
596         bonaire_suspend_init();
597         bonaire_touch_init();
598         bonaire_usb_init();
599         bonaire_panel_init();
600         bonaire_bt_rfkill();
601 }
602
603 static void __init tegra_bonaire_reserve(void)
604 {
605 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
606         tegra_reserve(0, SZ_4M, 0);
607 #else
608 #if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
609         if (tegra_split_mem_active())
610                 tegra_reserve(0, 0, 0);
611         else
612 #endif
613                 tegra_reserve(SZ_128M, SZ_4M, 0);
614 #endif
615 }
616
617
618 MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
619         .atag_offset    = 0x80000100,
620         .map_io         = tegra_map_common_io,
621         .reserve        = tegra_bonaire_reserve,
622         .init_early     = tegra12x_init_early,
623         .init_irq       = tegra_dt_init_irq,
624         .handle_irq     = gic_handle_irq,
625         .init_machine   = tegra_bonaire_init,
626         .timer          = &tegra_sys_timer,
627 MACHINE_END