tegra: bonaire: set SDMMC max clk support to 26MHz
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (c) 2013, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/gpio_keys.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37 #include <linux/tegra_uart.h>
38 #include <mach/clk.h>
39 #include <mach/gpio-tegra.h>
40 #include <mach/iomap.h>
41
42 #include <mach/io_dpd.h>
43
44 #include <mach/irqs.h>
45 #include <mach/pinmux.h>
46 #include <mach/iomap.h>
47 #include <mach/io.h>
48 #include <mach/i2s.h>
49 #include <mach/audio.h>
50 #include <mach/usb_phy.h>
51 #include <mach/nand.h>
52 #include <mach/hardware.h>
53
54 #include <asm/hardware/gic.h>
55 #include <asm/mach-types.h>
56 #include <asm/mach/arch.h>
57
58 #include "board.h"
59 #include "board-bonaire.h"
60 #include "clock.h"
61 #include "common.h"
62 #include "devices.h"
63 #include "fuse.h"
64 #include "gpio-names.h"
65
66 #define ENABLE_OTG 0
67
68 static struct plat_serial8250_port debug_uart_platform_data[] = {
69         {
70                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
71                 .mapbase        = TEGRA_UARTA_BASE,
72                 .irq            = INT_UARTA,
73                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
74                 .type           = PORT_TEGRA,
75                 .iotype         = UPIO_MEM,
76                 .regshift       = 2,
77                 .uartclk        = 13000000,
78         }, {
79                 .flags          = 0,
80         }
81 };
82
83 static struct platform_device debug_uart = {
84         .name = "serial8250",
85         .id = PLAT8250_DEV_PLATFORM,
86         .dev = {
87                 .platform_data = debug_uart_platform_data,
88         },
89 };
90
91 #ifdef CONFIG_BCM4329_RFKILL
92
93 static struct resource bonaire_bcm4329_rfkill_resources[] = {
94         {
95                 .name   = "bcm4329_nreset_gpio",
96                 .start  = TEGRA_GPIO_PU0,
97                 .end    = TEGRA_GPIO_PU0,
98                 .flags  = IORESOURCE_IO,
99         },
100         {
101                 .name   = "bcm4329_nshutdown_gpio",
102                 .start  = TEGRA_GPIO_PK2,
103                 .end    = TEGRA_GPIO_PK2,
104                 .flags  = IORESOURCE_IO,
105         },
106 };
107
108 static struct platform_device bonaire_bcm4329_rfkill_device = {
109         .name = "bcm4329_rfkill",
110         .id             = -1,
111         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
112         .resource       = bonaire_bcm4329_rfkill_resources,
113 };
114
115 static noinline void __init bonaire_bt_rfkill(void)
116 {
117         /*Add Clock Resource*/
118         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
119                                 "blink", NULL);
120
121         platform_device_register(&bonaire_bcm4329_rfkill_device);
122
123         return;
124 }
125 #else
126 static inline void bonaire_bt_rfkill(void) { }
127 #endif
128
129 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
130         /* name         parent          rate            enabled */
131         { "uarta",      "clk_m",        13000000,       true},
132         { "uartb",      "clk_m",        13000000,       true},
133         { "uartc",      "clk_m",        13000000,       true},
134         { "uartd",      "clk_m",        13000000,       true},
135         { "uarte",      "clk_m",        13000000,       true},
136         { "sdmmc1",     "clk_m",        26000000,       false},
137         { "sdmmc3",     "clk_m",        26000000,       false},
138         { "sdmmc4",     "clk_m",        26000000,       false},
139         { "pll_m",      NULL,           0,              true},
140         { "blink",      "clk_32k",      32768,          false},
141         { "pll_p_out4", "pll_p",        24000000,       true },
142         { "pwm",        "clk_32k",      32768,          false},
143         { "blink",      "clk_32k",      32768,          false},
144         { "pll_a",      NULL,           56448000,       true},
145         { "pll_a_out0", NULL,           11289600,       true},
146         { "i2s1",       "pll_a_out0",   11289600,       true},
147         { "i2s2",       "pll_a_out0",   11289600,       true},
148         { "d_audio",    "pll_a_out0",   11289600,       false},
149         { "audio_2x",   "audio",        22579200,       true},
150         { NULL,         NULL,           0,              0},
151 };
152
153 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
154         {
155                 I2C_BOARD_INFO("wm8903", 0x1a),
156         },
157 };
158
159 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
160         .bus_clk_rate   = 100000,
161 };
162
163 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
164 static const struct tegra_pingroup_config i2c2_ddc = {
165         .pingroup       = TEGRA_PINGROUP_DDC,
166         .func           = TEGRA_MUX_I2C2,
167 };
168
169 static const struct tegra_pingroup_config i2c2_gen2 = {
170         .pingroup       = TEGRA_PINGROUP_PTA,
171         .func           = TEGRA_MUX_I2C2,
172 };
173 #endif
174
175 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
176         .bus_clk_rate   = 100000,
177 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
178         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
179         .bus_mux_len    = { 1, 1 },
180 #endif
181 };
182
183 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
184         .bus_clk_rate   = 100000,
185 };
186
187 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
188         .bus_clk_rate   = 100000,
189 };
190
191 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
192         .bus_clk_rate   = 100000,
193 };
194
195 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
196         .bus_clk_rate   = 100000,
197 };
198
199 static void bonaire_i2c_init(void)
200 {
201         tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
202         tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
203         tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
204         tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
205         tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
206         tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
207
208         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
209
210         platform_device_register(&tegra14_i2c_device6);
211         platform_device_register(&tegra14_i2c_device5);
212         platform_device_register(&tegra14_i2c_device4);
213         platform_device_register(&tegra14_i2c_device3);
214         platform_device_register(&tegra14_i2c_device2);
215         platform_device_register(&tegra14_i2c_device1);
216 }
217
218 #define GPIO_KEY(_id, _gpio, _iswake)           \
219         {                                       \
220                 .code = _id,                    \
221                 .gpio = TEGRA_GPIO_##_gpio,     \
222                 .active_low = 1,                \
223                 .desc = #_id,                   \
224                 .type = EV_KEY,                 \
225                 .wakeup = _iswake,              \
226                 .debounce_interval = 10,        \
227         }
228
229 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
230 static struct gpio_keys_button bonaire_keys[] = {
231         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
232         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
233         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
234         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
235         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
236         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
237 };
238
239 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
240         .buttons        = bonaire_keys,
241         .nbuttons       = ARRAY_SIZE(bonaire_keys),
242 };
243
244 static struct platform_device bonaire_keys_device = {
245         .name   = "gpio-keys",
246         .id     = 0,
247         .dev    = {
248                 .platform_data  = &bonaire_keys_platform_data,
249         },
250 };
251
252 static struct resource tegra_rtc_resources[] = {
253         [0] = {
254                 .start = TEGRA_RTC_BASE,
255                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
256                 .flags = IORESOURCE_MEM,
257         },
258         [1] = {
259                 .start = INT_RTC,
260                 .end = INT_RTC,
261                 .flags = IORESOURCE_IRQ,
262         },
263 };
264
265 static struct platform_device tegra_rtc_device = {
266         .name = "tegra_rtc",
267         .id   = -1,
268         .resource = tegra_rtc_resources,
269         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
270 };
271
272 #if defined(CONFIG_MTD_NAND_TEGRA)
273 static struct resource nand_resources[] = {
274         [0] = {
275                 .start = INT_NANDFLASH,
276                 .end   = INT_NANDFLASH,
277                 .flags = IORESOURCE_IRQ
278         },
279         [1] = {
280                 .start = TEGRA_NAND_BASE,
281                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
282                 .flags = IORESOURCE_MEM
283         }
284 };
285
286 static struct tegra_nand_chip_parms nand_chip_parms[] = {
287         /* Samsung K5E2G1GACM */
288         [0] = {
289                 .vendor_id   = 0xEC,
290                 .device_id   = 0xAA,
291                 .capacity    = 256,
292                 .timing      = {
293                         .trp            = 21,
294                         .trh            = 15,
295                         .twp            = 21,
296                         .twh            = 15,
297                         .tcs            = 31,
298                         .twhr           = 60,
299                         .tcr_tar_trr    = 20,
300                         .twb            = 100,
301                         .trp_resp       = 30,
302                         .tadl           = 100,
303                 },
304         },
305         /* Hynix H5PS1GB3EFR */
306         [1] = {
307                 .vendor_id   = 0xAD,
308                 .device_id   = 0xDC,
309                 .capacity    = 512,
310                 .timing      = {
311                         .trp            = 12,
312                         .trh            = 10,
313                         .twp            = 12,
314                         .twh            = 10,
315                         .tcs            = 20,
316                         .twhr           = 80,
317                         .tcr_tar_trr    = 20,
318                         .twb            = 100,
319                         .trp_resp       = 20,
320                         .tadl           = 70,
321                 },
322         },
323 };
324
325 struct tegra_nand_platform nand_data = {
326         .max_chips      = 8,
327         .chip_parms     = nand_chip_parms,
328         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
329 };
330
331 struct platform_device tegra_nand_device = {
332         .name          = "tegra_nand",
333         .id            = -1,
334         .resource      = nand_resources,
335         .num_resources = ARRAY_SIZE(nand_resources),
336         .dev            = {
337                 .platform_data = &nand_data,
338         },
339 };
340 #endif
341
342 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
343 static struct resource tegra_sim_smc91x_resources[] = {
344         [0] = {
345                 .start          = TEGRA_SIM_ETH_BASE,
346                 .end            = TEGRA_SIM_ETH_BASE + TEGRA_SIM_ETH_SIZE - 1,
347                 .flags          = IORESOURCE_MEM,
348         },
349         [1] = {
350                 .start          = IRQ_ETH,
351                 .end            = IRQ_ETH,
352                 .flags          = IORESOURCE_IRQ,
353         },
354 };
355
356 static struct platform_device tegra_sim_smc91x_device = {
357         .name           = "smc91x",
358         .id             = 0,
359         .num_resources  = ARRAY_SIZE(tegra_sim_smc91x_resources),
360         .resource       = tegra_sim_smc91x_resources,
361 };
362 #endif
363
364 static struct platform_device *bonaire_devices[] __initdata = {
365 #if ENABLE_OTG
366         &tegra_otg_device,
367 #endif
368         &debug_uart,
369         &tegra_pmu_device,
370         &tegra_rtc_device,
371         &tegra_udc_device,
372 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
373         &tegra11_se_device,
374 #endif
375 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
376         &tegra_smmu_device,
377 #endif
378         &bonaire_keys_device,
379 #if defined(CONFIG_SND_HDA_TEGRA)
380         &tegra_hda_device,
381 #endif
382         &tegra_avp_device,
383 #if defined(CONFIG_MTD_NAND_TEGRA)
384         &tegra_nand_device,
385 #endif
386 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
387         &tegra_sim_smc91x_device,
388 #endif
389 };
390
391 static int __init bonaire_touch_init(void)
392 {
393         return 0;
394 }
395
396 #if defined(USB_HOST_ONLY)
397 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
398         [0] = {
399                         .phy_config = &utmi_phy_config[0],
400                         .operating_mode = TEGRA_USB_HOST,
401                         .power_down_on_bus_suspend = 0,
402         },
403         [1] = {
404                         .phy_config = &ulpi_phy_config,
405                         .operating_mode = TEGRA_USB_HOST,
406                         .power_down_on_bus_suspend = 1,
407         },
408         [2] = {
409                         .phy_config = &utmi_phy_config[1],
410                         .operating_mode = TEGRA_USB_HOST,
411                         .power_down_on_bus_suspend = 0,
412         },
413 };
414 #endif
415
416 static struct tegra_usb_platform_data tegra_udc_pdata = {
417         .port_otg = true,
418         .has_hostpc = true,
419         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
420         .op_mode = TEGRA_USB_OPMODE_DEVICE,
421         .u_data.dev = {
422                 .vbus_pmu_irq = 0,
423                 .vbus_gpio = -1,
424                 .charging_supported = false,
425                 .remote_wakeup_supported = false,
426         },
427         .u_cfg.utmi = {
428                 .hssync_start_delay = 0,
429                 .elastic_limit = 16,
430                 .idle_wait_delay = 17,
431                 .term_range_adj = 6,
432                 .xcvr_setup = 8,
433                 .xcvr_lsfslew = 2,
434                 .xcvr_lsrslew = 2,
435                 .xcvr_setup_offset = 0,
436                 .xcvr_use_fuses = 1,
437         },
438 };
439
440 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
441         .port_otg = true,
442         .has_hostpc = true,
443         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
444         .op_mode = TEGRA_USB_OPMODE_HOST,
445         .u_data.host = {
446                 .vbus_gpio = -1,
447                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
448                 .hot_plug = true,
449                 .remote_wakeup_supported = true,
450                 .power_off_on_suspend = true,
451         },
452         .u_cfg.utmi = {
453                 .hssync_start_delay = 0,
454                 .elastic_limit = 16,
455                 .idle_wait_delay = 17,
456                 .term_range_adj = 6,
457                 .xcvr_setup = 15,
458                 .xcvr_lsfslew = 2,
459                 .xcvr_lsrslew = 2,
460                 .xcvr_setup_offset = 0,
461                 .xcvr_use_fuses = 1,
462         },
463 };
464
465 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
466         .port_otg = false,
467         .has_hostpc = true,
468         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
469         .op_mode         = TEGRA_USB_OPMODE_HOST,
470         .u_data.host = {
471                 .vbus_gpio = -1,
472                 .hot_plug = true,
473                 .remote_wakeup_supported = true,
474                 .power_off_on_suspend = true,
475         },
476         .u_cfg.utmi = {
477                 .hssync_start_delay = 0,
478                 .elastic_limit = 16,
479                 .idle_wait_delay = 17,
480                 .term_range_adj = 6,
481                 .xcvr_setup = 15,
482                 .xcvr_lsfslew = 2,
483                 .xcvr_lsrslew = 2,
484                 .xcvr_setup_offset = 0,
485                 .xcvr_use_fuses = 1,
486         },
487 };
488
489 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
490         .port_otg = false,
491         .has_hostpc = true,
492         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
493         .op_mode         = TEGRA_USB_OPMODE_HOST,
494         .u_data.host = {
495                 .vbus_gpio = -1,
496                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
497                 .hot_plug = true,
498                 .remote_wakeup_supported = true,
499                 .power_off_on_suspend = true,
500         },
501         .u_cfg.utmi = {
502                 .hssync_start_delay = 0,
503                 .elastic_limit = 16,
504                 .idle_wait_delay = 17,
505                 .term_range_adj = 6,
506                 .xcvr_setup = 8,
507                 .xcvr_lsfslew = 2,
508                 .xcvr_lsrslew = 2,
509                 .xcvr_setup_offset = 0,
510                 .xcvr_use_fuses = 1,
511         },
512 };
513
514 static void bonaire_usb_init(void)
515 {
516 #if defined(USB_HOST_ONLY)
517         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
518         platform_device_register(&tegra_ehci1_device);
519 #else
520         /* setup the udc platform data */
521         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
522
523 #endif
524 }
525 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
526         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
527 };
528
529 static struct uart_clk_parent uart_parent_clk[] = {
530         [0] = {.name = "clk_m"},
531 };
532
533 static struct tegra_uart_platform_data bonaire_uart_pdata;
534 static struct tegra_uart_platform_data bonaire_loopback_uart_pdata;
535
536 static void __init bonaire_hs_uart_init(void)
537 {
538         struct clk *c;
539         int i;
540
541         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
542                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
543                 if (IS_ERR_OR_NULL(c)) {
544                         pr_err("Not able to get the clock for %s\n",
545                                         uart_parent_clk[i].name);
546                         continue;
547                 }
548                 uart_parent_clk[i].parent_clk = c;
549                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
550         }
551         bonaire_uart_pdata.parent_clk_list = uart_parent_clk;
552         bonaire_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
553         bonaire_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
554         bonaire_loopback_uart_pdata.parent_clk_count =
555                 ARRAY_SIZE(uart_parent_clk);
556         bonaire_loopback_uart_pdata.is_loopback = true;
557         tegra_uartb_device.dev.platform_data = &bonaire_uart_pdata;
558         tegra_uartc_device.dev.platform_data = &bonaire_uart_pdata;
559         tegra_uartd_device.dev.platform_data = &bonaire_uart_pdata;
560         platform_add_devices(bonaire_hs_uart_devices,
561                         ARRAY_SIZE(bonaire_hs_uart_devices));
562 }
563
564 static void __init tegra_bonaire_init(void)
565 {
566         tegra_clk_init_from_table(bonaire_clk_init_table);
567         tegra_enable_pinmux();
568         bonaire_pinmux_init();
569         tegra_soc_device_init("bonaire");
570
571 #ifdef CONFIG_TEGRA_FPGA_PLATFORM
572         if (tegra_platform_is_qt())
573                 debug_uart_platform_data[0].uartclk =
574                                                 tegra_clk_measure_input_freq();
575 #endif
576
577         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
578
579 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
580         bonaire_power_off_init();
581 #endif
582         tegra_io_dpd_init();
583         bonaire_hs_uart_init();
584         bonaire_sdhci_init();
585         bonaire_i2c_init();
586         bonaire_regulator_init();
587         bonaire_suspend_init();
588         bonaire_touch_init();
589         bonaire_usb_init();
590         bonaire_panel_init();
591         bonaire_bt_rfkill();
592 }
593
594 static void __init tegra_bonaire_reserve(void)
595 {
596 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
597         tegra_reserve(0, SZ_4M, 0);
598 #else
599 #if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
600         if (tegra_split_mem_active())
601                 tegra_reserve(0, 0, 0);
602         else
603 #endif
604                 tegra_reserve(SZ_128M, SZ_4M, 0);
605 #endif
606 }
607
608
609 MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
610         .atag_offset    = 0x80000100,
611         .map_io         = tegra_map_common_io,
612         .reserve        = tegra_bonaire_reserve,
613         .init_early     = tegra12x_init_early,
614         .init_irq       = tegra_dt_init_irq,
615         .handle_irq     = gic_handle_irq,
616         .init_machine   = tegra_bonaire_init,
617         .timer          = &tegra_sys_timer,
618 MACHINE_END