ARM: tegra: Use common board name for sim
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (c) 2013, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi/spi-tegra.h>
31 #include <linux/i2c/panjit_ts.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/i2c-tegra.h>
35 #include <linux/gpio.h>
36 #include <linux/gpio_keys.h>
37 #include <linux/input.h>
38 #include <linux/platform_data/tegra_usb.h>
39 #include <linux/tegra_uart.h>
40 #include <linux/serial_tegra.h>
41 #include <linux/of_platform.h>
42 #include <mach/clk.h>
43 #include <mach/gpio-tegra.h>
44 #include <mach/iomap.h>
45
46 #include <mach/io_dpd.h>
47
48 #include <mach/irqs.h>
49 #include <mach/pinmux.h>
50 #include <mach/iomap.h>
51 #include <mach/io.h>
52 #include <mach/i2s.h>
53 #include <mach/audio.h>
54 #include <mach/usb_phy.h>
55 #include <mach/nand.h>
56 #include <mach/pci.h>
57 #include <mach/hardware.h>
58
59 #include <asm/hardware/gic.h>
60 #include <asm/mach-types.h>
61 #include <asm/mach/arch.h>
62
63 #include "board.h"
64 #include "board-bonaire.h"
65 #include "clock.h"
66 #include "common.h"
67 #include "devices.h"
68 #include "fuse.h"
69 #include "gpio-names.h"
70
71 #define ENABLE_OTG 0
72 /*#define USB_HOST_ONLY*/
73
74 static struct plat_serial8250_port debug_uart_platform_data[] = {
75         {
76                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
77                 .mapbase        = TEGRA_UARTA_BASE,
78                 .irq            = INT_UARTA,
79                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
80                 .type           = PORT_TEGRA,
81                 .iotype         = UPIO_MEM,
82                 .regshift       = 2,
83                 .uartclk        = 13000000,
84         }, {
85                 .flags          = 0,
86         }
87 };
88
89 static struct platform_device debug_uart = {
90         .name = "serial8250",
91         .id = PLAT8250_DEV_PLATFORM,
92         .dev = {
93                 .platform_data = debug_uart_platform_data,
94         },
95 };
96
97 #ifdef CONFIG_BCM4329_RFKILL
98
99 static struct resource bonaire_bcm4329_rfkill_resources[] = {
100         {
101                 .name   = "bcm4329_nreset_gpio",
102                 .start  = TEGRA_GPIO_PU0,
103                 .end    = TEGRA_GPIO_PU0,
104                 .flags  = IORESOURCE_IO,
105         },
106         {
107                 .name   = "bcm4329_nshutdown_gpio",
108                 .start  = TEGRA_GPIO_PK2,
109                 .end    = TEGRA_GPIO_PK2,
110                 .flags  = IORESOURCE_IO,
111         },
112 };
113
114 static struct platform_device bonaire_bcm4329_rfkill_device = {
115         .name = "bcm4329_rfkill",
116         .id             = -1,
117         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
118         .resource       = bonaire_bcm4329_rfkill_resources,
119 };
120
121 static noinline void __init bonaire_bt_rfkill(void)
122 {
123         /*Add Clock Resource*/
124         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
125                                 "blink", NULL);
126
127         platform_device_register(&bonaire_bcm4329_rfkill_device);
128
129         return;
130 }
131 #else
132 static inline void bonaire_bt_rfkill(void) { }
133 #endif
134
135 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
136         /* name         parent          rate            enabled */
137         { "uarta",      "clk_m",        13000000,       true},
138         { "uartb",      "clk_m",        13000000,       true},
139         { "uartc",      "clk_m",        13000000,       true},
140         { "uartd",      "clk_m",        13000000,       true},
141         { "uarte",      "clk_m",        13000000,       true},
142         { "sdmmc1",     "clk_m",        26000000,       false},
143         { "sdmmc3",     "clk_m",        26000000,       false},
144         { "sdmmc4",     "clk_m",        26000000,       false},
145         { "pll_m",      NULL,           0,              true},
146         { "blink",      "clk_32k",      32768,          false},
147         { "pll_p_out4", "pll_p",        24000000,       true },
148         { "pwm",        "clk_32k",      32768,          false},
149         { "blink",      "clk_32k",      32768,          false},
150         { "pll_a",      NULL,           56448000,       true},
151         { "pll_a_out0", NULL,           11289600,       true},
152         { "i2s1",       "pll_a_out0",   11289600,       true},
153         { "i2s2",       "pll_a_out0",   11289600,       true},
154         { "d_audio",    "pll_a_out0",   11289600,       false},
155         { "audio_2x",   "audio",        22579200,       true},
156         { NULL,         NULL,           0,              0},
157 };
158
159 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
160         {
161                 I2C_BOARD_INFO("wm8903", 0x1a),
162         },
163 };
164
165 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
166         .bus_clk_rate   = 100000,
167 };
168
169 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
170 static const struct tegra_pingroup_config i2c2_ddc = {
171         .pingroup       = TEGRA_PINGROUP_DDC,
172         .func           = TEGRA_MUX_I2C2,
173 };
174
175 static const struct tegra_pingroup_config i2c2_gen2 = {
176         .pingroup       = TEGRA_PINGROUP_PTA,
177         .func           = TEGRA_MUX_I2C2,
178 };
179 #endif
180
181 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
182         .bus_clk_rate   = 100000,
183 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
184         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
185         .bus_mux_len    = { 1, 1 },
186 #endif
187 };
188
189 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
190         .bus_clk_rate   = 100000,
191 };
192
193 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
194         .bus_clk_rate   = 100000,
195 };
196
197 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
198         .bus_clk_rate   = 100000,
199 };
200
201 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
202         .bus_clk_rate   = 100000,
203 };
204
205 static void bonaire_i2c_init(void)
206 {
207         tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
208         tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
209         tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
210         tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
211         tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
212         tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
213
214         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
215
216         platform_device_register(&tegra14_i2c_device6);
217         platform_device_register(&tegra14_i2c_device5);
218         platform_device_register(&tegra14_i2c_device4);
219         platform_device_register(&tegra14_i2c_device3);
220         platform_device_register(&tegra14_i2c_device2);
221         platform_device_register(&tegra14_i2c_device1);
222 }
223
224 static void bonaire_apbdma_init(void)
225 {
226         platform_device_register(&tegra_apbdma);
227 }
228
229 static struct platform_device *bonaire_spi_devices[] __initdata = {
230         &tegra11_spi_device4,
231 };
232
233 /* struct spi_clk_parent spi_parent_clk_bonaire[] = { */
234 /*      [0] = {.name = "pll_p"}, */
235 /* #ifndef CONFIG_TEGRA_PLLM_RESTRICTED */
236 /*      [1] = {.name = "pll_m"}, */
237 /*      [2] = {.name = "clk_m"}, */
238 /* #else */
239 /*      [1] = {.name = "clk_m"}, */
240 /* #endif */
241 /* }; */
242
243 /* static struct tegra_spi_platform_data bonaire_spi_pdata = { */
244 /*      .is_dma_based           = true, */
245 /*      .max_dma_buffer         = 16 * 1024, */
246 /*      .is_clkon_always        = false, */
247 /*      .max_rate               = 25000000, */
248 /* }; */
249
250 /* static void __init bonaire_spi_init(void) */
251 /* { */
252 /*      int i; */
253 /*      struct clk *c; */
254 /*      struct board_info board_info, display_board_info; */
255
256 /*      tegra_get_board_info(&board_info); */
257 /*      tegra_get_display_board_info(&display_board_info); */
258
259 /*      for (i = 0; i < ARRAY_SIZE(spi_parent_clk_bonaire); ++i) { */
260 /*              c = tegra_get_clock_by_name(spi_parent_clk_bonaire[i].name); */
261 /*              if (IS_ERR_OR_NULL(c)) { */
262 /*                      pr_err("Not able to get the clock for %s\n", */
263 /*                                      spi_parent_clk_bonaire[i].name); */
264 /*              continue; */
265 /*              } */
266 /*              spi_parent_clk_bonaire[i].parent_clk = c; */
267 /*              spi_parent_clk_bonaire[i].fixed_clk_rate = clk_get_rate(c); */
268 /*      } */
269 /*      bonaire_spi_pdata.parent_clk_list = spi_parent_clk_bonaire; */
270 /*      bonaire_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_bonaire); */
271 /*      tegra11_spi_device4.dev.platform_data = &bonaire_spi_pdata; */
272 /*      platform_add_devices(bonaire_spi_devices, */
273 /*                      ARRAY_SIZE(bonaire_spi_devices)); */
274 /* } */
275
276 #define GPIO_KEY(_id, _gpio, _iswake)           \
277         {                                       \
278                 .code = _id,                    \
279                 .gpio = TEGRA_GPIO_##_gpio,     \
280                 .active_low = 1,                \
281                 .desc = #_id,                   \
282                 .type = EV_KEY,                 \
283                 .wakeup = _iswake,              \
284                 .debounce_interval = 10,        \
285         }
286
287 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
288 static struct gpio_keys_button bonaire_keys[] = {
289         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
290         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
291         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
292         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
293         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
294         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
295 };
296
297 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
298         .buttons        = bonaire_keys,
299         .nbuttons       = ARRAY_SIZE(bonaire_keys),
300 };
301
302 static struct platform_device bonaire_keys_device = {
303         .name   = "gpio-keys",
304         .id     = 0,
305         .dev    = {
306                 .platform_data  = &bonaire_keys_platform_data,
307         },
308 };
309
310 static struct resource tegra_rtc_resources[] = {
311         [0] = {
312                 .start = TEGRA_RTC_BASE,
313                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
314                 .flags = IORESOURCE_MEM,
315         },
316         [1] = {
317                 .start = INT_RTC,
318                 .end = INT_RTC,
319                 .flags = IORESOURCE_IRQ,
320         },
321 };
322
323 static struct platform_device tegra_rtc_device = {
324         .name = "tegra_rtc",
325         .id   = -1,
326         .resource = tegra_rtc_resources,
327         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
328 };
329
330 #if defined(CONFIG_MTD_NAND_TEGRA)
331 static struct resource nand_resources[] = {
332         [0] = {
333                 .start = INT_NANDFLASH,
334                 .end   = INT_NANDFLASH,
335                 .flags = IORESOURCE_IRQ
336         },
337         [1] = {
338                 .start = TEGRA_NAND_BASE,
339                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
340                 .flags = IORESOURCE_MEM
341         }
342 };
343
344 static struct tegra_nand_chip_parms nand_chip_parms[] = {
345         /* Samsung K5E2G1GACM */
346         [0] = {
347                 .vendor_id   = 0xEC,
348                 .device_id   = 0xAA,
349                 .capacity    = 256,
350                 .timing      = {
351                         .trp            = 21,
352                         .trh            = 15,
353                         .twp            = 21,
354                         .twh            = 15,
355                         .tcs            = 31,
356                         .twhr           = 60,
357                         .tcr_tar_trr    = 20,
358                         .twb            = 100,
359                         .trp_resp       = 30,
360                         .tadl           = 100,
361                 },
362         },
363         /* Hynix H5PS1GB3EFR */
364         [1] = {
365                 .vendor_id   = 0xAD,
366                 .device_id   = 0xDC,
367                 .capacity    = 512,
368                 .timing      = {
369                         .trp            = 12,
370                         .trh            = 10,
371                         .twp            = 12,
372                         .twh            = 10,
373                         .tcs            = 20,
374                         .twhr           = 80,
375                         .tcr_tar_trr    = 20,
376                         .twb            = 100,
377                         .trp_resp       = 20,
378                         .tadl           = 70,
379                 },
380         },
381 };
382
383 struct tegra_nand_platform nand_data = {
384         .max_chips      = 8,
385         .chip_parms     = nand_chip_parms,
386         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
387 };
388
389 struct platform_device tegra_nand_device = {
390         .name          = "tegra_nand",
391         .id            = -1,
392         .resource      = nand_resources,
393         .num_resources = ARRAY_SIZE(nand_resources),
394         .dev            = {
395                 .platform_data = &nand_data,
396         },
397 };
398 #endif
399
400 static struct platform_device *bonaire_devices[] __initdata = {
401 #if ENABLE_OTG
402         &tegra_otg_device,
403 #endif
404         &debug_uart,
405         &tegra_pmu_device,
406         &tegra_rtc_device,
407 #if !defined(USB_HOST_ONLY)
408         &tegra_udc_device,
409 #endif
410 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
411         &tegra12_se_device,
412 #endif
413         &bonaire_keys_device,
414 #if defined(CONFIG_SND_HDA_TEGRA)
415         &tegra_hda_device,
416 #endif
417         &tegra_avp_device,
418 #if defined(CONFIG_MTD_NAND_TEGRA)
419         &tegra_nand_device,
420 #endif
421 };
422
423 static int __init bonaire_touch_init(void)
424 {
425         return 0;
426 }
427
428 static struct tegra_usb_platform_data tegra_udc_pdata = {
429         .port_otg = false,
430         .has_hostpc = true,
431         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
432         .op_mode = TEGRA_USB_OPMODE_DEVICE,
433         .u_data.dev = {
434                 .vbus_pmu_irq = 0,
435                 .vbus_gpio = -1,
436                 .charging_supported = false,
437                 .remote_wakeup_supported = false,
438         },
439         .u_cfg.utmi = {
440                 .hssync_start_delay = 0,
441                 .elastic_limit = 16,
442                 .idle_wait_delay = 17,
443                 .term_range_adj = 6,
444                 .xcvr_setup = 8,
445                 .xcvr_lsfslew = 2,
446                 .xcvr_lsrslew = 2,
447                 .xcvr_setup_offset = 0,
448                 .xcvr_use_fuses = 1,
449         },
450 };
451
452 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
453         .port_otg = false,
454         .has_hostpc = true,
455         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
456         .op_mode = TEGRA_USB_OPMODE_HOST,
457         .u_data.host = {
458                 .vbus_gpio = -1,
459                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
460                 .hot_plug = true,
461                 .remote_wakeup_supported = true,
462                 .power_off_on_suspend = true,
463         },
464         .u_cfg.utmi = {
465                 .hssync_start_delay = 0,
466                 .elastic_limit = 16,
467                 .idle_wait_delay = 17,
468                 .term_range_adj = 6,
469                 .xcvr_setup = 15,
470                 .xcvr_lsfslew = 2,
471                 .xcvr_lsrslew = 2,
472                 .xcvr_setup_offset = 0,
473                 .xcvr_use_fuses = 1,
474         },
475 };
476
477 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
478         .port_otg = false,
479         .has_hostpc = true,
480         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
481         .op_mode         = TEGRA_USB_OPMODE_HOST,
482         .u_data.host = {
483                 .vbus_gpio = -1,
484                 .hot_plug = true,
485                 .remote_wakeup_supported = true,
486                 .power_off_on_suspend = true,
487         },
488         .u_cfg.utmi = {
489                 .hssync_start_delay = 0,
490                 .elastic_limit = 16,
491                 .idle_wait_delay = 17,
492                 .term_range_adj = 6,
493                 .xcvr_setup = 15,
494                 .xcvr_lsfslew = 2,
495                 .xcvr_lsrslew = 2,
496                 .xcvr_setup_offset = 0,
497                 .xcvr_use_fuses = 1,
498         },
499 };
500
501 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
502         .port_otg = false,
503         .has_hostpc = true,
504         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
505         .op_mode         = TEGRA_USB_OPMODE_HOST,
506         .u_data.host = {
507                 .vbus_gpio = -1,
508                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
509                 .hot_plug = true,
510                 .remote_wakeup_supported = true,
511                 .power_off_on_suspend = true,
512         },
513         .u_cfg.utmi = {
514                 .hssync_start_delay = 0,
515                 .elastic_limit = 16,
516                 .idle_wait_delay = 17,
517                 .term_range_adj = 6,
518                 .xcvr_setup = 8,
519                 .xcvr_lsfslew = 2,
520                 .xcvr_lsrslew = 2,
521                 .xcvr_setup_offset = 0,
522                 .xcvr_use_fuses = 1,
523         },
524 };
525
526 static void bonaire_usb_init(void)
527 {
528 #if defined(USB_HOST_ONLY)
529         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
530         platform_device_register(&tegra_ehci1_device);
531 #else
532         /* setup the udc platform data */
533         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
534
535 #endif
536 }
537
538 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
539         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
540 };
541
542 static struct uart_clk_parent uart_parent_clk[] = {
543         [0] = {.name = "clk_m"},
544 };
545
546 static struct tegra_serial_platform_data bonaire_uartb_pdata = {
547         .dma_req_selector = 9,
548         .modem_interrupt = false,
549 };
550 static struct tegra_serial_platform_data bonaire_uartc_pdata = {
551         .dma_req_selector = 10,
552         .modem_interrupt = false,
553 };
554 static struct tegra_serial_platform_data bonaire_uartd_pdata = {
555         .dma_req_selector = 19,
556         .modem_interrupt = false,
557 };
558
559 static struct tegra_uart_platform_data bonaire_loopback_uart_pdata;
560
561 static void __init bonaire_hs_uart_init(void)
562 {
563         bonaire_loopback_uart_pdata.is_loopback = true;
564         tegra_uartb_device.dev.platform_data = &bonaire_uartb_pdata;
565         tegra_uartc_device.dev.platform_data = &bonaire_uartc_pdata;
566         tegra_uartd_device.dev.platform_data = &bonaire_uartd_pdata;
567         platform_add_devices(bonaire_hs_uart_devices,
568                         ARRAY_SIZE(bonaire_hs_uart_devices));
569 }
570
571 static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
572         .port_status[0] = 1,
573         .port_status[1] = 1,
574         .use_dock_detect        = 1,
575         .gpio                   = TEGRA_GPIO_PO1,
576 };
577
578 static void bonaire_pcie_init(void)
579 {
580         tegra_pci_device.dev.platform_data = &bonaire_pcie_platform_data;
581         platform_device_register(&tegra_pci_device);
582 }
583
584 static void __init tegra_bonaire_init(void)
585 {
586         tegra_clk_init_from_table(bonaire_clk_init_table);
587         tegra_enable_pinmux();
588         bonaire_pinmux_init();
589         tegra_soc_device_init("bonaire");
590         bonaire_apbdma_init();
591
592 #ifdef CONFIG_TEGRA_FPGA_PLATFORM
593         if (tegra_platform_is_qt())
594                 debug_uart_platform_data[0].uartclk =
595                                                 tegra_clk_measure_input_freq();
596 #endif
597
598         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
599
600 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
601         bonaire_power_off_init();
602 #endif
603         tegra_io_dpd_init();
604         bonaire_hs_uart_init();
605         bonaire_sdhci_init();
606         bonaire_i2c_init();
607         /* bonaire_spi_init(); */
608         bonaire_regulator_init();
609         bonaire_suspend_init();
610         bonaire_touch_init();
611         bonaire_usb_init();
612         bonaire_panel_init();
613         bonaire_sensors_init();
614         bonaire_bt_rfkill();
615         bonaire_pcie_init();
616         tegra_register_fuse();
617 }
618
619 #ifdef CONFIG_USE_OF
620 struct of_dev_auxdata tegra_bonaire_auxdata_lookup[] __initdata = {
621         OF_DEV_AUXDATA("nvidia,tegra124-host1x", TEGRA_HOST1X_BASE, "host1x",
622                 NULL),
623         OF_DEV_AUXDATA("nvidia,tegra124-gk20a", 0x538F0000, "gk20a", NULL),
624         OF_DEV_AUXDATA("nvidia,tegra124-vic", TEGRA_VIC_BASE, "vic03", NULL),
625         OF_DEV_AUXDATA("nvidia,tegra124-msenc", TEGRA_MSENC_BASE, "msenc",
626                 NULL),
627         OF_DEV_AUXDATA("nvidia,tegra124-vi", TEGRA_VI_BASE, "vi", NULL),
628         OF_DEV_AUXDATA("nvidia,tegra124-isp", TEGRA_ISP_BASE, "isp", NULL),
629         OF_DEV_AUXDATA("nvidia,tegra124-tsec", TEGRA_TSEC_BASE, "tsec", NULL),
630         {}
631 };
632 #endif
633
634 static void __init tegra_bonaire_dt_init(void)
635 {
636         of_platform_populate(NULL, of_default_bus_match_table,
637                 tegra_bonaire_auxdata_lookup, &platform_bus);
638
639         tegra_bonaire_init();
640 }
641
642 static void __init tegra_bonaire_reserve(void)
643 {
644 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
645         tegra_reserve(0, SZ_16M + SZ_2M, SZ_16M);
646 #else
647 #if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
648         if (tegra_split_mem_active())
649                 tegra_reserve(0, 0, 0);
650         else
651 #endif
652                 tegra_reserve(SZ_128M, SZ_16M + SZ_2M, SZ_16M);
653 #endif
654 }
655
656 static const char * const bonaire_dt_board_compat[] = {
657         "nvidia,bonaire",
658         NULL
659 };
660
661 MACHINE_START(BONAIRE, "bonaire")
662         .atag_offset    = 0x80000100,
663         .map_io         = tegra_map_common_io,
664         .reserve        = tegra_bonaire_reserve,
665         .init_early     = tegra12x_init_early,
666         .init_irq       = tegra_dt_init_irq,
667         .handle_irq     = gic_handle_irq,
668         .init_machine   = tegra_bonaire_dt_init,
669         .timer          = &tegra_sys_timer,
670         .dt_compat      = bonaire_dt_board_compat,
671 MACHINE_END