ARM: tegra: bonaire: add SPI support
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (c) 2013, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi-tegra.h>
31 #include <linux/i2c/panjit_ts.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/i2c-tegra.h>
35 #include <linux/gpio.h>
36 #include <linux/gpio_keys.h>
37 #include <linux/input.h>
38 #include <linux/platform_data/tegra_usb.h>
39 #include <linux/tegra_uart.h>
40 #include <mach/clk.h>
41 #include <mach/gpio-tegra.h>
42 #include <mach/iomap.h>
43
44 #include <mach/io_dpd.h>
45
46 #include <mach/irqs.h>
47 #include <mach/pinmux.h>
48 #include <mach/iomap.h>
49 #include <mach/io.h>
50 #include <mach/i2s.h>
51 #include <mach/audio.h>
52 #include <mach/usb_phy.h>
53 #include <mach/nand.h>
54 #include <mach/hardware.h>
55
56 #include <asm/hardware/gic.h>
57 #include <asm/mach-types.h>
58 #include <asm/mach/arch.h>
59
60 #include "board.h"
61 #include "board-bonaire.h"
62 #include "clock.h"
63 #include "common.h"
64 #include "devices.h"
65 #include "fuse.h"
66 #include "gpio-names.h"
67
68 #define ENABLE_OTG 0
69 /*#define USB_HOST_ONLY*/
70
71 static struct plat_serial8250_port debug_uart_platform_data[] = {
72         {
73                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
74                 .mapbase        = TEGRA_UARTA_BASE,
75                 .irq            = INT_UARTA,
76                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
77                 .type           = PORT_TEGRA,
78                 .iotype         = UPIO_MEM,
79                 .regshift       = 2,
80                 .uartclk        = 13000000,
81         }, {
82                 .flags          = 0,
83         }
84 };
85
86 static struct platform_device debug_uart = {
87         .name = "serial8250",
88         .id = PLAT8250_DEV_PLATFORM,
89         .dev = {
90                 .platform_data = debug_uart_platform_data,
91         },
92 };
93
94 #ifdef CONFIG_BCM4329_RFKILL
95
96 static struct resource bonaire_bcm4329_rfkill_resources[] = {
97         {
98                 .name   = "bcm4329_nreset_gpio",
99                 .start  = TEGRA_GPIO_PU0,
100                 .end    = TEGRA_GPIO_PU0,
101                 .flags  = IORESOURCE_IO,
102         },
103         {
104                 .name   = "bcm4329_nshutdown_gpio",
105                 .start  = TEGRA_GPIO_PK2,
106                 .end    = TEGRA_GPIO_PK2,
107                 .flags  = IORESOURCE_IO,
108         },
109 };
110
111 static struct platform_device bonaire_bcm4329_rfkill_device = {
112         .name = "bcm4329_rfkill",
113         .id             = -1,
114         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
115         .resource       = bonaire_bcm4329_rfkill_resources,
116 };
117
118 static noinline void __init bonaire_bt_rfkill(void)
119 {
120         /*Add Clock Resource*/
121         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
122                                 "blink", NULL);
123
124         platform_device_register(&bonaire_bcm4329_rfkill_device);
125
126         return;
127 }
128 #else
129 static inline void bonaire_bt_rfkill(void) { }
130 #endif
131
132 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
133         /* name         parent          rate            enabled */
134         { "uarta",      "clk_m",        13000000,       true},
135         { "uartb",      "clk_m",        13000000,       true},
136         { "uartc",      "clk_m",        13000000,       true},
137         { "uartd",      "clk_m",        13000000,       true},
138         { "uarte",      "clk_m",        13000000,       true},
139         { "sdmmc1",     "clk_m",        26000000,       false},
140         { "sdmmc3",     "clk_m",        26000000,       false},
141         { "sdmmc4",     "clk_m",        26000000,       false},
142         { "pll_m",      NULL,           0,              true},
143         { "blink",      "clk_32k",      32768,          false},
144         { "pll_p_out4", "pll_p",        24000000,       true },
145         { "pwm",        "clk_32k",      32768,          false},
146         { "blink",      "clk_32k",      32768,          false},
147         { "pll_a",      NULL,           56448000,       true},
148         { "pll_a_out0", NULL,           11289600,       true},
149         { "i2s1",       "pll_a_out0",   11289600,       true},
150         { "i2s2",       "pll_a_out0",   11289600,       true},
151         { "d_audio",    "pll_a_out0",   11289600,       false},
152         { "audio_2x",   "audio",        22579200,       true},
153         { NULL,         NULL,           0,              0},
154 };
155
156 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
157         {
158                 I2C_BOARD_INFO("wm8903", 0x1a),
159         },
160 };
161
162 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
163         .bus_clk_rate   = 100000,
164 };
165
166 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
167 static const struct tegra_pingroup_config i2c2_ddc = {
168         .pingroup       = TEGRA_PINGROUP_DDC,
169         .func           = TEGRA_MUX_I2C2,
170 };
171
172 static const struct tegra_pingroup_config i2c2_gen2 = {
173         .pingroup       = TEGRA_PINGROUP_PTA,
174         .func           = TEGRA_MUX_I2C2,
175 };
176 #endif
177
178 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
179         .bus_clk_rate   = 100000,
180 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
181         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
182         .bus_mux_len    = { 1, 1 },
183 #endif
184 };
185
186 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
187         .bus_clk_rate   = 100000,
188 };
189
190 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
191         .bus_clk_rate   = 100000,
192 };
193
194 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
195         .bus_clk_rate   = 100000,
196 };
197
198 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
199         .bus_clk_rate   = 100000,
200 };
201
202 static void bonaire_i2c_init(void)
203 {
204         tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
205         tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
206         tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
207         tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
208         tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
209         tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
210
211         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
212
213         platform_device_register(&tegra14_i2c_device6);
214         platform_device_register(&tegra14_i2c_device5);
215         platform_device_register(&tegra14_i2c_device4);
216         platform_device_register(&tegra14_i2c_device3);
217         platform_device_register(&tegra14_i2c_device2);
218         platform_device_register(&tegra14_i2c_device1);
219 }
220
221 static struct platform_device *bonaire_spi_devices[] __initdata = {
222         &tegra11_spi_device4,
223 };
224
225 struct spi_clk_parent spi_parent_clk_bonaire[] = {
226         [0] = {.name = "pll_p"},
227 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
228         [1] = {.name = "pll_m"},
229         [2] = {.name = "clk_m"},
230 #else
231         [1] = {.name = "clk_m"},
232 #endif
233 };
234
235 static struct tegra_spi_platform_data bonaire_spi_pdata = {
236         .is_dma_based           = true,
237         .max_dma_buffer         = 16 * 1024,
238         .is_clkon_always        = false,
239         .max_rate               = 25000000,
240 };
241
242 static void __init bonaire_spi_init(void)
243 {
244         int i;
245         struct clk *c;
246         struct board_info board_info, display_board_info;
247
248         tegra_get_board_info(&board_info);
249         tegra_get_display_board_info(&display_board_info);
250
251         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_bonaire); ++i) {
252                 c = tegra_get_clock_by_name(spi_parent_clk_bonaire[i].name);
253                 if (IS_ERR_OR_NULL(c)) {
254                         pr_err("Not able to get the clock for %s\n",
255                                         spi_parent_clk_bonaire[i].name);
256                 continue;
257                 }
258                 spi_parent_clk_bonaire[i].parent_clk = c;
259                 spi_parent_clk_bonaire[i].fixed_clk_rate = clk_get_rate(c);
260         }
261         bonaire_spi_pdata.parent_clk_list = spi_parent_clk_bonaire;
262         bonaire_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_bonaire);
263         tegra11_spi_device4.dev.platform_data = &bonaire_spi_pdata;
264         platform_add_devices(bonaire_spi_devices,
265                         ARRAY_SIZE(bonaire_spi_devices));
266 }
267
268 #define GPIO_KEY(_id, _gpio, _iswake)           \
269         {                                       \
270                 .code = _id,                    \
271                 .gpio = TEGRA_GPIO_##_gpio,     \
272                 .active_low = 1,                \
273                 .desc = #_id,                   \
274                 .type = EV_KEY,                 \
275                 .wakeup = _iswake,              \
276                 .debounce_interval = 10,        \
277         }
278
279 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
280 static struct gpio_keys_button bonaire_keys[] = {
281         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
282         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
283         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
284         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
285         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
286         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
287 };
288
289 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
290         .buttons        = bonaire_keys,
291         .nbuttons       = ARRAY_SIZE(bonaire_keys),
292 };
293
294 static struct platform_device bonaire_keys_device = {
295         .name   = "gpio-keys",
296         .id     = 0,
297         .dev    = {
298                 .platform_data  = &bonaire_keys_platform_data,
299         },
300 };
301
302 static struct resource tegra_rtc_resources[] = {
303         [0] = {
304                 .start = TEGRA_RTC_BASE,
305                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
306                 .flags = IORESOURCE_MEM,
307         },
308         [1] = {
309                 .start = INT_RTC,
310                 .end = INT_RTC,
311                 .flags = IORESOURCE_IRQ,
312         },
313 };
314
315 static struct platform_device tegra_rtc_device = {
316         .name = "tegra_rtc",
317         .id   = -1,
318         .resource = tegra_rtc_resources,
319         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
320 };
321
322 #if defined(CONFIG_MTD_NAND_TEGRA)
323 static struct resource nand_resources[] = {
324         [0] = {
325                 .start = INT_NANDFLASH,
326                 .end   = INT_NANDFLASH,
327                 .flags = IORESOURCE_IRQ
328         },
329         [1] = {
330                 .start = TEGRA_NAND_BASE,
331                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
332                 .flags = IORESOURCE_MEM
333         }
334 };
335
336 static struct tegra_nand_chip_parms nand_chip_parms[] = {
337         /* Samsung K5E2G1GACM */
338         [0] = {
339                 .vendor_id   = 0xEC,
340                 .device_id   = 0xAA,
341                 .capacity    = 256,
342                 .timing      = {
343                         .trp            = 21,
344                         .trh            = 15,
345                         .twp            = 21,
346                         .twh            = 15,
347                         .tcs            = 31,
348                         .twhr           = 60,
349                         .tcr_tar_trr    = 20,
350                         .twb            = 100,
351                         .trp_resp       = 30,
352                         .tadl           = 100,
353                 },
354         },
355         /* Hynix H5PS1GB3EFR */
356         [1] = {
357                 .vendor_id   = 0xAD,
358                 .device_id   = 0xDC,
359                 .capacity    = 512,
360                 .timing      = {
361                         .trp            = 12,
362                         .trh            = 10,
363                         .twp            = 12,
364                         .twh            = 10,
365                         .tcs            = 20,
366                         .twhr           = 80,
367                         .tcr_tar_trr    = 20,
368                         .twb            = 100,
369                         .trp_resp       = 20,
370                         .tadl           = 70,
371                 },
372         },
373 };
374
375 struct tegra_nand_platform nand_data = {
376         .max_chips      = 8,
377         .chip_parms     = nand_chip_parms,
378         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
379 };
380
381 struct platform_device tegra_nand_device = {
382         .name          = "tegra_nand",
383         .id            = -1,
384         .resource      = nand_resources,
385         .num_resources = ARRAY_SIZE(nand_resources),
386         .dev            = {
387                 .platform_data = &nand_data,
388         },
389 };
390 #endif
391
392 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
393 static struct resource tegra_sim_smc91x_resources[] = {
394         [0] = {
395                 .start          = TEGRA_SIM_ETH_BASE,
396                 .end            = TEGRA_SIM_ETH_BASE + TEGRA_SIM_ETH_SIZE - 1,
397                 .flags          = IORESOURCE_MEM,
398         },
399         [1] = {
400                 .start          = IRQ_ETH,
401                 .end            = IRQ_ETH,
402                 .flags          = IORESOURCE_IRQ,
403         },
404 };
405
406 static struct platform_device tegra_sim_smc91x_device = {
407         .name           = "smc91x",
408         .id             = 0,
409         .num_resources  = ARRAY_SIZE(tegra_sim_smc91x_resources),
410         .resource       = tegra_sim_smc91x_resources,
411 };
412 #endif
413
414 static struct platform_device *bonaire_devices[] __initdata = {
415 #if ENABLE_OTG
416         &tegra_otg_device,
417 #endif
418         &debug_uart,
419         &tegra_pmu_device,
420         &tegra_rtc_device,
421 #if !defined(USB_HOST_ONLY)
422         &tegra_udc_device,
423 #endif
424 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
425         &tegra11_se_device,
426 #endif
427 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
428         &tegra_smmu_device,
429 #endif
430         &bonaire_keys_device,
431 #if defined(CONFIG_SND_HDA_TEGRA)
432         &tegra_hda_device,
433 #endif
434         &tegra_avp_device,
435 #if defined(CONFIG_MTD_NAND_TEGRA)
436         &tegra_nand_device,
437 #endif
438 #if defined(CONFIG_TEGRA_SIMULATION_PLATFORM) && defined(CONFIG_SMC91X)
439         &tegra_sim_smc91x_device,
440 #endif
441 };
442
443 static int __init bonaire_touch_init(void)
444 {
445         return 0;
446 }
447
448 static struct tegra_usb_platform_data tegra_udc_pdata = {
449         .port_otg = false,
450         .has_hostpc = true,
451         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
452         .op_mode = TEGRA_USB_OPMODE_DEVICE,
453         .u_data.dev = {
454                 .vbus_pmu_irq = 0,
455                 .vbus_gpio = -1,
456                 .charging_supported = false,
457                 .remote_wakeup_supported = false,
458         },
459         .u_cfg.utmi = {
460                 .hssync_start_delay = 0,
461                 .elastic_limit = 16,
462                 .idle_wait_delay = 17,
463                 .term_range_adj = 6,
464                 .xcvr_setup = 8,
465                 .xcvr_lsfslew = 2,
466                 .xcvr_lsrslew = 2,
467                 .xcvr_setup_offset = 0,
468                 .xcvr_use_fuses = 1,
469         },
470 };
471
472 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
473         .port_otg = false,
474         .has_hostpc = true,
475         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
476         .op_mode = TEGRA_USB_OPMODE_HOST,
477         .u_data.host = {
478                 .vbus_gpio = -1,
479                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
480                 .hot_plug = true,
481                 .remote_wakeup_supported = true,
482                 .power_off_on_suspend = true,
483         },
484         .u_cfg.utmi = {
485                 .hssync_start_delay = 0,
486                 .elastic_limit = 16,
487                 .idle_wait_delay = 17,
488                 .term_range_adj = 6,
489                 .xcvr_setup = 15,
490                 .xcvr_lsfslew = 2,
491                 .xcvr_lsrslew = 2,
492                 .xcvr_setup_offset = 0,
493                 .xcvr_use_fuses = 1,
494         },
495 };
496
497 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
498         .port_otg = false,
499         .has_hostpc = true,
500         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
501         .op_mode         = TEGRA_USB_OPMODE_HOST,
502         .u_data.host = {
503                 .vbus_gpio = -1,
504                 .hot_plug = true,
505                 .remote_wakeup_supported = true,
506                 .power_off_on_suspend = true,
507         },
508         .u_cfg.utmi = {
509                 .hssync_start_delay = 0,
510                 .elastic_limit = 16,
511                 .idle_wait_delay = 17,
512                 .term_range_adj = 6,
513                 .xcvr_setup = 15,
514                 .xcvr_lsfslew = 2,
515                 .xcvr_lsrslew = 2,
516                 .xcvr_setup_offset = 0,
517                 .xcvr_use_fuses = 1,
518         },
519 };
520
521 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
522         .port_otg = false,
523         .has_hostpc = true,
524         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
525         .op_mode         = TEGRA_USB_OPMODE_HOST,
526         .u_data.host = {
527                 .vbus_gpio = -1,
528                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
529                 .hot_plug = true,
530                 .remote_wakeup_supported = true,
531                 .power_off_on_suspend = true,
532         },
533         .u_cfg.utmi = {
534                 .hssync_start_delay = 0,
535                 .elastic_limit = 16,
536                 .idle_wait_delay = 17,
537                 .term_range_adj = 6,
538                 .xcvr_setup = 8,
539                 .xcvr_lsfslew = 2,
540                 .xcvr_lsrslew = 2,
541                 .xcvr_setup_offset = 0,
542                 .xcvr_use_fuses = 1,
543         },
544 };
545
546 static void bonaire_usb_init(void)
547 {
548 #if defined(USB_HOST_ONLY)
549         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
550         platform_device_register(&tegra_ehci1_device);
551 #else
552         /* setup the udc platform data */
553         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
554
555 #endif
556 }
557 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
558         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
559 };
560
561 static struct uart_clk_parent uart_parent_clk[] = {
562         [0] = {.name = "clk_m"},
563 };
564
565 static struct tegra_uart_platform_data bonaire_uart_pdata;
566 static struct tegra_uart_platform_data bonaire_loopback_uart_pdata;
567
568 static void __init bonaire_hs_uart_init(void)
569 {
570         struct clk *c;
571         int i;
572
573         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
574                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
575                 if (IS_ERR_OR_NULL(c)) {
576                         pr_err("Not able to get the clock for %s\n",
577                                         uart_parent_clk[i].name);
578                         continue;
579                 }
580                 uart_parent_clk[i].parent_clk = c;
581                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
582         }
583         bonaire_uart_pdata.parent_clk_list = uart_parent_clk;
584         bonaire_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
585         bonaire_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
586         bonaire_loopback_uart_pdata.parent_clk_count =
587                 ARRAY_SIZE(uart_parent_clk);
588         bonaire_loopback_uart_pdata.is_loopback = true;
589         tegra_uartb_device.dev.platform_data = &bonaire_uart_pdata;
590         tegra_uartc_device.dev.platform_data = &bonaire_uart_pdata;
591         tegra_uartd_device.dev.platform_data = &bonaire_uart_pdata;
592         platform_add_devices(bonaire_hs_uart_devices,
593                         ARRAY_SIZE(bonaire_hs_uart_devices));
594 }
595
596 static void __init tegra_bonaire_init(void)
597 {
598         tegra_clk_init_from_table(bonaire_clk_init_table);
599         tegra_enable_pinmux();
600         bonaire_pinmux_init();
601         tegra_soc_device_init("bonaire");
602
603 #ifdef CONFIG_TEGRA_FPGA_PLATFORM
604         if (tegra_platform_is_qt())
605                 debug_uart_platform_data[0].uartclk =
606                                                 tegra_clk_measure_input_freq();
607 #endif
608
609         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
610
611 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
612         bonaire_power_off_init();
613 #endif
614         tegra_io_dpd_init();
615         bonaire_hs_uart_init();
616         bonaire_sdhci_init();
617         bonaire_i2c_init();
618         bonaire_spi_init();
619         bonaire_regulator_init();
620         bonaire_suspend_init();
621         bonaire_touch_init();
622         bonaire_usb_init();
623         bonaire_panel_init();
624         bonaire_bt_rfkill();
625 }
626
627 static void __init tegra_bonaire_reserve(void)
628 {
629 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
630         tegra_reserve(0, SZ_4M, 0);
631 #else
632 #if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
633         if (tegra_split_mem_active())
634                 tegra_reserve(0, 0, 0);
635         else
636 #endif
637                 tegra_reserve(SZ_128M, SZ_4M, 0);
638 #endif
639 }
640
641
642 MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
643         .atag_offset    = 0x80000100,
644         .map_io         = tegra_map_common_io,
645         .reserve        = tegra_bonaire_reserve,
646         .init_early     = tegra12x_init_early,
647         .init_irq       = tegra_dt_init_irq,
648         .handle_irq     = gic_handle_irq,
649         .init_machine   = tegra_bonaire_init,
650         .timer          = &tegra_sys_timer,
651 MACHINE_END