ARM: tegra: Remove asim check in SMSC911X init
[linux-3.10.git] / arch / arm / mach-tegra / board-bonaire.c
1 /*
2  * arch/arm/mach-tegra/board-bonaire.c
3  *
4  * Copyright (c) 2013, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi-tegra.h>
31 #include <linux/i2c/panjit_ts.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/i2c-tegra.h>
35 #include <linux/gpio.h>
36 #include <linux/gpio_keys.h>
37 #include <linux/input.h>
38 #include <linux/platform_data/tegra_usb.h>
39 #include <linux/tegra_uart.h>
40 #include <mach/clk.h>
41 #include <mach/gpio-tegra.h>
42 #include <mach/iomap.h>
43
44 #include <mach/io_dpd.h>
45
46 #include <mach/irqs.h>
47 #include <mach/pinmux.h>
48 #include <mach/iomap.h>
49 #include <mach/io.h>
50 #include <mach/i2s.h>
51 #include <mach/audio.h>
52 #include <mach/usb_phy.h>
53 #include <mach/nand.h>
54 #include <mach/pci.h>
55 #include <mach/hardware.h>
56
57 #include <asm/hardware/gic.h>
58 #include <asm/mach-types.h>
59 #include <asm/mach/arch.h>
60
61 #include "board.h"
62 #include "board-bonaire.h"
63 #include "clock.h"
64 #include "common.h"
65 #include "devices.h"
66 #include "fuse.h"
67 #include "gpio-names.h"
68
69 #define ENABLE_OTG 0
70 /*#define USB_HOST_ONLY*/
71
72 static struct plat_serial8250_port debug_uart_platform_data[] = {
73         {
74                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
75                 .mapbase        = TEGRA_UARTA_BASE,
76                 .irq            = INT_UARTA,
77                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
78                 .type           = PORT_TEGRA,
79                 .iotype         = UPIO_MEM,
80                 .regshift       = 2,
81                 .uartclk        = 13000000,
82         }, {
83                 .flags          = 0,
84         }
85 };
86
87 static struct platform_device debug_uart = {
88         .name = "serial8250",
89         .id = PLAT8250_DEV_PLATFORM,
90         .dev = {
91                 .platform_data = debug_uart_platform_data,
92         },
93 };
94
95 #ifdef CONFIG_BCM4329_RFKILL
96
97 static struct resource bonaire_bcm4329_rfkill_resources[] = {
98         {
99                 .name   = "bcm4329_nreset_gpio",
100                 .start  = TEGRA_GPIO_PU0,
101                 .end    = TEGRA_GPIO_PU0,
102                 .flags  = IORESOURCE_IO,
103         },
104         {
105                 .name   = "bcm4329_nshutdown_gpio",
106                 .start  = TEGRA_GPIO_PK2,
107                 .end    = TEGRA_GPIO_PK2,
108                 .flags  = IORESOURCE_IO,
109         },
110 };
111
112 static struct platform_device bonaire_bcm4329_rfkill_device = {
113         .name = "bcm4329_rfkill",
114         .id             = -1,
115         .num_resources  = ARRAY_SIZE(bonaire_bcm4329_rfkill_resources),
116         .resource       = bonaire_bcm4329_rfkill_resources,
117 };
118
119 static noinline void __init bonaire_bt_rfkill(void)
120 {
121         /*Add Clock Resource*/
122         clk_add_alias("bcm4329_32k_clk", bonaire_bcm4329_rfkill_device.name, \
123                                 "blink", NULL);
124
125         platform_device_register(&bonaire_bcm4329_rfkill_device);
126
127         return;
128 }
129 #else
130 static inline void bonaire_bt_rfkill(void) { }
131 #endif
132
133 static __initdata struct tegra_clk_init_table bonaire_clk_init_table[] = {
134         /* name         parent          rate            enabled */
135         { "uarta",      "clk_m",        13000000,       true},
136         { "uartb",      "clk_m",        13000000,       true},
137         { "uartc",      "clk_m",        13000000,       true},
138         { "uartd",      "clk_m",        13000000,       true},
139         { "uarte",      "clk_m",        13000000,       true},
140         { "sdmmc1",     "clk_m",        26000000,       false},
141         { "sdmmc3",     "clk_m",        26000000,       false},
142         { "sdmmc4",     "clk_m",        26000000,       false},
143         { "pll_m",      NULL,           0,              true},
144         { "blink",      "clk_32k",      32768,          false},
145         { "pll_p_out4", "pll_p",        24000000,       true },
146         { "pwm",        "clk_32k",      32768,          false},
147         { "blink",      "clk_32k",      32768,          false},
148         { "pll_a",      NULL,           56448000,       true},
149         { "pll_a_out0", NULL,           11289600,       true},
150         { "i2s1",       "pll_a_out0",   11289600,       true},
151         { "i2s2",       "pll_a_out0",   11289600,       true},
152         { "d_audio",    "pll_a_out0",   11289600,       false},
153         { "audio_2x",   "audio",        22579200,       true},
154         { NULL,         NULL,           0,              0},
155 };
156
157 static struct i2c_board_info __initdata bonaire_i2c_bus1_board_info[] = {
158         {
159                 I2C_BOARD_INFO("wm8903", 0x1a),
160         },
161 };
162
163 static struct tegra_i2c_platform_data bonaire_i2c1_platform_data = {
164         .bus_clk_rate   = 100000,
165 };
166
167 #if 0   /* !!!FIXME!!! THESE ARE VENTANA SETTINGS */
168 static const struct tegra_pingroup_config i2c2_ddc = {
169         .pingroup       = TEGRA_PINGROUP_DDC,
170         .func           = TEGRA_MUX_I2C2,
171 };
172
173 static const struct tegra_pingroup_config i2c2_gen2 = {
174         .pingroup       = TEGRA_PINGROUP_PTA,
175         .func           = TEGRA_MUX_I2C2,
176 };
177 #endif
178
179 static struct tegra_i2c_platform_data bonaire_i2c2_platform_data = {
180         .bus_clk_rate   = 100000,
181 #if 0   /* !!!FIXME!!!! TESE ARE VENTANA SETTINGS */
182         .bus_mux        = { &i2c2_ddc, &i2c2_gen2 },
183         .bus_mux_len    = { 1, 1 },
184 #endif
185 };
186
187 static struct tegra_i2c_platform_data bonaire_i2c3_platform_data = {
188         .bus_clk_rate   = 100000,
189 };
190
191 static struct tegra_i2c_platform_data bonaire_i2c4_platform_data = {
192         .bus_clk_rate   = 100000,
193 };
194
195 static struct tegra_i2c_platform_data bonaire_i2c5_platform_data = {
196         .bus_clk_rate   = 100000,
197 };
198
199 static struct tegra_i2c_platform_data bonaire_i2c6_platform_data = {
200         .bus_clk_rate   = 100000,
201 };
202
203 static void bonaire_i2c_init(void)
204 {
205         tegra14_i2c_device1.dev.platform_data = &bonaire_i2c1_platform_data;
206         tegra14_i2c_device2.dev.platform_data = &bonaire_i2c2_platform_data;
207         tegra14_i2c_device3.dev.platform_data = &bonaire_i2c3_platform_data;
208         tegra14_i2c_device4.dev.platform_data = &bonaire_i2c4_platform_data;
209         tegra14_i2c_device5.dev.platform_data = &bonaire_i2c5_platform_data;
210         tegra14_i2c_device6.dev.platform_data = &bonaire_i2c6_platform_data;
211
212         i2c_register_board_info(0, bonaire_i2c_bus1_board_info, 1);
213
214         platform_device_register(&tegra14_i2c_device6);
215         platform_device_register(&tegra14_i2c_device5);
216         platform_device_register(&tegra14_i2c_device4);
217         platform_device_register(&tegra14_i2c_device3);
218         platform_device_register(&tegra14_i2c_device2);
219         platform_device_register(&tegra14_i2c_device1);
220 }
221
222 static struct platform_device *bonaire_spi_devices[] __initdata = {
223         &tegra11_spi_device4,
224 };
225
226 struct spi_clk_parent spi_parent_clk_bonaire[] = {
227         [0] = {.name = "pll_p"},
228 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
229         [1] = {.name = "pll_m"},
230         [2] = {.name = "clk_m"},
231 #else
232         [1] = {.name = "clk_m"},
233 #endif
234 };
235
236 static struct tegra_spi_platform_data bonaire_spi_pdata = {
237         .is_dma_based           = true,
238         .max_dma_buffer         = 16 * 1024,
239         .is_clkon_always        = false,
240         .max_rate               = 25000000,
241 };
242
243 static void __init bonaire_spi_init(void)
244 {
245         int i;
246         struct clk *c;
247         struct board_info board_info, display_board_info;
248
249         tegra_get_board_info(&board_info);
250         tegra_get_display_board_info(&display_board_info);
251
252         for (i = 0; i < ARRAY_SIZE(spi_parent_clk_bonaire); ++i) {
253                 c = tegra_get_clock_by_name(spi_parent_clk_bonaire[i].name);
254                 if (IS_ERR_OR_NULL(c)) {
255                         pr_err("Not able to get the clock for %s\n",
256                                         spi_parent_clk_bonaire[i].name);
257                 continue;
258                 }
259                 spi_parent_clk_bonaire[i].parent_clk = c;
260                 spi_parent_clk_bonaire[i].fixed_clk_rate = clk_get_rate(c);
261         }
262         bonaire_spi_pdata.parent_clk_list = spi_parent_clk_bonaire;
263         bonaire_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk_bonaire);
264         tegra11_spi_device4.dev.platform_data = &bonaire_spi_pdata;
265         platform_add_devices(bonaire_spi_devices,
266                         ARRAY_SIZE(bonaire_spi_devices));
267 }
268
269 #define GPIO_KEY(_id, _gpio, _iswake)           \
270         {                                       \
271                 .code = _id,                    \
272                 .gpio = TEGRA_GPIO_##_gpio,     \
273                 .active_low = 1,                \
274                 .desc = #_id,                   \
275                 .type = EV_KEY,                 \
276                 .wakeup = _iswake,              \
277                 .debounce_interval = 10,        \
278         }
279
280 /* !!!FIXME!!! THESE ARE VENTANA DEFINITIONS */
281 static struct gpio_keys_button bonaire_keys[] = {
282         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
283         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
284         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
285         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
286         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
287         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
288 };
289
290 static struct gpio_keys_platform_data bonaire_keys_platform_data = {
291         .buttons        = bonaire_keys,
292         .nbuttons       = ARRAY_SIZE(bonaire_keys),
293 };
294
295 static struct platform_device bonaire_keys_device = {
296         .name   = "gpio-keys",
297         .id     = 0,
298         .dev    = {
299                 .platform_data  = &bonaire_keys_platform_data,
300         },
301 };
302
303 static struct resource tegra_rtc_resources[] = {
304         [0] = {
305                 .start = TEGRA_RTC_BASE,
306                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
307                 .flags = IORESOURCE_MEM,
308         },
309         [1] = {
310                 .start = INT_RTC,
311                 .end = INT_RTC,
312                 .flags = IORESOURCE_IRQ,
313         },
314 };
315
316 static struct platform_device tegra_rtc_device = {
317         .name = "tegra_rtc",
318         .id   = -1,
319         .resource = tegra_rtc_resources,
320         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
321 };
322
323 #if defined(CONFIG_MTD_NAND_TEGRA)
324 static struct resource nand_resources[] = {
325         [0] = {
326                 .start = INT_NANDFLASH,
327                 .end   = INT_NANDFLASH,
328                 .flags = IORESOURCE_IRQ
329         },
330         [1] = {
331                 .start = TEGRA_NAND_BASE,
332                 .end = TEGRA_NAND_BASE + TEGRA_NAND_SIZE - 1,
333                 .flags = IORESOURCE_MEM
334         }
335 };
336
337 static struct tegra_nand_chip_parms nand_chip_parms[] = {
338         /* Samsung K5E2G1GACM */
339         [0] = {
340                 .vendor_id   = 0xEC,
341                 .device_id   = 0xAA,
342                 .capacity    = 256,
343                 .timing      = {
344                         .trp            = 21,
345                         .trh            = 15,
346                         .twp            = 21,
347                         .twh            = 15,
348                         .tcs            = 31,
349                         .twhr           = 60,
350                         .tcr_tar_trr    = 20,
351                         .twb            = 100,
352                         .trp_resp       = 30,
353                         .tadl           = 100,
354                 },
355         },
356         /* Hynix H5PS1GB3EFR */
357         [1] = {
358                 .vendor_id   = 0xAD,
359                 .device_id   = 0xDC,
360                 .capacity    = 512,
361                 .timing      = {
362                         .trp            = 12,
363                         .trh            = 10,
364                         .twp            = 12,
365                         .twh            = 10,
366                         .tcs            = 20,
367                         .twhr           = 80,
368                         .tcr_tar_trr    = 20,
369                         .twb            = 100,
370                         .trp_resp       = 20,
371                         .tadl           = 70,
372                 },
373         },
374 };
375
376 struct tegra_nand_platform nand_data = {
377         .max_chips      = 8,
378         .chip_parms     = nand_chip_parms,
379         .nr_chip_parms  = ARRAY_SIZE(nand_chip_parms),
380 };
381
382 struct platform_device tegra_nand_device = {
383         .name          = "tegra_nand",
384         .id            = -1,
385         .resource      = nand_resources,
386         .num_resources = ARRAY_SIZE(nand_resources),
387         .dev            = {
388                 .platform_data = &nand_data,
389         },
390 };
391 #endif
392
393 static struct platform_device *bonaire_devices[] __initdata = {
394 #if ENABLE_OTG
395         &tegra_otg_device,
396 #endif
397         &debug_uart,
398         &tegra_pmu_device,
399         &tegra_rtc_device,
400 #if !defined(USB_HOST_ONLY)
401         &tegra_udc_device,
402 #endif
403 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
404         &tegra11_se_device,
405 #endif
406 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
407         &tegra_smmu_device,
408 #endif
409         &bonaire_keys_device,
410 #if defined(CONFIG_SND_HDA_TEGRA)
411         &tegra_hda_device,
412 #endif
413         &tegra_avp_device,
414 #if defined(CONFIG_MTD_NAND_TEGRA)
415         &tegra_nand_device,
416 #endif
417 };
418
419 static int __init bonaire_touch_init(void)
420 {
421         return 0;
422 }
423
424 static struct tegra_usb_platform_data tegra_udc_pdata = {
425         .port_otg = false,
426         .has_hostpc = true,
427         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
428         .op_mode = TEGRA_USB_OPMODE_DEVICE,
429         .u_data.dev = {
430                 .vbus_pmu_irq = 0,
431                 .vbus_gpio = -1,
432                 .charging_supported = false,
433                 .remote_wakeup_supported = false,
434         },
435         .u_cfg.utmi = {
436                 .hssync_start_delay = 0,
437                 .elastic_limit = 16,
438                 .idle_wait_delay = 17,
439                 .term_range_adj = 6,
440                 .xcvr_setup = 8,
441                 .xcvr_lsfslew = 2,
442                 .xcvr_lsrslew = 2,
443                 .xcvr_setup_offset = 0,
444                 .xcvr_use_fuses = 1,
445         },
446 };
447
448 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
449         .port_otg = false,
450         .has_hostpc = true,
451         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
452         .op_mode = TEGRA_USB_OPMODE_HOST,
453         .u_data.host = {
454                 .vbus_gpio = -1,
455                 /*.vbus_reg = "vdd_vbus_micro_usb",*/
456                 .hot_plug = true,
457                 .remote_wakeup_supported = true,
458                 .power_off_on_suspend = true,
459         },
460         .u_cfg.utmi = {
461                 .hssync_start_delay = 0,
462                 .elastic_limit = 16,
463                 .idle_wait_delay = 17,
464                 .term_range_adj = 6,
465                 .xcvr_setup = 15,
466                 .xcvr_lsfslew = 2,
467                 .xcvr_lsrslew = 2,
468                 .xcvr_setup_offset = 0,
469                 .xcvr_use_fuses = 1,
470         },
471 };
472
473 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
474         .port_otg = false,
475         .has_hostpc = true,
476         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
477         .op_mode         = TEGRA_USB_OPMODE_HOST,
478         .u_data.host = {
479                 .vbus_gpio = -1,
480                 .hot_plug = true,
481                 .remote_wakeup_supported = true,
482                 .power_off_on_suspend = true,
483         },
484         .u_cfg.utmi = {
485                 .hssync_start_delay = 0,
486                 .elastic_limit = 16,
487                 .idle_wait_delay = 17,
488                 .term_range_adj = 6,
489                 .xcvr_setup = 15,
490                 .xcvr_lsfslew = 2,
491                 .xcvr_lsrslew = 2,
492                 .xcvr_setup_offset = 0,
493                 .xcvr_use_fuses = 1,
494         },
495 };
496
497 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
498         .port_otg = false,
499         .has_hostpc = true,
500         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
501         .op_mode         = TEGRA_USB_OPMODE_HOST,
502         .u_data.host = {
503                 .vbus_gpio = -1,
504                 /*.vbus_reg = "vdd_vbus_typea_usb",*/
505                 .hot_plug = true,
506                 .remote_wakeup_supported = true,
507                 .power_off_on_suspend = true,
508         },
509         .u_cfg.utmi = {
510                 .hssync_start_delay = 0,
511                 .elastic_limit = 16,
512                 .idle_wait_delay = 17,
513                 .term_range_adj = 6,
514                 .xcvr_setup = 8,
515                 .xcvr_lsfslew = 2,
516                 .xcvr_lsrslew = 2,
517                 .xcvr_setup_offset = 0,
518                 .xcvr_use_fuses = 1,
519         },
520 };
521
522 static void bonaire_usb_init(void)
523 {
524 #if defined(USB_HOST_ONLY)
525         tegra_ehci1_device.dev.platform_data = &tegra_ehci1_utmi_pdata;
526         platform_device_register(&tegra_ehci1_device);
527 #else
528         /* setup the udc platform data */
529         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
530
531 #endif
532 }
533
534 static struct platform_device *bonaire_hs_uart_devices[] __initdata = {
535         &tegra_uartd_device, &tegra_uartb_device, &tegra_uartc_device,
536 };
537
538 static struct uart_clk_parent uart_parent_clk[] = {
539         [0] = {.name = "clk_m"},
540 };
541
542 static struct tegra_uart_platform_data bonaire_uart_pdata;
543 static struct tegra_uart_platform_data bonaire_loopback_uart_pdata;
544
545 static void __init bonaire_hs_uart_init(void)
546 {
547         struct clk *c;
548         int i;
549
550         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
551                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
552                 if (IS_ERR_OR_NULL(c)) {
553                         pr_err("Not able to get the clock for %s\n",
554                                         uart_parent_clk[i].name);
555                         continue;
556                 }
557                 uart_parent_clk[i].parent_clk = c;
558                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
559         }
560         bonaire_uart_pdata.parent_clk_list = uart_parent_clk;
561         bonaire_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
562         bonaire_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
563         bonaire_loopback_uart_pdata.parent_clk_count =
564                 ARRAY_SIZE(uart_parent_clk);
565         bonaire_loopback_uart_pdata.is_loopback = true;
566         tegra_uartb_device.dev.platform_data = &bonaire_uart_pdata;
567         tegra_uartc_device.dev.platform_data = &bonaire_uart_pdata;
568         tegra_uartd_device.dev.platform_data = &bonaire_uart_pdata;
569         platform_add_devices(bonaire_hs_uart_devices,
570                         ARRAY_SIZE(bonaire_hs_uart_devices));
571 }
572
573 static struct tegra_pci_platform_data bonaire_pcie_platform_data = {
574         .port_status[0] = 1,
575         .port_status[1] = 1,
576         .use_dock_detect        = 0,
577         .gpio                   = 0,
578 };
579
580 static void bonaire_pcie_init(void)
581 {
582         tegra_pci_device.dev.platform_data = &bonaire_pcie_platform_data;
583         platform_device_register(&tegra_pci_device);
584 }
585
586 static void __init tegra_bonaire_init(void)
587 {
588         tegra_clk_init_from_table(bonaire_clk_init_table);
589         tegra_enable_pinmux();
590         bonaire_pinmux_init();
591         tegra_soc_device_init("bonaire");
592
593 #ifdef CONFIG_TEGRA_FPGA_PLATFORM
594         if (tegra_platform_is_qt())
595                 debug_uart_platform_data[0].uartclk =
596                                                 tegra_clk_measure_input_freq();
597 #endif
598
599         platform_add_devices(bonaire_devices, ARRAY_SIZE(bonaire_devices));
600
601 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
602         bonaire_power_off_init();
603 #endif
604         tegra_io_dpd_init();
605         bonaire_hs_uart_init();
606         bonaire_sdhci_init();
607         bonaire_i2c_init();
608         bonaire_spi_init();
609         bonaire_regulator_init();
610         bonaire_suspend_init();
611         bonaire_touch_init();
612         bonaire_usb_init();
613         bonaire_panel_init();
614         bonaire_bt_rfkill();
615         bonaire_pcie_init();
616 }
617
618 static void __init tegra_bonaire_reserve(void)
619 {
620 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
621         tegra_reserve(0, SZ_4M, 0);
622 #else
623 #if defined(CONFIG_TEGRA_SIMULATION_SPLIT_MEM)
624         if (tegra_split_mem_active())
625                 tegra_reserve(0, 0, 0);
626         else
627 #endif
628                 tegra_reserve(SZ_128M, SZ_4M, 0);
629 #endif
630 }
631
632 static const char * const bonaire_dt_board_compat[] = {
633         "nvidia,bonaire",
634         NULL
635 };
636
637 MACHINE_START(BONAIRE, BONAIRE_BOARD_NAME)
638         .atag_offset    = 0x80000100,
639         .map_io         = tegra_map_common_io,
640         .reserve        = tegra_bonaire_reserve,
641         .init_early     = tegra12x_init_early,
642         .init_irq       = tegra_dt_init_irq,
643         .handle_irq     = gic_handle_irq,
644         .init_machine   = tegra_bonaire_init,
645         .timer          = &tegra_sys_timer,
646         .dt_compat      = bonaire_dt_board_compat,
647 MACHINE_END